* config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL.
(smaxsi3): Same.
(uminsi3): Same.
(umaxsi3): Same.
(abssi2_nopower): Disallow when TARGET_ISEL.
(*ne0): Same.
(negsf2): Change to expand and rename old pattern to *negsf2.
(abssf2): Change to expand and rename old pattern to *abssf2.
New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2,
fixunssfsi2.
Change patterns that check for TARGET_HARD_FLOAT or
TARGET_SOFT_FLOAT to also check TARGET_FPRS.
* config/rs6000/rs6000.c: New globals: rs6000_spe_abi,
rs6000_isel, rs6000_fprs, rs6000_isel_string.
(rs6000_override_options): Add 8540 case to
processor_target_table.
Set rs6000_isel for the 8540.
Call rs6000_parse_isel_option.
(enable_mask_for_builtins): New.
(rs6000_parse_isel_option): New.
(rs6000_parse_abi_options): Add spe and no-spe.
(easy_fp_constant): Treat !TARGET_FPRS as soft-float.
(rs6000_legitimize_address): Check for TARGET_FPRS when checking
for TARGET_HARD_FLOAT.
Add case for SPE_VECTOR_MODE.
(rs6000_legitimize_reload_address): Handle SPE vector modes.
(rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE
vector modes.
Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT.
(rs6000_emit_move): Check for TARGET_FPRS.
Add cases for SPE vector modes.
(function_arg_boundary): Return 64 for SPE vector modes.
(function_arg_advance): Check for TARGET_FPRS and
Handle SPE vectors.
(function_arg): Same.
(setup_incoming_varargs): Check for TARGET_FPRS.
(rs6000_va_arg): Same.
(struct builtin_description): Un-constify mask field. Move up in
file.
(bdesc_2arg): Un-constify and add SPE builtins.
(bdesc_1arg): Same.
(bdesc_spe_predicates): New.
(bdesc_spe_evsel): New.
(rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins.
(rs6000_expand_binop_builtin): Same.
(bdesc_2arg_spe): New.
(spe_expand_builtin): New.
(spe_expand_predicate_builtin): New.
(spe_expand_evsel_builtin): New.
(rs6000_expand_builtin): Call spe_expand_builtin for SPE.
(rs6000_init_builtins): Initialize SPE builtins. Call
rs6000_common_init_builtins.
(altivec_init_builtins): Move all non-altivec builtin code to...
(rs6000_common_init_builtins): ...here. New function.
(branch_positive_comparison_operator): Allow NE code for SPE.
(ccr_bit): Return correct ccr bit for SPE fp.
(print_operand): Emit crnor in 'D' case for SPE.
New case 't'.
Add SPE code for 'y' case.
(rs6000_generate_compare): Generate rtl for SPE fp.
(output_cbranch): Handle SPE hard floats.
(rs6000_emit_cmove): Handle isel.
(rs6000_emit_int_cmove): New.
(output_isel): New.
(rs6000_stack_info): Adjust stack frame so GPRs are saved in
64-bits for SPE.
(debug_stack_info): Add SPE info.
(gen_frame_mem_offset): New.
(rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi.
Change mode of frame pointer, when saving it, to Pmode.
(rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi.
Misc cleanups and use gen_frame_mem_offset when appropriate.
* config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540.
(TARGET_SPE_ABI): New.
(TARGET_SPE): New.
(TARGET_ISEL): New.
(TARGET_FPRS): New.
(FIXED_SCRATCH): New.
(RTX_COSTS): Add PROCESSOR_PPC8540.
(ASM_CPU_SPEC): Add case for 8540.
(TARGET_OPTIONS): Add isel= case.
(rs6000_spe_abi): New.
(rs6000_isel): New.
(rs6000_fprs): New.
(rs6000_isel_string): New.
(UNITS_PER_SPE_WORD): New.
(LOCAL_ALIGNMENT): Adjust for SPE.
(HARD_REGNO_MODE_OK): Same.
(DATA_ALIGNMENT): Same.
(MEMBER_TYPE_FORCES_BLK): New.
(FIRST_PSEUDO_REGISTER): Set to 113.
(FIXED_REGISTERS): Add SPE registers.
(reg_class): Same.
(REG_CLASS_NAMES): Same.
(REG_CLASS_CONTENTS): Same.
(REGNO_REG_CLASS): Same.
(REGISTER_NAMES): Same.
(DEBUG_REGISTER_NAMES): Same.
(ADDITIONAL_REGISTER_NAMES): Same.
(CALL_USED_REGISTERS): Same.
(CALL_REALLY_USED_REGISTERS): Same.
(SPE_ACC_REGNO): New.
(SPEFSCR_REGNO): New.
(SPE_SIMD_REGNO_P): New.
(HARD_REGNO_NREGS): Adjust for SPE.
(VECTOR_MODE_SUPPORTED_P): Same.
(REGNO_REG_CLASS): Same.
(FUNCTION_VALUE): Same.
(LIBCALL_VALUE): Same.
(LEGITIMATE_OFFSET_ADDRESS_P): Same.
(SPE_VECTOR_MODE): New.
(CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on
the GPRs. Set FIXED_SCRATCH fixed in SPE case.
(rs6000_stack): Add spe_gp_size, spe_padding_size,
spe_gp_save_offset.
(USE_FP_FOR_ARG_P): Check for TARGET_FPRS.
(LEGITIMATE_LO_SUM_ADDRESS_P): Same.
(SPE_CONST_OFFSET_OK): New.
(rs6000_builtins): Add SPE builtins.
* testsuite/gcc.dg/ppc-spe.c: New.
* config/rs6000/eabispe.h: New.
* config/rs6000/spe.h: New.
* config/rs600/spe.md: New.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
__SIMD__ for TARGET_SPE.
* config.gcc: Add powerpc-*-eabispe* case.
Add spe.h to user headers for powerpc.
* config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL.
(smaxsi3): Same.
(uminsi3): Same.
(umaxsi3): Same.
(abssi2_nopower): Disallow when TARGET_ISEL.
(*ne0): Same.
(negsf2): Change to expand and rename old pattern to *negsf2.
(abssf2): Change to expand and rename old pattern to *abssf2.
New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2,
fixunssfsi2.
Change patterns that check for TARGET_HARD_FLOAT or
TARGET_SOFT_FLOAT to also check TARGET_FPRS.
* config/rs6000/rs6000.c: New globals: rs6000_spe_abi,
rs6000_isel, rs6000_fprs, rs6000_isel_string.
(rs6000_override_options): Add 8540 case to
processor_target_table.
Set rs6000_isel for the 8540.
Call rs6000_parse_isel_option.
(enable_mask_for_builtins): New.
(rs6000_parse_isel_option): New.
(rs6000_parse_abi_options): Add spe and no-spe.
(easy_fp_constant): Treat !TARGET_FPRS as soft-float.
(rs6000_legitimize_address): Check for TARGET_FPRS when checking
for TARGET_HARD_FLOAT.
Add case for SPE_VECTOR_MODE.
(rs6000_legitimize_reload_address): Handle SPE vector modes.
(rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE
vector modes.
Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT.
(rs6000_emit_move): Check for TARGET_FPRS.
Add cases for SPE vector modes.
(function_arg_boundary): Return 64 for SPE vector modes.
(function_arg_advance): Check for TARGET_FPRS and
Handle SPE vectors.
(function_arg): Same.
(setup_incoming_varargs): Check for TARGET_FPRS.
(rs6000_va_arg): Same.
(struct builtin_description): Un-constify mask field. Move up in
file.
(bdesc_2arg): Un-constify and add SPE builtins.
(bdesc_1arg): Same.
(bdesc_spe_predicates): New.
(bdesc_spe_evsel): New.
(rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins.
(rs6000_expand_binop_builtin): Same.
(bdesc_2arg_spe): New.
(spe_expand_builtin): New.
(spe_expand_predicate_builtin): New.
(spe_expand_evsel_builtin): New.
(rs6000_expand_builtin): Call spe_expand_builtin for SPE.
(rs6000_init_builtins): Initialize SPE builtins. Call
rs6000_common_init_builtins.
(altivec_init_builtins): Move all non-altivec builtin code to...
(rs6000_common_init_builtins): ...here. New function.
(branch_positive_comparison_operator): Allow NE code for SPE.
(ccr_bit): Return correct ccr bit for SPE fp.
(print_operand): Emit crnor in 'D' case for SPE.
New case 't'.
Add SPE code for 'y' case.
(rs6000_generate_compare): Generate rtl for SPE fp.
(output_cbranch): Handle SPE hard floats.
(rs6000_emit_cmove): Handle isel.
(rs6000_emit_int_cmove): New.
(output_isel): New.
(rs6000_stack_info): Adjust stack frame so GPRs are saved in
64-bits for SPE.
(debug_stack_info): Add SPE info.
(gen_frame_mem_offset): New.
(rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi.
Change mode of frame pointer, when saving it, to Pmode.
(rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi.
Misc cleanups and use gen_frame_mem_offset when appropriate.
* config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540.
(TARGET_SPE_ABI): New.
(TARGET_SPE): New.
(TARGET_ISEL): New.
(TARGET_FPRS): New.
(FIXED_SCRATCH): New.
(RTX_COSTS): Add PROCESSOR_PPC8540.
(ASM_CPU_SPEC): Add case for 8540.
(TARGET_OPTIONS): Add isel= case.
(rs6000_spe_abi): New.
(rs6000_isel): New.
(rs6000_fprs): New.
(rs6000_isel_string): New.
(UNITS_PER_SPE_WORD): New.
(LOCAL_ALIGNMENT): Adjust for SPE.
(HARD_REGNO_MODE_OK): Same.
(DATA_ALIGNMENT): Same.
(MEMBER_TYPE_FORCES_BLK): New.
(FIRST_PSEUDO_REGISTER): Set to 113.
(FIXED_REGISTERS): Add SPE registers.
(reg_class): Same.
(REG_CLASS_NAMES): Same.
(REG_CLASS_CONTENTS): Same.
(REGNO_REG_CLASS): Same.
(REGISTER_NAMES): Same.
(DEBUG_REGISTER_NAMES): Same.
(ADDITIONAL_REGISTER_NAMES): Same.
(CALL_USED_REGISTERS): Same.
(CALL_REALLY_USED_REGISTERS): Same.
(SPE_ACC_REGNO): New.
(SPEFSCR_REGNO): New.
(SPE_SIMD_REGNO_P): New.
(HARD_REGNO_NREGS): Adjust for SPE.
(VECTOR_MODE_SUPPORTED_P): Same.
(REGNO_REG_CLASS): Same.
(FUNCTION_VALUE): Same.
(LIBCALL_VALUE): Same.
(LEGITIMATE_OFFSET_ADDRESS_P): Same.
(SPE_VECTOR_MODE): New.
(CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on
the GPRs. Set FIXED_SCRATCH fixed in SPE case.
(rs6000_stack): Add spe_gp_size, spe_padding_size,
spe_gp_save_offset.
(USE_FP_FOR_ARG_P): Check for TARGET_FPRS.
(LEGITIMATE_LO_SUM_ADDRESS_P): Same.
(SPE_CONST_OFFSET_OK): New.
(rs6000_builtins): Add SPE builtins.
* testsuite/gcc.dg/ppc-spe.c: New.
* config/rs6000/eabispe.h: New.
* config/rs6000/spe.h: New.
* config/rs600/spe.md: New.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
__SIMD__ for TARGET_SPE.
* config.gcc: Add powerpc-*-eabispe* case.
Add spe.h to user headers for powerpc.
* tree.c (cp_build_qualified_type_real): When copying
pointer-to-method types, unshare the record that holds
the cached pointer-to-member-function type.
In testsuite/ChangeLog:
* g++.dg/other/ptrmem4.C: New testcase.
Richard Earnshaw [Wed, 24 Jul 2002 18:29:00 +0000 (18:29 +0000)]
arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output pattern.
* arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output
pattern.
(arm_buneq_reversed, arm_bltgt_reversed): Likewise.
(movsicc, movsfcc, movdfcc): FAIL if UNEQ or LTGT.
Tom Tromey [Wed, 24 Jul 2002 17:48:41 +0000 (17:48 +0000)]
natFileDescriptorWin32.cc (setLength): New method.
2002-07-24 Tom Tromey <tromey@redhat.com>
Tony Kimball <alk@pobox.com>
* java/io/natFileDescriptorWin32.cc (setLength): New method.
* java/io/natFileDescriptorPosix.cc (setLength): New method.
* java/io/RandomAccessFile.java (setLength): New method.
* java/io/natFileDescriptorEcos.cc (setLength): New method.
* java/io/FileDescriptor.java (setLength): New method.
Co-Authored-By: Tony Kimball <alk@pobox.com>
From-SVN: r55715
Chris Demetriou [Wed, 24 Jul 2002 17:14:33 +0000 (17:14 +0000)]
elf.h (STARTFILE_SPEC): Never include crt0.o.
2002-07-24 Chris Demetriou <cgd@broadcom.com>
* config/mips/elf.h (STARTFILE_SPEC): Never include crt0.o.
* config/mips/elf64.h (STARTFILE_SPEC): Likewise.
* config/mips/isa3264.h (STARTFILE_SPEC): Do not redefine.
* docs/html/documentation.html: Remove libstdc++-v3.0.86 links,
confusing usage of "latest."
De-tangle contributor information from introductory notes.
Move abi.txt link placement, activate.
Re-organize.
Move chapter info into old FAQ format.
* docs/html/organization.html: Removed, obsoleted by doxygen work.
* docs/html/abi.txt: Add notes on testing ABI changes.
Alan Modra [Wed, 24 Jul 2002 07:15:10 +0000 (07:15 +0000)]
rs6000.md: Remove scratch reg on insns using addze and similar (plus (comparison r1 r2)...
* config/rs6000/rs6000.md: Remove scratch reg on insns using
addze and similar (plus (comparison r1 r2) r3) insns. Add
missing scratch reg in one case. Formatting fixes.
reload.c (find_reloads_toplev): Use simplify_gen_subreg.
gcc:
* reload.c (find_reloads_toplev): Use simplify_gen_subreg.
* simplify-rtx.c (simplify_subreg): When converting to a non-int
mode, try to convert to an integer mode of matching size first.
gcc/testsuite:
* gcc.c-torture/compile/simd-4.c: New test.
* real.c (REAL_WORDS_BIG_ENDIAN): Make 1 for DEC.
(LARGEST_EXPONENT_IS_NORMAL): Ditto.
(VAX_HALFWORD_ORDER): Define (1 for DEC VAX, 0 otherwise).
(TARGET_G_FLOAT): Default to 0 if not defined.
(ieeetoe): New, common routine to convert target format floats
to internal form.
(e24toe, e53toe): Change to use ieeetoe, distinguish DEC
vs. others.
(e113toe): Change to use ieeetoe.
(REAL_WORDS_BIG_ENDIAN): Make sure it is 0 for DEC and 1 for
IBM.
(e53toe): Assume IEEE if non of DEC, IBM and C4X is defined.
(e64toe): Remove special cases for DEC and IBM. Remove support for
ARM_EXTENDED_IEEE_FORMAT.
(e24toe): Remove special cases for DEC.
(significand_size): Simplify. Indent.
(ieee_format, ieee_24, ieee_53, ieee_64, ieee_113): New.
(etoieee, toieee): New.
(etoe113, toe113, etoe64, toe64, etoe53, toe53, etoe24, toe24): Use
etoieee and toieee for IEEE arithmetic.
Steve Ellcey [Tue, 23 Jul 2002 14:58:04 +0000 (14:58 +0000)]
explow.c (convert_memory_address): Fix conversion of CONSTs.
* gcc/explow.c (convert_memory_address): Fix conversion of CONSTs.
Fix permutation of conversion and plus/mult.
* gcc/builtins.c (expand_builtin_memcpy) Ensure return pointer is
ptr_mode and not Pmode when POINTERS_EXTEND_UNSIGNED is defined.
(expand_builtin_strncpy) Ditto.
(expand_builtin_memset) Ditto.
Richard Earnshaw [Mon, 22 Jul 2002 17:41:27 +0000 (17:41 +0000)]
arm.md (movqi): If optimizing and we can create pseudos...
* arm.md (movqi): If optimizing and we can create pseudos, use
a ZERO_EXTEND to load from memory, then copy the result into the
target.
(movhi): Likewise, but only for ARMv4.
PR c++/7347, c++/7348
* cp-tree.h (tsubst_flags_t): Add tf_parsing.
* decl.c (make_typename_type): Use it.
(make_unbound_class_template): Likewise.
(lookup_name_real): Don't call type_access_control if scope is
template parameter dependent.
* parse.y (template_arg): Call make_unbound_class_template with
tf_parsing set.
(nest_name_specifier): Call make_typename_type with tf_parsing set.
(typename_sub0): Likewise.
(typename_sub1): Likewise.
(instantiate_decl): Push class scope.
* pt.c (regenerate_decl_from_template): Call pushclass and popclass
for both static variable and member function template.
(instantiate_decl) Call pushclass and popclass when tsubst'ing type
and arguments.
* search.c (type_access_control): Do type access for TEMPLATE_DECL
too.
loop.h (LOOP_AUTO_UNROLL): Rename from LOOP_FIRST_PASS.
* loop.h (LOOP_AUTO_UNROLL): Rename from LOOP_FIRST_PASS.
* loop.c (strength_reduce): Update.
* toplev.c (rest_of_compilation): Do unrolling in the first
loop pass, not the second.
Gabriel Dos Reis [Sat, 20 Jul 2002 12:45:45 +0000 (12:45 +0000)]
spew.c (struct uinparsed_test): Replace 'filename' and 'lineno' members with 'locus'.
* spew.c (struct uinparsed_test): Replace 'filename' and 'lineno'
members with 'locus'. Adjust use throughout.
(struct feed): Likewise.
(alloc_unparsed_test): Change prototype, take a 'const location_t *'.
Adjust use.
(snarf_defarg): Use error(), not error_with_file_and_line().
Phil Edwards [Sat, 20 Jul 2002 06:26:27 +0000 (06:26 +0000)]
abi.txt: New file.
2002-07-20 Phil Edwards <pme@gcc.gnu.org>
* docs/html/abi.txt: New file.
* docs/html/23_containers/howto.html: Tweak vector-overhead text.
* docs/html/ext/lwg-active.html, docs/html/ext/lwg-defects.html:
Import from upstream, R22.
* include/bits/char_traits.h, include/bits/stl_iterator.h,
include/bits/stl_iterator_base_types.h, libsupc++/exception,
libsupc++/new, libsupc++/typeinfo: Use @brief markup.
* include/bits/deque.tcc, include/bits/stl_alloc.h,
include/bits/stl_deque.h, include/bits/stl_list.h: Postpone removal
of deprecated functions until 3.4. (Same timeframe, different text.)
* include/bits/stl_vector.h: Ditto. Also do the same cleanups that
the other sequence classes received.
* rtl.def (CODE_LABEL): Remove slot 8.
* rtl.h (struct rtx_def): Document new uses of jump and call fields.
(LABEL_ALTERNATE_NAME): Delete.
(LABEL_KIND, SET_LABEL_KIND, LABEL_ALT_ENTRY_P): New.
* defaults.h: Remove default for ASM_OUTPUT_ALTERNATE_LABEL_NAME.
* final.c (output_alternate_entry_point): New.
(final_scan_insn): Use it instead of
ASM_OUTPUT_ALTERNATE_LABEL_NAME. Do not consider possibility
of a case label being an alternate entry point.
* cfgbuild.c (make_edges, find_bb_boundaries): Use LABEL_ALT_ENTRY_P.
* emit-rtl.c (gen_label_rtx): Adjust call to gen_rtx_CODE_LABEL.
Do not clear LABEL_NUSES (unnecessary) or LABEL_ALTERNATE_NAME
(field deleted).
* print-rtl.c, ra-debug.c: Update code to output CODE_LABELs.
* doc/rtl.texi: Document LABEL_KIND, SET_LABEL_KIND, and
LABEL_ALT_ENTRY_P; not LABEL_ALTERNATE_NAME.
* doc/tm.texi: Delete documentation of
ASM_OUTPUT_ALTERNATE_LABEL_NAME.