Tom Tromey [Mon, 12 Feb 2024 17:12:26 +0000 (10:12 -0700)]
Add return value to DAP scope
A bug report in the DAP specification repository pointed out that it
is typical for DAP implementations to put a function's return value
into the outermost scope.
This patch changes gdb to follow this convention.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31341 Reviewed-By: Kévin Le Gouguec <legouguec@adacore.com>
Tom Tromey [Mon, 12 Feb 2024 15:12:02 +0000 (08:12 -0700)]
Export "finish" return value to Python
This patch changes the Python "stop" event emission code to also add
the function return value, if it is known. This happens when the stop
comes from a "finish" command and when the value can be fetched.
H.J. Lu [Fri, 8 Mar 2024 16:08:02 +0000 (08:08 -0800)]
gas: Fix x86 build with GCC 6.4
Add "()" to silence GCC 6.4:
.../gas/config/tc-i386.c: In function ‘x86_ginsn_lea’:
.../gas/config/tc-i386.c:5738:19: error: logical not is only applied to the left hand side of comparison [-Werror=logical-not-parentheses]
if (!i.base_reg != (!i.index_reg || i.index_reg->reg_num == RegIZ))
^~
cc1: all warnings being treated as errors
Tom Tromey [Thu, 25 Jan 2024 13:48:22 +0000 (06:48 -0700)]
Avoid race when reading dwz file
PR gdb/31260 points out a race introduced by the background reading
changes. If a given objfile is re-opened when it is already being
read, dwarf2_initialize_objfile will call dwarf2_read_dwz_file again,
causing the 'dwz_file' to be reset.
This patch fixes the problem by arranging to open the dwz just once:
when the dwarf2_per_bfd object is created.
H.J. Lu [Wed, 6 Mar 2024 23:23:56 +0000 (15:23 -0800)]
bfd: Don't hard-code BFD_JUMP_TABLE_COPY
In BFD_JUMP_TABLE_COPY, replace _bfd_generic_init_private_section_data
with NAME##_init_private_section_data so that ELF targets can properly
replace it with _bfd_elf_init_private_section_data.
Jiawei [Wed, 28 Feb 2024 08:27:17 +0000 (16:27 +0800)]
RISC-V: Support Zabha extension.
The Zabha extension[1] supports for byte and halfword
atomic memory operations. This patch add all instructions
include in Zabha. Further work is waiting Zacas[2] merge.
Lulu Cai [Wed, 24 Jan 2024 09:43:20 +0000 (17:43 +0800)]
LoongArch: Delete extra instructions when TLS type transition
This modification mainly changes the timing of type transition,
adds relaxation to the old LE instruction sequence, and fixes
bugs in extreme code models.
We strictly distinguish between type transition and relaxation.
Type transition is from one type to another, while relaxation
is the removal of instructions under the same TLS type. Detailed
instructions are as follows:
1. For type transition, only the normal code model of DESC/IE
does type transition, and each relocation is accompanied by a
RELAX relocation. Neither abs nor extreme will do type transition,
and no RELAX relocation will be generated.
The extra instructions when DESC transitions to other TLS types
will be deleted during the type transition.
2. Implemented relaxation for the old LE instruction sequence.
The first two instructions of LE's 32-bit and 64-bit models
use the same relocations and cannot be distinguished based on
relocations. Therefore, for LE's instruction sequence, any code
model will try to relax.
3. Some function names have been adjusted to facilitate understanding,
parameters have been adjusted, and unused macros have been deleted.
Andrew Burgess [Thu, 1 Feb 2024 12:57:11 +0000 (12:57 +0000)]
gdb/testsuite: fix duplicate test names in gdb.trace/circ.exp
This fixes some duplicate test names in gdb.trace/circ.exp when using
native-gdbserver and native-extended-gdbserver boards.
In this test we set the trace buffer size twice. The same test name
was used each time the size was adjusted.
I've fixed this issue by:
1. Creating a new proc, set_trace_buffer_size, which factors out the
code to change the buffer size, and uses test names based on the
size we're setting the buffer too,
2. Calling the new proc each time we want to adjust the buffer size.
After this the duplicate test names are resolved. There should be no
change in what is tested after this commit.
Andrew Burgess [Thu, 1 Feb 2024 12:49:02 +0000 (12:49 +0000)]
gdb/testsuite: fix some more duplicate test names in gdb.trace/
This commit fixes some duplicate test names in the gdb.trace/
directory when run with the native-gdbserver and
native-extended-gdbserver boards. In this case the duplicates relate
to the calls to gdb_compile_pthreads which emits a fixed PASS message,
as there are two calls to gdb_compile_pthreads we get a duplicate PASS
message.
In both cases the problem is fixed by adding a with_test_prefix around
one of the compilations, however, I've made additional changes to
clean up the tests a little while I was working on them:
1. Switch to use prepare_for_testing instead of
gdb_compile_pthreads. By passing the 'pthreads' option this does
call gdb_compile_pthreads under the hood, but using the standard
compile function is cleaner,
2. Using prepare_for_testing removes the need to call clean_restart
immediately afterwards, so those calls are removed,
3. I removed the unneeded $executable and $expfile globals, where
the $executable global was used I've replaced this with $binfile,
4. When we compile two executables I've now given these different
names so that both exist at the end of the test run,
5. Removed a gdb_reinitialize_dir call, this is covered by
clean_restart,
6. Use gdb_test_no_output where it makes sense.
I now see no duplicate test names when running these test scripts.
There should be no change in what is being tested after this commit.
Hui Li [Tue, 27 Feb 2024 01:18:10 +0000 (09:18 +0800)]
gdb: LoongArch: Change LOONGARCH_FIRST_FP_REGNUM to 35
There is an assertion error "gdb_assert (n < tdesc->reg_defs.size ())"
in find_register_by_number() when gdb connects to gdbserver, this
is because the value of LOONGARCH_LINUX_NUM_GREGSET (45, which contains
10 reserved regs) is different with the number of regs (35, which not
contains 10 reserved regs) in file gdb/features/loongarch/base64.xml.
Add a new macro LOONGARCH_USED_NUM_GREGSET which is defined as 35 to
keep consistent with the gdb/features/loongarch/base64.xml, and then
define LOONGARCH_FIRST_FP_REGNUM as LOONGARCH_USED_NUM_GREGSET so that
all the reg numbers in regcache are consistent with tdesc reg numbers.
Process ./test created; pid = 67683
Listening on port 5678
Remote debugging from host 192.168.1.136, port 6789
gdbserver/regcache.cc:205: A problem internal to GDBserver has been detected.
find_register_by_number: Assertion 'n < tdesc->reg_defs.size ()' failed.
Output on the host machine:
Remote debugging using 192.168.1.123:5678
Remote connection closed
Signed-off-by: Hui Li <lihui@loongson.cn> Approved-By: John Baldwin <jhb@FreeBSD.org> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Tom Tromey [Fri, 9 Feb 2024 23:22:53 +0000 (16:22 -0700)]
Fix TUI text centering
In a couple of spots, the TUI tries to center some text in the window.
Andrew noticed that the calculation is done strangely and the text
ends up somewhat to the left of center.
With <operand-type> being one of:
- base register
- displacement
- [vector] index register
- length
- access register
- control register
- floating-point register
- general-purpose register
- vector register
- [un]signed number
gas/
* config/tc-s390.c: Provide missing operand type in error
message.
* testsuite/gas/s390/zarch-base-index-0-err.l: Update test case
result validation patterns to operand number in operand syntax
error messages.
* testsuite/gas/s390/zarch-omitted-base-index-err.l: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Provide operand number in assembler warning and error messages
Prepend the operand number "operand %d:" to the s390-specific assembler
operand parsing warning and error messages.
While at it reword the custom operand out of range error message text to
be closer to the one used by as_bad_value_out_of_range(). Additionally
reword the invalid FPR pair warning message to make it nicer.
gas/
* config/tc-s390.c: Print operand number in error messages.
* testsuite/gas/s390/zarch-base-index-0-err.l: Update test case
verification patterns to accept syntax error messages now
containing the operand number.
* testsuite/gas/s390/zarch-omitted-base-index-err.l: Likewise.
* testsuite/gas/s390/zarch-warn-areg-zero.l: Likewise.
* testsuite/gas/s390/zarch-z9-109-err.l: Likewise.
* testsuite/gas/s390/zarch-z900-err.l: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Allow to explicitly omit base register operand in assembly
The base register operand B may be omitted in D(B) by coding D and in
D(L,B) by coding D(L). The index register operand X may be omitted in
D(X,B) by coding D(B) or explicitly omitted by coding D(,B). In both
cases the omitted base register operand value defaults to zero.
Allow to explicitly omit the base register operand B in D(X,B) and
D(L,B) by coding D(X,) and D(L,). Default the omitted base register
operand value to zero.
gas/
* config/tc-s390.c: Allow to explicitly omit the base register
operand in assembly.
* NEWS: Mention that the base register now may be omitted on
s390.
* gas/testsuite/gas/s390/zarch-base-index-0.s: Update test cases
for change to allow to explicitly omit the base register
operand in assembly.
* gas/testsuite/gas/s390/zarch-base-index-0.d: Likewise.
* gas/testsuite/gas/s390/zarch-base-index-0-err.s: Likewise.
* gas/testsuite/gas/s390/zarch-base-index-0-err.l: Likewise.
* gas/testsuite/gas/s390/zarch-omitted-base-index.s: Likewise.
* gas/testsuite/gas/s390/zarch-omitted-base-index.d: Likewise.
* gas/testsuite/gas/s390/zarch-omitted-base-index-err.s:
Likewise.
* gas/testsuite/gas/s390/zarch-omitted-base-index-err.l:
Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Print base register 0 as "0" in disassembly
Base and index register 0 have no effect in address computation:
"A value of zero in the B [base] or X [index] field specifies that no
base or index is to be applied, and, thus, general register 0 cannot be
designated as containing a base address or index."
IBM z/Architecture Principles of Operation [1], chapter "Organization",
section "General Registers".
Index register 0 is omitted in the s390 disassembly. Base register 0 is
omitted in D(B), D(L,B) and D(X,B) - the latter only if the index
register is zero.
To make it more apparent print base register 0 as "0" instead of "%r0",
whenever it would still be printed in the disassembly.
[1]: IBM z/Architecture Principles of Operation, SA22-7832-13,
https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf
opcodes/
* s390-dis.c: Print base register 0 as "0" in disassembly.
binutils/
* NEWS: Mention base register 0 now being printed as "0" in s390
disassembly.
gas/
* testsuite/gas/s390/zarch-base-index-0.d: Update test case
output verification patterns to accept "0" as base base
register due to disassembler output format change.
* gas/testsuite/gas/s390/zarch-omitted-base-index.d: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Warn when register name type does not match operand
Print a warning message when the register type of a specified register
name does not match with the operand's register type:
operand {#}: expected {access|control|floating-point|general|vector}
register name [as {base|index} register]
Introduce a s390-specific assembler option "warn-regtype-mismatch"
with the values "strict", "relaxed", and "no" as well as an option
"no-warn-regtype-mismatch" which control whether the assembler
performs register name type checks and generates above warning messages.
warn-regtype-mismatch=strict:
Perform strict register name type checks.
warn-regtype-mismatch=relaxed:
Perform relaxed register name type checks, which allow floating-point
register (FPR) names %f0 to %f15 to be specified as argument to vector
register (VR) operands and vector register (VR) names %v0 to %v15 to
be specified as argument to floating-point register (FPR) operands.
This is acceptable as the FPRs are embedded into the lower halves of
the VRs. Make "relaxed" the default, as GCC generates assembler code
using FPR and VR interchangeably, which would cause assembler warnings
to be generated with "strict".
warn-regtype-mismatch=no:
no-warn-regtype-mismatch:
Disable any register name type checks.
Tag .insn pseudo mnemonics as such, to skip register name type checks
on those. They need to be skipped, as there do not exist .insn pseudo
mnemonics for every possible operand register type combination. Keep
track of the currently parsed operand number to provide it as reference
in warning messages.
To verify that the introduction of this change does not unnecessarily
affect the compilation of existing code the GNU Binutils, GNU C Library,
and Linux Kernel have been build with the new assembler, verifying that
the assembler did not generate any of the new warning messages.
gas/
* config/tc-s390.c: Handle new assembler options
"[no]warn-regtype-mismatch[=strict|relaxed|no". Annotate
parsed register expressions with register type. Keep track of
operand number being parsed. Print warning message in case of
register type mismatch between instruction operand and parsed
register expression.
* doc/as.texi: Document new s390-specific assembler options
"[no-]warn-regtype-mismatch[=strict|relaxed|no]".
* NEWS: Mention new s390-specific register name type checks and
related assembler option "warn-regtype-mismatch=strict|
relaxed|no".
* testsuite/gas/s390/s390.exp: Add test cases for new assembler
option "warn-regtype-mismatch={strict|relaxed}".
* testsuite/gas/s390/esa-g5.s: Fix register types in tests for
didbr, diebr, tbdr, and tbedr.
* testsuite/gas/s390/zarch-z13.s: Fix register types in tests
for vgef, vgeg, vscef, and vsceg.
* testsuite/gas/s390/zarch-warn-regtype-mismatch-strict.s:
Tests for assembler option "warn-regtype-mismatch=strict".
* testsuite/gas/s390/zarch-warn-regtype-mismatch-strict.l:
Likewise.
* gas/testsuite/gas/s390/zarch-warn-regtype-mismatch-relaxed.s:
Tests for assembler option "warn-regtype-mismatch=relaxed".
* gas/testsuite/gas/s390/zarch-warn-regtype-mismatch-relaxed.l:
Likewise.
* gas/testsuite/gas/s390/zarch-omitted-base-index-err.s: Update
test cases for assembler option "warn-regtype-mismatch"
defaulting to "relaxed".
* testsuite/gas/s390/zarch-omitted-base-index-err.l: Likewise.
include/
* opcode/s390.h (S390_INSTR_FLAG_PSEUDO_MNEMONIC): Add
instruction flag to tag .insn pseudo-mnemonics.
opcodes/
* s390-opc.c (s390_opformats): Tag .insn pseudo-mnemonics as
such.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Reorder, reword, and complete the s390-specific option descriptions.
Align the formatting of s390-specific assembler options to that of the
general assembler options in "as --help".
While at it change a warning message to use the term "z/Architecture"
instead of the deprecated "esame" (ESA Modal Extensions or ESAME) one.
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Add test cases for base/index register 0
While at it add comments to logic to omit base and/or index register 0
in s390 disassembly.
opcodes/
* s390-dis.c: Add comments related to omitting base and/or index
register 0 in disassembly.
gas/
* testsuite/gas/s390/s390.exp: Add test cases for base and/or
index register 0.
* testsuite/gas/s390/zarch-base-index-0.s: Add test cases for
base and/or index register 0.
* testsuite/gas/s390/zarch-base-index-0.d: Likewise.
* testsuite/gas/s390/zarch-base-index-0-err.s: Add error test
cases for base and/or index register 0.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Correct setting of highgprs flag in ELF output
The combination of an architecture size of 32 bits and z/Architecture
mode requires the highgprs flag to be set in the ELF output. It causes
the high-halves of the general purpose registers (GPRs) to be preserved
at run-time, so that the code can use 64-bit GPRs.
The architecture size of 32 bits can either be the default in case of
a default architecture name of "s390" or due to specification of the
option -m31 (to generate the 31-bit file format).
The z/Architecture mode can either be the default or due to
specification of the option -mzarch (to assemble for z/Architecture
mode). It can also be selected using the pseudo commands
".machinemode zarch" and ".machinemode zarch_nohighgprs". The latter
not causing the highgprs flag to be set.
The highgprs flag was only set when the following s390-specific
assembler options were given in the following specific order:
"-m31 -mzarch".
The highgprs flag was erroneously not set when:
- the order of above options was inverse (i.e. "-mzarch -m31"),
- the architecture mode defaulted to z/Architecture mode and
option "-m31" was specified,
- the architecture size defaulted to 32 bits due to a default
architecture name of "s390" and option -mzarch was specified,
- the architecture size defaulted to 32 bits and the architecture
mode defaulted to z/Architecture due to the specified processor
(e.g. "-march=z900" or follow-on processor).
Determine whether to set the highgprs flag in init_default_arch() after
having processed all assembler options in md_parse_option(). This
ensures the flag is set in all of the above cases it was erroneously not
set. Add test cases for highgprs flag, including ones that use
.machinemode to switch the architecture mode.
gas/
* config/tc-s390.c: Correct setting of highgprs flag in ELF
output.
* testsuite/gas/s390/s390.exp: Add test cases for highgprs
flag.
* testsuite/gas/s390/blank.s: Empty assembler source used in
test cases for "highgprs" flag.
* testsuite/gas/s390/esa-highgprs-0.d: Add test case for
highgprs flag.
* testsuite/gas/s390/zarch-highgprs-0.d: Likewise.
* testsuite/gas/s390/zarch-highgprs-1.d: Likewise.
* testsuite/gas/s390/esa-highgprs-machinemode-0.s: Add test case
for highgprs flag when using .machinemode to switch
architecture mode.
* testsuite/gas/s390/esa-highgprs-machinemode-0.d: Likewise.
* testsuite/gas/s390/esa-highgprs-machinemode-1.s: Likewise.
* testsuite/gas/s390/esa-highgprs-machinemode-1.d: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Do not erroneously use base operand value for length operand
The base register operand B may optionally be omitted in D(B) by coding
D and in D(L,B) by coding D(L). The index register operand X may
optionally be omitted in D(X,B) by coding D(,B) or D(B). Both base and
index register operands may optionally be omitted in D(X,B) by coding D.
In any case the omitted base and/or index register operand value
defaults to zero.
When parsing an erroneously omitted length L operand in D(L,B) by coding
D(,B) the base register operand B was erroneously consumed as length
operand. When using a register name for the base register operand this
was detected and reported as error. But when not using a register name
the base register operand value was erroneously used as length operand
value.
Correct the parsing of an omitted optional base or index register to not
erroneously use the base register operand value as length, when
erroneously omitting the length operand.
While at it rename the variable used to remember whether the base or
index register operand was omitted to enhance code readability.
Additionally add test cases for the optional omission of base and/or
index register operands.
Disassembly of bad assembly without commit shows the base register
operand value was erroneously used as length operand value:
0: d2 00 10 10 20 20 mvc 16(1,%r1),32(%r2)
6: d2 00 00 10 20 20 mvc 16(1,%r0),32(%r2)
c: d2 00 00 10 20 20 mvc 16(1,%r0),32(%r2)
Assembler messages with commit:
3: Error: operand 1: missing operand
gas/
* config/tc-s390.c: Correct parsing of omitted base register.
* testsuite/gas/s390/s390.exp: Add test cases for omitted base
and/or index register.
* testsuite/gas/s390/zarch-omitted-base-index.s: Test cases for
omitted optional base or index register.
* testsuite/gas/s390/zarch-omitted-base-index.d: Likewise.
* testsuite/gas/s390/zarch-omitted-base-index-err.s: Test cases
for omitted base and/or index register.
* testsuite/gas/s390/zarch-omitted-base-index-err.l: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Enhance handling of syntax errors in assembler
Do not consume any unexpected character including newline ('\n') when
detecting a syntax error when parsing an operand block with parenthesis.
This resolves the unfavorable assembler messages from the example below,
including consuming the newline at the end of the current statement and
reporting the next statement as junk.
While at it change the only pre-increment of the current instruction
string pointer into a post-increment to align with the other instances.
Example assembler source:
mvi 16(),32 # syntax error
a %r1,16(%r2 # syntax error
a %r1,16(%r2)
mvc 16(1,),32(%r2) # syntax error
mvc 16(1,%r1,32(%r2 # syntax error
Assembler messages without commit:
1: Error: bad expression
1: Error: syntax error; missing ')' after base register
1: Error: syntax error; expected ','
1: Error: junk at end of line: `32'
2: Error: syntax error; missing ')' after base register
2: Error: junk at end of line: `a %r1,16(%r2)'
4: Error: bad expression
4: Error: syntax error; missing ')' after base register
4: Error: syntax error; expected ','
4: Error: operand out of range (32 is not between 0 and 15)
4: Error: syntax error; missing ')' after base register
4: Error: junk at end of line: `%r2)'
5: Error: syntax error; missing ')' after base register
5: Error: syntax error; expected ','
5: Error: operand out of range (32 is not between 0 and 15)
5: Error: syntax error; missing ')' after base register
5: Error: junk at end of line: `%r2'
Assembler messages with commit:
1: Error: bad expression
1: Error: syntax error; missing ')' after base register
2: Error: syntax error; missing ')' after base register
4: Error: bad expression
4: Error: syntax error; missing ')' after base register
5: Error: syntax error; missing ')' after base register
5: Error: syntax error; missing ')' after base register
gas/
* config/tc-s390.c: Do not erroneously consume newline when
parsing an addressing operand with parentheses.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 11:45:14 +0000 (12:45 +0100)]
s390: Lower severity of assembler syntax errors from fatal to error
Report s390 assembler syntax errors as error instead of fatal error.
This allows the assembler to continue and potentially report further
syntax errors in the source. This should not cause syntax errors to
be erroneously accepted, as both error and fatal error cause the
assembler to return with a non-zero return code.
The following syntax errors are changed from fatal to error:
- invalid length field specified
- odd numbered general purpose register specified as register pair
- invalid floating point register pair. Valid fp register pair operands
are 0, 1, 4, 5, 8, 9, 12 or 13.
gas/
* config/tc-s390.c: Lower severity of assembler syntax errors
from fatal to error.
* testsuite/gas/s390/zarch-z9-109-err.l: Likewise.
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Jens Remus [Fri, 1 Mar 2024 10:12:40 +0000 (11:12 +0100)]
s390: Use proper string lengths when parsing opcode table flags
opcodes/
* s390-mkopc.c: Use proper string lengths when parsing opcode
table flags.
Fixes: c5306fed7d4 ("s390: Support for jump visualization in disassembly") Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
Jan Beulich [Fri, 1 Mar 2024 08:25:59 +0000 (09:25 +0100)]
x86: adjust which Dwarf2 register numbers to use
Consumers can't know which execution mode is in effect for a certain
piece of code; they can only go from object file properties. Hence which
register numbers to encode ought to depend solely on object file type.
In tc_x86_frame_initial_instructions() do away with parsing a register
name: We have a symbolic constant already for the 64-bit case, and the
32-bit number isn't going to change either. Said constant's definition
needs moving, though, to be available also for non-ELF. While moving
also adjust the comment to clarify that it's applicable to 64-bit mode
only.
SVE2.1 support is both incomplete and buggy. SME2.1 "support" goes as
far as a single instruction (a subset of movaz forms) only. The SME part
of B16B16 is entirely missing.
Jan Beulich [Fri, 1 Mar 2024 08:21:40 +0000 (09:21 +0100)]
x86/APX: optimize certain XOR and SUB forms
While most logic in optimize_encoding() is already covering APX by way
of the earlier NDD->REX2 conversion, there's a remaining set of cases
which wants handling separately.
Jan Beulich [Fri, 1 Mar 2024 08:20:56 +0000 (09:20 +0100)]
x86/APX: correct .insn opcode space determination when REX2 is needed
In this case spaces 0f38 and 0f3a may not be put in place. To achieve
the intended effect, operand parsing (but not operand processing) needs
pulling ahead, so we know whether eGRP-s are in use.
Jan Beulich [Fri, 1 Mar 2024 08:19:58 +0000 (09:19 +0100)]
x86/APX: respect {vex}/{vex3}
Even when an EVEX encoding is available, use of such a prefix ought to
be respected (resulting in an error) rather than ignored. As requested
during review already, introduce a new encoding enumerator to record use
of eGPR-s, and update state transitions accordingly.
The optimize_encoding() change also addresses an internal assembler
error that was previously raised when respective memory operands used
eGPR-s for addressing.
While this results in a change of diagnostic issued for VEX-encoded
insns, the new one is at least no worse than the prior one.
Tom Tromey [Sat, 10 Feb 2024 00:40:35 +0000 (17:40 -0700)]
Use DW_FORM_ref_addr for DIE offset in .debug_names
Today I realized that while the .debug_names writer uses DW_FORM_udata
for the DIE offset, DW_FORM_ref_addr would be more appropriate here.
This patch makes this change.
Alan Modra [Thu, 29 Feb 2024 22:30:27 +0000 (09:00 +1030)]
PR19871, description of --pie
Say why we even mention shared libraries here (ET_DYN), and clarify
symbol resolution. There are of course many other ways that PIEs
resemble PDEs more closely than shared libraries.
Tom Tromey [Wed, 21 Feb 2024 00:15:03 +0000 (17:15 -0700)]
Synchronize GCC compile plugin headers
This patch copies some changes to the compile headers from GCC's
include/ directory. It is the gdb equivalent of the GCC commit bc0e18a9 -- however, while that commit also necessarily touched
libcc1, this one of course does not.
Tested by rebuilding and also running the gdb.compile tests.
Tom de Vries [Thu, 29 Feb 2024 20:29:34 +0000 (21:29 +0100)]
[gdb/dap] Fix stray KeyboardInterrupt after cancel
When running test-case gdb.dap/pause.exp 100 times in a loop, it passes
100/100.
But if we remove the two "sleep 0.2" from the test-case, we run into
(copied from dap.log and edited for readability):
...
Traceback (most recent call last):
File "startup.py", line 251, in message
def message():
KeyboardInterrupt
Quit
...
This happens as follows.
CancellationHandler.cancel calls gdb.interrupt to cancel a request in flight.
The idea is that this interrupt triggers while in fn here in message (a nested
function of send_gdb_with_response):
...
def message():
try:
val = fn()
result_q.put(val)
except (Exception, KeyboardInterrupt) as e:
result_q.put(e)
...
but instead it triggers outside the try/except.
Fix this by:
- in CancellationHandler, renaming variable in_flight to in_flight_dap_thread,
and adding a variable in_flight_gdb_thread to be able to distinguish when
a request is in flight in the dap thread or the gdb thread.
- adding a wrapper Cancellable to to deal with cancelling the wrapped
event
- using Cancellable in send_gdb and send_gdb_with_response to wrap the posted
event
- in CancellationHandler.cancel, only call gdb.interrupt if
req == self.in_flight_gdb_thread.
This makes the test-case pass 100/100, also when adding the extra stressor of
"taskset -c 0", which makes the fail more likely without the patch.
Tested on aarch64-linux.
Approved-By: Tom Tromey <tom@tromey.com>
PR dap/31275
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31275
gdb/arm: Remove tpidruro register from non-FreeBSD target descriptions
Commit 92d48a1e4eac ("Add an arm-tls feature which includes the tpidruro
register from CP15.") introduced the org.gnu.gdb.arm.tls feature, which
adds the tpidruro register, and unconditionally enabled it in
aarch32_create_target_description.
In Linux, the tpidruro register isn't available via ptrace in the 32-bit
kernel but it is available for an aarch32 program running under an arm64
kernel via the ptrace compat interface. This isn't currently implemented
however, which causes GDB on arm-linux with 64-bit kernel to list the
register but show it as unavailable, as reported by Tom de Vries:
Temporary breakpoint 1, 0xaaaaa512 in main ()
$1 = <unavailable>
Simon Marchi then clarified:
> The only time we should be seeing some "unavailable" registers or memory
> is in the context of tracepoints, for things that are not collected.
> Seeing an unavailable register here is a sign that something is not
> right.
Therefore, disable the TLS feature in aarch32 target descriptions for Linux
and NetBSD targets (the latter also doesn't seem to support accessing
tpidruro either, based on a quick look at arm-netbsd-nat.c).
This patch fixes the following tests:
Running gdb.base/inline-frame-cycle-unwind.exp ...
FAIL: gdb.base/inline-frame-cycle-unwind.exp: cycle at level 3: backtrace when the unwind is broken at frame 3
FAIL: gdb.base/inline-frame-cycle-unwind.exp: cycle at level 5: backtrace when the unwind is broken at frame 5
FAIL: gdb.base/inline-frame-cycle-unwind.exp: cycle at level 1: backtrace when the unwind is broken at frame 1
Tested with Ubuntu 22.04.3 on armv8l-linux-gnueabihf in native,
native-gdbserver and native-extended-gdbserver targets with no regressions.
Tatsuyuki Ishi [Tue, 20 Feb 2024 17:55:52 +0000 (02:55 +0900)]
RISC-V: Initial ld.bfd support for TLSDESC.
Only relocation handling for now; relaxation is not implemented yet.
bfd/
* elfnn-riscv.c (riscv_elf_check_relocs): Record GOT reference and
paired relocation for TLSDESC_HI20.
(riscv_elf_adjust_dynamic_symbol): Allocate GOT and reloc slots for
TLSDESC symbols.
(riscv_elf_size_dynamic_sections): Likewise but for local symbols.
(tlsdescoff): New helper to determine static addend for R_TLSDESC.
(riscv_elf_relocate_section): Ignore TLSDESC_CALL reloc for now (it is
relaxation only).
Handle TLSDESC_{LOAD,ADD}_LO12 as paired pcrel relocs.
For TLS GOT slot generation, generalize the logic to handle any
combination of (GD, IE, TLSDESC).
Add TLSDESC Rela generation.
* ld/testsuite/ld-riscv-elf/tls*: Add TLSDESC instruction sequences
next to the existing GD and IE sequences. Update expectations.
Tatsuyuki Ishi [Tue, 20 Feb 2024 17:55:51 +0000 (02:55 +0900)]
RISC-V: Define and use GOT entry size constants for TLS.
As the size calculation is split by global and local symbols, using a
shared constant definition for its size improves clarity.
bfd/
* elfnn-riscv.c: Add macros for sizes of a normal GOT entry, TLS GD and
TLS IE entry.
(allocate_dynrelocs): Replace GOT size expressions with the new
constants.
(riscv_elf_size_dynamic_sections): Likewise.
(riscv_elf_relocate_section): Likewise.
Tatsuyuki Ishi [Tue, 20 Feb 2024 17:55:50 +0000 (02:55 +0900)]
RISC-V: Add assembly support for TLSDESC.
gas/
* tc-riscv.c (percent_op_*): Add support for %tlsdesc_hi,
%tlsdesc_load_lo, %tlsdesc_add_lo and %tlsdesc_call. percent_op_rtype
renamed to percent_op_relax_only as this matcher is extended to handle
jalr as well which is not R-type.
(riscv_ip): Apply the percent_op_relax_only rename and update comment.
(md_apply_fix): Add TLSDESC_* to relaxable list. Add TLSDESC_HI20 to
TLS relocation check list.
* testsuite/gas/riscv/tlsdesc.*: New test cases for TLSDESC relocation
generation.
opcodes/
* riscv-opc.c (riscv_opcodes): Add a new syntax for jalr with
%tlsdesc_call annotations.
Tom Tromey [Fri, 23 Feb 2024 15:59:40 +0000 (08:59 -0700)]
Fix gdb.interrupt race
gdb.interrupt was introduced to implement DAP request cancellation.
However, because it can be run from another thread, and because I
didn't look deeply enough at the implementation, it turns out to be
racy.
The fix here is to lock accesses to certain globals in extension.c.
Note that this won't work in the case where configure detects that the
C++ compiler doesn't provide thread support. This version of the
patch disables DAP entirely in this situation.
Regression tested on x86-64 Fedora 38. I also ran gdb.dap/pause.exp
in a thread-sanitizer build tree to make sure the reported race is
gone.
Alan Modra [Wed, 28 Feb 2024 08:23:52 +0000 (18:53 +1030)]
PR23881, pdp11 binutils fails if too much debug data
The PR testcase overflows one of the exec header fields, e_syms (the
size of the symbol table), leading to the string table offset being
wrong. Things go downhill from there. Fixed by checking for
overflow. This happens to trigger in the ld testsuite, so xfail that
test.
Tom Tromey [Fri, 23 Feb 2024 20:51:58 +0000 (13:51 -0700)]
Explicitly quit gdb from DAP server thread
This changes the DAP code to explicitly request that gdb exit.
Previously this could cause crashes, but with the previous cleanups,
this should no longer happen.
This also adds a tests that ensures that gdb exits with status 0.
Tom Tromey [Fri, 23 Feb 2024 20:26:02 +0000 (13:26 -0700)]
Add final cleanup for runnables
This changes run-on-main-thread.c to clear 'runnables' in a final
cleanup. This avoids an issue where a pending runnable could require
Python, but be run after the Python interpreter was finalized.
Tom Tromey [Fri, 23 Feb 2024 20:18:49 +0000 (13:18 -0700)]
Add extension_language_ops::shutdown
Right now, Python is shut down via a final cleanup. However, it seems
to me that it is better for extension languages to be shut down
explicitly, after all the ordinary final cleanups are run. The main
reason for this is that a subsequent patch adds another case like
finalize_values; and rather than add a series of workarounds for
Python shutdown, it seemed better to let these be done via final
cleanups, and then have Python shutdown itself be the special case.
Tom Tromey [Thu, 15 Feb 2024 20:14:43 +0000 (13:14 -0700)]
Rewrite "python" command exception handling
The "python" command (and the Python implementation of the gdb
"source" command) does not handle Python exceptions in the same way as
other gdb-facing Python code. In particular, exceptions are turned
into a generic error rather than being routed through
gdbpy_handle_exception, which takes care of converting to 'quit' as
appropriate.
I think this was done this way because PyRun_SimpleFile and friends do
not propagate the Python exception -- they simply indicate that one
occurred.
This patch reimplements these functions to respect the general gdb
convention here. As a bonus, some Windows-specific code can be
removed, as can the _execute_file function.
The bulk of this change is tweaking the test suite to match the new
way that exceptions are displayed. These changes are largely
uninteresting. However, it's worth pointing out the py-error.exp
change. Here, the failure changes because the test changes the host
charset to something that isn't supported by Python. This then
results in a weird error in the new setup.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31354 Acked-By: Tom de Vries <tdevries@suse.de> Reviewed-By: Eli Zaretskii <eliz@gnu.org>
Tom Tromey [Thu, 15 Feb 2024 19:12:25 +0000 (12:12 -0700)]
Introduce read_remainder_of_file
This patch adds a new function, read_remainder_of_file. This is like
read_text_file_to_string, but reads from an existing 'FILE *'. This
will be used in a subsequent patch.
Tom de Vries [Tue, 27 Feb 2024 15:24:15 +0000 (16:24 +0100)]
[gdb/testsuite] Reset errcnt and warncnt in default_gdb_init
Say we do:
...
$ make check RUNTESTFLAGS="gdb.dap/ada-nested.exp gdb.dap/pause.exp"
...
and add a perror at the end of pause.exp:
...
dap_shutdown
+
+perror "foo"
...
We run into:
...
UNRESOLVED: gdb.dap/ada-nested.exp: compilation prog.adb
...
This happens because the perror increases the errcnt, which is not reset at
the end of the test-case, and consequently the first pass in the following
test-case is changed into an unresolved.
Version 1.6.3 of dejagnu contains a fix which produces an unresolved at the
end of the test-case, which does reset the errcnt, but this is with version
1.6.1.
Furthermore, we reset the errcnt in clean_restart, but the pass is produced
before, so that doesn't help either.
Fix this by resetting errcnt and warncnt in default_gdb_init.
Tested on x86_64-linux.
Approved-By: Tom Tromey <tom@tromey.com>
PR testsuite/31351
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31351
Tom de Vries [Tue, 27 Feb 2024 15:18:32 +0000 (16:18 +0100)]
[gdb/testsuite] Fix test in gdb.python/py-finish-breakpoint.exp
With test-case gdb.python/py-finish-breakpoint.exp, we run into:
...
(gdb) python print (finishbp_default.hit_count)
Traceback (most recent call last):
File "<string>", line 1, in <module>
RuntimeError: Breakpoint 3 is invalid.
Error while executing Python code.
(gdb) PASS: gdb.python/py-finish-breakpoint.exp: normal conditions: \
check finishBP on default frame has been hit
...
The test producing the pass is:
...
gdb_test "python print (finishbp_default.hit_count)" "1.*" \
"check finishBP on default frame has been hit"
...
so the pass is produced because the 1 in "line 1" matches "1.*".
Temporary breakpoints are removed when hit, and consequently accessing the
hit_count attribute of a temporary python breakpoint (gdb.Breakpoint class) is
not possible, and as per spec we get a RuntimeError.
So the RuntimeError is correct, and not specific to finish breakpoints.
The test presumably attempts to match:
...
(gdb) python print (finishbp_default.hit_count)
1
...
but most likely this output was never produced by any gdb version.
Fix this by checking whether the finishbp_default breakpoint has hit by
checking that finishbp_default.is_valid() is False.
Tested on aarch64-linux.
Approved-By: Tom Tromey <tom@tromey.com>
PR testsuite/31391
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31391
Pedro Alves [Thu, 6 May 2021 19:59:14 +0000 (20:59 +0100)]
Cygwin: Fix putting inferior in foreground (fix input)
gdb.base/interrupt.exp reveals that inferior input is
broken on Cygwin:
(gdb) continue
Continuing.
talk to me baby
Input/output error <<< BAD
PASS: gdb.base/interrupt.exp: process is alive
a
[Thread 10688.0x2590 exited with code 1]
[Thread 10688.0x248c exited with code 1]
[Thread 10688.0x930 exited with code 1]
[Thread 10688.0x2c98 exited with code 1]
Program terminated with signal SIGHUP, Hangup.
The program no longer exists.
(gdb) FAIL: gdb.base/interrupt.exp: child process ate our char
a
Ambiguous command "a": actions, add-auto-load-safe-path, add-auto-load-scripts-directory, add-inferior...
(gdb) ERROR: "" is not a unique command name.
The problem is that inflow.c:child_terminal_inferior is failing to put
the inferior in the foreground, because we're passing down the
inferior's Windows PID instead of the Cygwin PID to Cygwin tcsetpgrp.
That is fixed by this commit. Afterwards we will get:
(gdb) continue
Continuing.
talk to me baby
PASS: gdb.base/interrupt.exp: process is alive
a
a <<< GOOD
PASS: gdb.base/interrupt.exp: child process ate our char
[New Thread 7236.0x1c58]
Thread 6 received signal SIGINT, Interrupt. <<< new thread spawned for SIGINT
[Switching to Thread 7236.0x1c58]
0x00007ffa6643ea6b in TlsGetValue () from /cygdrive/c/Windows/System32/KERNELBASE.dll
(gdb) FAIL: gdb.base/interrupt.exp: send_gdb control C
We still have the FAIL seen above because this change has another
consequence. By failing to put the inferior in the foreground
correctly, Ctrl-C was always reaching GDB first. Now that the
inferior is put in the foreground properly, Ctrl-C reaches the
inferior first, which results in a Windows Ctrl-C event, which results
in Windows injecting a new thread in the inferior to report the Ctrl-C
exception => SIGINT. That is, running the test manually:
Before patch:
(gdb) c
Continuing.
[New Thread 2352.0x1f5c]
[New Thread 2352.0x1988]
[New Thread 2352.0x18cc]
<<< Ctrl-C pressed.
Thread 7 received signal SIGTRAP, Trace/breakpoint trap.
[Switching to Thread 2352.0x18cc]
0x00007ffa68930b11 in ntdll!DbgBreakPoint () from /cygdrive/c/Windows/SYSTEM32/ntdll.dll
(gdb)
Above, GDB got the SIGINT, and it manually passes it down the
inferior, which reaches windows_nat_target::interrupt(), which
interrupts the inferior with DebugBreakProcess (which injects a new
thread in the inferior that executes an int3 instruction).
After this patch, we have (with "set debugexceptions on" so
DBG_CONTROL_C is visible):
(gdb) c
Continuing.
[New Thread 9940.0x1168]
[New Thread 9940.0x5f8]
gdb: Target exception MS_VC_EXCEPTION at 0x7ffa6638cf19
gdb: Target exception MS_VC_EXCEPTION at 0x7ffa6638cf19
[New Thread 9940.0x3d8]
gdb: Target exception DBG_CONTROL_C at 0x7ffa6643ea6b <<< Ctrl-C
Thread 7 received signal SIGINT, Interrupt. <<< new injected thread
[Switching to Thread 9940.0x3d8]
0x00007ffa6643ea6b in TlsGetValue () from /cygdrive/c/Windows/System32/KERNELBASE.dll
(gdb)
This new behavior is exactly the same as what you see with a MinGW GDB
build. Also, SIGINT reaching inferior first is what you get on Linux
as well currently.
I wrote an initial fix for this before I discovered that Cygwin
downstream had a similar change, so I then combined the patches. I am
adding a Co-Authored-By for that reason.
Co-Authored-By: Takashi Yano <takashi.yano@nifty.ne.jp> Approved-By: Tom Tromey <tom@tromey.com>
Change-Id: I3a8c3355784c6a817dbd345ba9dac24be06c4b3f
Yuriy Kolerov [Thu, 22 Feb 2024 08:02:19 +0000 (08:02 +0000)]
arc: Don't build arc-analyze-prologue.S with -g
arc-analyze-prologue.S test does not contain debug information thus
it must be compiled without -g option. Otherwise GDB will try to
unwind frames using debug information (which does not exist for .S
code!) instead of analyzing frames manually.
Andreas Krebbel [Tue, 27 Feb 2024 13:01:41 +0000 (14:01 +0100)]
s390: Avoid reloc overflows on undefined weak symbols
Replace relative long addressing instructions of weak symbols, which
will definitely resolve to zero, with either a load address of 0, a
NOP, or a trapping insn.
This prevents the PC32DBL relocation from overflowing in case the
binary will be loaded at 4GB or more.
bfd/ChangeLog:
* bfd/elf64-s390.c (elf_s390_relocate_section): Replace
instructions using undefined weak symbols with relative addressing
to avoid relocation overflows.
ld/ChangeLog:
* ld/testsuite/ld-s390/s390.exp:
* ld/testsuite/ld-s390/8GB.ld: New test.
* ld/testsuite/ld-s390/weakundef-1.dd: New test.
* ld/testsuite/ld-s390/weakundef-1.s: New test.
Matthieu Longo [Fri, 23 Feb 2024 14:52:58 +0000 (14:52 +0000)]
aarch64: rename internals related to PAuth feature to use pauth in their naming for coherency
Hi,
Commits af1bd77 and 3f4ff08 introduced the Pointer Authentication feature with internal names that don't match the actual feature name pauth. The new feature PAuth_LR introduced in Armv9.5-A is an extension of the PAuth feature of Armv8.3-A. Using a different naming for it not based on the formerly "PAC" would create confusion.
Regression tested on aarch64-none-elf, and no regression found.
Ok for binutils-master? I don't have commit access so I need someone to commit on my behalf.
Regards,
Matthieu.
From 58b38358b2788939d81f2df7f5fb4c64a31ae06e Mon Sep 17 00:00:00 2001
From: Matthieu Longo <matthieu.longo@arm.com>
Date: Fri, 23 Feb 2024 11:30:40 +0000
Subject: [PATCH] aarch64: rename internals related to PAuth feature to use
pauth in their naming for coherency
Commits af1bd77 and 3f4ff08 introduced the Pointer Authentication feature
with internal names that don't match the actual feature name pauth. The new
feature PAuth_LR introduced in Armv9.5-A is an extension of the PAuth feature
of Armv8.3-A. Using a different naming for it not based on the formerly "PAC"
would create confusion.
Jinyang He [Tue, 5 Sep 2023 02:31:28 +0000 (10:31 +0800)]
LoongArch: ld: Fix other pop relocs overflow check and add tests
Add reloc_unsign_bits() to fix others sop_pop relocs overflow check.
Then add over/underflow tests for relocs B*, SOP_POP* and PCREL20_S2.
bfd/ChangeLog:
* bfd/elfxx-loongarch.c: Add reloc_unsign_bits().
ld/ChangeLog:
* ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp: Add tests.
* ld/testsuite/ld-loongarch-elf/abi1_max_imm.dd: New test.
* ld/testsuite/ld-loongarch-elf/abi1_max_imm.s: New test.
* ld/testsuite/ld-loongarch-elf/abi1_sops.s: New test.
* ld/testsuite/ld-loongarch-elf/abi2_max_imm.s: New test.
* ld/testsuite/ld-loongarch-elf/abi2_overflows.s: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_b16.d: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_b21.d: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_b26.d: New test.
* ld/testsuite/ld-loongarch-elf/max_imm_pcrel20.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_b16.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_b21.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_b26.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_pcrel20.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_0_10_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_0_5_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_12.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_16.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_10_5.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_s_5_20.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_u.d: New test.
* ld/testsuite/ld-loongarch-elf/overflow_u_10_12.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_b16.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_b21.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_b26.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_pcrel20.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_0_10_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_0_5_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_12.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_16.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_16_s2.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_10_5.d: New test.
* ld/testsuite/ld-loongarch-elf/underflow_s_5_20.d: New test.
mengqinggang [Thu, 22 Feb 2024 12:18:25 +0000 (20:18 +0800)]
LoongArch: bfd: Fix some bugs of howto table
R_LARCH_IRELATIVE: For dynamic relocation that does not distinguish between
32/64 bits, size and bitsize set to 8 and 64.
R_LARCH_TLS_DESC64: Change size to 8.
R_LARCH_SOP_POP_32_S_0_5_10_16_S2: Change src_mask to 0, dst_mask to
0x03fffc1f.
projects / thirdparty / binutils-gdb.git / log
