Merge tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.4
The Qualcomm SCM driver will now always clear the download bit, avoiding
entering download mode on a clean reboot because the bootloader left it
set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to
a well defined size. SM6375 support is added, and SC8180X,
QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented.
GENI gains support for newer hardware with deeper FIFOs.
The BWMON driver is updated to better handle the two register blocks,
which are not consistent between MSM8998 and newer platforms.
The LLCC driver no longer assumes a fixes stride across the various
banks, and instead acquire the bank placement from DeviceTree. EDAC
support for polling is introduced. EDAC support on SDM845 is disabled,
as its been observed that accessing relevant registers is not permitted
on most devices.
PMIC GLINK is reworked to support defining which auxiliary children to
spawn per platform, support for spawning a UCSI child is added and
SM8450 and SM8550 is introduced.
The RPM power-domain driver is cleaned up by moving and generalizing
structures that are common between platforms, rather than duplicating
everything. Macros are replaced with just direct definition of the
relevant structures. Support for defining parent relationships between
the power-domains is introduced, like it has been in rpmhpd for a long
time.
Number of processors has gone up, so max processor count in SMEM
is bumped again. Error handling in SMSM is cleaned up using
dev_err_probe().
Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150,
SA8775P and a number of PMICs.
* tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits)
dt-bindings: firmware: document Qualcomm SC8180X SCM
dt-bindings: sram: qcom,imem: document SM6375 IMEM
soc: qcom: icc-bwmon: Handle global registers correctly
soc: qcom: icc-bwmon: Remove unused struct member
soc: qcom: smsm: Use dev_err_probe()
firmware: qcom_scm: Add SM6375 compatible
soc: qcom: llcc: Add configuration data for SM7150
dt-bindings: arm: msm: Add LLCC for SM7150
dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994
soc: qcom: pmic_glink: register ucsi aux device
dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible
dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible
firmware: qcom_scm: Clear download bit during reboot
dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible
dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible
dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible
firmware: qcom_scm: Use fixed width src vm bitmap
dt-bindings: firmware: qcom,scm: document IPQ5332 SCM
dt-bindings: scm: Add compatible for IPQ9574
soc: qcom: rpmpd: Remove useless comments
...
Merge tag 'ti-driver-soc-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers
TI SoC driver updates for v6.4
* Minor fixups for of_property, using devm_platform_ioremap
* Fixups for refcount leaks in pm33xx
* Fixups for k3-ringacc for dmaring_request
* SoCinfo detection for J784S4 SoC.
* tag 'ti-driver-soc-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
soc: ti: Use devm_platform_ioremap_resource()
soc: ti: k3-socinfo: Add entry for J784S4 SOC
soc: ti: Use of_property_read_bool() for boolean properties
soc: ti: Use of_property_present() for testing DT property presence
soc: ti: pm33xx: Fix refcount leak in am33xx_pm_probe
soc: ti: k3-ringacc: Add try_module_get() to k3_dmaring_request_dual_ring()
Merge tag 'sunxi-drivers-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/drivers
- remove MODULE_LICENSE from sram driver
- use of_property_present() in mbus driver
* tag 'sunxi-drivers-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
kbuild, soc: sunxi: sram: remove MODULE_LICENSE in non-modules
soc: sunxi: Use of_property_present() for testing DT property presence
Merge tag 'imx-drivers-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers
i.MX drivers update for 6.4:
- Use dev_err_probe() for imx-scu driver to silences EPROBE_DEFER
messages.
- Add LVDS LPI2C and PWM power domains for scu-pd driver.
- A series from Jindong Yue to support module build of imx8m soc driver.
- Update imx8m-blk-ctrl driver to scan child nodes for binding drivers.
- Reorder structure members in imx8m-blk-ctrl driver by following
clang-analyzer suggestion.
- Update imx-weim bus driver to use helper function for "ranges"
parsing.
* tag 'imx-drivers-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: imx8m-blk-ctrl: reordering the fields
soc: imx8m: Support building imx8m soc driver as module
soc: imx8m: Add MODULE_LICENSE
soc: imx: imx8m-blk-ctrl: Add MODULE_LICENSE
soc: imx: imx8m-blk-ctrl: Use dev_pm_domain_attach_by_name
soc: imx: imx8mp-blk-ctrl: Add MODULE_LICENSE
soc: imx: imx8mp-blk-ctrl: Fix typo of imx8m_blk_ctrl_of_match
soc: imx: imx8mp-blk-ctrl: Use dev_pm_domain_attach_by_name
soc: imx: imx8m-blk-ctrl: Scan subnodes and bind drivers to them
firmware: imx: scu-pd: add missed lvds lpi2c and pwm power domains
bus: imx-weim: Remove open coded "ranges" parsing
firmware: imx: scu: use dev_err_probe
Merge tag 'riscv-soc-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers
RISC-V SoC drivers for v6.4
Microchip:
Mailbox controller & client changes for the system controller on
PolarFire SoC. The controller bits have been acked by Jassi.
Primarily the changes work around a "hardware" bug (really the system
controller's software, but it may as well be hardware as customers
cannot change it) where interrupts are not generated if a service fails.
The mailbox controller driver is tweaked to use polling, rather than
interrupt, mode and there are some changes to timeout code required in
the client driver as a result. There's some opportunistic cleanup that I
performed while doing the swap too.
Canaan:
A single fix for some randconfig issues that crop up when !mmu is
enabled for 32-bit kernels, due to my changes in a previous release that
swapped out select based entablement of the driver.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-soc-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
soc: microchip: mpfs: add a prefix to rx_callback()
soc: microchip: mpfs: handle timeouts and failed services differently
soc: microchip: mpfs: simplify error handling in mpfs_blocking_transaction()
soc: microchip: mpfs: use a consistent completion timeout
soc: microchip: mpfs: fix some horrible alignment
mailbox: mpfs: check the service status in .tx_done()
mailbox: mpfs: ditch a useless busy check
mailbox: mpfs: switch to txdone_poll
mailbox: mpfs: fix an incorrect mask width
soc: canaan: Make K210_SYSCTL depend on CLK_K210
Merge tag 'tegra-for-6.4-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v6.4-rc1
This contains minor fixes and cleanups. Note that one of the patches
here includes ARM firmware changes, but I picked that up after checking
with Sudeep and Rob because it didn't seem worth splitting it up any
further.
* tag 'tegra-for-6.4-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: Use of_property_present() for testing DT property presence
firmware: tegra: bpmp: Fix error paths in debugfs
Merge tag 'tegra-for-6.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v6.4-rc1
Contains various minor cleanups and fixes as well as support for several
more wake events on Tegra234.
* tag 'tegra-for-6.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: Remove nvmem root only access
soc/tegra: cbb: tegra194: Use of_address_count() helper
soc/tegra: cbb: Remove MODULE_LICENSE in non-modules
soc/tegra: flowctrl: Use devm_platform_get_and_ioremap_resource()
soc: tegra: cbb: Drop empty platform remove function
soc/tegra: pmc: Support software wake-up for SPE
soc/tegra: pmc: Add wake source interrupt for MGBE
soc/tegra: pmc: Add the PMIC wake event for Tegra234
soc/tegra: bpmp: Actually free memory on error path
soc/tegra: cbb: remove linux/version.h
Nick Alcock [Tue, 28 Feb 2023 13:02:15 +0000 (13:02 +0000)]
soc/tegra: cbb: Remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.
So remove it in the files in this commit, none of which can be built as
modules.
Signed-off-by: Nick Alcock <nick.alcock@oracle.com> Suggested-by: Luis Chamberlain <mcgrof@kernel.org> Cc: Luis Chamberlain <mcgrof@kernel.org> Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
Nick Alcock [Fri, 17 Feb 2023 14:10:44 +0000 (14:10 +0000)]
ARM: tegra: Remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454e ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.
So remove it in the files in this commit, none of which can be built as
modules.
Signed-off-by: Nick Alcock <nick.alcock@oracle.com> Suggested-by: Luis Chamberlain <mcgrof@kernel.org> Cc: Luis Chamberlain <mcgrof@kernel.org> Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
Ye Xingchen [Wed, 15 Feb 2023 09:18:03 +0000 (17:18 +0800)]
soc/tegra: flowctrl: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.
Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Signed-off-by: Thierry Reding <treding@nvidia.com>
Rob Herring [Fri, 10 Mar 2023 14:47:04 +0000 (08:47 -0600)]
firmware: Use of_property_present() for testing DT property presence
It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.
Konrad Dybcio [Wed, 15 Mar 2023 14:11:21 +0000 (15:11 +0100)]
soc: qcom: icc-bwmon: Handle global registers correctly
The BWMON hardware has two sets of registers: one for the monitor itself
and one called "global". It has what seems to be some kind of a head
switch and an interrupt control register. It's usually 0x200 in size.
On fairly recent SoCs (with the starting point seemingly being moving
the OSM programming to the firmware) these two register sets are
contiguous and overlapping, like this (on sm8450):
Which led to some confusion and the assumption that since the
"interesting" global registers begin right after global_base+0x100,
there's no need to map two separate regions and one can simply subtract
0x100 from the offsets.
This is however not the case for anything older than SDM845, as the
global region can appear in seemingly random spots on the register map.
Handle the case where the global registers are mapped separately to allow
proper functioning of BWMONv4 on MSM8998 and older. Add specific
compatibles for 845, 8280xp, 7280 and 8550 (all of which use the single
reg space scheme) to keep backwards compatibility with old DTs.
Merge tag 'amlogic-drivers-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers
Amlogic Drivers changes for v6.4:
- convert clk-measure.txt to dt-schema
- meson-pwrc: Use dev_err_probe()
- meson_sm: populate platform devices from sm device tree data
- dt-bindings: Drop unneeded quotes
* tag 'amlogic-drivers-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
dt-bindings: soc: amlogic: Drop unneeded quotes
firmware: meson_sm: populate platform devices from sm device tree data
soc: amlogic: meson-pwrc: Use dev_err_probe()
dt-bindings: soc: amlogic: convert clk-measure.txt to dt-schema
Merge tag 'optee-per-cpu-irq-for-v6.4' of https://git.linaro.org/people/jens.wiklander/linux-tee into soc/drivers
Add OP-TEE per cpu asynchronous notification
Adds support for signalling from secure world with per-cpu interrupts in
addition to edge-triggered peripheral interrupts.
* tag 'optee-per-cpu-irq-for-v6.4' of https://git.linaro.org/people/jens.wiklander/linux-tee:
optee: add per cpu asynchronous notification
dt-bindings: optee driver interrupt can be a per-cpu interrupt
Merge tag 'memory-controller-drv-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers
Memory controller drivers for v6.4
1. STM32 FMC2: allow using driver on all STM32MP SoCs.
2. Cleanups:
- Atmel EBI: use preferred of_property_present() API.
- Tegra210 MC: drop redundant variable initialization.
- Drop redundant quotes in Devicetree bindings.
- Remove MODULE_LICENSE in non-modules (several drivers).
* tag 'memory-controller-drv-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-bindings: memory-controller: Drop unneeded quotes
memory: stm32-fmc2-ebi: depends on ARCH_STM32 instead of MACH_STM32MP157
memory: tegra: remove redundant variable initialization
memory: atmel-ebi: Use of_property_present() for testing DT property presence
memory: remove MODULE_LICENSE in non-modules
memory: tegra: remove MODULE_LICENSE in non-modules
Merge tag 'omap-for-v6.4/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/drivers
Clean-up for ti-sysc driver for v6.4
Clean-up for ti-sysc interconnect target module driver mostly to remove
open coded ranges property parsing, to use of_property_present(), and
to use list_for_each_entry(). Also included is one comment typo change.
* tag 'omap-for-v6.4/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Fix comment typo
bus: ti-sysc: Use list_for_each_entry() helper
bus: ti-sysc: Use of_property_present() for testing DT property presence
bus: ti-sysc: Remove open coded "ranges" parsing
Merge tag 'renesas-drivers-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers
Renesas driver updates for v6.4
- Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-drivers-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Use "#ifdef" for single-symbol definition checks
soc: renesas: pwc-rzv2m: drop of_match_ptr for ID table
soc: renesas: mark OF related data as maybe unused
soc: renesas: rmobile-sysc: Use of_fwnode_handle() helper
soc: renesas: Remove r8a77950 arch
soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling
Merge patch series "mailbox,soc: mpfs: add support for fallible services"
Conor Dooley <conor@kernel.org> says:
Here are some fixes for the system controller on PolarFire SoC that I
ran into while implementing support for using the system controller to
re-program the FPGA. A few are just minor bits that I fixed in passing,
but the bulk of the patchset is changes to how the mailbox figures out
if a "service" has completed.
Prior to implementing this particular functionality, the services
requested from the system controller, via its mailbox interface, always
triggered an interrupt when the system controller was finished with
the service.
Unfortunately some of the services used to validate the FPGA images
before programming them do not trigger an interrupt if they fail.
For example, the service that checks whether an FPGA image is actually
a newer version than what is already programmed, does not trigger an
interrupt, unless the image is actually newer than the one currently
programmed. If it has an earlier version, no interrupt is triggered
and a status is set in the system controller's status register to
signify the reason for the failure.
In order to differentiate between the service succeeding & the system
controller being inoperative or otherwise unable to function, I had to
switch the controller to poll a busy bit in the system controller's
registers to see if it has completed a service.
This makes sense anyway, as the interrupt corresponds to "data ready"
rather than "tx done", so I have changed the mailbox controller driver
to do that & left the interrupt solely for signalling data ready.
It just so happened that all of the services that I had worked with and
tested up to this point were "infallible" & did not set a status, so the
particular code paths were never tested.
Conor Dooley [Tue, 7 Mar 2023 20:22:58 +0000 (20:22 +0000)]
soc: microchip: mpfs: handle timeouts and failed services differently
The system controller will only deliver an interrupt if a service
succeeds. This leaves us in the unfortunate position with current code
where there is no way to differentiate between a legitimate timeout
where the service has not completed & where it has completed, but
failed.
mbox_send_message() has its own completion, and it will time out of the
system controller does not lower the busy flag. In this case, a timeout
has occurred and the error can be propagated back to the caller.
If the busy flag is lowered, but no interrupt has arrived to trigger the
rx callback, the service can be deemed to have failed. Report -EBADMSG
in this case so that callers can differentiate.
Conor Dooley [Tue, 7 Mar 2023 20:22:57 +0000 (20:22 +0000)]
soc: microchip: mpfs: simplify error handling in mpfs_blocking_transaction()
The error handling has a kinda weird nested-if setup that is not really
adding anything. Switch it to more of an early return arrangement as a
predatory step for adding different handing for timeouts and failed
services.
Conor Dooley [Tue, 7 Mar 2023 20:22:56 +0000 (20:22 +0000)]
soc: microchip: mpfs: use a consistent completion timeout
Completion timeouts use jiffies, so passing a number directly will
produce inconsistent timeouts depending on config. Define the timeout in
ms and convert it to jiffies instead.
Conor Dooley [Tue, 7 Mar 2023 20:22:54 +0000 (20:22 +0000)]
mailbox: mpfs: check the service status in .tx_done()
Services are supposed to generate an interrupt once completed, whether
or not they have do so successfully. What appears to be a bug in the
system controller means that interrupts are only generated for
*successful* services.
Currently, the status of a service is only checked in the
mpfs_mbox_rx_data() once an interrupt is received. As it turns out, this
is not really helpful where the potentially buggy behaviour is present,
as we'll only see the status for successes where it is moot anyway.
Jassi suggested moving the check to the .tx_done() callback instead.
This makes sense, as the busy bit that tx_done() is polling will be
lowered on completion, regardless of whether the service passed or
failed.
That allows us to check the status bits for all services, whether they
generate an interrupt or not & pass something more informative than
-EBADMSG back to the drivers implementing individual services.
Conor Dooley [Tue, 7 Mar 2023 20:22:53 +0000 (20:22 +0000)]
mailbox: mpfs: ditch a useless busy check
mpfs_mbox_rx_data() already checks if the system controller is busy
before attempting to do anything, so drop the second check before
reading any data.
Conor Dooley [Tue, 7 Mar 2023 20:22:52 +0000 (20:22 +0000)]
mailbox: mpfs: switch to txdone_poll
The system controller on PolarFire SoC has no interrupt to signify that
the TX has been completed. The interrupt instead signals that a service
requested by the mailbox client has succeeded. If a service fails, there
will be no interrupt delivered.
Switch to polling the busy register to determine whether transmission
has completed.
Conor Dooley [Tue, 7 Mar 2023 20:22:51 +0000 (20:22 +0000)]
mailbox: mpfs: fix an incorrect mask width
The system controller registers on PolarFire SoC are 32 bits wide, so
16 + 16 as the first input to GENMASK_ULL() gives a 33 bit wide mask.
It probably should have been immediately obvious when it was pointed
out during review that the width required using GENMASK_ULL() - but I
scarcely knew what I was doing at the time and missed it.
The mistake ends up being moot as it is a mask after all, but it is
incorrect and should be fixed.
The Sensor Processing Engine(SPE) can trigger a software wake-up of
the device. To support this wake-up for the SPE, set SR_CAPTURE_EN
bit in WAKE_AOWAKE_CNTRL register associated with the wake-up for
the SPE. This SR capturing logic is expected to be enabled for wakes
with short pulse signalling requirements.
Adds an SMC call that will pass an OP-TEE binary image to EL3 and
instruct it to load it as the BL32 payload. This works in conjunction
with a feature added to Trusted Firmware for ARMv8 and above
architectures that supports this.
The main purpose of this change is to facilitate updating the OP-TEE
component on devices via a rootfs change rather than having to do a
firmware update. Further details are linked to in the Kconfig file.
Add a keyword match pattern for the word "renesas," in files to the
ARM/RISC-V/RENESAS ARCHITECTURE section. This make sure patches
changing drivers that match against "renesas,<foo>" (as used mostly for
Renesas on-SoC components) are CCed to the linux-renesas-soc mailing
list.
Etienne Carriere [Wed, 22 Mar 2023 13:22:12 +0000 (14:22 +0100)]
optee: add per cpu asynchronous notification
Implements use of per-cpu irq for optee asynchronous notification.
Existing optee async notif implementation allows OP-TEE world to
raise an interrupt on which Linux optee driver will query some pending
events. This change allows the signaling interrupt to be a per-cpu
interrupt as with Arm GIC PPIs. Using a PPI instead of an SPI is useful
when no GIC lines are provisioned in the chip design and there are spare
PPI lines.
Etienne Carriere [Wed, 22 Mar 2023 13:22:11 +0000 (14:22 +0100)]
dt-bindings: optee driver interrupt can be a per-cpu interrupt
Explicit in optee firmware device tree bindings that the interrupt
used by optee driver for async notification can be a peripheral
interrupt or a per-cpu interrupt.
Yang Li [Thu, 23 Mar 2023 08:09:52 +0000 (16:09 +0800)]
soc: ti: Use devm_platform_ioremap_resource()
According to commit 7945f929f1a7 ("drivers: provide
devm_platform_ioremap_resource()"), convert platform_get_resource(),
devm_ioremap_resource() to a single call to use
devm_platform_ioremap_resource(), as this is exactly what this function
does.
Martin Povišer [Fri, 24 Feb 2023 16:21:59 +0000 (17:21 +0100)]
soc: apple: rtkit: Crop syslog messages
Crop trailing whitespace, null, and newline characters in syslog
messages received from coprocessors. Notably DCP sends its messages
including a trailing newline, so prior to this change we would end up
cluttering the kernel log by repeated newlines at the end of messages.
Signed-off-by: Martin Povišer <povik+lin@cutebit.org> Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Hector Martin <marcan@marcan.st>
Asahi Lina [Fri, 24 Feb 2023 06:49:44 +0000 (15:49 +0900)]
soc: apple: rtkit: Fix buffer address field width
The buffer address field is missing two bits. This matters for the GPU,
which uses upper-half 64-bit addresses on the ASC and those get sign
extended from the mailbox message field, so the right number of high
bits need to be set.
Signed-off-by: Asahi Lina <lina@asahilina.net> Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
Dmitry Rokosov [Fri, 24 Mar 2023 14:55:57 +0000 (17:55 +0300)]
firmware: meson_sm: populate platform devices from sm device tree data
In some meson boards, secure monitor device has children, for example,
power secure controller. By default, secure monitor isn't the bus in terms
of device tree subsystem, so the of_platform initialization code doesn't
populate its device tree data. As a result, secure monitor's children
aren't probed at all.
Run the 'of_platform_populate()' routine manually to resolve such issues.
Jason Wang [Thu, 11 Aug 2022 12:11:19 +0000 (20:11 +0800)]
bus: ti-sysc: Fix comment typo
The double `the' is duplicated in the comment, remove one.
Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Message-Id: <20220811121119.20288-1-wangborong@cdjrlc.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Yang Yingliang [Sat, 27 Aug 2022 09:46:04 +0000 (17:46 +0800)]
bus: ti-sysc: Use list_for_each_entry() helper
Convert list_for_each() to list_for_each_entry() where applicable.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Message-Id: <20220827094604.3325887-1-yangyingliang@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Ye Xingchen [Fri, 24 Mar 2023 02:16:26 +0000 (10:16 +0800)]
soc: amlogic: meson-pwrc: Use dev_err_probe()
Replace the open-code with dev_err_probe() to simplify the code.
Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/202303241016261854322@zte.com.cn Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Rob Herring [Fri, 10 Mar 2023 14:47:34 +0000 (08:47 -0600)]
bus: ti-sysc: Use of_property_present() for testing DT property presence
It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.
Signed-off-by: Rob Herring <robh@kernel.org>
Message-Id: <20230310144734.1546656-1-robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
make versioncheck reports the following:
./drivers/soc/tegra/cbb/tegra-cbb.c: 19 linux/version.h not needed.
./drivers/soc/tegra/cbb/tegra194-cbb.c: 26 linux/version.h not needed.
./drivers/soc/tegra/cbb/tegra234-cbb.c: 27 linux/version.h not needed.
So remove linux/version.h from these files.
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Konrad Dybcio [Tue, 7 Mar 2023 01:22:47 +0000 (02:22 +0100)]
firmware: qcom_scm: Add SM6375 compatible
While it was introduced in bindings, requiring a core clock, and added
into the DT, this compatible was apparently forgotten about on the driver
side of things. Fix it.
soc: renesas: pwc-rzv2m: drop of_match_ptr for ID table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it might not be relevant here). This
also fixes a !CONFIG_OF error with W=1:
drivers/soc/renesas/pwc-rzv2m.c:124:34: error: ‘rzv2m_pwc_of_match’ defined but not used [-Werror=unused-const-variable=]
Elliot Berman [Mon, 13 Feb 2023 18:18:29 +0000 (10:18 -0800)]
firmware: qcom_scm: Use fixed width src vm bitmap
The maximum VMID for assign_mem is 63. Use a u64 to represent this
bitmap instead of architecture-dependent "unsigned int" which varies in
size on 32-bit and 64-bit platforms.
Konrad Dybcio [Mon, 13 Mar 2023 20:00:07 +0000 (21:00 +0100)]
soc: qcom: rpmpd: Hook up VDDMX as parent of SM6375 VDDGX
The GPU core clock requires that both VDDGX and VDDMX domains are scaled
at the same rate at the same time (well, MX just before GX but you get
the idea). Set MX as parent of GX to take care of that.
Konrad Dybcio [Mon, 13 Mar 2023 20:00:06 +0000 (21:00 +0100)]
soc: qcom: rpmpd: Add parent PD support
In some cases (like with the GPU core clock on GMU-less SoCs) it's
required that we scale more than one voltage domain. This can be achieved
by linking them in a parent-child relationship. Add support for specifying
a parent PD, similarly to what has been done in the RPMhPD driver.
Konrad Dybcio [Mon, 13 Mar 2023 20:00:05 +0000 (21:00 +0100)]
soc: qcom: rpmpd: Make bindings assignments consistent
Currently the whitespace between [DT_BINDING] = &struct is all over
the place.. some SoC structs have a space, others have a tab, others
have N tabs.. Make that a single tab for everybody to keep things
coherent.
Konrad Dybcio [Mon, 13 Mar 2023 20:00:04 +0000 (21:00 +0100)]
soc: qcom: rpmpd: Improve the naming
Now that we aren't bound by the preprocessor macros, improve the naming
to be a bit less preprocessor-y and touch up some rpmpd.pd.name fields
while at it.
Konrad Dybcio [Mon, 13 Mar 2023 20:00:02 +0000 (21:00 +0100)]
soc: qcom: rpmpd: Remove vdd* from struct names
It's rather obvious by the characteristic of these resources that
they correspond to some voltage lines governed by RPM. Remove the
"vdd" unnecessary prefix from them.
soc: qcom: llcc: Do not create EDAC platform device on SDM845
The platforms based on SDM845 SoC locks the access to EDAC registers in the
bootloader. So probing the EDAC driver will result in a crash. Hence,
disable the creation of EDAC platform device on all SDM845 devices.
The issue has been observed on Lenovo Yoga C630 and DB845c.
While at it, also sort the members of `struct qcom_llcc_config` to avoid
any holes in-between.
qcom: llcc/edac: Support polling mode for ECC handling
Not all Qcom platforms support IRQ mode for ECC handling. For those
platforms, the current EDAC driver will not be probed due to missing ECC
IRQ in devicetree.
So add support for polling mode so that the EDAC driver can be used on all
Qcom platforms supporting LLCC.
The polling delay of 5000ms is chosen based on Qcom downstream/vendor
driver.
qcom: llcc/edac: Fix the base address used for accessing LLCC banks
The Qualcomm LLCC/EDAC drivers were using a fixed register stride for
accessing the (Control and Status Registers) CSRs of each LLCC bank.
This stride only works for some SoCs like SDM845 for which driver
support was initially added.
But the later SoCs use different register stride that vary between the
banks with holes in-between. So it is not possible to use a single register
stride for accessing the CSRs of each bank. By doing so could result in a
crash.
For fixing this issue, let's obtain the base address of each LLCC bank from
devicetree and get rid of the fixed stride. This also means, there is no
need to rely on reg-names property and the base addresses can be obtained
using the index.
First index is LLCC bank 0 and last index is LLCC broadcast. If the SoC
supports more than one bank, then those need to be defined in devicetree
for index from 1..N-1.
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