Likun Gao [Thu, 13 Feb 2020 04:05:36 +0000 (12:05 +0800)]
drm/amd/powerplay: add support to set performance level for sienna_cichlid
Support for performance level set for sienna_cichlid.
Set standard performance level not fully support, will set to auto
performance level.
Set peak performance level not fully support, will do nothing with it.
Force clk level only support for 2 level for fine grained DPM.
Likun Gao [Fri, 29 May 2020 18:33:08 +0000 (14:33 -0400)]
drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2)
SMU11 based similar to navi1x.
v2: squash in SMU IF updates
Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: restrict bo mapping within gpu address limits
Have strict check on bo mapping since on some systems, such as A+A or
hybrid, the cpu might support 5 level paging or can address memory above
48 bits but gpu might be limited by hardware to just use 48 bits. In
general, this applies to all asics where this limitation can be checked
against their max_pfn range. This restricts the range to map bo within
pratical limits of cpu and gpu for shared virtual memory access.
Reviewed-by: Oak Zeng <oak.zeng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kent Russell [Mon, 27 Apr 2020 13:28:04 +0000 (09:28 -0400)]
drm/amdgpu: Add unique_id and serial_number for Arcturus v3
Add support for unique_id and serial_number, as these are now
the same value, and will be for future ASICs as well.
v2: Explicitly create unique_id only for VG10/20/ARC
v3: Change set_unique_id to get_unique_id for clarity
Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kent Russell [Mon, 27 Apr 2020 13:27:24 +0000 (09:27 -0400)]
drm/amdgpu: Add ReadSerial defines for Arcturus
Add the ReadSerial definitions for Arcturus to the arcturus_ppsmc.h
header for use with unique_id
Unrevert: Supported in SMU 54.23, update values to match SMU spec
Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 28 May 2020 20:57:27 +0000 (16:57 -0400)]
drm/amdgpu: skip gpu_info firmware if discovery info is available
The GPU info firmware is only applicable at bring up when the
IP discovery table is not present. If it's available, use that
first and then fallback to parsing the gpu info firmware.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 26 May 2020 09:06:04 +0000 (17:06 +0800)]
drm/amd/powerplay: give better names for the thermal IRQ related APIs
Thermal control is performed by PMFW. What handled in driver is
just whether or not to enable the alert(to driver).
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 26 May 2020 08:54:22 +0000 (16:54 +0800)]
drm/amd/powerplay: use the common APIs for IRQ disablement/enablement
Also the new logics for MP1 SW IRQs disablement/enablement are added.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 26 May 2020 08:50:55 +0000 (16:50 +0800)]
drm/amd/powerplay: stop thermal IRQs on suspend
Added missing thermal IRQs disablement on suspend.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 22 May 2020 10:57:11 +0000 (18:57 +0800)]
drm/amdgpu: added a sysfs interface for thermal throttling related V4
User can check and set the enablement of throttling logging and
the interval between each logging.
V2: simplify the sysfs interface(no string parsing)
V3: add proper lock protection on updating throttling_logging_rs.interval
V4: documentation cosmetic per Luben's suggestion
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 22 May 2020 07:42:40 +0000 (15:42 +0800)]
drm/amd/powerplay: enable thermal throttling logging support V2
Currently this feature is supported on Arcturus only. PMFW will
interrupt driver the first time when thermal throttling happened
and every one second afterwards if the throttling continuing. On
receiving the 1st interrupt, driver logs it the first time. However,
if the throttling continues, the logging will be performed every
minute to avoid log flooding.
V2: simplify the implemention by ratelimited printk
Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 21 May 2020 04:36:44 +0000 (12:36 +0800)]
drm/amd/powerplay: implement ASIC specific thermal throttling logging
Enable this for Arcturus only for now.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 12 May 2020 11:06:37 +0000 (19:06 +0800)]
drm/amd/powerplay: ack the SMUToHost interrupt on receive V2
There will be no further interrupt without proper ack
for current one.
V2: fix typo to really set ACK bit only
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Thu, 28 May 2020 22:24:53 +0000 (23:24 +0100)]
drm/amdkfd: fix a dereference of pdd before it is null checked
Currently pointer pdd is being dereferenced when assigning pointer
dpm and then pdd is being null checked. Fix this by checking if
pdd is null before the dereference of pdd occurs.
Addresses-Coverity: ("Dereference before null check") Fixes: 32cb59f31362 ("drm/amdkfd: Track SDMA utilization per process") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This change was used for DCN2 bringup and is no longer desired.
In fact it breaks backlight on DCN2 systems.
Cc: Alexander Monakov <amonakov@ispras.ru> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Anthony Koo <Anthony.Koo@amd.com> Cc: Michael Chiu <Michael.Chiu@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reported-and-tested-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch fixes the warnings and makes the sysfs code more efficient
by remembering the offset in the buffer between append operations.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Aaron Liu <aaron.liu@amd.com> Tested-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Amber Lin <Amber.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gavin Wan [Thu, 21 May 2020 19:35:28 +0000 (19:35 +0000)]
drm/amd/amdgpu: Fix the CGCG setting is overwritten for SRIOV.
For SRIOV, since the CP_INT_CNTL_RING0 is programed on host side.
The Guest should not program CP_INT_CNTL_RING0 again.
Signed-off-by: Gavin Wan <Gavin.Wan@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Fri, 15 May 2020 22:18:20 +0000 (18:18 -0400)]
drm/amd/display: Don't compare same stream for synchronized vblank
[Why]
When determining synchronzied vblank we don't need to compare the stream
with itself
[How]
If comparing same stream, continue to next iteration
Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hugo Hu [Wed, 13 May 2020 08:36:28 +0000 (16:36 +0800)]
drm/amd/display: enable plane if container of plane_status changed
[why]
We hit an issue which driver reallocate a pipe from desktop bottom
pipe to video bottom pipe. In this case, driver need to re-enable
plane.
[how]
Enable plane if container of plane status changed.
Signed-off-by: Hugo Hu <hugo.hu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Wed, 13 May 2020 03:36:05 +0000 (23:36 -0400)]
drm/amd/display: Guard against invalid array access
[Why]
There are scenarios where no OPP is assigned to an OTG so its value is
0xF which is outside the size of the OPP array causing a potential
driver crash.
[How]
Change the assert to an early return to guard against access. If
there's no OPP assigned already, then OTG will be blank anyways so no
functionality should be lost.
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Wed, 27 May 2020 00:06:04 +0000 (20:06 -0400)]
drm/amdkfd: Track SDMA utilization per process
Track SDMA usage on a per process basis and report it through sysfs.
The value in the sysfs file indicates the amount of time SDMA has
been in-use by this process since the creation of the process.
This value is in microsecond granularity.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenhui Sheng [Tue, 26 May 2020 05:27:11 +0000 (13:27 +0800)]
drm/amd/powerplay: add check before i2c_add_adapter
smu_i2c_eeprom_init may be invoked twice or more
under sroiv mode, while we don't want to add check
if (!amdgpu_sriov_vf) before we invoke smu_i2c_eeprom_init/fini
each time, so we check if i2c adapter is already added
before we invoke i2c_add_adapter
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenhui Sheng [Fri, 22 May 2020 04:30:58 +0000 (12:30 +0800)]
drm/amd/powerplay: enable SMC message filter
1. enable SMC message filter in SRIOV situation
2. return -EACCESS if msg is blocked from smu_msg_get_index
3. if msg is block, always return 0 from smu_v11_0_send_msg_with_param
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print
[Why]
Warnings in the kernel are generally treated as errors.
The BREAK_TO_DEBUGGER macro is not a critical error or warning, but
rather intended for developer use to help investigate behavior and
sequences for other issues.
We do still make use of DC_ERROR/ASSERT(0) in various places in the
code for things that are genuine issues.
Since most developers don't actually KGDB while debugging the kernel
these essentially would have no value on their own since the KGDB
breakpoint wouldn't trigger - ASSERT(0) was used as a shortcut to get
a stacktrace.
[How]
Turn it into a DRM_DEBUG_DRIVER print instead. We unfortunately lose
the stacktrace, but we still do retain some of the useful debug
information this offers by having at least the function and line
number loggable.
If KGDB is supported in the kernel this will still trigger a real
breakpoint as well.
Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.
Also, make use of the new struct_size() helper to properly calculate the
size of struct SISLANDS_SMC_SWSTATE.
This issue was found with the help of Coccinelle and, audited and fixed
_manually_.
but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.
Also, make use of the new struct_size() helper to properly calculate the
size of struct NISLANDS_SMC_SWSTATE.
This issue was found with the help of Coccinelle and, audited and fixed
_manually_.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 18 May 2020 21:14:54 +0000 (17:14 -0400)]
drm/amdgpu/sdma4: simplify the logic around powering up sdma
Just check if it's an APU. The checks for the ppfuncs are
pointless because if we don't have them we can't power up
sdma anyway so we shouldn't even be in this code in the first
place. I'm not sure about the in_gpu_reset check. This
probably needs to be double checked. The fini logic doesn't
match the init logic however with that in_gpu_reset check
in place which seems odd.
Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 12 May 2020 08:55:58 +0000 (10:55 +0200)]
drm/radeon: disable AGP by default
Always use the PCI GART instead. We just have to many cases
where AGP still causes problems. This means a performance
regression for some GPUs, but also a bug fix for some others.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Wed, 20 May 2020 03:41:40 +0000 (11:41 +0800)]
drm/amd/powerplay: remove the support of vega20 from swsmu
by default, vega20 will use legacy powerplay driver.
in order to maintain the code conveniently in the future,
remove the support of vega20 from swsmu.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Wed, 20 May 2020 03:25:23 +0000 (11:25 +0800)]
drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmu
the vega20 asic uses legacy powerplay driver by default.
1. cleanup is_support_sw_smu_xgmi() function.
(only use for vega20 xgmi pstate check)
2. by default, the vega20 set xgmi pstate by legacy powerplay routine.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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