rsandifo [Wed, 30 Aug 2017 11:12:41 +0000 (11:12 +0000)]
[31/77] Use scalar_int_mode for move2add
The postreload move2add optimisations are specific to scalar
integers. This patch adds an explicit check to the main guarding
"if" and propagates the information through subroutines.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* postreload.c (move2add_valid_value_p): Change the type of the
mode parameter to scalar_int_mode.
(move2add_use_add2_insn): Add a mode parameter and use it instead
of GET_MODE (reg).
(move2add_use_add3_insn): Likewise.
(reload_cse_move2add): Update accordingly.
rsandifo [Wed, 30 Aug 2017 11:12:35 +0000 (11:12 +0000)]
[30/77] Use scalar_int_mode for doubleword splits
This patch uses is_a <scalar_int_mode> in a couple of places that
were splitting doubleword integer operations into word_mode
operations. It also uses scalar_int_mode in the expand_expr_real_2
handling of doubleword shifts.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_real_2): Use scalar_int_mode for the
double-word mode.
* lower-subreg.c (resolve_shift_zext): Use is_a <scalar_int_mode>.
* optabs.c (expand_unop): Likewise.
rsandifo [Wed, 30 Aug 2017 11:12:28 +0000 (11:12 +0000)]
[29/77] Make some *_loc_descriptor helpers take scalar_int_mode
The *_loc_descriptor routines for clz, popcount, bswap and rotate
all required SCALAR_INT_MODE_P. This patch moves the checks into
the caller (mem_loc_descriptor) so that the types of the mode
parameters can be scalar_int_mode instead of machine_mode.
The MOD handling in mem_loc_descriptor is also specific to
scalar integer modes. Adding an explicit check allows
typed_binop to take a scalar_int_mode too.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* dwarf2out.c (typed_binop): Change mode parameter to scalar_int_mode.
(clz_loc_descriptor): Likewise. Remove SCALAR_INT_MODE_P check.
(popcount_loc_descriptor): Likewise.
(bswap_loc_descriptor): Likewise.
(rotate_loc_descriptor): Likewise.
(mem_loc_descriptor): Add is_a <scalar_int_mode> checks before
calling the functions above.
rsandifo [Wed, 30 Aug 2017 11:12:14 +0000 (11:12 +0000)]
[28/77] Use is_a <scalar_int_mode> for miscellaneous types of test
This patch adds is_a <scalar_int_mode> checks to various places
that were explicitly or implicitly restricted to integers already,
in cases where adding an explicit is_a <scalar_int_mode> is useful
for later patches.
In simplify_if_then_else, the:
GET_MODE (XEXP (XEXP (t, 0), N))
expressions were equivalent to:
GET_MODE (XEXP (t, 0))
due to the type of operation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:11:50 +0000 (11:11 +0000)]
[27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP
This patch adds is_a <scalar_int_mode> checks before load_extend_op/
LOAD_EXTEND_OP calls, if that becomes useful for later patches.
(load_extend_op will return UNKNOWN for any other type of mode.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:11:42 +0000 (11:11 +0000)]
[26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications
This patch adds is_a <scalar_int_mode> checks to various places that
were optimising subregs or extractions in ways that only made sense
for scalar integers. Often the subreg transformations were looking
for extends, truncates or shifts and trying to remove the subreg, which
wouldn't be correct if the SUBREG_REG was a vector rather than a scalar.
The simplify_binary_operation_1 part also removes a redundant:
GET_MODE (opleft) == GET_MODE (XEXP (opright, 0))
since this must be true for:
(ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:11:32 +0000 (11:11 +0000)]
[25/77] Use is_a <scalar_int_mode> for bitmask optimisations
Explicitly check for scalar_int_mode in code that maps arithmetic
to full-mode bit operations. These operations wouldn't work correctly
for vector modes, for example. In many cases this is enforced also by
checking whether an operand is CONST_INT_P, but there were other cases
where the condition is more indirect.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:11:23 +0000 (11:11 +0000)]
[24/77] Replace a != BLKmode check with is_a <scalar_int_mode>
This patch replaces a check against BLKmode with a check
of is_a <scalar_int_mode>, in a case where scalar integer
modes were the only useful alternatives left.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gimple-fold.c (gimple_fold_builtin_memory_op): Use
is_a <scalar_int_mode> instead of != BLKmode.
rsandifo [Wed, 30 Aug 2017 11:11:16 +0000 (11:11 +0000)]
[23/77] Replace != VOIDmode checks with is_a <scalar_int_mode>
This patch replaces some checks against VOIDmode with checks
of is_a <scalar_int_mode>, in cases where scalar integer modes
were the only useful alternatives left.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:11:09 +0000 (11:11 +0000)]
[22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>
This patch replaces some checks of !VECTOR_MODE_P with checks
of is_a <scalar_int_mode>, in cases where the scalar integer
modes were the only useful alternatives left.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* simplify-rtx.c (simplify_binary_operation_1): Use
is_a <scalar_int_mode> instead of !VECTOR_MODE_P.
rsandifo [Wed, 30 Aug 2017 11:11:02 +0000 (11:11 +0000)]
[21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode>
This patch replaces checks of "SCALAR_INT_MODE_P (...)" with
"is_a <scalar_int_mode> (..., &var)" in cases where it becomes
useful to refer to the mode as a scalar_int_mode. It also
replaces some checks for the two constituent classes (MODE_INT
and MODE_PARTIAL_INT).
The patch also introduces is_a <scalar_int_mode> checks for some
uses of HWI_COMPUTABLE_MODE_P, which is a subcondition of
SCALAR_INT_MODE_P.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:10:53 +0000 (11:10 +0000)]
[20/77] Replace MODE_INT checks with is_int_mode
Replace checks of "GET_MODE_CLASS (...) == MODE_INT" with
"is_int_mode (..., &var)", in cases where it becomes useful
to refer to the mode as a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:10:44 +0000 (11:10 +0000)]
[19/77] Add a smallest_int_mode_for_size helper function
This patch adds a wrapper around smallest_mode_for_size
for cases in which the mode class is MODE_INT. Unlike
(int_)mode_for_size, smallest_mode_for_size always returns
a mode of the specified class, asserting if no such mode exists.
smallest_int_mode_for_size therefore returns a scalar_int_mode
rather than an opt_scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:10:28 +0000 (11:10 +0000)]
[17/77] Add an int_mode_for_size helper function
This patch adds a wrapper around mode_for_size for cases in which
the mode class is MODE_INT (the commonest case). The return type
can then be an opt_scalar_int_mode instead of a machine_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:10:18 +0000 (11:10 +0000)]
[16/77] Add scalar_int_mode_pod
This patch adds a POD class for scalar integers, as an instance
of a new pod_mode template. Later patches will use pod_mode in
situations that really do need to be POD; this patch is simply
using PODs to remove load-time initialisation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (pod_mode): New type.
(scalar_int_mode_pod): New typedef.
* machmode.h (pod_mode): New class.
(int_n_data_t::m): Change type to scalar_int_mode_pod.
* genmodes.c (emit_mode_int_n): Update accordingly.
* lower-subreg.h (target_lower_subreg): Change type to
scalar_int_mode_pod.
* gdbhooks.py (build_pretty_printer): Handle pod_mode and
scalar_int_mode_pod.
rsandifo [Wed, 30 Aug 2017 11:10:11 +0000 (11:10 +0000)]
[15/77] Add scalar_int_mode
Similar to the previous scalar_float_mode patch, but for modes that
satisfy SCALAR_INT_MODE_P. There are very many uses of scalar integers,
so this patch only makes a token change to the types of byte_mode,
word_mode, ptr_mode and rs6000_pmode. The next patches in the series
gradually replace more uses.
The patch also removes and adds casts to some target-specific code
due to the new types of SImode, DImode and Pmode.
The as_a <scalar_int_mode> goes away in a later patch.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/powerpcspe/powerpcspe.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/powerpcspe/powerpcspe.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/rs6000/rs6000.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/rs6000/rs6000.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/s390/s390.h (Pmode): Remove cast to machine_mode.
* config/epiphany/epiphany.h (RTX_OK_FOR_OFFSET_P): Add cast
to machine_mode.
* config/s390/s390.c (s390_expand_builtin): Likewise.
* coretypes.h (scalar_int_mode): New type.
(opt_scalar_int_mode): New typedef.
* machmode.h (scalar_int_mode): New class.
(scalar_int_mode::includes_p): New function.
(byte_mode): Change type to scalar_int_mode.
(word_mode): Likewise.
(ptr_mode): Likewise.
* emit-rtl.c (byte_mode): Likewise.
(word_mode): Likewise.
(ptr_mode): Likewise.
(init_derived_machine_modes): Update accordingly.
* genmodes.c (get_mode_class): Return scalar_int_mode for MODE_INT
and MODE_PARTIAL_INT.
* gdbhooks.py (build_pretty_printer): Handle scalar_int_mode and
opt_scalar_int_mode.
rsandifo [Wed, 30 Aug 2017 11:09:48 +0000 (11:09 +0000)]
[12/77] Use opt_scalar_float_mode when iterating over float modes
This means that we know when accessing the modes that the size is
a compile-time constant, even for SVE. It also enables stricter
type safety in later patches.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_iterator::start): Provide overload for opt_modes.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
* expr.c (init_expr_target): Use opt_scalar_float_mode.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use opt_scalar_float_mode.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-cppbuiltin.c (c_cpp_builtins): Use opt_scalar_float_mode.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use opt_scalar_float_mode
and FOR_EACH_MODE_IN_CLASS.
rsandifo [Wed, 30 Aug 2017 11:09:27 +0000 (11:09 +0000)]
[9/77] Add SCALAR_FLOAT_TYPE_MODE
This patch adds a macro that extracts the TYPE_MODE and forcibly
converts it to a scalar_float_mode. The forcible conversion
includes a gcc_checking_assert that the mode is a SCALAR_FLOAT_MODE_P.
This becomes important as more static type checking is added by
later patches. It has the additional benefit of bypassing the
VECTOR_TYPE_P (...) ? vector_type_mode (...) : ... condition
in TYPE_MODE; in release builds the new macro is a simple
field access.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (SCALAR_FLOAT_TYPE_MODE): New macro.
* builtins.c (expand_builtin_signbit): Use it instead of TYPE_MODE.
* fold-const.c (fold_convert_const_real_from_fixed): Likewise.
(native_encode_real): Likewise.
(native_interpret_real): Likewise.
* hsa-brig.c (emit_immediate_scalar_to_buffer): Likewise.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
gcc/cp/
* mangle.c (write_real_cst): Use SCALAR_FLOAT_TYPE_MODE
instead of TYPE_MODE.
gcc/fortran/
* target-memory.c (size_float): Use SCALAR_FLOAT_TYPE_MODE
instead of TYPE_MODE.
gcc/objc/
* objc-encoding.c (encode_type): Use SCALAR_FLOAT_TYPE_MODE
instead of TYPE_MODE.
rsandifo [Wed, 30 Aug 2017 11:09:10 +0000 (11:09 +0000)]
[7/77] Add scalar_float_mode
This patch adds a scalar_float_mode class, which wraps a mode enum
that is known to satisfy SCALAR_FLOAT_MODE_P. Things like "SFmode"
now give a scalar_float_mode object instead of a machine_mode.
This in turn needs a change to the real.h format_helper, so that
it can accept both machine_modes and scalar_float_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_float_mode): New type.
* machmode.h (mode_traits::from_int): Use machine_mode if
USE_ENUM_MODES is defined.
(is_a): New function.
(as_a): Likewise.
(dyn_cast): Likewise.
(scalar_float_mode): New class.
(scalar_float_mode::includes_p): New function.
(is_float_mode): Likewise.
* gdbhooks.py (MachineModePrinter): New class.
(build_pretty_printer): Use it for scalar_float_mode.
* real.h (FLOAT_MODE_FORMAT): Use as_a <scalar_float_mode>.
(format_helper::format_helper): Turn into a template.
* genmodes.c (get_mode_class): New function.
(emit_insn_modes_h): Give modes the class returned by get_mode_class,
or machine_mode if none.
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Use
as_a <scalar_float_mode>.
* dwarf2out.c (mem_loc_descriptor): Likewise.
(insert_float): Likewise.
(add_const_value_attribute): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Likewise.
* optabs.c (expand_absneg_bit): Take a scalar_float_mode.
(expand_unop): Update accordingly.
(expand_abs_nojump): Likewise.
(expand_copysign_absneg): Take a scalar_float_mode.
(expand_copysign_bit): Likewise.
(expand_copysign): Update accordingly.
gcc/ada/
* gcc-interface/utils.c (gnat_type_for_mode): Use is_a
<scalar_float_mode> instead of SCALAR_FLOAT_MODE_P.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_float_mode.
rsandifo [Wed, 30 Aug 2017 11:09:01 +0000 (11:09 +0000)]
[6/77] Make GET_MODE_WIDER return an opt_mode
GET_MODE_WIDER previously returned VOIDmode if no wider mode existed.
That would cause problems with stricter mode classes, since VOIDmode
isn't for example a valid scalar integer or floating-point mode.
This patch instead makes it return a new opt_mode<T> class, which
holds either a T or nothing.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_mode): New class.
* machmode.h (opt_mode): Likewise.
(opt_mode::else_void): New function.
(opt_mode::require): Likewise.
(opt_mode::exists): Likewise.
(GET_MODE_WIDER_MODE): Turn into a function and return an opt_mode.
(GET_MODE_2XWIDER_MODE): Likewise.
(mode_iterator::get_wider): Update accordingly.
(mode_iterator::get_2xwider): Likewise.
(mode_iterator::get_known_wider): Likewise, turning into a template.
* combine.c (make_extraction): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
* config/cr16/cr16.h (LONG_REG_P): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* config/c6x/c6x.c (c6x_rtx_costs): Update use of
GET_MODE_2XWIDER_MODE, forcing a wider mode to exist.
* lower-subreg.c (init_lower_subreg): Likewise.
* optabs-libfuncs.c (init_sync_libfuncs_1): Likewise, but not
on the final iteration.
* config/i386/i386.c (ix86_expand_set_or_movmem): Check whether
a wider mode exists before asking for a move pattern.
(get_mode_wider_vector): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expand_vselect_vconcat): Update use of GET_MODE_2XWIDER_MODE,
returning false if no such mode exists.
* config/ia64/ia64.c (expand_vselect_vconcat): Likewise.
* config/mips/mips.c (mips_expand_vselect_vconcat): Likewise.
* expmed.c (init_expmed_one_mode): Update use of GET_MODE_WIDER_MODE.
Avoid checking for a MODE_INT if we already know the mode is not a
SCALAR_INT_MODE_P.
(extract_high_half): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
* expr.c (expand_expr_real_2): Update use of GET_MODE_WIDER_MODE,
using else_void.
* lto-streamer-in.c (lto_input_mode_table): Likewise.
* optabs-query.c (find_widening_optab_handler_and_mode): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): Likewise.
* internal-fn.c (expand_mul_overflow): Update use of
GET_MODE_2XWIDER_MODE.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* tree-ssa-math-opts.c (convert_mult_to_widen): Update use of
GET_MODE_WIDER_MODE.
(convert_plusminus_to_widen): Likewise.
* tree-switch-conversion.c (array_value_type): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
Return false inside rather than outside the loop if no wider mode
exists
* optabs.c (expand_binop): Update use of GET_MODE_WIDER_MODE
and GET_MODE_2XWIDER_MODE
(can_compare_p): Use else_void.
* gdbhooks.py (OptMachineModePrinter): New class.
(build_pretty_printer): Use it for opt_mode.
gcc/ada/
* gcc-interface/decl.c (validate_size): Update use of
GET_MODE_WIDER_MODE, forcing a wider mode to exist.
rsandifo [Wed, 30 Aug 2017 11:08:36 +0000 (11:08 +0000)]
[3/77] Allow machine modes to be classes
This patch makes various changes that allow modes like SImode to be
classes rather than enums.
Firstly, it adds inline functions for all mode size properties,
with the macros being simple wrappers around them. This is necessary
for the __builtin_constant_p trick to continue working effectively when
the mode arguments are slightly more complex (but still foldable at
compile time).
These inline functions are trivial and heavily used. There's not much
point keeping them out-of-line at -O0: if anything it would make
debugging harder rather than easier, and it would also slow things down.
The patch therefore marks them as "always_inline", if that's available.
Later patches use this approach too.
Using inline functions means that it's no longer possible to pass
an int to GET_MODE_PRECISION etc. The Fortran and powerpcspe-c.c
parts are needed to avoid instances of that.
The patch continues to use enums for gencondmd.c, so that more
mode comparisons are integer constant expressions when checking
for always-true or always-false conditions. This is the only
intended use of USE_ENUM_MODES.
The patch also enforces the previous replacement of case statements
by defining modes as:
#define FOOmode ((void) 0, E_FOOmode)
This adds no overhead but makes sure that new uses of "case FOOmode:"
don't accidentally creep in when FOOmode has no specific class associated
with it.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* genconditions.c (write_header): Add a "#define USE_ENUM_MODES".
* genmodes.c (emit_insn_modes_h): Define FOOmode to E_FOOmode if
USE_ENUM_MODES is defined and to ((void) 0, E_FOOmode) otherwise.
* machmode.h (mode_size): Move earlier in file.
(mode_precision): Likewise.
(mode_inner): Likewise.
(mode_nunits): Likewise.
(mode_unit_size): Likewise.
(unit_unit_precision): Likewise.
(mode_wider): Likewise.
(mode_2xwider): Likewise.
(machine_mode): New class.
(mode_to_bytes): New function.
(mode_to_bits): Likewise.
(mode_to_precision): Likewise.
(mode_to_inner): Likewise.
(mode_to_unit_size): Likewise.
(mode_to_unit_precision): Likewise.
(mode_to_nunits): Likewise.
(GET_MODE_SIZE): Use mode_to_bytes.
(GET_MODE_BITSIZE): Use mode_to_bits.
(GET_MODE_PRECISION): Use mode_to_precision.
(GET_MODE_INNER): Use mode_to_inner.
(GET_MODE_UNIT_SIZE): Use mode_to_unit_size.
(GET_MODE_UNIT_PRECISION): Use mode_to_unit_precision.
(GET_MODE_NUNITS): Use mode_to_nunits.
* system.h (ALWAYS_INLINE): New macro.
* config/powerpcspe/powerpcspe-c.c
(altivec_resolve_overloaded_builtin): Use machine_mode instead of
int for arg1_mode and arg2_mode.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use machine_mode instead of int
for "mode".
rsandifo [Wed, 30 Aug 2017 11:08:28 +0000 (11:08 +0000)]
[2/77] Add an E_ prefix to case statements
All case statements need to be updated to use the prefixed names,
since the unprefixed names will eventually not be integer constant
expressions. This patch does a mechanical substitution over the whole
codebase.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rsandifo [Wed, 30 Aug 2017 11:08:14 +0000 (11:08 +0000)]
[1/77] Add an E_ prefix to mode names
Later patches will add wrapper types for specific classes
of mode. E.g. SImode will be a scalar_int_mode, SFmode will be a
scalar_float_mode, etc. This patch prepares for that change by adding
an E_ prefix to the mode enum values. It also adds #defines that map
the unprefixed names to the prefixed names; e.g:
#define QImode E_QImode
Later patches will change this to use things like scalar_int_mode
where appropriate.
The patch continues to use enum values to initialise static data.
This isn't necessary for correctness, but it cuts down on the amount
of load-time initialisation and shouldn't have any downsides.
The patch also changes things like:
cmp_mode == DImode ? DFmode : DImode
to:
cmp_mode == DImode ? E_DFmode : E_DImode
This is because DImode and DFmode will eventually be different
classes, so the original ?: wouldn't be well-formed.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
rguenth [Wed, 30 Aug 2017 10:40:16 +0000 (10:40 +0000)]
2017-08-30 Richard Biener <rguenther@suse.de>
* dwarf2out.c (dwarf2out_finish): Remove setting AT_pubnames.
(dwarf2out_early_finish): Move setting of AT_pubnames from
early debug output to early finish.
rguenth [Wed, 30 Aug 2017 09:29:05 +0000 (09:29 +0000)]
2017-08-30 Richard Biener <rguenther@suse.de>
* dwarf2out.c (add_dwarf_attr): Check we don't add duplicate
attributes.
(gen_subprogram_die): Add DW_AT_object_pointer only early.
(dwarf2out_early_global_decl): Only generate a DIE for the
abstract origin if it doesn't already exist or is a declaration DIE.
(resolve_addr): Do not add the linkage name twice when
generating a stub DIE for the DW_TAG_GNU_call_site target.
* g++.dg/pr78112-2.C: Do not expect duplicate DW_AT_object_pointer.
jason [Tue, 29 Aug 2017 21:38:21 +0000 (21:38 +0000)]
PR c++/81236 - ICE with template-id in generic lambda
* semantics.c (finish_id_expression): Remove special dependent case.
Avoid some later pieces when dependent.
(finish_qualified_id_expr): Do normal BASELINK handling in a
template. Always build a SCOPE_REF for a destructor BIT_NOT_EXPR.
(parsing_default_capturing_generic_lambda_in_template): Remove.
* parser.c (cp_parser_postfix_dot_deref_expression): Always give an
error for types that will never be complete.
* mangle.c (write_expression): Add sanity check.
* tree.c (build_qualified_name): Add sanity check.
(cp_walk_subtrees): Walk into the class context of a BASELINK.
* lambda.c (add_capture): Improve diagnostic for generic lambda
capture failure.
* call.c (build_new_method_call_1): Print the right constructor
name.
jason [Tue, 29 Aug 2017 20:37:15 +0000 (20:37 +0000)]
Reimplement handling of lambdas in templates.
* cp-tree.h (LAMBDA_FUNCTION_P): Check DECL_DECLARES_FUNCTION_P.
* decl.c (start_preparsed_function): Call start_lambda_scope.
(finish_function): Call finish_lambda_scope.
* init.c (get_nsdmi): Call start/finish_lambda_scope.
* lambda.c (start_lambda_scope): Only ignore VAR_DECL in a function.
* parser.c (cp_parser_function_definition_after_declarator): Don't
call start/finish_lambda_scope.
* pt.c (retrieve_specialization): Ignore lambda functions in
templates.
(find_parameter_packs_r): Ignore capture proxies. Look into
lambdas.
(check_for_bare_parameter_packs): Allow bare packs in lambdas.
(tsubst_default_argument): Call start/finish_lambda_scope.
(tsubst_function_decl): Handle lambda functions differently.
(tsubst_template_decl): Likewise.
(tsubst_expr) [DECL_EXPR]: Skip closure declarations and capture
proxies.
(tsubst_lambda_expr): Create a new closure rather than instantiate
the one from the template.
(tsubst_copy_and_build): Don't register a specialization of a pack.
(regenerate_decl_from_template): Call start/finish_lambda_scope.
(instantiate_decl): Remove special lambda function handling.
* semantics.c (process_outer_var_ref): Remove special generic lambda
handling. Don't implicitly capture in a lambda in a template. Look
for an existing proxy.
* class.c (current_nonlambda_class_type): Use decl_type_context.
meissner [Tue, 29 Aug 2017 20:25:57 +0000 (20:25 +0000)]
[gcc]
2017-08-29 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/82015
* config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Insure
that the second argument of the built-in functions to unpack
128-bit scalar types to 64-bit values is 0 or 1. Change to use a
switch statement instead a lot of if statements.
* config/rs6000/rs6000.md (unpack<mode>, FMOVE128_VSX iterator):
Allow 64-bit values to be in Altivec registers as well as
traditional floating point registers.
(pack<mode>, FMOVE128_VSX iterator): Likewise.
[gcc/testsuite]
2017-08-29 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/82015
* gcc.target/powerpc/pr82015.c: New test.
jason [Tue, 29 Aug 2017 19:51:23 +0000 (19:51 +0000)]
Various small fixes.
* lambda.c (build_lambda_object): Check for error_mark_node.
* pt.c (make_pack_expansion): Set PACK_EXPANSION_LOCAL_P on the type
pack as well.
(tsubst_decl) [FUNCTION_DECL]: Set DECL_CONTEXT on the parameters.
(tsubst) [TEMPLATE_PARM_INDEX]: Check for error_mark_node.
jason [Tue, 29 Aug 2017 19:40:41 +0000 (19:40 +0000)]
Fix lambdas in template default argument of inherited ctor.
* method.c (synthesized_method_base_walk): Replace an inherited
template with its specialization.
(synthesized_method_walk): Make inheriting_ctor a pointer.
(maybe_explain_implicit_delete, explain_implicit_non_constexpr)
(deduce_inheriting_ctor, implicitly_declare_fn): Adjust.
rguenth [Tue, 29 Aug 2017 12:15:57 +0000 (12:15 +0000)]
2017-08-29 Richard Biener <rguenther@suse.de>
* dwarf2out.c (add_dwarf_attr): When checking is enabled verify
we do not add a DW_AT_inline attribute twice.
(gen_subprogram_die): Remove code setting DW_AT_inline on
DECL_ABSTRACT_P nodes.
rsandifo [Tue, 29 Aug 2017 07:47:05 +0000 (07:47 +0000)]
Set the call nothrow flag more often
This patch sets the nothrow flag for various calls to internal functions
that are not inherently NOTHROW (and so can't be declared that way in
internal-fn.def) but that are used in contexts that can guarantee
NOTHROWness.
2017-08-29 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* gimplify.c (gimplify_call_expr): Copy the nothrow flag to
calls to internal functions.
(gimplify_modify_expr): Likewise.
* tree-call-cdce.c (use_internal_fn): Likewise.
* tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Likewise.
(convert_to_divmod): Set the nothrow flag.
* tree-if-conv.c (predicate_mem_writes): Likewise.
* tree-vect-stmts.c (vectorizable_mask_load_store): Likewise.
(vectorizable_call): Likewise.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
* tree-vect-patterns.c (vect_recog_pow_pattern): Likewise.
(vect_recog_mask_conversion_pattern): Likewise.
law [Tue, 29 Aug 2017 05:03:36 +0000 (05:03 +0000)]
* tree-ssa-dom.c (edge_info::record_simple_equiv): Call
derive_equivalences.
(derive_equivalences_from_bit_ior, record_temporary_equivalences):
Code moved into....
(edge_info::derive_equivalences): New private member function
* gcc.dg/torture/pr57214.c: Fix type of loop counter.
* gcc.dg/tree-ssa/ssa-sink-16.c: Disable DOM.
* gcc.dg/tree-ssa/ssa-dom-thread-11.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-12.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-13.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-14.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-15.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-16.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-17.c: New test.
law [Tue, 29 Aug 2017 05:03:22 +0000 (05:03 +0000)]
* tree-ssa-dom.c (class edge_info): Changed from a struct
to a class. Add ctor/dtor, methods and data members.
(edge_info::edge_info): Renamed from allocate_edge_info.
Initialize additional members.
(edge_info::~edge_info): New.
(free_dom_edge_info): Delete the edge info.
(record_edge_info): Use new class & associated member functions.
Tighten forms for testing for edge equivalences.
(record_temporary_equivalences): Iterate over the simple
equivalences rather than assuming there's only one per edge.
(cprop_into_successor_phis): Iterate over the simple
equivalences rather than assuming there's only one per edge.
(optimize_stmt): Use operand_equal_p rather than pointer
equality for mini-DSE code.
rguenth [Mon, 28 Aug 2017 13:14:28 +0000 (13:14 +0000)]
2017-08-28 Richard Biener <rguenther@suse.de>
PR lto/81968
* simple-object-elf.c (simple_object_elf_copy_lto_debug_section):
Adjust field with for sh_type write, set SHF_EXCLUDE only for
removed sections.
amonakov [Mon, 28 Aug 2017 10:58:45 +0000 (10:58 +0000)]
optabs: ensure mem_thread_fence is a compiler barrier
PR target/80640
* doc/md.texi (mem_thread_fence): Remove mention of mode. Rewrite.
* optabs.c (expand_mem_thread_fence): Emit a compiler barrier when
using targetm.gen_mem_thread_fence.
testsuite/
* gcc.dg/atomic/pr80640.c: New testcase.
munroesj [Fri, 25 Aug 2017 15:23:27 +0000 (15:23 +0000)]
Part 3/3 for contributing PPC64LE support for X86 SSE instrisics.
This patch includes testsuite/gcc.target tests for the intrinsics
in xmmintrin.h. For these tests I added -Wno-psabi to dg-options
to suppress warnings associated with the vector ABI change in GCC5.
munroesj [Fri, 25 Aug 2017 15:11:50 +0000 (15:11 +0000)]
Part 2/3 for contributing PPC64LE support for X86 SSE
instrisics. This patch includes the new (for PPC) xmmintrin.h,
changes x86intrin.h to include xmmintrin.h and associated
config.gcc changes.
wschmidt [Fri, 25 Aug 2017 15:08:30 +0000 (15:08 +0000)]
2017-08-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/81504
* config/rs6000/rs6000-p8swap.c (find_alignment_op): Add reference
parameter and_insn and return it.
(recombine_lvx_pattern): Insert a copy to ensure availability of
the base register of the copied masking operation at the point of
the instruction replacement.
(recombine_stvx_pattern): Likewise.
meissner [Fri, 25 Aug 2017 13:07:10 +0000 (13:07 +0000)]
[gcc]
2017-08-24 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.opt (-mpower9-dform-scalar): Delete
undocumented switches.
(-mpower9-dform-vector): Likewise.
(-mpower9-dform): Likewise.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Update
comments to delete references to -mpower9-dform* switches.
* config/rs6000/predicates.md (vsx_quad_dform_memory_operand):
Delete reference to -mpower9-dform* switches, test for
-mpower9-vector instead.
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Likewise.
(OTHER_P9_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Change
tests against -mpower9-dform* to -mpower9-vector. Delete code
that checked for -mpower9-dform* consistancy with other options.
Add test for -mpower9-misc to enable other power9 switches.
(rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_option_override_internal): Likewise.
(rs6000_emit_prologue): Likewise.
(rs6000_emit_epilogue): Likewise.
(rs6000_opt_masks): Delete -mpower9-dform-{scalar,vector}.
(rs6000_disable_incompatiable_switches): Delete -mpower9-dform.
(emit_fusion_p9_load): Change tests for -mpower9-dform-scalar
-mpower9-vector.
(emit_fusion_p9_store): Likewise.
* config/rs6000/rs6000.h (TARGET_P9_DFORM_SCALAR): Delete
resetting these macros if the assembler does not support ISA 3.0
instructions.
(TARGET_P9_DFORM_VECTOR): Likewise.
* config/rs6000/rs6000.md (peepholes to optimize altivec memory):
Change to use -mpower9-vector instead of -mpower9-dform-scalar.
[gcc/testsuite]
2017-08-24 Michael Meissner <meissner@linux.vnet.ibm.com>
amodra [Fri, 25 Aug 2017 12:21:00 +0000 (12:21 +0000)]
PR81747, ICE in operator[]
PR rtl-optimization/81747
* cse.c (cse_extended_basic_block): Don't attempt to record
equivalences for degenerate conditional branches that branch
to their fall-through.
PR middle-end/81908
* gimple-fold.c (size_must_be_zero_p): New function.
(gimple_fold_builtin_memory_op): Call it.
gcc/testsuite/ChangeLog:
PR middle-end/81908
* gcc.dg/tree-ssa/builtins-folding-gimple-2.c: New test.
* gcc.dg/tree-ssa/builtins-folding-gimple-3.c: New test.
* gcc.dg/tree-ssa/pr81908.c: New test.
meissner [Thu, 24 Aug 2017 19:28:07 +0000 (19:28 +0000)]
[gcc]
2017-08-24 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.opt (-mpower9-dform-scalar): Delete
undocumented switches.
(-mpower9-dform-vector): Likewise.
(-mpower9-dform): Likewise.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Update
comments to delete references to -mpower9-dform* switches.
* config/rs6000/predicates.md (vsx_quad_dform_memory_operand):
Delete reference to -mpower9-dform* switches, test for
-mpower9-vector instead.
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Likewise.
(OTHER_P9_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Change
tests against -mpower9-dform* to -mpower9-vector. Delete code
that checked for -mpower9-dform* consistancy with other options.
Add test for -mpower9-misc to enable other power9 switches.
(rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_option_override_internal): Likewise.
(rs6000_emit_prologue): Likewise.
(rs6000_emit_epilogue): Likewise.
(rs6000_opt_masks): Delete -mpower9-dform-{scalar,vector}.
(rs6000_disable_incompatiable_switches): Delete -mpower9-dform.
(emit_fusion_p9_load): Change tests for -mpower9-dform-scalar
-mpower9-vector.
(emit_fusion_p9_store): Likewise.
* config/rs6000/rs6000.h (TARGET_P9_DFORM_SCALAR): Delete
resetting these macros if the assembler does not support ISA 3.0
instructions.
(TARGET_P9_DFORM_VECTOR): Likewise.
* config/rs6000/rs6000.md (peepholes to optimize altivec memory):
Change to use -mpower9-vector instead of -mpower9-dform-scalar.
[gcc/testsuite]
2017-08-24 Michael Meissner <meissner@linux.vnet.ibm.com>