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9 years agotarget-xtensa: add missing window check for entry
Max Filippov [Fri, 7 Nov 2014 18:11:07 +0000 (21:11 +0300)] 
target-xtensa: add missing window check for entry

Entry opcode needs to check if moving to new register frame would cause
register window overflow. Entry used in function prologue never
overflows because preceding windowed call* opcode writes return address
to the target register window frame, causing overflow exceptions at the
point of call. But when a sequence of entry opcodes is used for register
window spilling there may not be a call or other opcode that would cause
window check between entries and they would not raise overflow exception
themselves resulting in data corruption.

Cc: qemu-stable@nongnu.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
9 years agoMerge remote-tracking branch 'remotes/lalrae/tags/mips-20141107' into staging
Peter Maydell [Mon, 10 Nov 2014 13:56:47 +0000 (13:56 +0000)] 
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141107' into staging

* remotes/lalrae/tags/mips-20141107:
  target-mips: fix multiple TCG registers covering same data
  mips: Ensure PC update with MTC0 single-stepping
  target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ
  mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits
  mips: Add macros for CP0.Config3 and CP0.Config4 bits
  mips: Respect CP0.Status.CU1 for microMIPS FP branches
  mips: Remove CONFIG_VT82C686 from non-Fulong configs

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/amit/tags/vser-2.2.0-queue-2' into staging
Peter Maydell [Mon, 10 Nov 2014 11:58:39 +0000 (11:58 +0000)] 
Merge remote-tracking branch 'remotes/amit/tags/vser-2.2.0-queue-2' into staging

Fixes a crash when a virtio-serial port is added without a name to it.

# gpg: Signature made Fri 07 Nov 2014 04:58:05 GMT using RSA key ID 854083B6
# gpg: Good signature from "Amit Shah <amit@amitshah.net>"
# gpg:                 aka "Amit Shah <amit@kernel.org>"
# gpg:                 aka "Amit Shah <amitshah@gmx.net>"

* remotes/amit/tags/vser-2.2.0-queue-2:
  virtio-serial: avoid crash when port has no name

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agotarget-mips: fix multiple TCG registers covering same data
Yongbok Kim [Fri, 7 Nov 2014 10:43:21 +0000 (10:43 +0000)] 
target-mips: fix multiple TCG registers covering same data

Avoid to allocate different TCG registers for the FPU registers
that are mapped on the MSA vectore registers.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agomips: Ensure PC update with MTC0 single-stepping
Maciej W. Rozycki [Thu, 6 Nov 2014 20:38:10 +0000 (20:38 +0000)] 
mips: Ensure PC update with MTC0 single-stepping

Correct the way PC is updated when single-stepping instructions, by
keeping the old PC only for the BS_EXCP (exception condition) state.

Some MTC0 (and possibly other) instructions switch to the BS_STOP state
to terminate the current translation block, so that the state transition
of the simulated CPU resulting from the CP0 operation takes effect with
the following instruction.  This happens with `mtc0 <reg>,c0_config' for
example, typically used to set KSEG0 cacheability.

While single-stepping this has a side-effect of not advancing the PC
past the instruction just executed; subsequent single-step traps will
stop at the same instruction repeatedly.  Example:

(gdb) stepi
0x80004d24 in _start ()
5: x/i $pc
=> 0x80004d24 <_start+364>:     mfc0    t1,c0_config
(gdb)
0x80004d28 in _start ()
5: x/i $pc
=> 0x80004d28 <_start+368>:     li      at,-8
(gdb)
0x80004d2c in _start ()
5: x/i $pc
=> 0x80004d2c <_start+372>:     and     t1,t1,at
(gdb)
0x80004d30 in _start ()
5: x/i $pc
=> 0x80004d30 <_start+376>:     ori     t1,t1,0x3
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>:     mtc0    t1,c0_config
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>:     mtc0    t1,c0_config
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>:     mtc0    t1,c0_config
(gdb)
0x80004d34 in _start ()
5: x/i $pc
=> 0x80004d34 <_start+380>:     mtc0    t1,c0_config
(gdb)

-- oops!

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: fix for missing delay slot in BC1EQZ and BC1NEZ
Leon Alrae [Thu, 6 Nov 2014 10:29:38 +0000 (10:29 +0000)] 
target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ

New R6 COP1 conditional branches currently don't have delay slot. Fixing this
by setting MIPS_HFLAG_BDS32 flag which is required for branches having 4-byte
delay slot.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
9 years agomips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits
Maciej W. Rozycki [Tue, 4 Nov 2014 15:41:20 +0000 (15:41 +0000)] 
mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits

Set the CP0.Config3.DSP2P bit for the 74kf processor and both that bit
and the CP0.Config3.DSP bit for the artificial mips32r5-generic and
mips64dspr2 processors.  They have the DSPr2 ASE enabled in `insn_flags'
and CPUs that implement that ASE need to have both CP0.Config3.DSP and
CP0.Config3.DSP2P set or software won't detect its presence.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
[leon.alrae@imgtec.com: remove DSP flags from mips32r5-generic]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agomips: Add macros for CP0.Config3 and CP0.Config4 bits
Maciej W. Rozycki [Tue, 4 Nov 2014 15:38:05 +0000 (15:38 +0000)] 
mips: Add macros for CP0.Config3 and CP0.Config4 bits

Define macros for CP0.Config3 and CP0.Config4 bits.  These used to be
exhaustive as at MIPS32r3, but more bits may have been added since.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agomips: Respect CP0.Status.CU1 for microMIPS FP branches
Maciej W. Rozycki [Mon, 3 Nov 2014 19:08:51 +0000 (19:08 +0000)] 
mips: Respect CP0.Status.CU1 for microMIPS FP branches

Make microMIPS FP branches respect CP0.Status.CU1 and trap with a
Coprocessor Unusable exception if COP1 has been disabled; also trap if
no FPU is present at all.

Standard MIPS FP instruction encodings have a more regular structure and
branches are covered with a single umbrella along other instructions.
This is not the case with the microMIPS encoding, this case has to be
taken care of explicitly here.  Code to do so has been copied from the
standard MIPS code handler for OPC_CP1, in `decode_opc'.

Problems arising from this bug will generally only show up on user
context switches in operating systems making use of lazy FP context
switches, such as Linux.  It will also more readily trigger if software
FPU emulation is used, either implicitly on a non-float CPU, or forced
on a hard-float CPU such as with the "nofpu" Linux kernel command line
argument.

The problem may have been easily missed because we have no hard-float
microMIPS CPU configuration present; in fact we have no microMIPS CPU
configuration of any kind present.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agomips: Remove CONFIG_VT82C686 from non-Fulong configs
Maciej W. Rozycki [Mon, 3 Nov 2014 18:36:17 +0000 (18:36 +0000)] 
mips: Remove CONFIG_VT82C686 from non-Fulong configs

Fix the regression introduced with commit
47934d0aadc075b05ce2d9e8a44fa6a46edd1afa [hw: move ISA bridges and
devices to hw/isa/, configure with default-configs/], by removing
CONFIG_VT82C686 from configurations that previously did not enable it.
That southbridge is only available on Fulong platforms (CONFIG_FULONG)
that are exclusively little-endian, 64-bit MIPS.  Previously vt82c686.o
was pulled explicitly with obj-$(CONFIG_FULONG).

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agovirtio-serial: avoid crash when port has no name
Marc-André Lureau [Wed, 5 Nov 2014 14:43:14 +0000 (15:43 +0100)] 
virtio-serial: avoid crash when port has no name

It seems "name" is not mandatory, and the following command line (based
on one generated by current libvirt) will crash qemu at start:

qemu-system-x86_64 \
    -device virtio-serial-pci \
    -device virtserialport,name=foo \
    -device virtconsole

Program received signal SIGSEGV, Segmentation fault.
__strcmp_ssse3 () at ../sysdeps/x86_64/strcmp.S:210
210        movlpd    (%rsi), %xmm2
Missing separate debuginfos, use: debuginfo-install
python-libs-2.7.5-13.fc20.x86_64
(gdb) bt
 #0  __strcmp_ssse3 () at ../sysdeps/x86_64/strcmp.S:210
 #1  0x000055555566bdc6 in find_port_by_name (name=0x0) at /home/elmarco/src/qemu/hw/char/virtio-serial-bus.c:67

Signed-off-by: Marc-André Lureau <marcandre.lureau@gmail.com>
Reviewed-by: Amos Kong <akong@redhat.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
9 years agoUpdate version for v2.2.0-rc0 release v2.2.0-rc0
Peter Maydell [Wed, 5 Nov 2014 15:21:04 +0000 (15:21 +0000)] 
Update version for v2.2.0-rc0 release

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/agraf/tags/signed-s390-for-upstream' into staging
Peter Maydell [Wed, 5 Nov 2014 14:14:47 +0000 (14:14 +0000)] 
Merge remote-tracking branch 'remotes/agraf/tags/signed-s390-for-upstream' into staging

Patch queue for s390 - 2014-11-05

Two simple bug fixes to enable slightly newer guest kernels
and preliminary -M s390-ccw support for TCG (virtio doesn't work yet!)

# gpg: Signature made Wed 05 Nov 2014 11:01:55 GMT using RSA key ID 03FEDC60
# gpg: Good signature from "Alexander Graf <agraf@suse.de>"
# gpg:                 aka "Alexander Graf <alex@csgraf.de>"

* remotes/agraf/tags/signed-s390-for-upstream:
  s390x: Implement SAM{24,31,64}
  s390x: Fix sclp console input

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agovhost-user-test: Fix 'make check' broken on glib < 2.26
Gonglei [Wed, 5 Nov 2014 01:00:59 +0000 (09:00 +0800)] 
vhost-user-test: Fix 'make check' broken on glib < 2.26

After commit 89b516d8, some logics is turbid and
breaks 'make check' as below errors:
tests/vhost-user-test.c: In function '_cond_wait_until':
tests/vhost-user-test.c:154: error: 'G_TIME_SPAN_SECOND' undeclared (first use in this function)
tests/vhost-user-test.c:154: error: (Each undeclared identifier is reported only once
tests/vhost-user-test.c:154: error: for each function it appears in.)
tests/vhost-user-test.c: In function 'read_guest_mem':
tests/vhost-user-test.c:192: warning: implicit declaration of function 'g_get_monotonic_time'
tests/vhost-user-test.c:192: warning: nested extern declaration of 'g_get_monotonic_time'
tests/vhost-user-test.c:192: error: 'G_TIME_SPAN_SECOND' undeclared (first use in this function)
make: *** [tests/vhost-user-test.o] Error 1

First, vhost-usr-test.c rely on glib-compat.h because
of using G_TIME_SPAN_SECOND [glib < 2.26] and g_get_monotonic_time(),
but vhost-usr-test.c defined QEMU_GLIB_COMPAT_H, which make
glib-compat.h will not be included.
Second, if we remove QEMU_GLIB_COMPAT_H definability in
vhost-usr-test.c, then we will get below warnings:

tests/vhost-user-test.c: In function 'read_guest_mem':
tests/vhost-user-test.c:190: warning: passing argument 1 of 'g_mutex_lock' from incompatible pointer type
tests/vhost-user-test.c:234: warning: passing argument 1 of 'g_mutex_unlock' from incompatible pointer type

That's because glib-compat.h redefine the g_mutex_lock/unlock
function. Those functions' arguments is CompatGMutex/CompatGCond,
but vhost-user-test.c is using GMutex/GCond, which cause the type
is not consistent.

We can rerealize those functions of vhost-user-test.c,
which need a lots of patches. Let's simply address it, and
leave this file alone.

Signed-off-by: Gonglei <arei.gonglei@huawei.com>
Message-id: 1415149259-6188-1-git-send-email-arei.gonglei@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agos390x: Implement SAM{24,31,64}
Alexander Graf [Wed, 15 Oct 2014 16:06:07 +0000 (18:06 +0200)] 
s390x: Implement SAM{24,31,64}

The SAM instructions simply change 2 bits in PSW.MASK to advertise
the current memory mode. While we can't fully guarantee that 31 bit
mode (or even remotely 24 bit mode) actually work correctly, we don't
check whether lpswe modifies these bits, so we shouldn't keep the
guest from executing SAM instructions either.

This patch implements all SAM instrutions with their actual PSW changing
semantics, making more recent Linux kernels boot properly which do issue
a SAM31 call during early boot.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
9 years agos390x: Fix sclp console input
Alexander Graf [Wed, 15 Oct 2014 15:52:49 +0000 (17:52 +0200)] 
s390x: Fix sclp console input

When injecting an sclp console interrupt into the guest, we increase
the PC by 4 for some reason. I have no idea why I put that code there,
but it's clearly wrong. Remove the increment.

This patch fixes sclp serial input for the ccw machine.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
9 years agoMerge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging
Peter Maydell [Tue, 4 Nov 2014 22:27:23 +0000 (22:27 +0000)] 
Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging

Patch queue for ppc - 2014-11-04

Fun things for 2.2:

  - e500 virt machine: power off support (needs 3.19 guests)
  - e500 virt machine: -device eTSEC support
  - new framework to allow dynamic spawning of sysbus devices
  - spapr: enable migration of nvram
  - new 440x5wDFPU cpu type
  - Altivec and other random fixes

# gpg: Signature made Tue 04 Nov 2014 22:26:39 GMT using RSA key ID 03FEDC60
# gpg: Good signature from "Alexander Graf <agraf@suse.de>"
# gpg:                 aka "Alexander Graf <alex@csgraf.de>"

* remotes/agraf/tags/signed-ppc-for-upstream: (34 commits)
  spapr: Allow dynamic creation of PHB
  target-ppc: Fix Altivec Round Opcodes
  target-ppc: Fix vcmpbfp. Unordered Case
  target-ppc: Fix Altivec Shifts
  target-ppc: simplify AES emulation
  e500: Add support for eTSEC in device tree
  PPC: e500: Support dynamically spawned sysbus devices
  sysbus: Add new platform bus helper device
  sysbus: Expose MMIO enumeration helper
  sysbus: Expose IRQ enumeration helpers
  sysbus: Make devices spawnable via -device
  sysbus: Add dynamic sysbus device search
  hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)
  ppc: do not look at the MMU index to detect PR/HV mode
  target-ppc: kvm: Fix memory overflow issue about strncat()
  spapr_nvram: Enable migration
  PPC: E500: Hook up power off GPIO to GPIO controller
  PPC: E500: Instantiate MPC8XXX gpio controller on virt machine
  PPC: Add MPC8XXX gpio controller
  target-ppc: Fix an invalid free in opcode table handling code.
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agospapr: Allow dynamic creation of PHB
Alexander Graf [Tue, 4 Nov 2014 22:22:54 +0000 (23:22 +0100)] 
spapr: Allow dynamic creation of PHB

Now that we finally check for presence of dangling sysbus devices, make check
started complaining that the sPAPR PHB is one such device.

However, it really isn't. The spapr PHB is not really a traditional sysbus
device, but much more a special spapr pv device which is already able to get
created dynamically.

Move spapr to its own dynamic sysbus check handling and allow PHB devices to
get allocated dynamically.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Fix Altivec Round Opcodes
Tom Musta [Fri, 31 Oct 2014 16:06:15 +0000 (11:06 -0500)] 
target-ppc: Fix Altivec Round Opcodes

Correct the opcodes for the vrfim, vrfin and vrfiz instructions.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Fix vcmpbfp. Unordered Case
Tom Musta [Fri, 31 Oct 2014 16:39:54 +0000 (11:39 -0500)] 
target-ppc: Fix vcmpbfp. Unordered Case

Fix the implementation of Vector Compare Bounds Single Precision.
Specifically, fix the case where the operands are unordered -- since
the result is non-zero, the CR[6] field should be set to zero.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Fix Altivec Shifts
Tom Musta [Wed, 29 Oct 2014 15:02:39 +0000 (10:02 -0500)] 
target-ppc: Fix Altivec Shifts

Fix the implementation of the Altivec shift left and shift right
instructions (vsl, vsr) which erroneously inverts shift direction
on big endian hosts.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: simplify AES emulation
Aurelien Jarno [Mon, 27 Oct 2014 16:25:52 +0000 (17:25 +0100)] 
target-ppc: simplify AES emulation

This patch simplifies the AES code, by directly accessing the newly added
S-Box, InvS-Box tables instead of recreating them by using the AES_Te and
AES_Td tables.

Cc: Alexander Graf <agraf@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoe500: Add support for eTSEC in device tree
Alexander Graf [Tue, 1 Jul 2014 21:30:06 +0000 (23:30 +0200)] 
e500: Add support for eTSEC in device tree

This patch adds support to expose eTSEC devices in the dynamically created
guest facing device tree. This allows us to expose eTSEC devices into guests
without changes in the machine file.

Because we can now tell the guest about eTSEC devices this patch allows the
user to specify eTSEC devices via -device at all.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoPPC: e500: Support dynamically spawned sysbus devices
Alexander Graf [Tue, 1 Jul 2014 14:27:09 +0000 (16:27 +0200)] 
PPC: e500: Support dynamically spawned sysbus devices

For e500 our approach to supporting dynamically spawned sysbus devices is to
create a simple bus from the guest's point of view within which we map those
devices dynamically.

We allocate memory regions always within the "platform" hole in address
space and map IRQs to predetermined IRQ lines that are reserved for platform
device usage.

This maps really nicely into device tree logic, so we can just tell the
guest about our virtual simple bus in device tree as well.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agosysbus: Add new platform bus helper device
Alexander Graf [Wed, 24 Sep 2014 11:16:11 +0000 (13:16 +0200)] 
sysbus: Add new platform bus helper device

We need to support spawning of sysbus devices dynamically via the command line.
The easiest way to represent these dynamically spawned devices in the guest's
memory and IRQ layout is by preallocating some space for dynamic sysbus devices.

This is what the "platform bus" device does. It is a sysbus device that exports
a configurably sized MMIO region and a configurable number of IRQ lines. When
this device encounters sysbus devices that have been dynamically created and not
manually wired up, it dynamically connects them to its own pool of resources.

The machine model can then loop through all of these devices and create a guest
configuration (device tree) to make them visible to the guest.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agosysbus: Expose MMIO enumeration helper
Alexander Graf [Wed, 24 Sep 2014 10:36:30 +0000 (12:36 +0200)] 
sysbus: Expose MMIO enumeration helper

Sysbus devices have a range of MMIO regions they expose. The exact number
of regions is device specific and internal information to the device model.

Expose whether a region exists via a public interface. That way our platform
bus enumeration code can dynamically determine how many regions exist.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agosysbus: Expose IRQ enumeration helpers
Alexander Graf [Wed, 24 Sep 2014 10:32:17 +0000 (12:32 +0200)] 
sysbus: Expose IRQ enumeration helpers

Sysbus devices can get their IRQ lines connected to other devices. It is
possible to figure out which IRQ line a connection is on and whether a sysbus
device even provides an IRQ connector at a specific offset.

This patch exposes helpers to make this information publicly accessible. We
will need it for the platform bus dynamic sysbus enumeration.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agosysbus: Make devices spawnable via -device
Alexander Graf [Tue, 1 Jul 2014 14:14:41 +0000 (16:14 +0200)] 
sysbus: Make devices spawnable via -device

Now that we can properly map sysbus devices that haven't been connected to
something forcefully by C code, we can allow the -device command line option
to spawn them.

For machines that don't implement dynamic sysbus assignment in their board
files we add a new bool "has_dynamic_sysbus" to the machine class.
When that property is false (default), we bail out when we see dynamically
spawned sysbus devices, like we did before.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agosysbus: Add dynamic sysbus device search
Alexander Graf [Wed, 24 Sep 2014 11:06:57 +0000 (13:06 +0200)] 
sysbus: Add dynamic sysbus device search

Sysbus devices can be spawned by C code or dynamically via the command line.
In the latter case, we need to be able to find the dynamically created devices
to do things with them.

This patch adds a search helper that makes it easy to look for dynamically
spawned sysbus devices.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agohw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)
Peter Maydell [Wed, 22 Oct 2014 17:41:07 +0000 (18:41 +0100)] 
hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)

The g_hash_table_iter_* functions for iterating through a hash table
are not present in glib 2.12, which is our current minimum requirement.
Rewrite the code to use g_hash_table_foreach() instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoppc: do not look at the MMU index to detect PR/HV mode
Paolo Bonzini [Mon, 15 Sep 2014 15:03:28 +0000 (17:03 +0200)] 
ppc: do not look at the MMU index to detect PR/HV mode

The MMU index is an internal detail that should not be needed by the
translator (except to generate loads and stores).  Look at the MSR
directly.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: kvm: Fix memory overflow issue about strncat()
Chen Gang [Wed, 15 Oct 2014 13:48:07 +0000 (21:48 +0800)] 
target-ppc: kvm: Fix memory overflow issue about strncat()

strncat() will append additional '\0' to destination buffer, so need
additional 1 byte for it, or may cause memory overflow, just like other
area within QEMU have done.

And can use g_strdup_printf() instead of strncat(), which may be more
easier understanding.

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agospapr_nvram: Enable migration
Alexey Kardashevskiy [Thu, 2 Oct 2014 09:56:03 +0000 (19:56 +1000)] 
spapr_nvram: Enable migration

The only case when sPAPR NVRAM migrates now is if is backed by a file and
copy-storage migration is performed. In other cases NVRAM does not
migrate regardless whether it is backed by a file or not.

This enables shadow copy of NVRAM in RAM which is read from a file
(if used) and used for reads. Writes to NVRAM are mirrored to the file.

This defines a VMSTATE descriptor for NVRAM device so the memory copy
of NVRAM can migrate and be flushed to a backing file on the destination
if one is specified.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoPPC: E500: Hook up power off GPIO to GPIO controller
Alexander Graf [Wed, 1 Oct 2014 14:05:47 +0000 (16:05 +0200)] 
PPC: E500: Hook up power off GPIO to GPIO controller

Now that we have a working GPIO controller on the virt machine, we can use
one pin to notify QEMU that the guests wants to power off the system.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoPPC: E500: Instantiate MPC8XXX gpio controller on virt machine
Alexander Graf [Wed, 1 Oct 2014 14:00:49 +0000 (16:00 +0200)] 
PPC: E500: Instantiate MPC8XXX gpio controller on virt machine

With the e500 virt machine, we don't have to adhere to the exact hardware
layout of an mpc8544ds board. So there we can just add a qoriq compatible
GPIO controller into the system that we can add a power off hook to.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoPPC: Add MPC8XXX gpio controller
Alexander Graf [Wed, 1 Oct 2014 13:52:12 +0000 (15:52 +0200)] 
PPC: Add MPC8XXX gpio controller

On e500 systems most SoCs implement a common GPIO controller that Linux
calls the "mpc8xxx" gpio controller. This patch adds an emulation model
for this device.

Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Fix an invalid free in opcode table handling code.
Bharata B Rao [Fri, 26 Sep 2014 09:07:38 +0000 (14:37 +0530)] 
target-ppc: Fix an invalid free in opcode table handling code.

Opcode table has direct, indirect and double indirect handlers, but
ppc_cpu_unrealizefn() frees direct handlers which are never allocated
and never frees double indirect handlers.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Use macros in opcodes table handling code
Bharata B Rao [Fri, 26 Sep 2014 09:07:37 +0000 (14:37 +0530)] 
target-ppc: Use macros in opcodes table handling code

Define and use macros instead of direct numbers wherever
possible in ppc opcodes table handling code.

This doesn't change any code functionality.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agohw/pci/ppc4xx_pci.c: Remove unused pci4xx_cfgaddr_read/write/ops
Peter Maydell [Sun, 14 Sep 2014 19:38:47 +0000 (20:38 +0100)] 
hw/pci/ppc4xx_pci.c: Remove unused pci4xx_cfgaddr_read/write/ops

The MemoryRegionOps struct pci4xx_cfgaddr_ops and the read and
write functions it references are all unused; remove them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc : Add new processor type 440x5wDFPU
Pierre Mallard [Fri, 12 Sep 2014 19:31:33 +0000 (21:31 +0200)] 
target-ppc : Add new processor type 440x5wDFPU

This patch add a new processor type 440x5wDFPU for Virtex 5 PPC440
with an external APU FPU in double precision mode

Signed-off-by: Pierre Mallard <mallard.pierre@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64
Pierre Mallard [Fri, 12 Sep 2014 19:31:32 +0000 (21:31 +0200)] 
target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64

This patch remove limitation for fc[tf]id[*] on 32 bits targets and
add a new insn flag for signed integer 64 conversion PPC2_FP_CVT_S64

Signed-off-by: Pierre Mallard <mallard.pierre@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoPPC: openpic_kvm: Only map first occurence in address space
Alexander Graf [Thu, 11 Sep 2014 10:22:57 +0000 (12:22 +0200)] 
PPC: openpic_kvm: Only map first occurence in address space

The in-kernel OpenPIC emulation only supports a single map. However, we
map the OpenPIC at 2 locations: The CPU visible one and the PCI visible
one. For KVM acceleration, we only care about the first one.

To make sure that we only map that first mapping and not the PCI map that
happens dynamically later during bootup, ignore maps that happen when
we are already considering ourselves mapped.

Credits due are to Bogdan and Mihai for debugging this.

Reported-by: Bogdan Purcareata <bogdan.purcareata@freescale.com>
Reported-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agospapr: Cleanup machine naming conventions, and prepare for 2.2 release
David Gibson [Mon, 8 Sep 2014 05:30:31 +0000 (15:30 +1000)] 
spapr: Cleanup machine naming conventions, and prepare for 2.2 release

As of qemu-2.1, spapr/pseries, has a set of versioned machine classes to
represent the machine type as it appeared to the guest in different qemu
versions.  This allows for safe migration of guests between current and
future qemu versions.

However, these are organized a bit differently from those for PC: on PC,
the default plain "pc" machine type is just an alias for the most recent
versioned machine type.  In sPAPR, it names the base machine class from
which the versioned types are derived.

The PC approach is preferable; it makes it clearer which explicit version
is the current one.  Additionally updating the "current" machine as the
base class makes it even more likely than otherwise to incorrectly alter
the versioned machines' behaviour when updating the current machine.

Therefore this patch changes sPAPR to the PC approach - the base class
becomes abstract, and plain "pseries" becomes an alias for the most
recent versioned machine class.  Since qemu-2.1 is now released, we also
create a new pseries-2.2 machine type, to incorporate changes during this
development cycle (for now it is identical to pseries-2.1).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: virtex-ml507 machine type should depend on CONFIG_XILINX
David Gibson [Tue, 26 Aug 2014 04:30:18 +0000 (14:30 +1000)] 
target-ppc: virtex-ml507 machine type should depend on CONFIG_XILINX

The virtex-ml507 is a Xilinx CPU based system, and requires several sub
devices which are only included with CONFIG_XILINX.  Therefore, it should
only be compiled if CONFIG_XILINX is set.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Implement IVOR[59] By Default for Book E
Tom Musta [Fri, 5 Sep 2014 16:39:05 +0000 (11:39 -0500)] 
target-ppc: Implement IVOR[59] By Default for Book E

Adjust the IVOR mask for generic Book E implementation to support bit 59.
This is consistent with the Power ISA.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reported-by: Pierre Mallard <mallard.pierre@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agotarget-ppc: Fix kvmppc_set_compat to use negotiated cpu-version
Alexey Kardashevskiy [Fri, 5 Sep 2014 07:04:21 +0000 (17:04 +1000)] 
target-ppc: Fix kvmppc_set_compat to use negotiated cpu-version

By mistake, QEMU uses the maximum compatibility level from the command
line instead of the value negotiated in client-architecture-support call.

This replaces @max_compat with @cpu_version. This only affects guests
which do not support the host CPU.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoppc: compute mask from BI using right shift
Paolo Bonzini [Thu, 28 Aug 2014 17:15:09 +0000 (19:15 +0200)] 
ppc: compute mask from BI using right shift

This will match the code we use in fpu_helper.c when we flip
CRF_* bit-endianness.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoppc: rename gen_set_cr6_from_fpscr
Paolo Bonzini [Thu, 28 Aug 2014 17:15:07 +0000 (19:15 +0200)] 
ppc: rename gen_set_cr6_from_fpscr

It sets CR1, not CR6 (and the spec agrees).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoppc: fix result of DLMZB when no zero bytes are found
Paolo Bonzini [Thu, 28 Aug 2014 17:15:03 +0000 (19:15 +0200)] 
ppc: fix result of DLMZB when no zero bytes are found

It must return 8 and place 8 in XER, but the current code uses
i directly which is 9 at this point of the code.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoppc: use CRF_* in int_helper.c
Paolo Bonzini [Thu, 28 Aug 2014 17:15:02 +0000 (19:15 +0200)] 
ppc: use CRF_* in int_helper.c

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoppc: fix monitor access to CR
Paolo Bonzini [Thu, 28 Aug 2014 17:14:59 +0000 (19:14 +0200)] 
ppc: fix monitor access to CR

This was off-by-one.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
9 years agoMerge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging
Peter Maydell [Tue, 4 Nov 2014 17:33:34 +0000 (17:33 +0000)] 
Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM infrastructure fixes and device conversions

* Fixes for -device foo,help

# gpg: Signature made Tue 04 Nov 2014 17:27:41 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg:                 aka "Andreas Färber <afaerber@suse.com>"

* remotes/afaerber/tags/qom-devices-for-peter:
  qdev: Use qdev_get_device_class() for -device <type>,help
  qdev: Move error printing to the end of qdev_device_help()
  qdev: Create qdev_get_device_class() function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoqdev: Use qdev_get_device_class() for -device <type>,help
Eduardo Habkost [Sat, 1 Nov 2014 15:56:11 +0000 (13:56 -0200)] 
qdev: Use qdev_get_device_class() for -device <type>,help

Make sure we try to list properties from classes that can be safely used
with "-device".

Fixes the following crashes:

  $ qemu-system-x86_64 -device x86_64-cpu,help
  **
  ERROR:qom/object.c:336:object_initialize_with_type: assertion failed: (type->abstract == false)
  Aborted (core dumped)
  $ qemu-system-x86_64 -device host-x86_64-cpu,help
  qemu-system-x86_64: [...]/target-i386/cpu.c:1329: host_x86_cpu_initfn: Assertion `(kvm_allowed)' failed.
  Aborted (core dumped)

After applying this patch:

  $ qemu-system-x86_64 -device x86_64-cpu,help
  Parameter 'driver' expects non-abstract device type
  $ qemu-system-x86_64 -device host-x86_64-cpu,help
  Parameter 'driver' expects pluggable device type

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agoqdev: Move error printing to the end of qdev_device_help()
Eduardo Habkost [Sat, 1 Nov 2014 15:56:10 +0000 (13:56 -0200)] 
qdev: Move error printing to the end of qdev_device_help()

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agoqdev: Create qdev_get_device_class() function
Eduardo Habkost [Sat, 1 Nov 2014 15:56:09 +0000 (13:56 -0200)] 
qdev: Create qdev_get_device_class() function

Extract the DeviceClass lookup from qdev_device_add() to a separate
function.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agoMerge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into staging
Peter Maydell [Tue, 4 Nov 2014 15:54:27 +0000 (15:54 +0000)] 
Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into staging

QOM CPUState and X86CPU

* Cleanups for -cpu ...,enforce

* remotes/afaerber/tags/qom-cpu-for-peter:
  target-i386: Disable SVM by default in KVM mode
  target-i386: Don't enable nested VMX by default
  target-i386: Remove unsupported bits from all CPU models
  target-i386: Disable CPUID_ACPI by default in KVM mode
  target-i386: Rename KVM auto-feature-enable compat function
  pc: Create pc_compat_2_1() functions

Conflicts:
hw/i386/pc_piix.c
hw/i386/pc_q35.c
[PMM: Fixed minor textual conflicts]

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/kraxel/tags/pull-gtk-20141104-2' into staging
Peter Maydell [Tue, 4 Nov 2014 15:00:17 +0000 (15:00 +0000)] 
Merge remote-tracking branch 'remotes/kraxel/tags/pull-gtk-20141104-2' into staging

gtk: fix fullscreen with gtk3, fix build with older gtk2 versions.

# gpg: Signature made Tue 04 Nov 2014 13:42:09 GMT using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"

* remotes/kraxel/tags/pull-gtk-20141104-2:
  gtk: add GDK_KEY_pause #define
  gtk: Hide the menubar when in fullscreen mode (lp 1294898)
  gtk: Install vc accelerators on parent window
  gtk: Install fullscreen accelerator on toplevel window
  gtk: Grab accel_group from GtkDisplayState

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agotarget-i386: Disable SVM by default in KVM mode
Eduardo Habkost [Fri, 3 Oct 2014 19:39:51 +0000 (16:39 -0300)] 
target-i386: Disable SVM by default in KVM mode

Make SVM be disabled by default on all CPU models when in KVM mode.
Nested SVM is enabled by default in the KVM kernel module, but it is
probably less stable than nested VMX (which is already disabled by
default).

Add a new compat function, x86_cpu_compat_kvm_no_autodisable(), to keep
compatibility on previous machine-types.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agotarget-i386: Don't enable nested VMX by default
Eduardo Habkost [Fri, 3 Oct 2014 19:39:50 +0000 (16:39 -0300)] 
target-i386: Don't enable nested VMX by default

TCG doesn't support VMX, and nested VMX is not enabled by default in the
KVM kernel module.

So, there's no reason to have VMX enabled by default on the core2duo and
coreduo CPU models, today. Even the newer Intel CPU model definitions
don't have it enabled.

In this case, we need machine-type compat code, as people may be running
the older machine-types on hosts that had VMX nesting enabled.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agotarget-i386: Remove unsupported bits from all CPU models
Eduardo Habkost [Fri, 3 Oct 2014 19:39:49 +0000 (16:39 -0300)] 
target-i386: Remove unsupported bits from all CPU models

The following CPU features were never supported by neither TCG or KVM,
so they are useless on the CPU model definitions, today:

 * CPUID_DTS (DS)
 * CPUID_HT
 * CPUID_TM
 * CPUID_PBE
 * CPUID_EXT_DTES64
 * CPUID_EXT_DSCPL
 * CPUID_EXT_EST
 * CPUID_EXT_TM2
 * CPUID_EXT_XTPR
 * CPUID_EXT_PDCM
 * CPUID_SVM_LBRV

As using "enforce" mode is the only way to ensure guest ABI doesn't
change when moving to a different host, we should make "enforce" mode
the default or at least encourage management software to always use it.

In turn, to make "enforce" usable, we need CPU models that work without
always requiring some features to be explicitly disabled. This patch
removes the above features from all CPU model definitions.

We won't need any machine-type compat code for those changes, because it
is impossible to have existing VMs with those features enabled.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agotarget-i386: Disable CPUID_ACPI by default in KVM mode
Eduardo Habkost [Fri, 3 Oct 2014 19:39:48 +0000 (16:39 -0300)] 
target-i386: Disable CPUID_ACPI by default in KVM mode

KVM never supported the CPUID_ACPI flag, so it doesn't make sense to
have it enabled by default when KVM is enabled.

The motivation here is exactly the same we had for the MONITOR flag
(disabled by commit 136a7e9a85d7047461f8153f7d12c514a3d68f69).

And like in the MONITOR flag case, we don't need machine-type compat code
because it is currently impossible to run a KVM VM with the ACPI flag set.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agogtk: add GDK_KEY_pause #define
Gerd Hoffmann [Tue, 4 Nov 2014 07:32:26 +0000 (08:32 +0100)] 
gtk: add GDK_KEY_pause #define

Add pause key to the list of compatibility defines.
Fixes the build with older gtk versions.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
9 years agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20141104' into...
Peter Maydell [Tue, 4 Nov 2014 13:35:04 +0000 (13:35 +0000)] 
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20141104' into staging

target-arm queue:
 * avoid passing CPU env pointer around in A32/T32 decoders
 * split M profile exception masking out from A/R profile

# gpg: Signature made Tue 04 Nov 2014 12:28:15 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20141104:
  target-arm: Correct condition for taking VIRQ and VFIQ
  target-arm: Separate out M profile cpu_exec_interrupt handling
  target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn()
  target-arm/translate.c: Don't pass CPUARMState around in the decoder
  target-arm/translate.c: Don't use IS_M()
  target-arm/translate.c: Use arm_dc_feature() rather than arm_feature()
  target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macros

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-signed' into staging
Peter Maydell [Tue, 4 Nov 2014 12:35:07 +0000 (12:35 +0000)] 
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-signed' into staging

Update OpenBIOS images

# gpg: Signature made Tue 04 Nov 2014 00:24:41 GMT using RSA key ID AE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"

* remotes/mcayland/tags/qemu-openbios-signed:
  Update OpenBIOS images

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agotarget-arm: Correct condition for taking VIRQ and VFIQ
Peter Maydell [Thu, 30 Oct 2014 15:48:52 +0000 (15:48 +0000)] 
target-arm: Correct condition for taking VIRQ and VFIQ

The VIRQ and VFIQ exceptions are (as the comments say) only
taken if the CPU is in Non-secure state and the IMO/FMO bits
are set to enable virtualized interrupts. Correct the code
to actually implement this.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1414684132-23971-3-git-send-email-peter.maydell@linaro.org

9 years agotarget-arm: Separate out M profile cpu_exec_interrupt handling
Peter Maydell [Thu, 30 Oct 2014 15:48:51 +0000 (15:48 +0000)] 
target-arm: Separate out M profile cpu_exec_interrupt handling

The M profile cpu_exec_interrupt handling is fairly simple
but does include an M profile specific oddity (disabling
interrupts for certain PC values). A/R profile handling
on the other hand is getting rapidly more complicated
with the support for EL2 and EL3. Split the M profile
code out into its own implementation of cpu_exec_interrupt
to keep these two things out of each others' way.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1414684132-23971-2-git-send-email-peter.maydell@linaro.org

9 years agotarget-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn()
Peter Maydell [Tue, 28 Oct 2014 19:24:04 +0000 (19:24 +0000)] 
target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn()

Refactor to avoid passing a CPUARMState * to disas_arm_insn(). To do this
we move the "read insn from memory" code to the callsite and pass the
insn to the function instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1414524244-20316-6-git-send-email-peter.maydell@linaro.org
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
9 years agotarget-arm/translate.c: Don't pass CPUARMState around in the decoder
Peter Maydell [Tue, 28 Oct 2014 19:24:03 +0000 (19:24 +0000)] 
target-arm/translate.c: Don't pass CPUARMState around in the decoder

Passing the CPUARMState around in the decoder is a recipe for
bugs where we accidentally generate code that depends on CPU
state which isn't reflected in the TB flags. Stop doing this
and instead use DisasContext as a way to pass around those
bits of CPU state which are known to be safe to use.

This commit simply removes initial "CPUARMState *env" parameters
from various function definitions, and removes the initial "env"
argument from the places where those functions are called.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1414524244-20316-5-git-send-email-peter.maydell@linaro.org
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
9 years agotarget-arm/translate.c: Don't use IS_M()
Peter Maydell [Tue, 28 Oct 2014 19:24:02 +0000 (19:24 +0000)] 
target-arm/translate.c: Don't use IS_M()

Instead of using IS_M(), use arm_dc_feature(s, ARM_FEATURE_M), so we
don't need to pass CPUARMState pointers around the decoder.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1414524244-20316-4-git-send-email-peter.maydell@linaro.org
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
9 years agotarget-arm/translate.c: Use arm_dc_feature() rather than arm_feature()
Peter Maydell [Tue, 28 Oct 2014 19:24:01 +0000 (19:24 +0000)] 
target-arm/translate.c: Use arm_dc_feature() rather than arm_feature()

Use arm_dc_feature() rather than arm_feature() to avoid using
CPUARMState unnecessarily.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1414524244-20316-3-git-send-email-peter.maydell@linaro.org
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
9 years agogtk: Hide the menubar when in fullscreen mode (lp 1294898)
Cole Robinson [Thu, 30 Oct 2014 19:34:35 +0000 (15:34 -0400)] 
gtk: Hide the menubar when in fullscreen mode (lp 1294898)

In fullscreen mode, we attempt to shrink the menubar to 1 pixel in height,
so it takes up as little room as possible while still allowing us to use
the keyboard shortcuts for its various operations.

However this shrinking is disregarded on gtk3, so the entire menu bar is
visible, which isn't very pleasant. This patch hides the menu bar instead.

The side effect is that the only keyboard shortcuts that will work in this
mode are the ones that we explicitly register on the top level window and
not the menu bar. The previous patches changed the fullscreen and vc
shortcuts to work like that, which I think are the only ones that really
matter in for the fullscreen case.

https://bugs.launchpad.net/qemu/+bug/1294898
Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
9 years agogtk: Install vc accelerators on parent window
Cole Robinson [Thu, 30 Oct 2014 19:34:34 +0000 (15:34 -0400)] 
gtk: Install vc accelerators on parent window

So they are usable when we hide the menubar in upcoming patches. This
has the accelerator text caveat as the fullscreen bit in the previous
patch.

Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
9 years agogtk: Install fullscreen accelerator on toplevel window
Cole Robinson [Thu, 30 Oct 2014 19:34:33 +0000 (15:34 -0400)] 
gtk: Install fullscreen accelerator on toplevel window

Instead of installing it on the menu. This will be needed to keep the
fullscreen keyboard shortcut working when we hide the menu (in future
patches).

On gtk < 3.8, this has the unfortunate side effect of no longer listing
the key combo in the UI. We could manually change the label in that case,
but it will look visually out of place, and I'm not sure if anyone really
cares.

Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
9 years agogtk: Grab accel_group from GtkDisplayState
Cole Robinson [Thu, 30 Oct 2014 19:34:32 +0000 (15:34 -0400)] 
gtk: Grab accel_group from GtkDisplayState

Rather than needlessly pass it around

Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
9 years agotarget-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macros
Peter Maydell [Tue, 28 Oct 2014 19:24:00 +0000 (19:24 +0000)] 
target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macros

All the places where we use the ENABLE_ARCH_* and ARCH() macros have a
DisasContext* s, so switch them over to use arm_dc_feature() rather than
arm_feature() so we don't need to pass the CPUARMState* env around too.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1414524244-20316-2-git-send-email-peter.maydell@linaro.org
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
9 years agoMerge remote-tracking branch 'remotes/lalrae/tags/mips-20141103' into staging
Peter Maydell [Tue, 4 Nov 2014 00:17:45 +0000 (00:17 +0000)] 
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141103' into staging

* remotes/lalrae/tags/mips-20141103: (34 commits)
  target-mips: add MSA support to mips32r5-generic
  disas/mips.c: disassemble MSA instructions
  target-mips: add MSA MI10 format instructions
  target-mips: add MSA 2RF format instructions
  target-mips: add MSA VEC/2R format instructions
  target-mips: add MSA 3RF format instructions
  target-mips: add MSA ELM format instructions
  target-mips: add MSA 3R format instructions
  target-mips: add MSA BIT format instructions
  target-mips: add MSA I5 format instruction
  target-mips: add MSA I8 format instructions
  target-mips: add MSA branch instructions
  target-mips: add msa_helper.c
  target-mips: add msa_reset(), global msa register
  target-mips: add MSA opcode enum
  target-mips: stop translation after ctc1
  target-mips: remove duplicated mips/ieee mapping function
  target-mips: add MSA exceptions
  target-mips: add MSA defines and data structure
  target-mips: enable features in MIPS64R6-generic CPU
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoUpdate OpenBIOS images
Mark Cave-Ayland [Mon, 3 Nov 2014 20:20:19 +0000 (20:20 +0000)] 
Update OpenBIOS images

Update OpenBIOS images to SVN r1321 built from submodule.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
9 years agoMerge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell [Mon, 3 Nov 2014 22:51:07 +0000 (22:51 +0000)] 
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pc, virtio, misc bugfixes

A bunch of minor bugfixes all over the place.

changes from v2:
    added cpu hotplug rework
    added default vga type switch
    more fixes
changes from v1:
    fix for test re-generation script
    add missing acks to two patches

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Mon 03 Nov 2014 16:33:13 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"

* remotes/mst/tags/for_upstream: (28 commits)
  vga: flip qemu 2.2 pc machine types from cirrus to stdvga
  vga: add default display to machine class
  vhost-user: fix mmap offset calculation
  hw/i386/acpi-build.c: Fix memory leak in acpi_build_tables_cleanup()
  smbios: Encode UUID according to SMBIOS specification
  pc: Add pc_compat_2_1() function
  hw/virtio/vring/event_idx: fix the vring_avail_event error
  hw/pci: fixed hotplug crash when using rombar=0 with devices having romfile
  hw/pci: fixed error flow in pci_qdev_init
  -machine vmport=off: Allow disabling of VMWare ioport emulation
  acpi/cpu-hotplug: introduce helper function to keep bit setting in one place
  cpu-hotplug: rename function for better readability
  qom/cpu: remove the unused CPU hot-plug notifier
  pc: Update rtc_cmos in pc_cpu_plug
  pc: add cpu hotplug handler to PC_MACHINE
  acpi:piix4: convert cpu hotplug to hotplug_handler API
  acpi:ich9: convert cpu hotplug to hotplug_handler API
  acpi/cpu: add cpu hotplug callback function to match hotplug_handler API
  acpi: create separate file for TCPA log
  tests: fix rebuild-expected-aml.sh for acpi-test rename
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20141101' into staging
Peter Maydell [Mon, 3 Nov 2014 20:23:15 +0000 (20:23 +0000)] 
Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20141101' into staging

linux-user pull for 2.2

Two minor fixes and new a feature, addition of QEMU_RAND_SEED for
testing needs.

# gpg: Signature made Mon 03 Nov 2014 11:49:39 GMT using RSA key ID DE3C9BC0
# gpg: Good signature from "Riku Voipio <riku.voipio@iki.fi>"
# gpg:                 aka "Riku Voipio <riku.voipio@linaro.org>"

* remotes/riku/tags/pull-linux-user-20141101:
  elf: take phdr offset into account when calculating the program load address
  linux-user: Fix fault address truncation AArch64
  linux-user: Let user specify random seed

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agotarget-i386: Rename KVM auto-feature-enable compat function
Eduardo Habkost [Fri, 3 Oct 2014 19:39:47 +0000 (16:39 -0300)] 
target-i386: Rename KVM auto-feature-enable compat function

The x86_cpu_compat_disable_kvm_features() name was a bit confusing, as
it won't forcibly disable the feature for all CPU models (i.e. add it to
kvm_default_unset_features), but it will instead turn off the KVM
auto-enabling of the feature (i.e. remove it from kvm_default_features),
meaning the feature may still be enabled by default in some CPU models).

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agopc: Create pc_compat_2_1() functions
Eduardo Habkost [Fri, 3 Oct 2014 19:39:46 +0000 (16:39 -0300)] 
pc: Create pc_compat_2_1() functions

We will need new compat code for the 2.1 machine-types.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
9 years agoMerge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Peter Maydell [Mon, 3 Nov 2014 18:34:08 +0000 (18:34 +0000)] 
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging

# gpg: Signature made Mon 03 Nov 2014 11:50:53 GMT using RSA key ID 81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>"

* remotes/stefanha/tags/block-pull-request: (53 commits)
  block: declare blockjobs and dataplane friends!
  block: let commit blockjob run in BDS AioContext
  block: let mirror blockjob run in BDS AioContext
  block: let stream blockjob run in BDS AioContext
  block: let backup blockjob run in BDS AioContext
  block: add bdrv_drain()
  blockjob: add block_job_defer_to_main_loop()
  blockdev: add note that block_job_cb() must be thread-safe
  blockdev: acquire AioContext in blockdev_mark_auto_del()
  blockdev: acquire AioContext in do_qmp_query_block_jobs_one()
  block: acquire AioContext in generic blockjob QMP commands
  iotests: Expand test 061
  block/qcow2: Simplify shared L2 handling in amend
  block/qcow2: Make get_refcount() global
  block/qcow2: Implement status CB for amend
  qemu-img: Fix insignificant memleak
  qemu-img: Add progress output for amend
  block: Add status callback to bdrv_amend_options()
  block: qemu-iotest 107 supports NFS
  iotests: Add test for qcow2's bdrv_make_empty
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/xtensa/tags/20141103-xtensa' into staging
Peter Maydell [Mon, 3 Nov 2014 16:43:32 +0000 (16:43 +0000)] 
Merge remote-tracking branch 'remotes/xtensa/tags/20141103-xtensa' into staging

Xtensa fixes and improvements 2014-11-03:
- build fixes for cores w/o windowed registers and with profiling
  interrupts;
- fix uImage load address for MMUv2 cores;
- add script for automatic core import from xtensa configuration overlay.

# gpg: Signature made Sun 02 Nov 2014 22:04:44 GMT using RSA key ID F83FA044
# gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"

* remotes/xtensa/tags/20141103-xtensa:
  MAINTAINERS: update xtensa boards
  target-xtensa: fix build for cores w/o windowed registers
  target-xtensa: add core importing script
  hw/xtensa/xtfpga: treat uImage load address as virtual
  hw/core/loader: implement address translation in uimage loader
  target-xtensa: avoid duplicate timer interrupt delivery
  target-xtensa: tests: pre-process tests linker script
  target-xtensa: add definition for XTHAL_INTTYPE_PROFILING

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agovga: flip qemu 2.2 pc machine types from cirrus to stdvga
Gerd Hoffmann [Tue, 28 Oct 2014 09:09:12 +0000 (10:09 +0100)] 
vga: flip qemu 2.2 pc machine types from cirrus to stdvga

This patch switches the default display from cirrus to vga
for the new (qemu 2.2+) machine types.  Old machines types
stay as-is for compatibility reasons.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
9 years agovga: add default display to machine class
Gerd Hoffmann [Tue, 28 Oct 2014 09:09:11 +0000 (10:09 +0100)] 
vga: add default display to machine class

This allows machine classes to specify which display device they want
as default.  If unspecified the current behavior (try cirrus, failing
that try stdvga, failing that use no display) will be used.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
9 years agovhost-user: fix mmap offset calculation
Michael S. Tsirkin [Sun, 2 Nov 2014 18:00:28 +0000 (20:00 +0200)] 
vhost-user: fix mmap offset calculation

qemu_get_ram_block_host_ptr should get ram_addr_t,
vhost-user passes in GPA.
That's very wrong.

Reported-by: Linhaifeng <haifeng.lin@huawei.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
9 years agoMerge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2014-11-02' into...
Peter Maydell [Mon, 3 Nov 2014 14:55:17 +0000 (14:55 +0000)] 
Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2014-11-02' into staging

trivial patches for 2014-11-02

# gpg: Signature made Sun 02 Nov 2014 11:54:43 GMT using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"

* remotes/mjt/tags/pull-trivial-patches-2014-11-02: (23 commits)
  vdi: wrapped uuid_unparse() in #ifdef
  tap: fix possible fd leak in net_init_tap
  tap: do not close(fd) in net_init_tap_one
  target-i386: Remove unused model_features_t struct
  tap_int.h: remove repeating NETWORK_SCRIPT defines
  os-posix: reorder parent notification for -daemonize
  pidfile: stop making pidfile error a special case
  os-posix: replace goto again with a proper loop
  os-posix: use global daemon_pipe instead of cryptic fds[1]
  dump: Fix dump-guest-memory termination and use-after-close
  virtio-9p-proxy: improve error messages in connect_namedsocket()
  virtio-9p-proxy: fix error return in proxy_init()
  virtio-9p-proxy: Fix sockfd leak
  target-tricore: check return value before using it
  net/slirp: specify logbase for smbd
  Revert "os-posix: report error message when lock file failed"
  util: Improve os_mem_prealloc error message
  sparse: fix build
  target-arm: A64: remove redundant store
  target-xtensa: mark XtensaConfig structs as unused
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agoMerge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell [Mon, 3 Nov 2014 12:31:07 +0000 (12:31 +0000)] 
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

The last round of patches for soft freeze.  Includes ivshmem bugfixes,
megasas 2108 emulation, and other small patches here and there.

# gpg: Signature made Fri 31 Oct 2014 17:17:54 GMT using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (35 commits)
  virtio-scsi: fix dataplane
  ivshmem: use error_report
  ivshmem: Fix fd leak on error
  ivshmem: Fix potential OOB r/w access
  ivshmem: validate incoming_posn value from server
  ivshmem: Check ivshmem_read() size argument
  i386: fix breakpoints handling in icount mode
  kvm_stat: Add powerpc support
  kvm_stat: Abstract ioctl numbers
  kvm_stat: Rework platform detection
  kvm_stat: Fix the non-x86 exit reasons
  kvm_stat: Only consider online cpus
  virtio-scsi: Fix num_queue input validation
  scsi: devirtualize unrealize of SCSI devices
  virtio-scsi: Fix memory leak when realize failed
  iscsi: Refuse to open as writable if the LUN is write protected
  kvmvapic: patch_instruction fix
  vl.c: Fix Coverity complaining for vmstate_dump_file
  Add skip_dump flag to ignore memory region during dump
  -machine vmport=off: Allow disabling of VMWare ioport emulation
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 years agotarget-mips: add MSA support to mips32r5-generic
Yongbok Kim [Sat, 1 Nov 2014 05:28:53 +0000 (05:28 +0000)] 
target-mips: add MSA support to mips32r5-generic

add MSA support to mips32r5-generic core definition

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agodisas/mips.c: disassemble MSA instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:52 +0000 (05:28 +0000)] 
disas/mips.c: disassemble MSA instructions

disassemble MIPS SIMD Architecture instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA MI10 format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:51 +0000 (05:28 +0000)] 
target-mips: add MSA MI10 format instructions

add MSA MI10 format instructions
update LSA and DLSA for MSA

add 16, 64 bit load and store

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA 2RF format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:50 +0000 (05:28 +0000)] 
target-mips: add MSA 2RF format instructions

add MSA 2RF format instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA VEC/2R format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:49 +0000 (05:28 +0000)] 
target-mips: add MSA VEC/2R format instructions

add MSA VEC/2R format instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA 3RF format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:48 +0000 (05:28 +0000)] 
target-mips: add MSA 3RF format instructions

add MSA 3RF format instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA ELM format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:47 +0000 (05:28 +0000)] 
target-mips: add MSA ELM format instructions

add MSA ELM format instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA 3R format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:46 +0000 (05:28 +0000)] 
target-mips: add MSA 3R format instructions

add MSA 3R format instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA BIT format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:45 +0000 (05:28 +0000)] 
target-mips: add MSA BIT format instructions

add MSA BIT format instructions

Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA I5 format instruction
Yongbok Kim [Sat, 1 Nov 2014 05:28:44 +0000 (05:28 +0000)] 
target-mips: add MSA I5 format instruction

add MSA I5 format instructions

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA I8 format instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:43 +0000 (05:28 +0000)] 
target-mips: add MSA I8 format instructions

add MSA I8 format instructions

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
9 years agotarget-mips: add MSA branch instructions
Yongbok Kim [Sat, 1 Nov 2014 05:28:42 +0000 (05:28 +0000)] 
target-mips: add MSA branch instructions

add MSA branch instructions

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>