Julian Brown [Wed, 26 Apr 2006 15:42:54 +0000 (15:42 +0000)]
* config/tc-arm.c (limits.h): Include.
(fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
(fpu_vfp_v3_or_neon_ext): Declare constants.
(neon_el_type): New enumeration of types for Neon vector elements.
(neon_type_el): New struct. Define type and size of a vector element.
(NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
instruction.
(neon_type): Define struct. The type of an instruction.
(arm_it): Add 'vectype' for the current instruction.
(isscalar, immisalign, regisimm, isquad): New predicates for operands.
(vfp_sp_reg_pos): Rename to...
(vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
tags.
(arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
(Neon D or Q register).
(reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
register.
(GE_OPT_PREFIX_BIG): Define constant, for use in...
(my_get_expression): Allow above constant as argument to accept
64-bit constants with optional prefix.
(arm_reg_parse): Add extra argument to return the specific type of
register in when either a D or Q register (REG_TYPE_NDQ) is
requested. Can be NULL.
(parse_scalar): New function. Parse Neon scalar (vector reg and index).
(parse_reg_list): Update for new arm_reg_parse args.
(parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
(parse_neon_el_struct_list): New function. Parse element/structure
register lists for VLD<n>/VST<n> instructions.
(s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
(s_arm_unwind_save_mmxwr): Likewise.
(s_arm_unwind_save_mmxwcg): Likewise.
(s_arm_unwind_movsp): Likewise.
(s_arm_unwind_setfp): Likewise.
(parse_big_immediate): New function. Parse an immediate, which may be
64 bits wide. Put results in inst.operands[i].
(parse_shift): Update for new arm_reg_parse args.
(parse_address): Likewise. Add parsing of alignment specifiers.
(parse_neon_mov): Parse the operands of a VMOV instruction.
(operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
(parse_operands): Handle new codes above.
(encode_arm_vfp_sp_reg): Rename to...
(encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
selected VFP version only supports D0-D15.
(do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
(do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
(do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
(do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
encode_arm_vfp_reg name, and allow 32 D regs.
(do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
(do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
regs.
(do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
(do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
constant-load and conversion insns introduced with VFPv3.
(neon_tab_entry): New struct.
(NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
those which are the targets of pseudo-instructions.
(neon_opc): Enumerate opcodes, use as indices into...
(neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
(NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
(NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
(NEON_ENC_DUP): Define meaningful helper macros to look up values in
neon_enc_tab.
(neon_shape): Enumerate shapes (permitted register widths, etc.) for
Neon instructions.
(neon_type_mask): New. Compact type representation for type checking.
(N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
permitted type combinations.
(N_IGNORE_TYPE): New macro.
(neon_check_shape): New function. Check an instruction shape for
multiple alternatives. Return the specific shape for the current
instruction.
(neon_modify_type_size): New function. Modify a vector type and size,
depending on the bit mask in argument 1.
(neon_type_promote): New function. Convert a given "key" type (of an
operand) into the correct type for a different operand, based on a bit
mask.
(type_chk_of_el_type): New function. Convert a type and size into the
compact representation used for type checking.
(el_type_of_type_ckh): New function. Reverse of above (only when a
single bit is set in the bit mask).
(modify_types_allowed): New function. Alter a mask of allowed types
based on a bit mask of modifications.
(neon_check_type): New function. Check the type of the current
instruction against the variable argument list. The "key" type of the
instruction is returned.
(neon_dp_fixup): New function. Fill in and modify instruction bits for
a Neon data-processing instruction depending on whether we're in ARM
mode or Thumb-2 mode.
(neon_logbits): New function.
(neon_three_same, neon_two_same, do_neon_dyadic_i_su)
(do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
(do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
(neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
(neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
(do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
(do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
(do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
(do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
(neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
(do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
(do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
(do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
(do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
(do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
(neon_move_immediate, do_neon_mvn, neon_mixed_length)
(do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
(do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
(do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
(do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
(do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
(do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
(do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
(neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
(do_neon_ldx_stx): New functions. Neon bit encoding and encoding
helpers.
(parse_neon_type): New function. Parse Neon type specifier.
(opcode_lookup): Allow parsing of Neon type specifiers.
(REGNUM2, REGSETH, REGSET2): New macros.
(reg_names): Add new VFPv3 and Neon registers.
(NUF, nUF, NCE, nCE): New macros for opcode table.
(insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
fto[us][lh][sd].
(tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
(arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
(arm_option_cpu_value): Add vfp3 and neon.
(aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
VFPv1 attribute.
Julian Brown [Wed, 26 Apr 2006 15:42:17 +0000 (15:42 +0000)]
* gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon instruction.
* gas/arm/copro.d: Update accordingly.
* gas/arm/neon-cond.s: New test. Conditional Neon opcodes in ARM mode.
* gas/arm/neon-cond.d: Expected results of above.
* gas/arm/neon-cov.s: New test. Coverage of Neon instructions.
* gas/arm/neon-cov.d: Expected results of above.
* gas/arm/neon-ldst-es.s: New test. Element and structure loads and
stores.
* gas/arm/neon-ldst-es.d: Expected results of above.
* gas/arm/neon-ldst-rm.s: New test. Single and multiple register loads
and stores.
* gas/arm/neon-ldst-rm.d: Expected results of above.
* gas/arm/neon-omit.s: New test. Omission of optional operands.
* gas/arm/neon-omit.d: Expected results of above.
* gas/arm/vfp1.d: Expect Neon syntax for some VFP instructions.
* gas/arm/vfp1_t2.d: Likewise.
* gas/arm/vfp1xD.d: Likewise.
* gas/arm/vfp1xD_t2.d: Likewise.
* gas/arm/vfp2.d: Likewise.
* gas/arm/vfp2_t2.d: Likewise.
* gas/arm/vfp3-32drs.s: New test. Extended D register range for VFP
instructions.
* gas/arm/vfp3-32drs.d: Expected results of above.
* gas/arm/vfp3-const-conv.s: New test. VFPv3 constant-load and
conversion instructions.
* gas/arm/vfp3-const-conv.d: Expected results of above.
H.J. Lu [Wed, 26 Apr 2006 13:32:26 +0000 (13:32 +0000)]
2006-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2593
* elf.c (_bfd_elf_new_section_hook): Don't set section ELF type
and flags if its BFD flags have been set.
(_bfd_elf_init_private_section_data): Don't copy the output ELF
section type from input if it has been set to something
different.
Mark Kettenis [Tue, 25 Apr 2006 18:58:09 +0000 (18:58 +0000)]
From Masaki MURANAKA <monaka@monami-software.com>:
* mips-mdebug-tdep.c (mips_mdebug_frame_prev_register): Change
type of last argument to `gdb_byte *'
Jim Blandy [Tue, 25 Apr 2006 18:02:13 +0000 (18:02 +0000)]
2006-04-11 Jim Blandy <jimb@codesourcery.com>
Add support for 'target remote |' on MinGW.
* ser-mingw.c (struct pipe_state): New structure.
(make_pipe_state, free_pipe_state, cleanup_pipe_state)
(pipe_windows_open, pipe_windows_close, pipe_windows_read)
(pipe_windows_write, pipe_wait_handle): New functions.
(_initialize_ser_windows): Register a "pipe" interface based on
them.
Bob Wilson [Tue, 25 Apr 2006 17:11:10 +0000 (17:11 +0000)]
* config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
syntax instead of hardcoded opcodes with ".w18" suffixes.
(wide_branch_opcode): New.
(build_transition): Use it to check for wide branch opcodes with
either ".w18" or ".w15" suffixes.
* ser-mingw.c: Include <conio.h>.
(struct ser_console_state, struct net_windows_state): Add exit_select,
have_stopped, thread.
(pipe_select_thread, console_select_thread)
(net_windows_select_thread): Don't create a local state copy or
close stop_select. Exit on exit_select instead of stop_select. Set
have_stopped.
(console_select_thread): Don't report control keypresses as pending
input.
(pipe_select_thread): Allow stop_select to interrupt sleeping.
(set_console_wait_handle): Create exit_select and have_stopped.
Save the thread handle. Check _kbhit before starting a thread.
(ser_console_done_wait_handle): New.
(ser_console_close): Close new handles. Wait for the thread to
exit.
(new_windows_select_thread): Assert that an event occurred.
(net_windows_wait_handle): Check for pending input before starting
a thread.
(net_windows_done_wait_handle): New.
(net_windows_open): Create exit_select and have_stopped.
Save the thread handle.
(net_windows_close): Close new handles. Wait for the thread to
exit.
(_intiialize_ser_windows): Register done_wait_handle methods.
* dwarf2read.c (dwarf2_start_subfile): Change prototype to accept
compilation directory as last argument.
Always pass comp_dir as second argument to start_subfile and prepend
dirname to the filename when necessary.
Remove now superfluous search for pre-existing subfile.
(dwarf_decode_lines): Pass the compilation directory to
dwarf2_start_subfile.
Michael Snyder [Thu, 20 Apr 2006 23:18:48 +0000 (23:18 +0000)]
2006-04-20 Michael Snyder <msnyder@redhat.com>
* 2006-03-22 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* configure.tgt (m32c-*-*): New entry.
* config/m32c/m32c.mt: New file.
* m32c-tdep.c: New file.
* Makefile.in (elf_m32c_h): New variable.
(m32c-tdep.o): New rule.
* NEWS: Mention new target.
* MAINTAINERS: Designate Jim Blandy as responsible maintainer.
Alan Modra [Wed, 19 Apr 2006 12:10:46 +0000 (12:10 +0000)]
* Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
(CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
Make some cpus unsupported on ELF. Run "make dep-am".
* Makefile.in: Regenerate.
* m32r-rom.c: On MinGW, include winsock.h instead of sys/types.h,
netdb.h, netinet/in.h.
(m32r_upload_command); Add calls WSAStartup().
* remote-m32r-sdi.c: On MinGW, include winsock.h instead of
netinet/in.h.
* procfs.c (dbx_link_shadow_contents): Delete.
(dbx_link_bpt): New.
(procfs_mourn_inferior): Remove it if necessary.
(remove_dbx_link_breakpoint): Use it.
(insert_dbx_link_bpt_in_file): Set it.
(procfs_init_inferior): Don't update dbx_link_bpt_addr.
* rs6000-nat.c (exec_one_dummy_insn): Use
deprecated_insert_raw_breakpoint and
deprecated_remove_raw_breakpoint.
* solib-irix.c (shadow_contents, breakpoint_addr): Delete.
(base_breakpoint): New.
(disable_break): Use it.
(enable_break): Set it.
Nick Clifton [Tue, 18 Apr 2006 09:41:36 +0000 (09:41 +0000)]
PR 2257
* elfcode.h (elf_object_p): Allow files with corrupt e_shstrndx fields to
still be handled as ELF files.
* readelf.c (SECTION_NAME): Cope with a missing string table.
(process_file_header): Cope with a corrupt e_shstrndx field.
(process_section_headers): Correctly handle an e_shstrndx value of SHF_UNDEF.
Bob Wilson [Fri, 14 Apr 2006 23:01:19 +0000 (23:01 +0000)]
* elf32-xtensa.c (build_reloc_opcodes): New.
(compute_text_actions): Use it to decode opcodes outside inner loop.
(check_section_ebb_pcrels_fit): Add "reloc_opcodes" argument, and if
it is set, use it to get the opcodes for relocations.
(move_shared_literal): Adjust call to check_section_ebb_pcrels_fit.
* gdb.texinfo (Specifying source directories): Update the description
of the source file search to reflect the fact that the source path
always contains at least $cdir and $cwd.
Nick Clifton [Wed, 12 Apr 2006 13:09:10 +0000 (13:09 +0000)]
PR binutils/2454
* avr-dis.c (avr_operand): Arrange for a comment to appear before the symolic
form of an address, so that the output of objdump -d can be reassembled.
Jim Blandy [Tue, 11 Apr 2006 20:33:12 +0000 (20:33 +0000)]
src/gdb/ChangeLog:
2006-04-11 Jim Blandy <jimb@codesourcery.com>
* serial.c (serial_open): Check for special cases at the front of
the "device" name before scanning for the ':' that would indicate
an IP-based connection.
projects / thirdparty / binutils-gdb.git / log
