Andreas Krebbel [Fri, 28 Mar 2014 13:44:58 +0000 (13:44 +0000)]
ssa-dom-thread-4.c: Remove s390 special option.
2014-03-28 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Remove s390 special
option.
* lib/target-supports.exp: Return true for s390
in check_effective_logical_op_short_circuit.
This affects only arm-none-eabi targets and those using t-aprofile in
their multilib lists. The problem here is that when the A12 support
was added, we mistakenly added this to the MULTILIB_MATCHES rule for
the A15 rather than putting out a separate line for this.
Fixed thusly and verified that the correct multilibs are now chosen.
Michael Meissner [Thu, 27 Mar 2014 20:07:16 +0000 (20:07 +0000)]
re PR testsuite/60672 (FAIL: g++.dg/cpp1y/auto-fn25.C -std=gnu++1y (test for errors, line 7))
[gcc]
2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/constraints.md (wD constraint): New constraint to
match the constant integer to get the top DImode/DFmode out of a
vector in a VSX register.
* config/rs6000/predicates.md (vsx_scalar_64bit): New predicate to
match the constant integer to get the top DImode/DFmode out of a
vector in a VSX register.
* config/rs6000/rs6000-builtins.def (VBPERMQ): Add vbpermq builtin
for ISA 2.07.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): If
-mdebug=reg, print value of VECTOR_ELEMENT_SCALAR_64BIT.
* config/rs6000/vsx.md (vsx_extract_<mode>, V2DI/V2DF modes):
Optimize vec_extract of 64-bit values, where the value being
extracted is in the top word, where we can use scalar
instructions. Add direct move and store support. Combine the big
endian/little endian vector select load support into a single
insn.
(vsx_extract_<mode>_internal1): Likewise.
(vsx_extract_<mode>_internal2): Likewise.
(vsx_extract_<mode>_load): Likewise.
(vsx_extract_<mode>_store): Likewise.
(vsx_extract_<mode>_zero): Delete, big and little endian insns are
combined into vsx_extract_<mode>_load.
(vsx_extract_<mode>_one_le): Likewise.
* config/rs6000/rs6000.h (VECTOR_ELEMENT_SCALAR_64BIT): Macro to
define the top 64-bit vector element.
* doc/md.texi (PowerPC and IBM RS6000 constraints): Document wD
constraint.
PR target/60672
* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
enable use of xxsldwi and xxpermdi builtin functions.
(vec_xxpermdi): Likewise.
* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
Document use of vec_xxsldwi and vec_xxpermdi builtins.
[gcc/testsuite]
2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-vbpermq.c: New test to test the
vbpermq builtin.
* gcc.target/powerpc/vsx-extract-1.c: New test to test VSX
vec_select optimizations.
* gcc.target/powerpc/vsx-extract-2.c: Likewise.
* gcc.target/powerpc/vsx-extract-3.c: Likewise.
PR target/60672
* gcc.target/powerpc/pr60676.c: New file, make sure xxsldwi and
xxpermdi builtins are supported.
Vladimir Makarov [Thu, 27 Mar 2014 18:49:44 +0000 (18:49 +0000)]
re PR rtl-optimization/60650 ([ARM] LRA ICE in assign_by_spills)
2014-03-27 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/60650
* lra-asign.c (find_hard_regno_for, spill_for): Add parameter
first_p. Use it.
(find_spills_for): New.
(assign_by_spills): Pass the new parameter to find_hard_regno_for.
Spill all pseudos on the second iteration.
Jakub Jelinek [Thu, 27 Mar 2014 13:18:52 +0000 (14:18 +0100)]
re PR middle-end/60682 ([OpenMP] ICE on an assignment of local variable inside SIMD loop)
PR middle-end/60682
* omp-low.c (lower_omp_1): For gimple_clobber_p stmts,
if they need regimplification, just drop them instead of
calling gimple_regimplify_operands on them.
The implementation of -m[no-]omit-leaf-frame-pointer and
-f[no-]omit-frame-pointer in the AArch64 target does not behave
correctly in the presence of __attribute__ optimize.
This patch adjusts the implementation to work in a similar fashion to
the same functionality in the i386 target.
The problem occurs because the current implementation uses a global
'faked_omit_frame_pointer' to retain the original value of
flag_omit_frame_pointer. The global does not form part of the
optimization save state.
This solution removes the global and instead tracks required behaviour
using only flag_omit_frame_pointer and flag_omit_leaf_frame_pointer.
These two form part of the optimziation save state and target save
state respectively.
The additional complication for AArch64 is that the PCS requires that
given -fno-omit-frame-pointer -momit-leave-frame-pointer, a leaf
function that kills LR must create a frame record. This is readily
handled in aarch64_frame_pointer_required(). I've dropped logic in
aarch64_can_eliminate() that attempts to detect this scenario since it
Dehao Chen [Thu, 27 Mar 2014 00:41:10 +0000 (00:41 +0000)]
dojump.c (do_compare_rtx_and_jump): Sets correct probability for compiler inserted conditional jumps for NAN float...
* dojump.c (do_compare_rtx_and_jump): Sets correct probability for
compiler inserted conditional jumps for NAN float check.
* gcc.dg/predict-8.c: New test.
Fabien Chêne [Wed, 26 Mar 2014 21:33:28 +0000 (22:33 +0100)]
re PR c++/52369 (Const-qualified non-class base member and defaulted default constructor)
2014-03-26 Fabien Chene <fabien@gcc.gnu.org>
PR c++/52369
* cp/method.c (walk_field_subobs): improve the diagnostic
locations for both REFERENCE_TYPEs and non-static const members.
* cp/init.c (diagnose_uninitialized_cst_or_ref_member): use %q#D
instead of %qD to be consistent with the c++11 diagnostic.
Jakub Jelinek [Wed, 26 Mar 2014 19:33:40 +0000 (20:33 +0100)]
ubsan.h (ubsan_create_data): Change second argument's type to const location_t *.
* ubsan.h (ubsan_create_data): Change second argument's type
to const location_t *.
* ubsan.c (ubsan_source_location): If xloc.file is NULL, set it to
_("<unknown>").
(ubsan_create_data): Change second argument to const location_t *PLOC.
Create Loc field whenever PLOC is non-NULL.
(ubsan_instrument_unreachable, ubsan_expand_null_ifn,
ubsan_build_overflow_builtin, instrument_bool_enum_load): Adjust
callers.
c-family/
* c-ubsan.c (ubsan_instrument_division, ubsan_instrument_shift,
ubsan_instrument_vla, ubsan_instrument_return): Adjust
ubsan_create_data callers.
Jakub Jelinek [Wed, 26 Mar 2014 09:17:10 +0000 (10:17 +0100)]
tree-vrp.c (simplify_internal_call_using_ranges): If only one range is range_int_cst_p...
* tree-vrp.c (simplify_internal_call_using_ranges): If only
one range is range_int_cst_p, but not both, at least optimize
addition/subtraction of 0 and multiplication by 0 or 1.
* gimple-fold.c (gimple_fold_call): Fold
IFN_UBSAN_CHECK_{ADD,SUB,MUL}.
(gimple_fold_stmt_to_constant_1): If both op0 and op1 aren't
INTEGER_CSTs, try to fold at least x * 0 and y - y.
Jan Hubicka [Wed, 26 Mar 2014 02:11:57 +0000 (03:11 +0100)]
re PR ipa/60315 (template constructor switch optimization)
PR ipa/60315
* cif-code.def (UNREACHABLE) New code.
* ipa-inline.c (inline_small_functions): Skip edges to __builtlin_unreachable.
(estimate_edge_growth): Allow edges to __builtlin_unreachable.
* ipa-inline-analysis.c (edge_set_predicate): Redirect edges with false
predicate to __bulitin_unreachable.
(set_cond_stmt_execution_predicate): Fix issue when invert_tree_comparison
returns ERROR_MARK.
* ipa-pure-const.c (propagate_pure_const, propagate_nothrow): Do not
propagate to inline clones.
* cgraph.c (verify_edge_corresponds_to_fndecl): Allow redirection
to unreachable.
* ipa-cp.c (create_specialized_node): Be ready for new node to appear.
* cgraphclones.c (cgraph_clone_node): If call destination is already
ureachable, do not redirect it back.
* tree-inline.c (fold_marked_statements): Hanlde calls becoming
unreachable.
Jakub Jelinek [Tue, 25 Mar 2014 21:47:41 +0000 (22:47 +0100)]
i386.md (general_sext_operand): New mode attr.
* config/i386/i386.md (general_sext_operand): New mode attr.
(addv<mode>4, subv<mode>4, mulv<mode>4): If operands[2] is CONST_INT,
don't generate (sign_extend (const_int)).
(*addv<mode>4, *subv<mode>4, *mulv<mode>4): Disallow CONST_INT_P
operands[2]. Use We constraint instead of <i> and <general_sext_operand>
predicate instead of <general_operand>.
(*addv<mode>4_1, *subv<mode>4_1, *mulv<mode>4_1): New insns.
* config/i386/constraints.md (We): New constraint.
* config/i386/predicates.md (x86_64_sext_operand,
sext_operand): New predicates.
Jonathan Wakely [Tue, 25 Mar 2014 19:39:52 +0000 (19:39 +0000)]
re PR libstdc++/60658 (std::atomic<T*> is unexpectedly not lock-free)
PR libstdc++/60658
* include/bits/atomic_base.h (__atomic_base<_PTp*>::is_lock_free()):
Use sizeof pointer type not the element type.
* testsuite/29_atomics/atomic/60658.cc: New.
* testsuite/libgomp.c++/udr-11.C: New test.
* testsuite/libgomp.c++/udr-12.C: New test.
* testsuite/libgomp.c++/udr-13.C: New test.
* testsuite/libgomp.c++/udr-14.C: New test.
* testsuite/libgomp.c++/udr-15.C: New test.
* testsuite/libgomp.c++/udr-16.C: New test.
* testsuite/libgomp.c++/udr-17.C: New test.
* testsuite/libgomp.c++/udr-18.C: New test.
* testsuite/libgomp.c++/udr-19.C: New test.
Adam Butcher [Mon, 24 Mar 2014 20:40:15 +0000 (20:40 +0000)]
re PR c++/60627 ([c++1y] ICE in explicit template instantiation containing auto parameter)
Fix PR c++/60627
PR c++/60627
* parser.c (cp_parser_parameter_declaration_clause): Prevent 'auto' from
introducing an implicit function template parameter within an explicit
instantiation.
PR c++/60627
* g++.dg/cpp1y/pr60627.C: New testcase.