]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
6 years agocmd: fru: Use the same format in long help
Michal Simek [Tue, 16 Apr 2019 06:04:04 +0000 (08:04 +0200)] 
cmd: fru: Use the same format in long help

Use the same format for both capture/display options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Also write terminating char to arrays
Michal Simek [Tue, 16 Apr 2019 06:27:30 +0000 (08:27 +0200)] 
cmd: fru: Also write terminating char to arrays

There is a need to also end up strings with terminating char \0 to be
able to reread different structures.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Fix structure format for board info
Michal Simek [Mon, 15 Apr 2019 12:42:55 +0000 (14:42 +0200)] 
cmd: fru: Fix structure format for board info

Origin code was targeting product area which is not what will be used at
first place.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Separate checksum routine
Michal Simek [Mon, 15 Apr 2019 09:04:42 +0000 (11:04 +0200)] 
cmd: fru: Separate checksum routine

There is a need to call this function from different places too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Save fru decoding address to variables
Michal Simek [Fri, 12 Apr 2019 09:36:37 +0000 (11:36 +0200)] 
cmd: fru: Save fru decoding address to variables

Keep record of place where fru is.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Move fru_data to data section instead of bss section
Michal Simek [Fri, 12 Apr 2019 09:37:02 +0000 (11:37 +0200)] 
cmd: fru: Move fru_data to data section instead of bss section

I didn't fully check it but I think that there is an issue to use FIT
images with dtb again when bss section is cleared. U-Boot copy just
origin DTB and if embedded_dtb_select() doesn't find new DTB then can't
go back to origin DTB file.
Move this structure to data section for now.
It should be allocated by malloc anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Move structures to header
Michal Simek [Fri, 12 Apr 2019 09:23:21 +0000 (11:23 +0200)] 
cmd: fru: Move structures to header

There is no reason to keep them private just in C.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocmd: fru: Add support for FRU commands
Siva Durga Prasad Paladugu [Wed, 10 Apr 2019 07:08:10 +0000 (12:38 +0530)] 
cmd: fru: Add support for FRU commands

This patch adds support for fru commands "fru capture"
and "fru display". The fru capture parses the FRU table
present at an address and stores in a structure for later
use. The fru display prints the content of captured structured
in a readable format.

As of now, it supports only common header and board area of FRU.
Also, its supports only English language code and ASCII8 format.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Do not remove dpll_prog from psu_init
Michal Simek [Thu, 6 Jun 2019 11:39:53 +0000 (13:39 +0200)] 
arm64: zynqmp: Do not remove dpll_prog from psu_init

dpll_prog is available in some psu_init files that's why this function
should stay there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: add tool to minimize psu_init_gpl.c files
Luca Ceresoli [Fri, 24 May 2019 13:40:02 +0000 (15:40 +0200)] 
arm64: zynqmp: add tool to minimize psu_init_gpl.c files

This script transforms a pair of psu_init_gpl.c and .h files produced by
the Xilinx Vivado tool for ZynqMP into a smaller psu_init_gpl.c file that
is almost checkpatch compliant.

Based on a script by Michal Simek.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Enable BDI for mini mtest configuration
Michal Simek [Mon, 27 May 2019 12:55:01 +0000 (14:55 +0200)] 
arm64: versal: Enable BDI for mini mtest configuration

bdi is useful to see how memory is mapped.
Also enable 3 memory banks to be mapped.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Align model name with DT
Michal Simek [Mon, 27 May 2019 09:03:51 +0000 (11:03 +0200)] 
arm64: versal: Align model name with DT

All qspi configurations are marked as MINI QSPI which is wrong.
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Update compatible string in ospi node
Siva Durga Prasad Paladugu [Wed, 1 May 2019 10:23:43 +0000 (15:53 +0530)] 
arm64: versal: Update compatible string in ospi node

This patch updates ospi node compatible strings to match
with latest source.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Enable memory mapping via DT
Michal Simek [Mon, 29 Apr 2019 16:39:09 +0000 (09:39 -0700)] 
arm64: versal: Enable memory mapping via DT

Code reads DT and setup MMU table based on memory node.
This will ensure that only DT needs to be changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Enable USB driver support
Siva Durga Prasad Paladugu [Mon, 22 Apr 2019 09:15:05 +0000 (14:45 +0530)] 
arm64: versal: Enable USB driver support

This patch adds usb host and device mode support for Xilinx
Versal virtual platform. By default USB host functionality
is enabled. To use in usb device mode, set dr_mode property
in DT to peripheral.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Define configs related to USB DFU functionality
Siva Durga Prasad Paladugu [Mon, 22 Apr 2019 09:15:04 +0000 (14:45 +0530)] 
arm64: versal: Define configs related to USB DFU functionality

This patch defines macros required for DFU functionality
for Xilinx Versal platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Rename zc1275 to zcu1275
Michal Simek [Tue, 21 May 2019 10:07:23 +0000 (12:07 +0200)] 
arm64: zynqmp: Rename zc1275 to zcu1275

Name of this platform has changed and released to customers that's why
name has also changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: uboot
6 years agoarm64: zynqmp: Align model name with DT
Michal Simek [Mon, 27 May 2019 08:02:20 +0000 (10:02 +0200)] 
arm64: zynqmp: Align model name with DT

All qspi configurations are marked as MINI QSPI which is wrong.
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Align model name with DT
Michal Simek [Mon, 27 May 2019 08:13:34 +0000 (10:13 +0200)] 
arm: zynq: Align model name with DT

All qspi configurations are marked as MINI QSPI which is wrong.
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: add tool to convert PMU config object .c to binary
Luca Ceresoli [Tue, 21 May 2019 16:06:44 +0000 (18:06 +0200)] 
arm64: zynqmp: add tool to convert PMU config object .c to binary

The recently-added ZYNQMP_SPL_PM_CFG_OBJ_FILE option allows SPL to load a
PMUFW configuration object from a binary blob. However the configuration
object is produced by Xilinx proprietary tools as a C source file and no
tool exists to easily convert it to a binary blob in an embedded Linux
build system for U-Boot to use.

Add a simple Python script to do the conversion.

It is definitely not a complete C language parser, but it is enough to
parse the known patterns generated by Xilinx tools, including:

 - defines
 - literal integers, optionally with a 'U' suffix
 - bitwise OR between them

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: spl: install a PMU firmware config object at runtime
Luca Ceresoli [Tue, 21 May 2019 16:06:43 +0000 (18:06 +0200)] 
arm64: zynqmp: spl: install a PMU firmware config object at runtime

Optionally allow U-Boot to load a configuration object into the Power
Management Unit (PMU) firmware on Xilinx ZynqMP.

The configuration object is required by the PMU FW to enable most SoC
peripherals. So far the only way to boot using U-Boot SPL was to hard-code
the configuration object in the PMU firmware. Allow a different boot
process, where the PMU FW is equal for any ZynqMP chip and its
configuration is passed at runtime by U-Boot SPL.

All the code for Inter-processor communication with the PMU is isolated in
a new file (pmu_ipc.c). The code is inspired by the same feature as
implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted
Firmware:

 * https://github.com/Xilinx/embeddedsw/blob/fb647e6b4c00f5154eba52a88b948195b6f1dc2b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c#L295
 * https://github.com/ARM-software/arm-trusted-firmware/blob/c48d02bade88b07fa7f43aa44e5217f68e5d047f/plat/xilinx/zynqmp/pm_service/pm_api_sys.c#L357

SPL logs on the console before loading the configuration object:

  U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200)
  Loading PMUFW cfg obj (2008 bytes)
  EL Level: EL3
  ...

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoKconfig: fix FIT offset prompt text
Ibai Erkiaga [Wed, 15 May 2019 21:10:04 +0000 (22:10 +0100)] 
Kconfig: fix FIT offset prompt text

The current prompt text for FIT external offset is identical to
SYS_TEXT_BASE which might confuse the users. Provided more accurate
description for the prompt text.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Marek Vasut <marex@denx.de>
6 years agoarm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI
Luca Ceresoli [Mon, 15 Apr 2019 14:18:18 +0000 (16:18 +0200)] 
arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI

A missing CONFIG_ prefix while checking for this Kconfig variable makes the
check always fail. Fix it. While there also switch from the '#if defined'
form to the '#ifdef' form as the other checks in this function.

Fixes: 35e2b92344b1 ("arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI")
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable spi flash split read
Siva Durga Prasad Paladugu [Tue, 28 May 2019 07:33:10 +0000 (13:03 +0530)] 
arm64: zynqmp: Enable spi flash split read

This patch enables spi flash spilt read for ZynqMP
platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomtd: spi: Split read transactions per bank
Siva Durga Prasad Paladugu [Tue, 28 May 2019 07:33:09 +0000 (13:03 +0530)] 
mtd: spi: Split read transactions per bank

The patch splits the read transaction into multiple
read transactions which means incase of read requested
across multiple banks, it splits and sends one read per
bank. This can be enabled using new config option
CONFIG_SPI_FLASH_SPLIT_READ.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agommc: sdhci: Move ZYNQ_HISPD_BROKEN to Kconfig
Siva Durga Prasad Paladugu [Mon, 27 May 2019 09:03:14 +0000 (14:33 +0530)] 
mmc: sdhci: Move ZYNQ_HISPD_BROKEN to Kconfig

This patch moves CONFIG_ZYNQ_HISPD_BROKEN to Kconfig

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agospi: zynqmp_gqspi: do not round immediate_data field
Wojciech Tatarski [Fri, 26 Apr 2019 15:09:03 +0000 (17:09 +0200)] 
spi: zynqmp_gqspi: do not round immediate_data field

Immediate_data is 8 bit value in generic FIFO command. When fields
data_xfer=1 and exponent=0 this field specifies the absolute number of data
bytes to read into the RXFIFO. Values from range 0xfd to 0xff are rounded
up to 0x100. It causes overwriting the next bit field which is data_xfer.
According to Zynq US+ TRM only DMA transfers should be word aligned. So
there is no reason to round up the immediate_data field.

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agospi: zynqmp_gqspi: DMA transfers should be world aligned
Wojciech Tatarski [Fri, 26 Apr 2019 15:09:02 +0000 (17:09 +0200)] 
spi: zynqmp_gqspi: DMA transfers should be world aligned

According to Zynq US+ TRM all the data transfers are word aligned. So
there is no reason to round up size of DMA transfer to ARCH_DMA_MINALIGN
(0x40)

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrivers: usb: dwc3: setup phy before dwc3 core soft reset
T Karthik Reddy [Wed, 1 May 2019 04:44:49 +0000 (10:14 +0530)] 
drivers: usb: dwc3: setup phy before dwc3 core soft reset

Phy setup should be done before dwc3 soft core reset as it is done
in linux & this fixes unreliable detection of usb cable on host side.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: composite: add BOS descriptor support to composite framework
T Karthik Reddy [Wed, 1 May 2019 04:44:48 +0000 (10:14 +0530)] 
usb: composite: add BOS descriptor support to composite framework

To add usb-3.0 support to peripheral device add BOS & SS capability
descriptors to gadget composite framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomtd: spi_flash: Add device mt35ux02g to spi flash ids list
Siva Durga Prasad Paladugu [Wed, 1 May 2019 10:23:42 +0000 (15:53 +0530)] 
mtd: spi_flash: Add device mt35ux02g to spi flash ids list

This patch adds new spi flash device mt35ux02g to spi
flash ids table.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agospi: Add support for 4Byte addressing commands
Siva Durga Prasad Paladugu [Sat, 27 Apr 2019 06:29:00 +0000 (11:59 +0530)] 
spi: Add support for 4Byte addressing commands

Thsi patch adds support for 4-byte addressing Read, write
and erase commands.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
6 years agospi: cadence_qspi: Fix stig write issue
Siva Durga Prasad Paladugu [Thu, 25 Apr 2019 13:12:32 +0000 (18:42 +0530)] 
spi: cadence_qspi: Fix stig write issue

This patch fixes the stig programming issue by checking
the status and flag status register register for every
write.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
6 years agoMakefile.lib: include /__symbols__ in dtb if OF_LIBFDT_OVERLAY is enabled
Jean-Jacques Hiblot [Fri, 22 Mar 2019 14:39:49 +0000 (15:39 +0100)] 
Makefile.lib: include /__symbols__ in dtb if OF_LIBFDT_OVERLAY is enabled

In order to apply an overlay to a DTB. The DTB must have been generated
with the option '-@'.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: dwc3: Add versal compatibility string to dwc3 glue ids
Siva Durga Prasad Paladugu [Mon, 22 Apr 2019 09:15:03 +0000 (14:45 +0530)] 
usb: dwc3: Add versal compatibility string to dwc3 glue ids

Xilinx Versal platform uses dwc3 and hence its compatible string
needs to be added to dwc3 glue ids.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: dwc3: Read phy suspend quirk from DT
Siva Durga Prasad Paladugu [Mon, 22 Apr 2019 09:15:02 +0000 (14:45 +0530)] 
usb: dwc3: Read phy suspend quirk from DT

This patch reads the suspend phy quirk from DT property
"snps,dis_u2_susphy_quirk" and update in dwc3 structure.
This suspend phy quirk will disable suspend functionality
of phy.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoARM: zynq: delete long-dead CONFIG_USB_CABLE_CHECK
Robert P. J. Day [Thu, 18 Apr 2019 14:50:23 +0000 (10:50 -0400)] 
ARM: zynq: delete long-dead CONFIG_USB_CABLE_CHECK

This Kbuild option disappeared way back in 2014:

 commit 75504e9592745021006cb8905b5ff5a51d9d1cb3
 Author: Mateusz Zalega <m.zalega@samsung.com>
 Date:   Wed Apr 30 13:07:48 2014 +0200

    ... snip ...

    CONFIG_USB_CABLE_CHECK was removed.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: gem: Remove DECLARE_GLOBAL_DATA_PTR from gem driver
Michal Simek [Thu, 25 Apr 2019 18:30:22 +0000 (11:30 -0700)] 
net: gem: Remove DECLARE_GLOBAL_DATA_PTR from gem driver

GD is not used anywhere that's why there is no reason to have this macro
in the driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomtd: spi: Add octal read flag for part mt35xu512g
Siva Durga Prasad Paladugu [Wed, 10 Apr 2019 11:23:33 +0000 (16:53 +0530)] 
mtd: spi: Add octal read flag for part mt35xu512g

This patch adds octal read support for flash
mt35xu512g.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: gem: Remove phy autodetection code
Michal Simek [Fri, 29 Mar 2019 08:25:09 +0000 (09:25 +0100)] 
net: gem: Remove phy autodetection code

There is no reason to detect phy when core is doing it for us.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: uboot
---
Based on https://lists.denx.de/pipermail/u-boot/2019-March/363225.html

6 years agonet: phy: implement fallback mechanism for negative phy adresses
Hannes Schmelzer [Fri, 29 Mar 2019 08:54:05 +0000 (09:54 +0100)] 
net: phy: implement fallback mechanism for negative phy adresses

Negative phy-addresses can occour if the caller function was not able to
determine a valid phy address (from device-tree for example). In this
case we catch this here and search for ANY phy device on the given mdio-
bus.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable 2 NAND chips support for zynqmp_mini_nand
T Karthik Reddy [Fri, 19 Apr 2019 03:40:37 +0000 (09:10 +0530)] 
arm64: zynqmp: Enable 2 NAND chips support for zynqmp_mini_nand

This patch enables 2 nand chips support for zynqmp mini nand

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: versal: Update boot delay to perform autoboot
Siva Durga Prasad Paladugu [Sat, 27 Apr 2019 05:47:04 +0000 (11:17 +0530)] 
arm64: versal: Update boot delay to perform autoboot

Update boot delay to 5 for performing autoboot. This patch
also updates counter frequency to value 2720000 as used
by QEMU.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agozynqmp: configs: Add single nand flash mini u-boot configuration
T Karthik Reddy [Fri, 26 Apr 2019 10:34:44 +0000 (16:04 +0530)] 
zynqmp: configs: Add single nand flash mini u-boot configuration

This patch adds configuration for single nand flash mini u-boot.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocommon: command: Print FPGA error value in hexadecimal
T Karthik Reddy [Thu, 18 Apr 2019 04:04:28 +0000 (09:34 +0530)] 
common: command: Print FPGA error value in hexadecimal

This patch prints returned FPGA error value in hexadecimal instead of
decimal.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomtd: spi: Add support for Macronix flash parts
Vikhyat Goyal [Fri, 12 Apr 2019 19:50:14 +0000 (13:50 -0600)] 
mtd: spi: Add support for Macronix flash parts

Adds support for mx25u51245f,mx66u2g45g and mx66l2g45g flash parts.

Signed-off-by: Vikhyat Goyal <vikhyat.goyal@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: dwc3: Handle case where setup_phy is not needed
Siva Durga Prasad Paladugu [Mon, 1 Apr 2019 08:49:20 +0000 (14:19 +0530)] 
usb: dwc3: Handle case where setup_phy is not needed

If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: udc-uclass: Fixed problem when no alias is defined in DT
Jean-Jacques Hiblot [Thu, 24 Jan 2019 14:44:53 +0000 (15:44 +0100)] 
usb: udc-uclass: Fixed problem when no alias is defined in DT

commit 801f1fa442 "dm: usb: udc: Use SEQ_ALIAS to index the USB gadget
ports" changed the way the udevice if found. It uses the alias to find
a udevice for a given USB port number. In the commit log it was stated
that if no alias is provided, the bind order will be used instead. However
it doesn't work. Fixing this by adding a call to uclass_get_device() if
uclass_get_device_by_seq() fails.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Vignesh R <vigneshr@ti.com>
6 years agonet: zynq_gem: Modify phy supported features after max-speed was set
Siva Durga Prasad Paladugu [Wed, 27 Mar 2019 12:09:59 +0000 (17:39 +0530)] 
net: zynq_gem: Modify phy supported features after max-speed was set

The phydev supported features were reset in phy_set_supported() so,
move the setting of driver supported features after this so that it
wont lost in phy_set_supported().

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrivers: mtd: spi: Check SPI_TX_QUAD mode if RD_QUADIO flag is set
T Karthik Reddy [Wed, 27 Mar 2019 06:15:45 +0000 (11:45 +0530)] 
drivers: mtd: spi: Check SPI_TX_QUAD mode if RD_QUADIO flag is set

This patch checks for SPI_TX_QUAD mode if RD_QUADIO flag is set, as
RD_QUADIO uses 4 lines for TX. If SPI_TX_QUAD mode is not set then
CMD_READ_QUAD_IO_FAST should not be used.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoxilinx: Add sd boot command script for reference
Siva Durga Prasad Paladugu [Wed, 27 Mar 2019 05:18:33 +0000 (10:48 +0530)] 
xilinx: Add sd boot command script for reference

This patch adds sdboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoMakefile: Prioritize external dtb if defined
Michal Simek [Sat, 23 Mar 2019 05:43:00 +0000 (11:13 +0530)] 
Makefile: Prioritize external dtb if defined

Prioritize external dtb if its passed via EXT_DTB
than the dtb that was built in the tree. With this
patch it appends the specified external dtb to
the u-boot image.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
6 years agoarm: zynq: Add an info message about post config
Siva Durga Prasad Paladugu [Sat, 23 Mar 2019 10:31:36 +0000 (16:01 +0530)] 
arm: zynq: Add an info message about post config

Post configuration cant be run at u-boot as u-boot
didn't has any info about the design.So,this patch
adds an info message that post config was not run
and needs to be run manually if needed.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR
Siva Durga Prasad Paladugu [Sat, 23 Mar 2019 09:30:06 +0000 (15:00 +0530)] 
arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR

This patch adds "zu39dr" to the list of zynqmp devices
The zu39DR is the new RFSoC silicon with id value of 0x66.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agospi: zynqmp_gqspi: Fix tap delay values
Siva Durga Prasad Paladugu [Thu, 21 Mar 2019 06:40:17 +0000 (12:10 +0530)] 
spi: zynqmp_gqspi: Fix tap delay values

There is no need of read modify write for tapdelay settings
ans hence remove the read operations while setting tapdelays.
Also, correct tapdelay value settings at 40MHZ by modifying
the if check to <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: ti: Use ofnode api to read phy property
Siva Durga Prasad Paladugu [Wed, 20 Mar 2019 11:19:47 +0000 (16:49 +0530)] 
net: phy: ti: Use ofnode api to read phy property

Fix incorrect read of phy property "ti,6-wire-mode"
by using ofnode api instead of dev read.
All other phy properties in of_init() routine were
also read using ofnode APIs.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoinclude: dt-binding: clock: Rename file name
Rajan Vaja [Fri, 22 Feb 2019 12:16:24 +0000 (04:16 -0800)] 
include: dt-binding: clock: Rename file name

Rename file name of ZynqMP clk dt-bindings to align with
file name of reset and power dt-bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years ago.gitignore: Ignore regenerated *.dtbo files
Michal Simek [Thu, 21 Feb 2019 06:48:54 +0000 (07:48 +0100)] 
.gitignore: Ignore regenerated *.dtbo files

*.dtbo are dt overlays files which should be also ignored as *.dtb.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable fclk nodes
Jyotheeswar Reddy Mutthareddyvari [Mon, 11 Mar 2019 18:41:19 +0000 (11:41 -0700)] 
arm64: zynqmp: Enable fclk nodes

CCF requires all PL IPs to have CCF compliant drivers and manage the clocks
they depend on. Currently not all PL IP drivers are CCF compliant and some
IPs may not have drivers. Since CCF accounts only for clock usage by CCF
compliant drivers, PL clocks may be gated and could cause malfunction of PL
IPs/Drivers that are not CCF compliant. So, keep all PL clocks always
enabled by enabling fclk nodes.
For cases which require active PL clock management, it should first be
ensured that all IPs have CCF compliant drivers and then fclk nodes can
be disabled.

Signed-off-by: Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: dts: zynqmp: Add interrupt-names property into dwc3 node
Anurag Kumar Vulisha [Tue, 5 Mar 2019 15:46:34 +0000 (15:46 +0000)] 
arm64: dts: zynqmp: Add interrupt-names property into dwc3 node

This patch adds the "interrupt-names" property for providing
names to the interrupt ids used in dwc3 dts node

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: dts: zynqmp: Add optional gpio phy reset properties
Harini Katakam [Wed, 13 Mar 2019 14:11:19 +0000 (19:41 +0530)] 
arm64: dts: zynqmp: Add optional gpio phy reset properties

Add gpio phy reset via I2C expander TCA6416 on board ZCU102.
A warning call trace is observer in probe when this reset is called
from context that can sleep. Keep this commented until that is
resolved in phylib.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Turn comment to gpio-line-names
Michal Simek [Tue, 12 Mar 2019 09:15:27 +0000 (10:15 +0100)] 
arm64: zynqmp: Turn comment to gpio-line-names

Label gpio lines properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable fpd_dma for zcu104 platforms
Michal Simek [Thu, 7 Mar 2019 07:15:52 +0000 (08:15 +0100)] 
arm64: zynqmp: Enable fpd_dma for zcu104 platforms

Enable fpd_dma for these boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: xilinx: zynqmp: Remove unneeded configs
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:52 +0000 (11:50 +0530)] 
arm64: xilinx: zynqmp: Remove unneeded configs

Remove unneeded configs from mini qspi configuration
so that it saves space for this mini configuration.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Remove zynqmp-mini-qspi.dtsi file
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:51 +0000 (11:50 +0530)] 
arm64: zynqmp: Remove zynqmp-mini-qspi.dtsi file

This patch removes zynqmp-mini-qspi.dtsi files as it has
same content as zynqmp-mini-qspi.dts file and there is no
need to maintain two, if .dts can be included in all files
instead of .dtsi. So, this patch removes .dtsi inclusion with
.dts in all files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Define label for flash node
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:50 +0000 (11:50 +0530)] 
arm64: zynqmp: Define label for flash node

Define a label for flash node so that it can be
referenced easily as required.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Add spi-flash compatible string to flash node
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:49 +0000 (11:50 +0530)] 
arm64: zynqmp: Add spi-flash compatible string to flash node

spi-flash compatible string is needed for reading tx and rx bus
widths, hence add this compatible string to flash node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB
Siva Durga Prasad Paladugu [Sat, 16 Mar 2019 12:21:26 +0000 (17:51 +0530)] 
arm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB

This patch enables Micrel phy support for Xilinx ZynqMP zc1275
revB board.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: xilinx_gmii2rgmii: Fill node pointer for external phy
Siva Durga Prasad Paladugu [Sat, 16 Mar 2019 12:21:25 +0000 (17:51 +0530)] 
net: phy: xilinx_gmii2rgmii: Fill node pointer for external phy

This patch fills external phy node pointer so that it will
be used in its driver to read its phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: xilinx_gmii2rgmii: Define readext and writeext routines
Siva Durga Prasad Paladugu [Sat, 16 Mar 2019 12:21:24 +0000 (17:51 +0530)] 
net: phy: xilinx_gmii2rgmii: Define readext and writeext routines

This patch defines writeext and readext routines and hooks
them for xilinx gmii2rgmii phy driver. These routines will
invokes corresponding external phy routines if defined.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: micrel_ksz90x1: switch to use ofnode apis
Siva Durga Prasad Paladugu [Sat, 16 Mar 2019 12:21:23 +0000 (17:51 +0530)] 
net: phy: micrel_ksz90x1: switch to use ofnode apis

phydev->node is phy node, phydev->dev->node is controller
and that current code is likely reading the properties from
controller node and not from phy. So, Use PHY API phy_get_ofnode()
helper to get PHY DT node and use ofnode_read_u32_default() to
read properties in phy node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Changes for v2:
- Updated description
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agophy: ti: Init node before reading
Michal Simek [Sat, 16 Mar 2019 11:02:57 +0000 (12:02 +0100)] 
phy: ti: Init node before reading

There is a need to fill node before clk_output_sel is setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
6 years agocommon: image-sig.c: Add manual relocation
T Karthik Reddy [Sat, 16 Mar 2019 09:53:03 +0000 (15:23 +0530)] 
common: image-sig.c: Add manual relocation

This patch adds manual relocation for struct checksum_algo & struct
crypto_algo structures.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()
T Karthik Reddy [Sat, 16 Mar 2019 09:53:02 +0000 (15:23 +0530)] 
drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()

This patch adds manual relocation for Modular Exponentiation if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocommon: hash: Manually relocate struct hash_algo
T Karthik Reddy [Sat, 16 Mar 2019 09:53:01 +0000 (15:23 +0530)] 
common: hash: Manually relocate struct hash_algo

This patch adds manual relocation for struct hash_algo if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: Define init routine and register generic phy driver
Siva Durga Prasad Paladugu [Fri, 15 Mar 2019 12:16:47 +0000 (17:46 +0530)] 
net: phy: Define init routine and register generic phy driver

This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: ti: Add support for 6-wire mode in SGMII configuration
Siva Durga Prasad Paladugu [Fri, 15 Mar 2019 12:16:46 +0000 (17:46 +0530)] 
net: phy: ti: Add support for 6-wire mode in SGMII configuration

This patch adds 6 wire mode supports which enables SGMII clock
to MAC from phy. The drivers gets this 6 wire mode info by reading
the property "ti,6-wire-mode" from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: xilinx_axiemac: Fill the phy node pointer in phydev
Siva Durga Prasad Paladugu [Fri, 15 Mar 2019 12:16:45 +0000 (17:46 +0530)] 
net: xilinx_axiemac: Fill the phy node pointer in phydev

This patch assings the phynode pointer to the phydev node
as it is needed later in the corresponding phy driver to read
phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Use zynqmp_mmio_read/write functions
T Karthik Reddy [Wed, 13 Mar 2019 14:54:18 +0000 (20:24 +0530)] 
arm64: zynqmp: Use zynqmp_mmio_read/write functions

Changed the return type of reset_reason() to int from u32, because
zynqmp_mmio_read/write() returns signed value on error.
Replaced readl and writel functions with zynqmp_mmio_read &
zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agotest: py: tests: Add py-test case for zynq aes loadp command
T Karthik Reddy [Tue, 12 Mar 2019 14:50:26 +0000 (20:20 +0530)] 
test: py: tests: Add py-test case for zynq aes loadp command

This patch adds py-test case for zynq aes loadp command. It tests
loading partial bitstream to DDR and tests loading partial bitstream
to PL using "zynq aes loadp" command. This test needs to be executed
only in bootmode, if not it wil be skipped.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agotest: py: tests: Correct zynq aes & rsa py-test cases
T Karthik Reddy [Tue, 12 Mar 2019 14:50:25 +0000 (20:20 +0530)] 
test: py: tests: Correct zynq aes & rsa py-test cases

This patch corrects zynq aes & rsa py-test cases as per changes in
zynq aes and rsa commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agotest: py: tests: Compare value instead of object
T Karthik Reddy [Tue, 12 Mar 2019 14:50:24 +0000 (20:20 +0530)] 
test: py: tests: Compare value instead of object

This patch corrects comparing value instead of comparing objects

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofpga: zynqpl: Flush dcache only for non-bitstream data
T Karthik Reddy [Tue, 12 Mar 2019 14:50:23 +0000 (20:20 +0530)] 
fpga: zynqpl: Flush dcache only for non-bitstream data

In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoARM: zynq: Add zynq aes load & loadp commands
T Karthik Reddy [Tue, 12 Mar 2019 14:50:22 +0000 (20:20 +0530)] 
ARM: zynq: Add zynq aes load & loadp commands

Added support for zynq aes load & loadp commands which are broken by
mainline merge.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoARM: zynq: Check zynq aes & rsa command parameters count
T Karthik Reddy [Tue, 12 Mar 2019 14:50:21 +0000 (20:20 +0530)] 
ARM: zynq: Check zynq aes & rsa command parameters count

This patch checks for zynq aes & rsa commands max parameters count. Also
checks minimum number of parameters count for aes command.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofpga: zynqpl: Check fpga config completion
T Karthik Reddy [Tue, 12 Mar 2019 14:50:20 +0000 (20:20 +0530)] 
fpga: zynqpl: Check fpga config completion

This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofpga: zynqpl: Add bstype argument to zynq_decrypt_load()
T Karthik Reddy [Tue, 12 Mar 2019 14:50:19 +0000 (20:20 +0530)] 
fpga: zynqpl: Add bstype argument to zynq_decrypt_load()

This patch adds 'bstype' argument to zynq_decrypt_load() to specify whether
the input source is a bitstream/non-bitstream/partial bitstream image.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoi2c: i2c_cdns: Fix below warnings with checker tool
Siva Durga Prasad Paladugu [Wed, 13 Mar 2019 04:11:17 +0000 (09:41 +0530)] 
i2c: i2c_cdns: Fix below warnings with checker tool

This patch fixes below warnings found with checker tool.
The variable len in i2c_msg struct is of unsigned type
and it is received as recv_count which is unsigned type
but it is checked with < 0 which is always false, hence
removed it.
The local variable curr_recv_count is declared as signed
type and compared aginst unsigned recv_count which is
incorrect. This is fixed by declaring it as unsigned type.

drivers/i2c/i2c-cdns.c: In function ‘cdns_i2c_read_data’:
drivers/i2c/i2c-cdns.c:317:18: warning: comparison of
unsigned expression < 0 is always false [-Wtype-limits]
  if ((recv_count < 0))
                  ^
drivers/i2c/i2c-cdns.c:340:24: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
  updatetx = recv_count > curr_recv_count;
                        ^
drivers/i2c/i2c-cdns.c:361:39: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
    while (readl(&regs->transfer_size) !=

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp Add CONFIG_SF_DUAL_FLASH to zcu111 revA
T Karthik Reddy [Tue, 5 Mar 2019 04:58:27 +0000 (10:28 +0530)] 
arm64: zynqmp Add CONFIG_SF_DUAL_FLASH to zcu111 revA

This patch enables dual flash support for zcu111 board.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoxilinx: Add qspi boot command script for reference
Siva Durga Prasad Paladugu [Fri, 8 Mar 2019 07:43:26 +0000 (13:13 +0530)] 
xilinx: Add qspi boot command script for reference

Thsi patch adds qspiboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoi2c: i2c_cdns: Add support for handling arbitration lost
Siva Durga Prasad Paladugu [Thu, 7 Mar 2019 10:09:45 +0000 (15:39 +0530)] 
i2c: i2c_cdns: Add support for handling arbitration lost

This patch adds support for handling arbitration lost
in case of multi master mode. When an arbitration lost
is detected, it retries for 10 times before failing.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoi2c: i2c_cdns: Fix clearing of all interrupts
Siva Durga Prasad Paladugu [Thu, 7 Mar 2019 10:09:44 +0000 (15:39 +0530)] 
i2c: i2c_cdns: Fix clearing of all interrupts

The arbitration lost interrupt was not getting cleared
while clearing interrupts. This patch fixes this by adding
arbitration lost interrupt as well during clear. This patch
also removes hardcoded value and defined a macro for it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agospi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz
Siva Durga Prasad Paladugu [Thu, 7 Mar 2019 10:38:48 +0000 (16:08 +0530)] 
spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz

This patch fixes the tap delay values to be set at 100MHz and 150MHz
as per TRM by fixing the if condition to use <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: xilinx_gmii2rgmii: Add check for external phy detection
Siva Durga Prasad Paladugu [Tue, 26 Feb 2019 12:12:44 +0000 (17:42 +0530)] 
net: phy: xilinx_gmii2rgmii: Add check for external phy detection

Add check if an external phy is detected or not before proceeding
further to config the external phy. This patch fixes the issue of
u-boot hang or reset, if u-boot is not able to communicate with
external connected over gmiitorgmii bridge.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: Fix return value check phy_probe
Siva Durga Prasad Paladugu [Tue, 26 Feb 2019 12:12:43 +0000 (17:42 +0530)] 
net: phy: Fix return value check phy_probe

Don't ignore return value of phy_probe() call as
the probe may fail and it needs to be reported.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: phy: Reloc next and prev pointers inside phy_drivers
Siva Durga Prasad Paladugu [Tue, 26 Feb 2019 11:47:00 +0000 (17:17 +0530)] 
net: phy: Reloc next and prev pointers inside phy_drivers

This patch relocates the pointers inside phy_drivers incase
of manual reloc. Without this reloc, these points to invalid
pre relocation address and hence causes exception or hang.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Remove eeprom setting
Michal Simek [Mon, 25 Feb 2019 09:01:22 +0000 (10:01 +0100)] 
arm64: zynqmp: Remove eeprom setting

By moving to DM_I2C there is no need to specify any eeprom configuration
because it is read from DT.

Reported-by: Sreeja Vadakattu <sreeja.vadakattu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodts: xilinx: zynqmp: Use macro instead of hard-coded value of reset
Rajan Vaja [Wed, 20 Feb 2019 12:33:08 +0000 (04:33 -0800)] 
dts: xilinx: zynqmp: Use macro instead of hard-coded value of reset

Use reset ID macros instead of hard-coded values.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodts: xilinx: zynqmp: Use macro instead of hard-coded value
Rajan Vaja [Wed, 20 Feb 2019 12:33:07 +0000 (04:33 -0800)] 
dts: xilinx: zynqmp: Use macro instead of hard-coded value

Use clock ID macros instead of hard-coded values.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodts: xilinx: Update zynqmp dts
Rajan Vaja [Fri, 15 Feb 2019 04:42:01 +0000 (20:42 -0800)] 
dts: xilinx: Update zynqmp dts

Update zynqmp dts files to sync with upstream binding.

Below DT nodes are updated:
* Firmware
* Clock
* zynqmp-power
* Power domain
* Reset
* Pinctrl

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>