James Greenhalgh [Thu, 31 Aug 2017 16:03:09 +0000 (16:03 +0000)]
[AArch64 obvious] Fix register constraints for aarch64_ml[as]_elt_merge<mode>
The MLA by-element instructions have the same restriction as other by-element
instructions whereby the forms operating on vectors of 16-bit integer data
may only use registers v0-v15. We have an iterator for that, applied to the
other patterns generating this instruction, so use that.
* config.gcc: Use g.opt for arc.
* config/arc/arc.c (LEGITIMATE_SCALED_ADDRESS_P): Deleted,
functionality moved to ...
(legitimate_scaled_address_p): New function, ...here.
(LEGITIMATE_SMALL_DATA_OFFSET_P): New define.
(LEGITIMATE_SMALL_DATA_ADDRESS_P): Use the above define.
(legitimate_offset_address_p): Delete TARGET_NO_SDATA_SET
condition.
(arc_override_options): Handle G option.
(arc_output_pic_addr_const): Correct function definition.
(arc_legitimate_address_p): Use legitimate_scaled_address_p.
(arc_decl_anon_ns_mem_p): Delete.
(arc_in_small_data_p): Overhaul this function to take into
consideration the value given via G option.
(arc_rewrite_small_data_1): Renamed and corrected old
arc_rewrite_small_data function.
(arc_rewrite_small_data): New function.
(small_data_pattern): Don't use pic_offset_table_rtx.
* config/arc/arc.h (CC1_SPEC): Recognize G option.
* config/arc/simdext.md (movmisalignv2hi): Use
prepare_move_operands function.
(mov*): Likewise.
(movmisalign*): Likewise.
Add alignment check for short load/store instructions used for sdata,
as they request 32-bit aligned short immediate. Use sdata symbol
alignment information and emit scalled loads/stores whenever is
possible. The scalled address will extend the access range for sdata
symbols. Allow 64-bit datum into small data section, if double
load/store instructions are present.
* config/arc/arc-protos.h (compact_sda_memory_operand): Update
prototype.
* config/arc/arc.c (arc_print_operand): Output scalled address for
sdata whenever is possible.
(arc_in_small_data_p): Allow sdata for 64bit datum when double
load/stores are available.
(compact_sda_memory_operand): Check for the alignment required by
code density instructions.
* config/arc/arc.md (movsi_insn): Use newly introduced Us0
constraint.
* config/arc/constraints.md (Usd): Update constraint.
(Us0): New constraint.
(Usc): Update constraint.
Previously we allowed subregs of non-GPR modes to be base and index
registers in non-strict mode. In practice such subregs will always
require a reload, so we get better code by disallowing them.
2017-08-31 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
subregs whose inner modes can be stored in GPRs.
(aarch64_classify_index): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251557
The comparison results provided by the V_cmp_result/v_cmp_result
attribute were simply the corresponding integer vector. We'd also
like to have easy access to the integer vector for SVE, but using
"cmp_result" would be confusing because SVE comparisons return
predicates instead of vectors. This patch therefore renames the
attributes to the more general V_INT_EQUIV/v_int_equiv instead.
As to the capitalisation: there are already many iterators that use
all lowercase vs. all uppercase names to distinguish all lowercase
vs. all uppercase expansions (e.g. fcvt_target and FCVT_TARGET).
It's also the convention used for the built-in mode/MODE/code/CODE/etc.
attributes. IMO those names are easier to read at a glance, rather than
relying on a single letter's difference.
2017-08-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
The AArch64 port defined x2, x3 and x4 vector modes that were only used
in the rtl for the AdvSIMD LD{2,3,4} patterns. It seems unlikely that
this rtl would have led to any valid simplifications, since the values
involved were unspecs that had a different number of operands from the
non-dreg versions. (The dreg UNSPEC_LD2 had a single operand, while
the qreg one had two operands.)
As it happened, the patterns led to invalid simplifications on big-
endian targets due to a mix-up in the operand order, see Tamar's fix
in r240271.
This patch therefore replaces the rtl patterns with dedicated unspecs.
This allows the x2, x3 and x4 modes to be removed, avoiding a clash
with 256-bit and 512-bit SVE.
2017-08-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64-modes.def: Remove 32-, 48- and 64-byte
vector modes.
* config/aarch64/iterators.md (VRL2, VRL3, VRL4): Delete.
* config/aarch64/aarch64.md (UNSPEC_LD2_DREG, UNSPEC_LD3_DREG)
(UNSPEC_LD4_DREG): New unspecs.
* config/aarch64/aarch64-simd.md (aarch64_ld2<mode>_dreg_le)
(aarch64_ld2<mode>_dreg_be): Replace with...
(aarch64_ld2<mode>_dreg): ...this pattern and use the new DREG
unspec.
(aarch64_ld3<mode>_dreg_le)
(aarch64_ld3<mode>_dreg_be): Replace with...
(aarch64_ld3<mode>_dreg): ...this pattern and use the new DREG
unspec.
(aarch64_ld4<mode>_dreg_le)
(aarch64_ld4<mode>_dreg_be): Replace with...
(aarch64_ld4<mode>_dreg): ...this pattern and use the new DREG
unspec.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251555
Renlin Li [Thu, 31 Aug 2017 09:18:22 +0000 (09:18 +0000)]
[TESTSUITE]Use memcpy instead of strcpy in testsuite/gcc.dg/memcmp-1.c
strcpy will keep reading and writing memory if the string is not terminated
with null character. In this case, it may visit memory beyond the boundary.
gcc/testsuite/
2017-08-31 Renlin Li <renlin.li@arm.com>
Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
* gcc.dg/memcmp-1.c (test_strncmp): Use memcpy instead of strcpy.
Bill Schmidt [Wed, 30 Aug 2017 20:04:07 +0000 (20:04 +0000)]
re PR tree-optimization/81987 (ICE in verify_ssa with -O3 -march=skylake-avx512)
[gcc]
2017-08-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/81987
* gimple-ssa-strength-reduction.c (insert_initializers): Don't
insert an initializer in a location not dominated by the stride
definition.
[gcc/testsuite]
2017-08-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/81987
* g++.dg/torture/pr81987.C: New file.
Ian Lance Taylor [Wed, 30 Aug 2017 18:27:17 +0000 (18:27 +0000)]
configure.ac: Substitute GOC_FOR_TARGET and GCC_FOR_TARGET.
* configure.ac: Substitute GOC_FOR_TARGET and GCC_FOR_TARGET.
* Makefile.am (MOSTLYCLEANFILES): Add check-gcc.
(check-gccgo): Create via a temporary file.
(check-gcc): New target.
(CHECK_ENV): Set CC.
(ECHO_ENV): Report CC.
(check-go-tool): Depend on check-gcc.
(check-runtime, check-cgo-test, check-carchive-test): Likewise.
* configure, Makefile.in: Rebuild.
Jon Beniston [Wed, 30 Aug 2017 16:16:37 +0000 (16:16 +0000)]
tree-vect-patterns.c (vect_pattern_recog_1): Use VECTOR_TYPE_P instead of VECTOR_MODE_P check.
* tree-vect-patterns.c (vect_pattern_recog_1): Use VECTOR_TYPE_P instead
of VECTOR_MODE_P check.
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Allow single
element vector types.
Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r251538
This patch adds a partial_subreg_p predicate to go alongside
paradoxical_subreg_p.
Like the paradoxical_subreg_p patch, this one replaces some tests that
were based on GET_MODE_SIZE rather than GET_MODE_PRECISION. In each
case the change should be a no-op or an improvement.
The regcprop.c patch prevents some replacements of the 82-bit RFmode
with the 80-bit XFmode on ia64. I don't understand the target details
here particularly well, but from the way the modes are described in
ia64-modes.def, it isn't valid to assume that an XFmode can carry an
RFmode payload. A comparison of the testsuite assembly output for one
target per CPU showed no other differences.
Some of the places changed here are tracking the widest access mode
found for a register. The series tries to standardise on:
if (partial_subreg_p (widest_seen, new_mode))
widest_seen = new_mode;
rather than:
if (paradoxical_subreg_p (new_mode, widest_seen))
widest_seen = new_mode;
Either would have been OK.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
Tony Reix [Wed, 30 Aug 2017 14:08:00 +0000 (14:08 +0000)]
simple-object-xcoff.c (simple_object_xcoff_find_sections): Improve .go_export csect handling.
* simple-object-xcoff.c (simple_object_xcoff_find_sections):
Improve .go_export csect handling. Don't make assumptions
on containing section or number of auxiliary entries.
Martin Liska [Wed, 30 Aug 2017 12:38:31 +0000 (14:38 +0200)]
Fix IPA ICF with ASM statements (PR inline-asm/82001).
2017-08-30 Martin Liska <mliska@suse.cz>
PR inline-asm/82001
* ipa-icf-gimple.c (func_checker::compare_tree_list_operand):
Rename to ...
(func_checker::compare_asm_inputs_outputs): ... this function.
(func_checker::compare_gimple_asm): Use the function to compare
also ASM constrains.
* ipa-icf-gimple.h: Rename the function.
2017-08-30 Martin Liska <mliska@suse.cz>
PR inline-asm/82001
* gcc.dg/ipa/pr82001.c: New test.
This patch adds another machine_mode wrapper for modes that are
known to be COMPLEX_MODE_P. There aren't yet many places that make
use of it, but that might change in future.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (complex_mode): New type.
* gdbhooks.py (build_pretty_printer): Handle it.
* machmode.h (complex_mode): New class.
(complex_mode::includes_p): New function.
(is_complex_int_mode): Likewise.
(is_complex_float_mode): Likewise.
* genmodes.c (get_mode_class): Handle complex mode classes.
* function.c (expand_function_end): Use is_complex_int_mode.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_complex_float_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251527
This patch adds a scalar_mode_pod class and uses it to
replace the machine_mode in fixed_value.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_mode_pod): New typedef.
* gdbhooks.py (build_pretty_printer): Handle it.
* machmode.h (gt_ggc_mx, gt_pch_nx): New functions.
* fixed-value.h (fixed_value::mode): Change type to scalar_mode_pod.
* fold-const.c (fold_convert_const_int_from_fixed): Use scalar_mode.
* tree-streamer-in.c (unpack_ts_fixed_cst_value_fields): Use
as_a <scalar_mode>.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251526
This patch uses scalar_mode in a few miscellaneous places:
- Previous patches mean mode_to_vector can take a scalar_mode without
further changes.
- Implicit promotion is limited to scalar types (affects promote_mode
and sdbout_parms)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_for_vector): Take a scalar_mode instead
of a machine_mode.
* stor-layout.c (mode_for_vector): Likewise.
* explow.c (promote_mode): Use as_a <scalar_mode>.
* sdbout.c (sdbout_parms): Use is_a <scalar_mode>.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251525
[70/77] Make expand_fix/float check for scalar modes
The expand_float code:
/* Unsigned integer, and no way to convert directly. Convert as signed,
then unconditionally adjust the result. */
and the expand_fix code:
/* For an unsigned conversion, there is one more way to do it.
If we have a signed conversion, we generate code that compares
the real value to the largest representable positive number. If if
is smaller, the conversion is done normally. Otherwise, subtract
one plus the highest signed number, convert, and add it back.
are restricted to scalars, since the expansion branches on a
comparison of the value. This patch makes that explicit.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* optabs.c (expand_float): Explicitly check for scalars before
using a branching expansion.
(expand_fix): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251521
This patch makes the fixed-value.* routines use scalar_mode.
It would be possible to define special classes for these modes, as for
scalar_int_mode and scalar_float_mode, but at the moment nothing would
benefit from them. In particular, there's no use case that would help
select between one class for all fixed-point modes versus one class for
fractional modes and one class for accumulator modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* fixed-value.h (fixed_from_double_int): Take a scalar_mode
rather than a machine_mode.
(fixed_from_string): Likewise.
(fixed_convert): Likewise.
(fixed_convert_from_int): Likewise.
(fixed_convert_from_real): Likewise.
(real_convert_from_fixed): Likewise.
* fixed-value.c (fixed_from_double_int): Likewise.
(fixed_from_string): Likewise.
(fixed_convert): Likewise.
(fixed_convert_from_int): Likewise.
(fixed_convert_from_real): Likewise.
(real_convert_from_fixed): Likewise.
* config/avr/avr.c (avr_out_round): Use as_a <scalar_mode>.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251518
This patch treats the mode associated with an integer constant as a
scalar_mode. We can't use the more natural-sounding scalar_int_mode
because we also use (const_int 0) for bounds-checking modes. (It might
be worth adding a bounds-specific code instead, but that's for another
day.)
This exposes a latent bug in simplify_immed_subreg, which for
vectors of CONST_WIDE_INTs would pass the vector mode rather than
the element mode to rtx_mode_t.
I think the:
/* We can get a 0 for an error mark. */
|| GET_MODE_CLASS (mode) == MODE_VECTOR_INT
|| GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
in immed_double_const is dead. trunc_int_mode (via gen_int_mode)
would go on to ICE if the mode fitted in a HWI, and surely plenty
of other code would be confused to see a const_int be interpreted
as a vector. We should instead be using CONST0_RTX (mode) if we
need a safe constant for a particular mode.
We didn't try to make these functions take scalar_mode arguments
because in many cases that would be too invasive at this stage.
Maybe it would become feasible in future. Also, the long-term
direction should probably be to add modes to constant integers
rather than have then as VOIDmode odd-ones-out. That would remove
the need for rtx_mode_t and thus remove the question whether they
should use scalar_int_mode, scalar_mode or machine_mode.
The patch also uses scalar_mode for the CONST_DOUBLE handling
in loc_descriptor. In that case the mode can legitimately be
either floating-point or integral.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* emit-rtl.c (immed_double_const): Use is_a <scalar_mode> instead
of separate mode class checks. Do not allow vector modes here.
(immed_wide_int_const): Use as_a <scalar_mode>.
* explow.c (trunc_int_for_mode): Likewise.
* rtl.h (wi::int_traits<rtx_mode_t>::get_precision): Likewise.
(wi::shwi): Likewise.
(wi::min_value): Likewise.
(wi::max_value): Likewise.
* dwarf2out.c (loc_descriptor): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Fix rtx_mode_t argument
for CONST_WIDE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251517
This patch adds a SCALAR_TYPE_MODE macro, along the same lines as
SCALAR_INT_TYPE_MODE and SCALAR_FLOAT_TYPE_MODE. It also adds
two instances of as_a <scalar_mode> to c_common_type, when converting
an unsigned fixed-point SCALAR_TYPE_MODE to the equivalent signed mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/c-family/
* c-lex.c (interpret_fixed): Use SCALAR_TYPE_MODE.
* c-common.c (c_build_vec_perm_expr): Likewise.
gcc/c/
* c-typeck.c (build_binary_op): Use SCALAR_TYPE_MODE.
(c_common_type): Likewise. Use as_a <scalar_mode> when setting
m1 and m2 to the signed equivalent of a fixed-point
SCALAR_TYPE_MODE.
gcc/cp/
* typeck.c (cp_build_binary_op): Use SCALAR_TYPE_MODE.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251516
[62/77] Big machine_mode to scalar_int_mode replacement
This patch changes the types of various things from machine_mode
to scalar_int_mode, in cases where (after previous patches)
simply changing the type is enough on its own. The patch does
nothing other than that.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* builtins.h (builtin_strncpy_read_str): Take a scalar_int_mode
instead of a machine_mode.
(builtin_memset_read_str): Likewise.
* builtins.c (c_readstr): Likewise.
(builtin_memcpy_read_str): Likewise.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
(expand_builtin_signbit): Use scalar_int_mode for local variables.
* cfgexpand.c (convert_debug_memory_address): Take a scalar_int_mode
instead of a machine_mode.
* combine.c (simplify_if_then_else): Use scalar_int_mode for local
variables.
(make_extraction): Likewise.
(try_widen_shift_mode): Take and return scalar_int_modes instead
of machine_modes.
* config/aarch64/aarch64.c (aarch64_libgcc_cmp_return_mode): Return
a scalar_int_mode instead of a machine_mode.
* config/avr/avr.c (avr_addr_space_address_mode): Likewise.
(avr_addr_space_pointer_mode): Likewise.
* config/cr16/cr16.c (cr16_unwind_word_mode): Likewise.
* config/msp430/msp430.c (msp430_addr_space_pointer_mode): Likewise.
(msp430_unwind_word_mode): Likewise.
* config/spu/spu.c (spu_unwind_word_mode): Likewise.
(spu_addr_space_pointer_mode): Likewise.
(spu_addr_space_address_mode): Likewise.
(spu_libgcc_cmp_return_mode): Likewise.
(spu_libgcc_shift_count_mode): Likewise.
* config/rl78/rl78.c (rl78_addr_space_address_mode): Likewise.
(rl78_addr_space_pointer_mode): Likewise.
(fl78_unwind_word_mode): Likewise.
(rl78_valid_pointer_mode): Take a scalar_int_mode instead of a
machine_mode.
* config/alpha/alpha.c (vms_valid_pointer_mode): Likewise.
* config/ia64/ia64.c (ia64_vms_valid_pointer_mode): Likewise.
* config/mips/mips.c (mips_mode_rep_extended): Likewise.
(mips_valid_pointer_mode): Likewise.
* config/tilegx/tilegx.c (tilegx_mode_rep_extended): Likewise.
* config/ft32/ft32.c (ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(ft32_addr_space_address_mode): Likewise.
* config/m32c/m32c.c (m32c_valid_pointer_mode): Take a
scalar_int_mode instead of a machine_mode.
(m32c_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(m32c_addr_space_address_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/rs6000/rs6000.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/s390/s390.c (s390_libgcc_cmp_return_mode): Likewise.
(s390_libgcc_shift_count_mode): Likewise.
(s390_unwind_word_mode): Likewise.
(s390_valid_pointer_mode): Take a scalar_int_mode rather than a
machine_mode.
* target.def (mode_rep_extended): Likewise.
(valid_pointer_mode): Likewise.
(addr_space.valid_pointer_mode): Likewise.
(eh_return_filter_mode): Return a scalar_int_mode rather than
a machine_mode.
(libgcc_cmp_return_mode): Likewise.
(libgcc_shift_count_mode): Likewise.
(unwind_word_mode): Likewise.
(addr_space.pointer_mode): Likewise.
(addr_space.address_mode): Likewise.
* doc/tm.texi: Regenerate.
* dojump.c (prefer_and_bit_test): Take a scalar_int_mode rather than
a machine_mode.
(do_jump): Use scalar_int_mode for local variables.
* dwarf2cfi.c (init_return_column_size): Take a scalar_int_mode
rather than a machine_mode.
* dwarf2out.c (convert_descriptor_to_mode): Likewise.
(scompare_loc_descriptor_wide): Likewise.
(scompare_loc_descriptor_narrow): Likewise.
* emit-rtl.c (adjust_address_1): Use scalar_int_mode for local
variables.
* except.c (sjlj_emit_dispatch_table): Likewise.
(expand_builtin_eh_copy_values): Likewise.
* explow.c (convert_memory_address_addr_space_1): Likewise.
Take a scalar_int_mode rather than a machine_mode.
(convert_memory_address_addr_space): Take a scalar_int_mode rather
than a machine_mode.
(memory_address_addr_space): Use scalar_int_mode for local variables.
* expmed.h (expand_mult_highpart_adjust): Take a scalar_int_mode
rather than a machine_mode.
* expmed.c (mask_rtx): Likewise.
(init_expmed_one_conv): Likewise.
(expand_mult_highpart_adjust): Likewise.
(extract_high_half): Likewise.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
(expand_smod_pow2): Likewise.
(expand_sdiv_pow2): Likewise.
(emit_store_flag_int): Likewise.
(adjust_bit_field_mem_for_reg): Use scalar_int_mode for local
variables.
(extract_low_bits): Likewise.
* expr.h (by_pieces_constfn): Take a scalar_int_mode rather than
a machine_mode.
* expr.c (pieces_addr::adjust): Likewise.
(can_store_by_pieces): Likewise.
(store_by_pieces): Likewise.
(clear_by_pieces_1): Likewise.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_addr_expr): Use scalar_int_mode for local variables.
(expand_expr_real_1): Likewise.
(try_casesi): Likewise.
* final.c (shorten_branches): Likewise.
* fold-const.c (fold_convert_const_int_from_fixed): Change the
type of "mode" to machine_mode.
* internal-fn.c (expand_arith_overflow_result_store): Take a
scalar_int_mode rather than a machine_mode.
(expand_mul_overflow): Use scalar_int_mode for local variables.
* loop-doloop.c (doloop_modify): Likewise.
(doloop_optimize): Likewise.
* optabs.c (expand_subword_shift): Take a scalar_int_mode rather
than a machine_mode.
(expand_doubleword_shift_condmove): Likewise.
(expand_doubleword_shift): Likewise.
(expand_doubleword_clz): Likewise.
(expand_doubleword_popcount): Likewise.
(expand_doubleword_parity): Likewise.
(expand_absneg_bit): Use scalar_int_mode for local variables.
(prepare_float_lib_cmp): Likewise.
* rtl.h (convert_memory_address_addr_space_1): Take a scalar_int_mode
rather than a machine_mode.
(convert_memory_address_addr_space): Likewise.
(get_mode_bounds): Likewise.
(get_address_mode): Return a scalar_int_mode rather than a
machine_mode.
* rtlanal.c (get_address_mode): Likewise.
* stor-layout.c (get_mode_bounds): Take a scalar_int_mode rather
than a machine_mode.
* targhooks.c (default_mode_rep_extended): Likewise.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
(default_eh_return_filter_mode): Return a scalar_int_mode rather
than a machine_mode.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
* targhooks.h (default_eh_return_filter_mode): Likewise.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
(default_mode_rep_extended): Take a scalar_int_mode rather than
a machine_mode.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Use scalar_int_mode for
local variables.
* tree-ssa-loop-ivopts.c (get_shiftadd_cost): Take a scalar_int_mode
rather than a machine_mode.
* tree-switch-conversion.c (array_value_type): Use scalar_int_mode
for local variables.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
* var-tracking.c (use_narrower_mode): Take a scalar_int_mode rather
than a machine_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251513
[60/77] Pass scalar_int_modes to do_jump_by_parts_*
The callers of do_jump_by_parts_* had already established
that the modes were MODE_INTs, so this patch passes the
modes down as scalar_int_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* dojump.c (do_jump_by_parts_greater_rtx): Change the type of
the mode argument to scalar_int_mode.
(do_jump_by_parts_zero_rtx): Likewise.
(do_jump_by_parts_equality_rtx): Likewise.
(do_jump_by_parts_greater): Take a mode argument.
(do_jump_by_parts_equality): Likewise.
(do_jump_1): Update calls accordingly.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251512
[59/77] Add a rtx_jump_table_data::get_data_mode helper
This patch adds a helper function to get the mode of the addresses
or offsets in a jump table. It also changes the final.c code to use
rtx_jump_table_data over rtx or rtx_insn in cases where it needed
to use the new helper. This in turn meant adding a safe_dyn_cast
equivalent of safe_as_a, to cope with null NEXT_INSNs.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* is-a.h (safe_dyn_cast): New function.
* rtl.h (rtx_jump_table_data::get_data_mode): New function.
(jump_table_for_label): Likewise.
* final.c (final_addr_vec_align): Take an rtx_jump_table_data *
instead of an rtx_insn *.
(shorten_branches): Use dyn_cast instead of LABEL_P and
JUMP_TABLE_DATA_P. Use jump_table_for_label and
rtx_jump_table_data::get_data_mode.
(final_scan_insn): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251511
[56/77] Use the more specific type when two modes are known to be equal
This patch adjusts a couple of cases in which we had established
that two modes were equal and happened to be using the one with the
more general type instead of the one with the more specific type.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_real_2): Use word_mode instead of innermode
when the two are known to be equal.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251508
[55/77] Use scalar_int_mode in simplify_const_unary_operation
The main scalar integer block in simplify_const_unary_operation
had the condition:
if (CONST_SCALAR_INT_P (op) && width > 0)
where "width > 0" was a roundabout way of testing != VOIDmode.
This patch replaces it with a check for a scalar_int_mode instead.
It also uses the number of bits in the input rather than the output
mode to determine the result of a "count ... bits in zero" operation.
(At the momemnt these modes have to be the same, but it still seems
conceptually wrong to use the number of bits in the output mode.)
The handling of float->integer ops also checked "width > 0",
but this was redundant with the earlier check for MODE_INT.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* simplify-rtx.c (simplify_const_unary_operation): Use
is_a <scalar_int_mode> instead of checking for a nonzero
precision. Forcibly convert op_mode to a scalar_int_mode
in that case. More clearly differentiate the operand and
result modes and use the former when deciding what the value
of a count-bits operation should be. Use is_int_mode instead
of checking for a MODE_INT. Remove redundant check for whether
this mode has a zero precision.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251507
[54/77] Add explicit int checks for alternative optab implementations
expand_unop can expand narrow clz, clrsb, ctz, bswap, parity and
ffs operations using optabs for wider modes. These expansions
apply only to scalar integer modes (and not for example to vectors),
so the patch adds explicit checks for that.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* optabs.c (widen_leading): Change the type of the mode argument
to scalar_int_mode. Use opt_scalar_int_mode for the mode iterator.
(widen_bswap): Likewise.
(expand_parity): Likewise.
(expand_ctz): Change the type of the mode argument to scalar_int_mode.
(expand_ffs): Likewise.
(epand_unop): Check for scalar integer modes before calling the
above routines.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251506
[53/77] Pass a mode to const_scalar_mask_from_tree
The caller of const_scalar_mask_from_tree has proven that
the mode is a MODE_INT, so this patch passes it down as a
scalar_int_mode. It also expands the comment a little.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[52/77] Use scalar_int_mode in extract/store_bit_field
After a certain point, extract_bit_field and store_bit_field
ensure that they're dealing with integer modes or BLKmode MEMs.
This patch uses scalar_int_mode and opt_scalar_int_mode for
those parts.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expmed.c (store_bit_field_using_insv): Add op0_mode and
value_mode arguments. Use scalar_int_mode internally.
(store_bit_field_1): Rename the new integer mode from imode
to op0_mode and use it instead of GET_MODE (op0). Update calls
to store_split_bit_field, store_bit_field_using_insv and
store_fixed_bit_field.
(store_fixed_bit_field): Add op0_mode and value_mode arguments.
Use scalar_int_mode internally. Use a bit count rather than a mode
when calculating the largest bit size for get_best_mode.
Update calls to store_split_bit_field and store_fixed_bit_field_1.
(store_fixed_bit_field_1): Add mode and value_mode arguments.
Remove assertion that OP0 has a scalar integer mode.
(store_split_bit_field): Add op0_mode and value_mode arguments.
Update calls to extract_fixed_bit_field.
(extract_bit_field_using_extv): Add an op0_mode argument.
Use scalar_int_mode internally.
(extract_bit_field_1): Rename the new integer mode from imode to
op0_mode and use it instead of GET_MODE (op0). Update calls to
extract_split_bit_field, extract_bit_field_using_extv and
extract_fixed_bit_field.
(extract_fixed_bit_field): Add an op0_mode argument. Update calls
to extract_split_bit_field and extract_fixed_bit_field_1.
(extract_fixed_bit_field_1): Add a mode argument. Remove assertion
that OP0 has a scalar integer mode. Use as_a <scalar_int_mode>
on the target mode.
(extract_split_bit_field): Add an op0_mode argument. Update call
to extract_fixed_bit_field.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251504
[51/77] Use opt_scalar_int_mode when iterating over integer modes
This patch uses opt_scalar_int_mode rather than machine_mode
when iterating over scalar_int_modes, in cases where that helps
with future patches. (Using machine_mode is still OK in places
that don't really care about the mode being a scalar integer.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* cse.c (cse_insn): Use opt_scalar_int_mode for the mode iterator.
* explow.c (hard_function_value): Likewise.
* expmed.c (extract_fixed_bit_field_1): Likewise. Move the
convert_to_mode call outside the loop.
* expr.c (alignment_for_piecewise_move): Use opt_scalar_int_mode
for the mode iterator. Require the mode specified by max_pieces
to exist.
(emit_block_move_via_movmem): Use opt_scalar_int_mode for the
mode iterator.
(copy_blkmode_to_reg): Likewise.
(set_storage_via_setmem): Likewise.
* optabs.c (prepare_cmp_insn): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* stor-layout.c (finish_bitfield_representative): Likewise.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use opt_scalar_int_mode for
the mode iterator.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251503
[50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs
When subregs contain promoted values, as indicated by
SUBREG_PROMOTED_VAR_P, both the unpromoted (outer) and
promoted (inner) values are known to be scalar integers.
This patch adds helper routines that get the modes as
scalar_int_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (subreg_unpromoted_mode, subreg_promoted_mode): New functions.
* expr.c (convert_move): Use them.
(convert_modes): Likewise.
(store_expr_with_bounds): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251502
The two implementations of the reg_nonzero_bits and reg_num_sign_bits
hooks ignored the "known_x", "known_mode" and "known_ret" arguments,
so this patch removes them. It adds a new scalar_int_mode parameter
that specifies the mode of "x". (This mode might be different from
"mode", which is the mode in which "x" is used.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (rtl_hooks::reg_nonzero_bits): Add a scalar_int_mode
parameter for the mode of "x". Remove the "known_x", "known_mode"
and "known_ret" arguments. Change the type of the mode argument
to scalar_int_mode.
(rtl_hooks:reg_num_sign_bit_copies): Likewise.
* combine.c (reg_nonzero_bits_for_combine): Update accordingly.
(reg_num_sign_bit_copies_for_combine): Likewise.
* rtlanal.c (nonzero_bits1): Likewise.
(num_sign_bit_copies1): Likewise.
* rtlhooks-def.h (reg_nonzero_bits_general): Likewise.
(reg_num_sign_bit_copies_general): Likewise.
* rtlhooks.c (reg_num_sign_bit_copies_general): Likewise.
(reg_nonzero_bits_general): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251501
[48/77] Make subroutines of num_sign_bit_copies operate on scalar_int_mode
Similarly to the nonzero_bits patch, this one moves the mode
class check and VOIDmode handling from num_sign_bit_copies1
to num_sign_bit_copies itself, then changes the subroutines
to operate on scalar_int_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (num_sign_bit_copies): Handle VOIDmode here rather
than in subroutines. Return 1 for non-integer modes.
(cached_num_sign_bit_copies): Change the type of the mode parameter
to scalar_int_mode.
(num_sign_bit_copies1): Likewise. Remove early exit for other mode
classes. Handle CONST_INT_P first and then check whether X also
has a scalar integer mode. Check the same thing for inner registers
of a SUBREG and for values that are being extended or truncated.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251500
[47/77] Make subroutines of nonzero_bits operate on scalar_int_mode
nonzero_bits1 assumed that all bits of a floating-point or vector mode
were needed. It seems likely that fixed-point modes should have been
handled in the same way. After excluding those, the only remaining
modes that are likely to be useful are scalar integer ones.
This patch moves the mode class check to nonzero_bits itself, along
with the handling of mode == VOIDmode. The subroutines of nonzero_bits
can then take scalar_int_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtlanal.c (nonzero_bits): Handle VOIDmode here rather than
in subroutines. Return the mode mask for non-integer modes.
(cached_nonzero_bits): Change the type of the mode parameter
to scalar_int_mode.
(nonzero_bits1): Likewise. Remove early exit for other mode
classes. Handle CONST_INT_P first and then check whether X
also has a scalar integer mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251499
[46/77] Make widest_int_mode_for_size return a scalar_int_mode
The comment for widest_int_mode said that it returns "the widest integer
mode no wider than SIZE", but it actually returns the widest integer
mode that is narrower than SIZE. In practice SIZE is always greater
than 1, so it can always pick QImode in the worst case. The VOIDmode
paths seem to be dead.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* expr.c (widest_int_mode_for_size): Make the comment match the code.
Return a scalar_int_mode and assert that the size is greater than
one byte.
(by_pieces_ninsns): Update accordingly and remove VOIDmode handling.
(op_by_pieces_d::op_by_pieces_d): Likewise.
(op_by_pieces_d::run): Likewise.
(can_store_by_pieces): Likewise.
[45/77] Make extract_left_shift take a scalar_int_mode
This patch passes the mode of the shifted value to extract_left_shift
and updates the only caller so that the mode is a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (extract_left_shift): Add a mode argument and update
recursive calls.
(make_compound_operation_int): Change the type of the mode parameter
to scalar_int_mode and update the call to extract_left_shift.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251497
[44/77] Make simplify_and_const_int take a scalar_int_mode
After previous patches, top-level calls to simplify_and_const_int
always pass a scalar_int_mode. The only call site that needs to
be updated is the recursive one in simplify_and_const_int_1,
at which point we know "varop" has a scalar integer mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_and_const_int): Change the type of the mode
parameter to scalar_int_mode.
(simplify_and_const_int_1): Likewise. Update recursive call.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251496
So VOIDmode is only acceptable when comparing a COMPARE,
EQ, NE, etc. operand against a constant. After this, the loop
calls simplify_compare_const to:
(a) bring the constant op1 closer to 0 where possible and
(b) use nonzero_bits and num_sign_bit_copies to get a simpler
constant.
(a) works for both integer and VOID modes, (b) is specific
to integer modes.
The loop then has a big switch statement that handles further
simplifications. This switch statement checks for COMPARISON_P
codes but not for COMPARE.
This patch uses scalar_int_mode to make the split between
(a) and (b) more explicit. It also takes the COMPARISON_P
handling out of the switch statement and does it first,
so that the rest of the loop can treat the mode as a
scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_compare_const): Check that the mode is a
scalar_int_mode (rather than VOIDmode) before testing its
precision.
(simplify_comparison): Move COMPARISON_P handling out of the
loop and restrict the latter part of the loop to scalar_int_modes.
Check is_a <scalar_int_mode> before calling HWI_COMPUTABLE_MODE_P
and when considering SUBREG_REGs. Use is_int_mode instead of
checking GET_MODE_CLASS against MODE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251495
[42/77] Use scalar_int_mode in simplify_shift_const_1
This patch makes simplify_shift_const_1 use scalar_int_modes
for all code that is specific to scalars rather than vectors.
This includes situations in which the new shift mode is different
from the original one, since the function never changes the mode
of vector shifts. That in turn makes it more natural to test for
equal modes in simplify_shift_const_1 rather than try_widen_shift_mode
(which only applies to scalars).
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (try_widen_shift_mode): Move check for equal modes to...
(simplify_shift_const_1): ...here. Use scalar_int_mode for
shift_unit_mode and for modes involved in scalar shifts.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251494
[41/77] Split scalar integer handling out of force_to_mode
force_to_mode exits partway through for modes that aren't scalar
integers. This patch splits the remainder of the function out
into a subroutine, force_int_to_mode, so that the modes from that
point on can have type scalar_int_mode.
The patch also makes sure that xmode is kept up-to-date with x
and uses xmode instead of GET_MODE (x) throughout.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (force_int_to_mode): New function, split out from...
(force_to_mode): ...here. Keep xmode up-to-date and use it
instead of GET_MODE (x).
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251493
[40/77] Use scalar_int_mode for extraction_insn fields
insv, extv and eztzv modify or read a field in a register or
memory. The field always has a scalar integer mode, while the
register or memory either has a scalar integer mode or BLKmode.
The mode of the bit position is also a scalar integer.
This patch uses the type system to make that explicit.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* optabs-query.h (extraction_insn::struct_mode): Change type to
opt_scalar_int_mode and update comment.
(extraction_insn::field_mode): Change type to scalar_int_mode.
(extraction_insn::pos_mode): Likewise.
* combine.c (make_extraction): Update accordingly.
* optabs-query.c (get_traditional_extraction_insn): Likewise.
(get_optab_extraction_insn): Likewise.
* recog.c (simplify_while_replacing): Likewise.
* expmed.c (narrow_bit_field_mem): Change the type of the mode
parameter to opt_scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251492
[39/77] Two changes to the get_best_mode interface
get_best_mode always returns a scalar_int_mode on success,
so this patch makes that explicit in the type system. Also,
the "largest_mode" argument is used simply to provide a maximum
size, and in practice that size is always a compile-time constant,
even when the concept of variable-sized modes is added later.
The patch therefore passes the size directly.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (bit_field_mode_iterator::next_mode): Take a pointer
to a scalar_int_mode instead of a machine_mode.
(bit_field_mode_iterator::m_mode): Change type to opt_scalar_int_mode.
(get_best_mode): Return a boolean and use a pointer argument to store
the selected mode. Replace the limit mode parameter with a bit limit.
* expmed.c (adjust_bit_field_mem_for_reg): Use scalar_int_mode
for the values returned by bit_field_mode_iterator::next_mode.
(store_bit_field): Update call to get_best_mode.
(store_fixed_bit_field): Likewise.
(extract_fixed_bit_field): Likewise.
* expr.c (optimize_bitfield_assignment_op): Likewise.
* fold-const.c (optimize_bit_field_compare): Likewise.
(fold_truth_andor_1): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): As above.
Update for new type of m_mode.
(get_best_mode): As above.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251491
[38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p
strict_volatile_bitfield_p returns false for any mode that isn't
a scalar integer. This patch moves the check to the caller and
makes strict_volatile_bitfield_p take the mode as a scalar_int_mode.
The handling of a true return can then also use the mode as a
scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expmed.c (strict_volatile_bitfield_p): Change the type of fieldmode
to scalar_int_mode. Remove check for SCALAR_INT_MODE_P.
(store_bit_field): Check is_a <scalar_int_mode> before calling
strict_volatile_bitfield_p.
(extract_bit_field): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251490
cstore patterns always have a scalar integer result, which has the
value 0 for "false" and STORE_FLAG_VALUE for "true". This patch
makes that explicit using scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (cstore_mode): Return a scalar_int_mode.
* doc/tm.texi: Regenerate.
* config/sparc/sparc.c (sparc_cstore_mode): Return a scalar_int_mode.
* targhooks.h (default_cstore_mode): Likewise.
* targhooks.c (default_cstore_mode): Likewise, using a forced
conversion.
* expmed.c (emit_cstore): Expect the target of the cstore to be
a scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251489
[36/77] Use scalar_int_mode in the RTL iv routines
This patch changes the iv modes in rtx_iv from machine_mode
to scalar_int_mode. It also passes the mode of the iv down
to subroutines; this avoids the previous situation in which
the mode information was sometimes lost and had to be added
by the caller on return.
Some routines already took a mode argument, but the patch
tries to standardise on passing it immediately before the
argument it describes.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* cfgloop.h (rtx_iv): Change type of extend_mode and mode to
scalar_int_mode.
(niter_desc): Likewise mode.
(iv_analyze): Add a mode parameter.
(biv_p): Likewise.
(iv_analyze_expr): Pass the mode paraeter before the rtx it describes
and change its type to scalar_int_mode.
* loop-iv.c: Update commentary at head of file.
(iv_constant): Pass the mode paraeter before the rtx it describes
and change its type to scalar_int_mode. Remove VOIDmode handling.
(iv_subreg): Change the type of the mode parameter to scalar_int_mode.
(iv_extend): Likewise.
(shorten_into_mode): Likewise.
(iv_add): Use scalar_int_mode.
(iv_mult): Likewise.
(iv_shift): Likewise.
(canonicalize_iv_subregs): Likewise.
(get_biv_step_1): Pass the outer_mode parameter before the rtx
it describes and change its mode to scalar_int_mode. Also change
the type of the returned inner_mode to scalar_int_mode.
(get_biv_step): Likewise, turning outer_mode from a pointer
into a direct parameter. Update call to get_biv_step_1.
(iv_analyze_biv): Add an outer_mode parameter. Update calls to
iv_constant and get_biv_step.
(iv_analyze_expr): Pass the mode parameter before the rtx it describes
and change its type to scalar_int_mode. Don't initialise iv->mode
to VOIDmode and remove later checks for its still being VOIDmode.
Update calls to iv_analyze_op and iv_analyze_expr. Check
is_a <scalar_int_mode> when changing the mode under consideration.
(iv_analyze_def): Ignore registers that don't have a scalar_int_mode.
Update call to iv_analyze_expr.
(iv_analyze_op): Add a mode parameter. Reject subregs whose
inner register is not also a scalar_int_mode. Update call to
iv_analyze_biv.
(iv_analyze): Add a mode parameter. Update call to iv_analyze_op.
(biv_p): Add a mode parameter. Update call to iv_analyze_biv.
(iv_number_of_iterations): Use is_a <scalar_int_mode> instead of
separate mode class checks. Update calls to iv_analyze. Remove
fix-up of VOIDmodes after iv_analyze_biv.
* loop-unroll.c (analyze_iv_to_split_insn): Reject registers that
don't have a scalar_int_mode. Update call to biv_p.
[32/77] Check is_a <scalar_int_mode> before calling valid_pointer_mode
A future patch will make valid_pointer_mode take a scalar_int_mode
instead of a machine_mode. is_a <...> rather than as_a <...> is
needed here because we're checking a mode supplied by the user.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/c-family/
* c-attribs.c (handle_mode_attribute): Check for a scalar_int_mode
before calling targetm.addr_space.valid_pointer_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251484
The postreload move2add optimisations are specific to scalar
integers. This patch adds an explicit check to the main guarding
"if" and propagates the information through subroutines.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* postreload.c (move2add_valid_value_p): Change the type of the
mode parameter to scalar_int_mode.
(move2add_use_add2_insn): Add a mode parameter and use it instead
of GET_MODE (reg).
(move2add_use_add3_insn): Likewise.
(reload_cse_move2add): Update accordingly.
This patch uses is_a <scalar_int_mode> in a couple of places that
were splitting doubleword integer operations into word_mode
operations. It also uses scalar_int_mode in the expand_expr_real_2
handling of doubleword shifts.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* expr.c (expand_expr_real_2): Use scalar_int_mode for the
double-word mode.
* lower-subreg.c (resolve_shift_zext): Use is_a <scalar_int_mode>.
* optabs.c (expand_unop): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251482
[29/77] Make some *_loc_descriptor helpers take scalar_int_mode
The *_loc_descriptor routines for clz, popcount, bswap and rotate
all required SCALAR_INT_MODE_P. This patch moves the checks into
the caller (mem_loc_descriptor) so that the types of the mode
parameters can be scalar_int_mode instead of machine_mode.
The MOD handling in mem_loc_descriptor is also specific to
scalar integer modes. Adding an explicit check allows
typed_binop to take a scalar_int_mode too.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* dwarf2out.c (typed_binop): Change mode parameter to scalar_int_mode.
(clz_loc_descriptor): Likewise. Remove SCALAR_INT_MODE_P check.
(popcount_loc_descriptor): Likewise.
(bswap_loc_descriptor): Likewise.
(rotate_loc_descriptor): Likewise.
(mem_loc_descriptor): Add is_a <scalar_int_mode> checks before
calling the functions above.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251481
[28/77] Use is_a <scalar_int_mode> for miscellaneous types of test
This patch adds is_a <scalar_int_mode> checks to various places
that were explicitly or implicitly restricted to integers already,
in cases where adding an explicit is_a <scalar_int_mode> is useful
for later patches.
In simplify_if_then_else, the:
GET_MODE (XEXP (XEXP (t, 0), N))
expressions were equivalent to:
GET_MODE (XEXP (t, 0))
due to the type of operation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP
This patch adds is_a <scalar_int_mode> checks before load_extend_op/
LOAD_EXTEND_OP calls, if that becomes useful for later patches.
(load_extend_op will return UNKNOWN for any other type of mode.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications
This patch adds is_a <scalar_int_mode> checks to various places that
were optimising subregs or extractions in ways that only made sense
for scalar integers. Often the subreg transformations were looking
for extends, truncates or shifts and trying to remove the subreg, which
wouldn't be correct if the SUBREG_REG was a vector rather than a scalar.
The simplify_binary_operation_1 part also removes a redundant:
GET_MODE (opleft) == GET_MODE (XEXP (opright, 0))
since this must be true for:
(ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[25/77] Use is_a <scalar_int_mode> for bitmask optimisations
Explicitly check for scalar_int_mode in code that maps arithmetic
to full-mode bit operations. These operations wouldn't work correctly
for vector modes, for example. In many cases this is enforced also by
checking whether an operand is CONST_INT_P, but there were other cases
where the condition is more indirect.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[24/77] Replace a != BLKmode check with is_a <scalar_int_mode>
This patch replaces a check against BLKmode with a check
of is_a <scalar_int_mode>, in a case where scalar integer
modes were the only useful alternatives left.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* gimple-fold.c (gimple_fold_builtin_memory_op): Use
is_a <scalar_int_mode> instead of != BLKmode.
[23/77] Replace != VOIDmode checks with is_a <scalar_int_mode>
This patch replaces some checks against VOIDmode with checks
of is_a <scalar_int_mode>, in cases where scalar integer modes
were the only useful alternatives left.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>
This patch replaces some checks of !VECTOR_MODE_P with checks
of is_a <scalar_int_mode>, in cases where the scalar integer
modes were the only useful alternatives left.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* simplify-rtx.c (simplify_binary_operation_1): Use
is_a <scalar_int_mode> instead of !VECTOR_MODE_P.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251474
[21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode>
This patch replaces checks of "SCALAR_INT_MODE_P (...)" with
"is_a <scalar_int_mode> (..., &var)" in cases where it becomes
useful to refer to the mode as a scalar_int_mode. It also
replaces some checks for the two constituent classes (MODE_INT
and MODE_PARTIAL_INT).
The patch also introduces is_a <scalar_int_mode> checks for some
uses of HWI_COMPUTABLE_MODE_P, which is a subcondition of
SCALAR_INT_MODE_P.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
Replace checks of "GET_MODE_CLASS (...) == MODE_INT" with
"is_int_mode (..., &var)", in cases where it becomes useful
to refer to the mode as a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
[19/77] Add a smallest_int_mode_for_size helper function
This patch adds a wrapper around smallest_mode_for_size
for cases in which the mode class is MODE_INT. Unlike
(int_)mode_for_size, smallest_mode_for_size always returns
a mode of the specified class, asserting if no such mode exists.
smallest_int_mode_for_size therefore returns a scalar_int_mode
rather than an opt_scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
This patch adds a wrapper around mode_for_size for cases in which
the mode class is MODE_INT (the commonest case). The return type
can then be an opt_scalar_int_mode instead of a machine_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
This patch adds a POD class for scalar integers, as an instance
of a new pod_mode template. Later patches will use pod_mode in
situations that really do need to be POD; this patch is simply
using PODs to remove load-time initialisation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (pod_mode): New type.
(scalar_int_mode_pod): New typedef.
* machmode.h (pod_mode): New class.
(int_n_data_t::m): Change type to scalar_int_mode_pod.
* genmodes.c (emit_mode_int_n): Update accordingly.
* lower-subreg.h (target_lower_subreg): Change type to
scalar_int_mode_pod.
* gdbhooks.py (build_pretty_printer): Handle pod_mode and
scalar_int_mode_pod.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251468
Similar to the previous scalar_float_mode patch, but for modes that
satisfy SCALAR_INT_MODE_P. There are very many uses of scalar integers,
so this patch only makes a token change to the types of byte_mode,
word_mode, ptr_mode and rs6000_pmode. The next patches in the series
gradually replace more uses.
The patch also removes and adds casts to some target-specific code
due to the new types of SImode, DImode and Pmode.
The as_a <scalar_int_mode> goes away in a later patch.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/powerpcspe/powerpcspe.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/powerpcspe/powerpcspe.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/rs6000/rs6000.h (rs6000_pmode): Change type from
machine_mode to scalar_int_mode.
* config/rs6000/rs6000.c (rs6000_pmode): Likewise.
(rs6000_option_override_internal): Remove cast to int.
* config/s390/s390.h (Pmode): Remove cast to machine_mode.
* config/epiphany/epiphany.h (RTX_OK_FOR_OFFSET_P): Add cast
to machine_mode.
* config/s390/s390.c (s390_expand_builtin): Likewise.
* coretypes.h (scalar_int_mode): New type.
(opt_scalar_int_mode): New typedef.
* machmode.h (scalar_int_mode): New class.
(scalar_int_mode::includes_p): New function.
(byte_mode): Change type to scalar_int_mode.
(word_mode): Likewise.
(ptr_mode): Likewise.
* emit-rtl.c (byte_mode): Likewise.
(word_mode): Likewise.
(ptr_mode): Likewise.
(init_derived_machine_modes): Update accordingly.
* genmodes.c (get_mode_class): Return scalar_int_mode for MODE_INT
and MODE_PARTIAL_INT.
* gdbhooks.py (build_pretty_printer): Handle scalar_int_mode and
opt_scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251467
[12/77] Use opt_scalar_float_mode when iterating over float modes
This means that we know when accessing the modes that the size is
a compile-time constant, even for SVE. It also enables stricter
type safety in later patches.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_iterator::start): Provide overload for opt_modes.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
* expr.c (init_expr_target): Use opt_scalar_float_mode.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use opt_scalar_float_mode.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-cppbuiltin.c (c_cpp_builtins): Use opt_scalar_float_mode.
gcc/fortran/
* trans-types.c (gfc_init_kinds): Use opt_scalar_float_mode
and FOR_EACH_MODE_IN_CLASS.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251464
projects / thirdparty / gcc.git / log
