David Malcolm [Thu, 14 Sep 2023 20:28:45 +0000 (16:28 -0400)]
diagnostics: support multithreaded diagnostic paths
This patch extends the existing diagnostic_path class so that as well
as list of events, there is a list of named threads, with each event
being associated with one of the threads.
No GCC diagnostics take advantage of this, but GCC plugins may find a
use for this; an example is provided in the testsuite.
Given that there is still a single list of events within a
diagnostic_path, the events in a diagnostic_path have a specific global
ordering even if they are in multiple threads.
Within the SARIF serialization, the patch adds the "executionOrder"
property to threadFlowLocation objects (SARIF v2.1.0 3.38.11). This is
1-based in order to match the human-readable numbering of events shown
in messages emitted by pretty-printer.cc's "%@".
With -fdiagnostics-path-format=separate-events, the threads are not
shown.
With -fdiagnostics-path-format=inline-events, the threads and the
per-thread stack activity are tracked and visalized separately. An
example can be seen in the testsuite.
gcc/analyzer/ChangeLog:
* checker-event.h (checker_event::get_thread_id): New.
* checker-path.h (class checker_path): Implement thread-related
vfuncs via a single simple_diagnostic_thread instance named
"main".
gcc/ChangeLog:
* diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
* diagnostic-format-sarif.cc (class sarif_thread_flow): New.
(sarif_thread_flow::sarif_thread_flow): New.
(sarif_builder::make_code_flow_object): Reimplement, creating
per-thread threadFlow objects, populating them with the relevant
events.
(sarif_builder::make_thread_flow_object): Delete, moving the
code into sarif_builder::make_code_flow_object.
(sarif_builder::make_thread_flow_location_object): Add
"path_event_idx" param. Use it to set "executionOrder"
property.
* diagnostic-path.h (diagnostic_event::get_thread_id): New
pure-virtual vfunc.
(class diagnostic_thread): New.
(diagnostic_path::num_threads): New pure-virtual vfunc.
(diagnostic_path::get_thread): New pure-virtual vfunc.
(diagnostic_path::multithreaded_p): New decl.
(simple_diagnostic_event::simple_diagnostic_event): Add optional
thread_id param.
(simple_diagnostic_event::get_thread_id): New accessor.
(simple_diagnostic_event::m_thread_id): New.
(class simple_diagnostic_thread): New.
(simple_diagnostic_path::simple_diagnostic_path): Move definition
to diagnostic.cc.
(simple_diagnostic_path::num_threads): New.
(simple_diagnostic_path::get_thread): New.
(simple_diagnostic_path::add_thread): New.
(simple_diagnostic_path::add_thread_event): New.
(simple_diagnostic_path::m_threads): New.
* diagnostic-show-locus.cc (layout::layout): Add pretty_printer
param for overriding the context's printer.
(diagnostic_show_locus): Likwise.
* diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
Move here from diagnostic-path.h. Add main thread.
(simple_diagnostic_path::num_threads): New.
(simple_diagnostic_path::get_thread): New.
(simple_diagnostic_path::add_thread): New.
(simple_diagnostic_path::add_thread_event): New.
(simple_diagnostic_event::simple_diagnostic_event): Add thread_id
param and use it to initialize m_thread_id. Reformat.
* diagnostic.h: Add pretty_printer param for overriding the
context's printer.
* tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
(can_consolidate_events): Compare thread ids.
(class per_thread_summary): New.
(event_range::event_range): Add per_thread_summary arg.
(event_range::print): Add "pp" param and use it rather than dc's
printer.
(event_range::m_thread_id): New field.
(event_range::m_per_thread_summary): New field.
(path_summary::multithreaded_p): New.
(path_summary::get_events_for_thread_id): New.
(path_summary::m_per_thread_summary): New field.
(path_summary::m_thread_id_to_events): New field.
(path_summary::get_or_create_events_for_thread_id): New.
(path_summary::path_summary): Create per_thread_summary instances
as needed and associate the event_range instances with them.
(base_indent): Move here from print_path_summary_as_text.
(per_frame_indent): Likewise.
(class thread_event_printer): New, adapted from parts of
print_path_summary_as_text.
(print_path_summary_as_text): Make static. Reimplement to
moving most of existing code to class thread_event_printer,
capturing state as per-thread as appropriate.
(default_tree_diagnostic_path_printer): Add missing 'break' on
final case.
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic-test-paths-multithreaded-inline-events.c:
New test.
* gcc.dg/plugin/diagnostic-test-paths-multithreaded-sarif.c: New
test.
* gcc.dg/plugin/diagnostic-test-paths-multithreaded-separate-events.c:
New test.
* gcc.dg/plugin/diagnostic_plugin_test_paths.c: Add support for
generating multithreaded paths.
* gcc.dg/plugin/plugin.exp: Add the new tests.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Thu, 14 Sep 2023 20:28:44 +0000 (16:28 -0400)]
ggc, jit: forcibly clear GTY roots in jit
As part of Antoyo's work on supporting LTO in rustc_codegen_gcc, he
noticed an ICE inside libgccjit when compiling certain rust files.
Debugging libgccjit showed that outdated information from a previous
in-memory compile was referring to ad-hoc locations in the previous
compile's line_table.
The issue turned out to be the function decls in internal_fn_fnspec_array
from the previous compile keeping alive the symtab nodes for these
functions, and from this finding other functions in the previous
compile, walking their CFGs, and finding ad-hoc data pointers in an edge
with a location_t using ad-hoc data from the previous line_table
instance, and thus a use-after-free ICE attempting to use this ad-hoc
data.
Previously in toplev::finalize we've fixed global state "piecemeal" by
calling out to individual source_name_cc_finalize functions. However,
it occurred to me that we have run-time information on where the
GTY-marked pointers are.
Hence this patch takes something of a "big hammer" approach by adding a
new ggc_common_finalize that walks the GC roots, zeroing all of the
pointers. I stepped through this in the debugger and observed that, in
particular, this correctly zeroes the internal_fn_fnspec_array at the end
of a libgccjit compile. Antoyo reports that this fixes the ICE for him.
Doing so uncovered an ICE with libgccjit in dwarf2cfi.cc due to reuse of
global variables from the previous compile, which this patch also fixes.
I noticed that in ggc_mark_roots when clearing deletable roots we only
clear the initial element in each gcc_root_tab_t. This looks like a
latent bug to me, which the patch fixes. That said, there don't seem to
be any deletable roots where the number of elements != 1.
gcc/ChangeLog:
* dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
* dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
* ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
clearing the deletable gcc_root_tab_t.
(ggc_common_finalize): New.
* ggc.h (ggc_common_finalize): New decl.
* toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
ggc_common_finalize.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Gaius Mulley [Thu, 14 Sep 2023 18:35:24 +0000 (19:35 +0100)]
modula2: introduce case checking when switching on subranges
This patch extends the -Wcase-enum warning to catch missing elements
from subranges. The patch also includes removal of unused parameters
from M2SymInit.mod and M2CaseList.mod.
gcc/m2/ChangeLog:
* gm2-compiler/M2CaseList.mod (appendString): New procedure.
(appendEnum): Re-implement.
(NoOfSetElements): New procedure function.
(isPrintableChar): New procedure function.
(appendTree): New procedure.
(SubrangeErrors): New procedure.
(EmitMissingRangeErrors): Call SubrangeErrors if appropriate.
* gm2-compiler/M2SymInit.mod (SetFieldInitializedNo): Avoid
using a temporary variable once.
(IsLocalVar): Comment out.
(RecordContainsVarient): Remove fieldtype.
(GenerateNoteFlow): Remove lst parameter.
(CheckDeferredRecordAccess): Remove lst parameter.
(CheckUnary): Remove lst parameter. Remove procSym.
(CheckBinary): Remove lst parameter. Remove procSym.
(CheckIndrX): Remove lst parameter. Remove procSym.
(CheckXIndr): Remove bblst and procSym parameters.
(CheckRecordField): Remove procSym, op1tok, op2tok and op2.
(CheckBecomes): Remove procSym and bblst.
(CheckComparison): Remove procSym and bblst.
(CheckAddr): Remove procSym parameter.
* gm2-gcc/m2expr.cc (m2expr_CSTIntToString): New function.
(m2expr_CSTIntToChar): New function.
* gm2-gcc/m2expr.def (CSTIntToString): New procedure function
declaration.
(CSTIntToChar): New procedure function declaration.
* gm2-gcc/m2expr.h (m2expr_CSTIntToChar): New prototype.
(m2expr_CSTIntToString): New prototype.
gcc/testsuite/ChangeLog:
* gm2/switches/case/fail/subrangecase.mod: New test.
* gm2/switches/case/fail/subrangecase2.mod: New test.
* gm2/switches/case/fail/subrangecase3.mod: New test.
* gm2/switches/case/fail/subrangecase4.mod: New test.
* gm2/switches/case/fail/subrangecase5.mod: New test.
* gm2/switches/case/fail/subrangecase6.mod: New test.
* gm2/switches/case/pass/subrangecase.mod: New test.
* gm2/switches/case/pass/subrangecase2.mod: New test.
* gm2/switches/case/pass/subrangecase3.mod: New test.
* gm2/switches/case/pass/subrangecase4.mod: New test.
[RA]: Improve cost calculation of pseudos with equivalences
RISCV target developers reported that RA can spill pseudo used in a
loop although there are enough registers to assign. It happens when
the pseudo has an equivalence outside the loop and the equivalence is
not merged into insns using the pseudo. IRA sets up that memory cost
to zero when the pseudo has an equivalence and it means that the
pseudo will be probably spilled. This approach worked well for i686
(different approaches were benchmarked long time ago on spec2k).
Although common sense says that the code is wrong and this was
confirmed by RISCV developers.
I've tried the following patch on I7-9700k and it improved spec17 fp
by 1.5% (21.1 vs 20.8) although spec17 int is a bit worse by 0.45%
(8.54 vs 8.58). The average generated code size is practically the
same (0.001% difference).
In the future we probably need to try more sophisticated cost
calculation which should take into account that the equiv can not be
combined in usage insns and the costs of reloads because of this.
gcc/ChangeLog:
* ira-costs.cc (find_costs_and_classes): Decrease memory cost
by equiv savings.
The reason for the change is that the semantics of the previous pattern is incorrect.
GCC does not have a standard rtx code to express the reduction calculation process.
It makes more sense to use UNSPEC.
Further, all reduction icode are geted by the UNSPEC and MODE (code_for_pred (unspec, mode)),
so that all reduction patterns can have a uniform icode name. After this adjust, widen_reducop
and widen_freducop are redundant.
RISC-V: Cleanup redundant reduction patterns after refactor vector mode
This patch cleanups redundant reduction patterns after Juzhe change vector mode
from fixed-size to scalable-size. For example, whether it is zvl32b, zvl64b,
zvl128b, RVVM1SI indicates that it occupies a vector register. Therefore, it is
easy to map vector modes to LMUL1 vector modes with define_mode_attr without
creating a separate pattern for each LMUL1 Mode. For example, this patch can
combine four patterns (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>,
@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>
@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>,
@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>) to a single pattern
@pred_reduc_<reduc><mode>.
AArch64 previously costed WHILELO instructions on the first call
to add_stmt_cost. This was because, at the time, only add_stmt_cost
had access to the loop_vec_info.
However, after the AVX512 changes, we only calculate the masks later.
This patch moves the WHILELO costing to finish_cost, which is in any
case a more logical place for it to be. It also means that we can
check the final decision about whether to use predicated loops.
gcc/
* config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
Move WHILELO handling to...
(aarch64_vector_costs::finish_cost): ...here. Check whether the
vectorizer has decided to use a predicated loop.
gcc/testsuite/
* gcc.target/aarch64/sve/cost_model_15.c: New test.
Andrew Pinski [Wed, 13 Sep 2023 23:50:33 +0000 (16:50 -0700)]
MATCH: Support `(a != (CST+1)) & (a > CST)` optimizations
Even though this is done via reassocation, match can support
these with a simple change to detect that the difference is just
one. This allows to optimize these earlier and even during phiopt
for an example.
This patch adds the following cases:
(a != (CST+1)) & (a > CST) -> a > (CST+1)
(a != (CST-1)) & (a < CST) -> a < (CST-1)
(a == (CST-1)) | (a >= CST) -> a >= (CST-1)
(a == (CST+1)) | (a <= CST) -> a <= (CST+1)
Canonicalizations of comparisons causes this case to show up more.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/106164
gcc/ChangeLog:
* match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
Expand to support constants that are off by one.
gcc/testsuite/ChangeLog:
* gcc.dg/pr21643.c: Update test now that match does
the combing of the comparisons.
* gcc.dg/tree-ssa/cmpbit-5.c: New test.
* gcc.dg/tree-ssa/phi-opt-35.c: New test.
Andrew Pinski [Wed, 12 Jul 2023 05:14:18 +0000 (22:14 -0700)]
Improve error message for if with an else part while in switch
While writing some match.pd code, I was trying to figure
out why I was getting an `expected ), got (` error message
while writing an if statement with an else clause. For switch
statements, the if statements cannot have an else clause so
it would be better to have a decent error message saying that
explictly.
OK? Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* genmatch.cc (parser::parse_result): For an else clause
of an if statement inside a switch, error out explictly.
* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS tests.
* gcc.target/riscv/rvv/autovec/vls/cmp-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-3.c: New test.
Jonathan Wakely [Wed, 13 Sep 2023 09:57:08 +0000 (10:57 +0100)]
libstdc++: Support dg-additional-files in tests
Some tests rely on text files with specific content being present in the
test directory. This has historically been done by copying
testsuite/data/*.tst and testsuite/data/*.txt to the test dir at the
start, in the libstdc++_init procedure. Some tests modify their data
files, so if the same test runs more than once in the same directory the
second and subsequent tests will see the modified files, and FAIL
because the content of the file is not in the expected state.
This change adds support for the dg-additional-files directive from the
main compiler testsuite and changes v3_target_compile to copy the
specified files to the directory where the test will run. This ensures
that a fresh copy of the files is present each time the test runs.
Eventually all tests could be transitioned to use dg-additional-files
and then libstdc++_init could be changed to remove the initial copy of
all files. This change only adds dg-additional-files to the tests that
modify their files and FAIL when re-run in the same directory.
The tests that rely on additional data files have comments containing
the strings "@require@" and "@diff@" which seem to be related to the
libstdc++-v3/mkcheck.in testing script that was removed in 2003. Those
comments can be used to find tests that should be migrated to use the
new dg-additional-files support, and then the comments can be removed.
libstdc++-v3/ChangeLog:
* testsuite/27_io/basic_filebuf/seekoff/char/1-io.cc: Use
dg-additional-files. Remove @require@ and @diff@ comments.
* testsuite/27_io/basic_filebuf/seekoff/char/2-io.cc: Likewise.
* testsuite/27_io/basic_filebuf/seekpos/char/1-io.cc: Likewise.
* testsuite/27_io/basic_filebuf/seekpos/char/2-io.cc: Likewise.
* testsuite/lib/dg-options.exp (v3_additional_files): New
global variable.
(dg-additional-files): New proc.
* testsuite/lib/libstdc++.exp (v3_target_compile): Copy
additional files to test directory.
Jonathan Wakely [Tue, 12 Sep 2023 11:04:37 +0000 (12:04 +0100)]
libstdc++: Remove some more unconditional uses of atomics
These atomics cause linker errors on arm4t where __sync_synchronize is
not defined. For single-threaded targets we don't need the atomics.
libstdc++-v3/ChangeLog:
* include/experimental/io_context (io_context) [!_GLIBCXX_HAS_GTHREADS]:
Use a plain integer for _M_work_count for single-threaded
targets.
* include/experimental/memory_resource (__get_default_resource)
[!_GLIBCXX_HAS_GTHREADS]: Use unsynchronized type for
single-threaded targets.
* src/c++17/default_resource.h: Adjust preprocessor conditions
to match memory_resource.cc.
* src/c++17/memory_resource.cc [!_GLIBCXX_HAS_GTHREADS]
(atomic_mem_res): Use unsynchronized type for single-threaded
targets.
Yannick Moy [Fri, 4 Aug 2023 13:01:28 +0000 (15:01 +0200)]
ada: Improve detection of deactivated code for warnings with -gnatwt
Switch -gnatwt is used in GNAT to track deleted code. It can be emitted
by GNAT on code that is intentionally deactivated for a given configuration.
The current test to suppress spurious warnings is not complex enough to
detect all such cases. Now improved, by using the same test as used in
GNATprove to suppress warnings related to a "statically disabled condition
which evaluates to a given value", as described in SPARK UG 7.3.2.
gcc/ada/
* exp_util.adb (Is_Statically_Disabled): New function to detect a
"statically disabled condition which evaluates to a given value",
as described in SPARK UG 7.3.2.
(Kill_Dead_Code): Call the new function Is_Statically_Disabled for
conditions of if statements.
* exp_util.ads (Is_Statically_Disabled): New function spec.
Javier Miranda [Wed, 30 Aug 2023 19:19:13 +0000 (19:19 +0000)]
ada: Assertion failure on expansion of record with invariant
gcc/ada/
* exp_util.adb (Process_Record_Component): Adjust assertion on the
availablity of the invariant procedure; required because the
invariant procedure is built by the expander, and hence it is not
available compiling generic units or when the sources have errors,
since expansion is then disabled.
Javier Miranda [Mon, 28 Aug 2023 18:32:18 +0000 (18:32 +0000)]
ada: Assertion failure on for-of loop iterating on selected component
gcc/ada/
* sem_util.adb (Is_Dependent_Component_Of_Mutable_Object): Protect
access to Entity attribute and add missing code to check function
selector in a prefix form call.
Eric Botcazou [Sun, 27 Aug 2023 07:34:59 +0000 (09:34 +0200)]
ada: Fix late finalization for function call in delta aggregate
The problem occurs at library level because the temporary created for the
function call lives in the elaboration routine but is finalized only when
the package itself is.
It turns out that there is no need for this temporary, since the expansion
of delta aggregates already creates a (properly finalized) temporary.
gcc/ada/
* exp_ch6.adb (Expand_Ctrl_Function_Call): Also do nothing for the
expression of a delta aggregate.
Richard Biener [Thu, 14 Sep 2023 07:31:23 +0000 (09:31 +0200)]
tree-optimization/111294 - better DCE after forwprop
The following adds more aggressive DCE to forwprop to clean up dead
stmts when folding a stmt leaves some operands unused. The patch
uses simple_dce_from_worklist for this purpose, queueing original
operands before substitution and folding, but only if we folded the
stmt.
This removes one dead stmt biasing threading costs in a later pass
but it doesn't resolve the optimization issue in the PR yet.
PR tree-optimization/111294
* tree-ssa-forwprop.cc (pass_forwprop::execute): Track
operands that eventually become dead and use simple_dce_from_worklist
to remove their definitions if they did so.
ptr + 2 is a valid address for an Advanced SIMD load, but not for
an SVE load. We therefore ended up generating:
ldr q0, [x0, 2]
dup z0.q, z0.q[0]
This patch makes us generate LD1RQ for that case too. It takes the
slightly old-school approach of making the predicate broader than
the constraint. That is: any valid memory address is accepted as
an operand before RA. If the instruction remains during RA, LRA will
coerce the address to match the constraint. If the instruction gets
split before RA, the splitter will load invalid addresses into a
scratch register.
gcc/
* config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
Accept all nonimmediate_operands, but keep the existing constraints.
If the instruction is split before RA, load invalid addresses into
a temporary register.
* config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/ld1rq_1.c: New test.
libstdc++: Add dg-require-thread-fence in several tests
Some targets like arm-eabi with newlib and default settings rely on
__sync_synchronize() to ensure synchronization. Newlib does not
implement it by default, to make users aware they have to take special
care.
This makes a few tests fail to link.
This patch requires the missing thread-fence effective target in the
tests that need it, making them UNSUPPORTED instead of FAIL and
UNRESOLVED.
xtensa: Optimize several boolean evaluations of EQ/NE against constant zero
An idiomatic implementation of boolean evaluation of whether a register is
zero or not in Xtensa is to assign 0 and 1 to the temporary and destination,
and then issue the MOV[EQ/NE]Z machine instruction
(See 8.3.2 Instruction Idioms, Xtensa ISA refman., p.599):
As you can see in the above idiom, if the source and destination are the
same register, a move instruction from the source to another temporary
register must be prepended:
Additionally, if TARGET_NSA is configured, the fact that it returns 32 iff
the source of the NSAU machine instruction is 0, otherwise less than, can be
used in boolean evaluation of EQ comparison.
;; A2 = (A3 == 0) ? 1 : 0;
nsau a2, a3 ;; Source and destination can be the same register
srli a2, a2, 5
Furthermore, this patch also saves one instruction when determining whether
the ANDing with mask values in which 1s are lined up from the upper or lower
bit end (for example, 0xFFE00000 or 0x003FFFFF) is 0 or not.
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_expand_scc):
Revert the changes from the last patch, as the work in the RTL
expansion pass is too far to determine the physical registers.
* config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
(eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
LoongArch: Add tests for ASX vector xvssran/xvssrani/xvssrarn/xvssrarni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvssran.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrani.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarni.c: New test.
LoongArch: Add tests for ASX vector xvssrln/xvssrlni/xvssrlrn/xvssrlrni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvssrln.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlni.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrni.c: New test.
LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpickev/xvpickod/ xvpickve2gr/xvreplgr2vr/xvreplve/xvreplve0/xvreplvei/xvshuf4i/xvshuf instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvpackev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpackod.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickod.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve2gr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplgr2vr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve0.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvreplvei.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf4i_b.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf_b.c: New test.
LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextins/xvilvh/xvilvl/xvinsgr2vr/ xvinsve0/xvprem/xvpremi instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvextrins.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvilvh.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvilvl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvinsgr2vr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvinsve0.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvprem.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpremi.c: New test.
LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/sne/sor/sun} instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_saf_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_seq_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sle_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_slt_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sne_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sor_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sun_s.c: New test.
LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/cne/cor/cun} instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_caf_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_ceq_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cle_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_clt_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cne_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cor_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cun_s.c: New test.
LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvbsll/xvbsrl/xvneg/ xvsat instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvabsd-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvabsd-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbsll_v.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbsrl_v.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvneg.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-2.c: New test.
LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstpi/xvhsubw/ xvmsub/xvrotr/xvrotri/xvld/xvst instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstp.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstpi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvld.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmsub.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvrotr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvrotri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvst.c: New test.
LoongArch: Add tests for ASX vector comparison and selection instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvseq.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvseqi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-2.c: New test.
LoongArch: Add tests for ASX vector floating-point conversion instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfcvt.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfcvth.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvffinth.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvftintl.c: New test.
LoongArch: Add tests for ASX vector floating-point operation instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_s.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_d.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_s.c: New test.
LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbitrev/xvbitrevi/ xvbitsel/xvbitseli/xvbitset/xvbitseti/xvclo/xvclz/xvpcnt instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvbitclr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitclri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrev.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrevi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitsel.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitset.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseti.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvclo.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvclz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvpcnt.c: New test.
LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvsrarn instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvextl-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvextl-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsra.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrai.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsran.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrani.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrar.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrari.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarni.c: New test.
LoongArch: Add tests for ASX vector xvsll/xvsrl instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvsll.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvslli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrl.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrli.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrln.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlni.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlr.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlri.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrni.c: New test.
LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvor/xvori/ xvnor/xvnori/xvxor/xvxori instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvand.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvandi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvandn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvnor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvnori.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvori.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvorn.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvxor.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvxori.c: New test.
LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz/xvmsknz/xvmuh /xvsigncov instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvldi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmskgez.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmskltz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmsknz.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsigncov.c: New test.
LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmini instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvmax-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmax-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-2.c: New test.
LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmul.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-3.c: New test.
LoongArch: Add tests for ASX vector subtraction instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvssub-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvssub-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsub.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-2.c: New test.
LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwev/xvmaddwod instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmadd.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-3.c: New test.
LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xvaddwev/ xvaddwodxvsadd instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xvadd.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvadda.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddi.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-2.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-3.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-1.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-2.c: New test.
LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vld.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vst.c: New test.
LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vori/vnor/ vnori/vxor/vxori instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vand.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vandi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vandn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vnor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vnori.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vori.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vorn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vxor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vxori.c: New test.
LoongArch: Add tests for SX vector handling and shuffle instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vbsll.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbsrl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextrins.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vilvh.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vilvl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vinsgr2vr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpackev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpackod.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickod.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpickve2gr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpremi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplgr2vr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplve.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vreplvei.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vshuf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vshuf4i.c: New test.
LoongArch: Add tests for SX vector vfcmp instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_caf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_ceq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cle.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_clt.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cne.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cun.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_saf.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_seq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sle.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_slt.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sne.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sor.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sun.c: New test.
LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseqi/vsle /vslei/vslt/vslti instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfrstp.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrstpi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vseq.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vseqi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsle-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsle-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslei-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslei-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslt-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslt-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslti-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslti-2.c: New test.
LoongArch: Add tests for SX vector floating point arithmetic instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfadd_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfadd_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_s.c: New test.
LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev/vbitrevi/ vbitsel/vbitseli/vbitset/vbitseti/vclo/vclz/vpcnt instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vbitclr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitclri.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitrev.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitrevi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitsel.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitseli.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitset.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vbitseti.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vclo.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vclz.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vpcnt.c: New test.
LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/vssrarni/vssrln /vssrlni/vssrlrn/vssrlrni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vssran.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrani.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrarn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrarni.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrln.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrlni.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrlrn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssrlrni.c: New test.
LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/vsran/vsrani /vsrarn/vsrarni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vrotr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vrotri.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsra.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrai.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsran.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrani.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrar.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrari.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrarn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrarni.c: New test.
LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vsrln/vsrlni/vsrlr /vsrlri/vslrlrn/vsrlrni instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vsll.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vslli.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsllwil-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsllwil-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrl.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrli.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrln.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlni.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlr.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlri.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlrn.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsrlrni.c: New test.
LoongArch: Add tests for SX vector vdiv/vmod instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vdiv-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vdiv-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmod-2.c: New test.
LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vmsknz/vsigncov instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vabsd-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vabsd-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmskgez.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmskltz.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmsknz.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsigncov.c: New test.
LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vsat instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vexth-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vexth-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextl-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vextl-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vldi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vneg.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsat-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsat-2.c: New test.
LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vmax-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmax-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaxi-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaxi-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmin-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmin-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmini-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmini-2.c: New test.
LoongArch: Add tests for SX vector vavg/vavgr instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vavg-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vavg-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vavgr-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vavgr-2.c: New test.
LoongArch: Add tests for the SX vector multiplication instruction.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vmuh-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmuh-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmul.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-3.c: New test.
LoongArch: Add tests for SX vector subtraction instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vhsubw-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vhsubw-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmsub.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssub-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vssub-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsub.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vsubwod-2.c: New test.
LoongArch: Add tests for SX vector addition instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vadd.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vadda.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddi.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vhaddw-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vhaddw-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmadd.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-3.c: New test.
LoongArch: Add tests for SX vector floating-point instructions.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vfcvt-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfcvt-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vffint-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vffint-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vffint-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrint_d.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vfrint_s.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-1.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-2.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-3.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-vftint-4.c: New test.
Gaius Mulley [Wed, 13 Sep 2023 14:51:59 +0000 (15:51 +0100)]
modula2: -Wcase-enum detect singular/plural and use switch during build
This patch generates a singular or plural message relating to the
number of enums missing. Use -Wcase-enum when building of the
modula-2 libraries and m2/stage2/cc1gm2.
gcc/m2/ChangeLog:
* Make-lang.in (GM2_FLAGS): Add -Wcase-enum.
(GM2_ISO_FLAGS): Add -Wcase-enum.
* gm2-compiler/M2CaseList.mod (EnumerateErrors): Issue
singular or plural start text prior to the enum list.
Remove unused parameter tokenno.
(EmitMissingRangeErrors): New procedure.
(MissingCaseBounds): Call EmitMissingRangeErrors.
(MissingCaseStatementBounds): Call EmitMissingRangeErrors.
* gm2-libs-iso/TextIO.mod: Fix spacing.
RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization
This patch support VLS modes VEC_EXTRACT to fix PR111391:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111391
I need VLS modes VEC_EXTRACT to fix this issue.
I have run the whole gcc testsuite, notice this patch increase these 4 FAILs:
FAIL: c-c++-common/vector-subscript-4.c -std=gnu++14 scan-tree-dump-not optimized "vector"
FAIL: c-c++-common/vector-subscript-4.c -std=gnu++17 scan-tree-dump-not optimized "vector"
FAIL: c-c++-common/vector-subscript-4.c -std=gnu++20 scan-tree-dump-not optimized "vector"
FAIL: c-c++-common/vector-subscript-4.c -std=gnu++98 scan-tree-dump-not optimized "vector"
After analysis and comparing with LLVM:
https://godbolt.org/z/ozhfKhj5Y
with this patch, GCC generate similar codegen like LLVM (Previously it can not be vectorized).
This patch is the prerequisite patch to fix an ICE.
So let's ignore those increased 4 dump IR FAILs since ICE is un-acceptable wheras dump FAILs are acceptable (But we should remember and eventually fix dump IR FAILs too).
* gcc.target/riscv/rvv/autovec/vls/def.h: Add more def.
* gcc.target/riscv/rvv/autovec/vls/extract-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/extract-2.c: New test.
Andrew Pinski [Tue, 12 Sep 2023 17:43:23 +0000 (10:43 -0700)]
MATCH: Simplify `(X % Y) < Y` pattern.
This merges the two patterns to catch
`(X % Y) < Y` and `Y > (X % Y)` into one by
using :c on the comparison operator.
It does not change any code generation nor
anything else. It is more to allow for better
maintainability of this pattern.
OK? Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
PR tree-optimization/111345
* match.pd (`Y > (X % Y)`): Merge
into ...
(`(X % Y) < Y`): Pattern by adding `:c`
on the comparison.
Richard Biener [Wed, 13 Sep 2023 09:04:31 +0000 (11:04 +0200)]
tree-optimization/111387 - BB SLP and irreducible regions
When we split an irreducible region for BB vectorization analysis
the defensive handling of external backedge defs in
vect_get_and_check_slp_defs doesn't work since that relies on
dominance info to identify a backedge. The testcase also shows
we are iterating over the function in a sub-optimal way which is
why we split the irreducible region in the first place. The fix
is to mark backedges and use EDGE_DFS_BACK to identify them and
to use the region RPO compute which can produce a RPO order keeping
cycles in a better order (and as side effect marks backedges).
PR tree-optimization/111387
* tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
EDGE_DFS_BACK when doing BB vectorization.
(vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
to compute RPO and mark backedges.
RISC-V: Support cond vmulh.vv and vmulu.vv autovec patterns
This patch adds combine patterns to combine vmulh[u].vv + vcond_mask
to mask vmulh[u].vv. For vmulsu.vv, it can not be produced in midend
currently. We will send another patch to take this issue.
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
New combine pattern.
* config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
(<mulh_table><mode>3_highpart): Merged pattern.
(umul<mode>3_highpart): Mrege smul and umul.
* config/riscv/vector-iterators.md (umul): New iterators.
(UNSPEC_VMULHU): New iterators.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/cond/cond_mulh-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_mulh_run-2.c: New test.
This patch add combine patterns to combine vnsra.w[vxi] + vcond_mask
to a mask vnsra.w[vxi].
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
New combine pattern.
(*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c: New test.
This patch add combine patterns to combine vfsgnj.vv + vcond_mask
to mask vfsgnj.vv. For vfsgnjx.vv, it can not be produced in midend
currently. We will send another patch to take this issue.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-run.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-template.h: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_copysign-zvfh-run.c: New test.
Richard Biener [Wed, 13 Sep 2023 07:28:34 +0000 (09:28 +0200)]
tree-optimization/111397 - missed copy propagation involving abnormal dest
The following extends the previous enhancement to copy propagation
involving abnormals. We can easily replace abnormal uses by not
abnormal uses and only need to preserve the abnormals in PHI arguments
flowing in from abnormal edges. This changes the may_propagate_copy
argument indicating we are not propagating into a PHI node to indicate
whether we know we are not propagating into a PHI argument from an
abnormal PHI instead.
PR tree-optimization/111397
* tree-ssa-propagate.cc (may_propagate_copy): Change optional
argument to specify whether the PHI destination doesn't flow in
from an abnormal PHI.
(propagate_value): Adjust.
* tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
PHI dest.
* tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
Likewise.
(process_bb): Likewise.
For pattern "(X + C) / N": "div (plus@3 @0 INTEGER_CST@1) INTEGER_CST@2)",
Even if "X" has value-range and "X + C" does not overflow, "@3" may still
be undefined. Like below example:
The whole pattern "(_2 + -5 ) / 5" is in "bb 3", but "bb 3" would be
unreachable (because "if (0 != 0)" is always false).
And "get_range_query (cfun)->range_of_expr (vr3, @3)" is checked in
"bb 3", "range_of_expr" gets an "undefined vr3". Where "@3" is "_5".
So, before using "vr3", it would be safe to check "!vr3.undefined_p ()".
PR tree-optimization/111303
gcc/ChangeLog:
* match.pd ((X - N * M) / N): Add undefined_p checking.
((X + N * M) / N): Likewise.
((X + C) div_rshift N): Likewise.
These testcases because we don't support widen_sum/vec_unpack....etc patterns.
Currently, we don't support them since we don't see the benefits.
May support those patterns if they are beneficial ? Or Fix testcases ?
Conclusion:
IMHO, I think we can merge this patch after we addressed all REAL highest priority issues (1).
The rest FAILs are not big issues then we can reduce them by supporting more features (For example VLS modes).
Feel free to give any comments.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Enable vect_int for RVV.
RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
As this PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111337
We support VECTOR BOOL vcond_mask to fix this following ICE:
0x1a9e309 gimple_expand_vec_cond_expr
../../../../gcc/gcc/gimple-isel.cc:283
0x1a9ea56 execute
../../../../gcc/gcc/gimple-isel.cc:390
gcc/ChangeLog:
PR target/111337
* config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
projects / thirdparty / gcc.git / log
