bviyer [Tue, 28 May 2013 19:55:10 +0000 (19:55 +0000)]
Implemented Cilk Plus Array Notation for C Compiler.
gcc/ChangeLog
2013-05-28 Balaji V. Iyer <balaji.v.iyer@intel.com>
* doc/extend.texi (C Extensions): Added documentation about Cilk
Plus
array notation built-in reduction functions.
* doc/passes.texi (Passes): Added documentation about changes done
for Cilk Plus.
* doc/invoke.texi (C Dialect Options): Added documentation about
the -fcilkplus flag.
* Makefile.in (C_COMMON_OBJS): Added
c-family/array-notation-common.o.
(BUILTINS_DEF): Depend on cilkplus.def.
* builtins.def: Include cilkplus.def. Define
DEF_CILKPLUS_BUILTIN.
* builtin-types.def: Define BT_FN_INT_PTR_PTR_PTR.
* cilkplus.def: New file.
gcc/c-family/ChangeLog
2013-05-28 Balaji V. Iyer <balaji.v.iyer@intel.com>
* c-common.c (c_define_builtins): When cilkplus is enabled, the
function array_notation_init_builtins is called.
(c_common_init_ts): Added ARRAY_NOTATION_REF as typed.
* c-common.def (ARRAY_NOTATION_REF): New tree.
* c-common.h (build_array_notation_expr): New function declaration.
(build_array_notation_ref): Likewise.
(extract_sec_implicit_index_arg): New extern declaration.
(is_sec_implicit_index_fn): Likewise.
(ARRAY_NOTATION_CHECK): New define.
(ARRAY_NOTATION_ARRAY): Likewise.
(ARRAY_NOTATION_START): Likewise.
(ARRAY_NOTATION_LENGTH): Likewise.
(ARRAY_NOTATION_STRIDE): Likewise.
* c-pretty-print.c (pp_c_postifix_expression): Added a new case for
ARRAY_NOTATION_REF.
(pp_c_expression): Likewise.
* c.opt (flag_enable_cilkplus): New flag.
* array-notation-common.c: New file.
gcc/c/ChangeLog
2013-05-28 Balaji V. Iyer <balaji.v.iyer@intel.com>
* c-typeck.c (build_array_ref): Added a check to see if array's
index is greater than one. If true, then emit an error.
(build_function_call_vec): Exclude error reporting and checking
for builtin array-notation functions.
(convert_arguments): Likewise.
(c_finish_return): Added a check for array notations as a return
expression. If true, then emit an error.
(c_finish_loop): Added a check for array notations in a loop
condition. If true then emit an error.
(lvalue_p): Added a ARRAY_NOTATION_REF case.
(build_binary_op): Added a check for array notation expr inside
op1 and op0. If present, we call another function to find correct
type.
* Make-lang.in (C_AND_OBJC_OBJS): Added c-array-notation.o.
* c-parser.c (c_parser_compound_statement): Check if array
notation code is used in tree, if so, then transform them into
appropriate C code.
(c_parser_expr_no_commas): Check if array notation is used in LHS
or RHS, if so, then build array notation expression instead of
regular modify.
(c_parser_postfix_expression_after_primary): Added a check for
colon(s) after square braces, if so then handle it like an array
notation. Also, break up array notations in unary op if found.
(c_parser_direct_declarator_inner): Added a check for array
notation.
(c_parser_compound_statement): Added a check for array notation in
a stmt. If one is present, then expand array notation expr.
(c_parser_if_statement): Likewise.
(c_parser_switch_statement): Added a check for array notations in
a switch statement's condition. If true, then output an error.
(c_parser_while_statement): Similarly, but for a while.
(c_parser_do_statement): Similarly, but for a do-while.
(c_parser_for_statement): Similarly, but for a for-loop.
(c_parser_unary_expression): Check if array notation is used in a
pre-increment or pre-decrement expression. If true, then expand
them.
(c_parser_array_notation): New function.
* c-array-notation.c: New file.
* c-tree.h (is_cilkplus_reduce_builtin): Protoize.
gcc/testsuite/ChangeLog
2013-05-28 Balaji V. Iyer <balaji.v.iyer@intel.com>
eraman [Tue, 28 May 2013 17:27:54 +0000 (17:27 +0000)]
2013-05-28 Easwaran Raman <eraman@google.com>
PR tree-optimization/57337
* tree-ssa-reassoc.c (appears_later_in_bb): New function.
(find_insert_point): Correctly identify the insertion point
when two statements with the same UID is compared.
burnus [Tue, 28 May 2013 15:24:35 +0000 (15:24 +0000)]
2013-05-28 Tobias Burnus <burnus@net-b.de>
* trans-expr.c (gfc_conv_procedure_call): Deallocate
polymorphic arrays for allocatable intent(out) dummies.
(gfc_reset_vptr): New function, moved from trans-stmt.c
and extended.
* trans-stmt.c (reset_vptr): Remove.
(gfc_trans_deallocate): Update calls.
* trans.h (gfc_reset_vptr): New prototype.
ebotcazou [Tue, 28 May 2013 13:52:50 +0000 (13:52 +0000)]
* config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set
fs->signal_frame for SIGFPE raised for IEEE-754 exceptions.
* config/i386/sol2-unwind.h (x86_fallback_frame_state): Likewise.
rguenth [Tue, 28 May 2013 13:36:25 +0000 (13:36 +0000)]
2013-05-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/56787
* tree-vect-data-refs.c (vect_analyze_data_refs): Drop clobbers
from the list of data references.
* tree-vect-loop.c (vect_determine_vectorization_factor): Skip
clobbers.
(vect_analyze_loop_operations): Likewise.
(vect_transform_loop): Remove clobbers.
ebotcazou [Tue, 28 May 2013 07:26:35 +0000 (07:26 +0000)]
* doc/invoke.texi (SPARC Options): Document -mfix-ut699.
* builtins.c (expand_builtin_mathfn) <BUILT_IN_SQRT>: Try to widen the
mode if the instruction isn't available in the original mode.
* config/sparc/sparc.opt (mfix-ut699): New option.
* config/sparc/sparc.md (muldf3_extend): Disable if -mfix-ut699.
(divdf3): Turn into expander.
(divdf3_nofix): New insn.
(divdf3_fix): Likewise.
(divsf3): Disable if -mfix-ut699.
(sqrtdf2): Turn into expander.
(sqrtdf2_nofix): New insn.
(sqrtdf2_fix): Likewise.
(sqrtsf2): Disable if -mfix-ut699.
rguenth [Mon, 27 May 2013 13:02:24 +0000 (13:02 +0000)]
2013-05-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/57343
* tree-ssa-loop-niter.c (number_of_iterations_ne_max): Do not
use multiple_of_p if not TYPE_OVERFLOW_UNDEFINED.
(number_of_iterations_cond): Do not build the folded tree.
PR tree-optimization/57417
* tree-ssa-sccvn.c (vn_reference_fold_indirect): Fix test
for unchanged base.
(set_ssa_val_to): Compare addresses using
get_addr_base_and_unit_offset.
amylaar [Mon, 27 May 2013 10:39:01 +0000 (10:39 +0000)]
PR rtl-optimization/56833
* postreload.c (move2add_record_mode): New function.
(move2add_record_sym_value, move2add_valid_value_p): Likewise.
(move2add_use_add2_insn): Use move2add_record_sym_value.
(move2add_use_add3_insn): Likewise.
(reload_cse_move2add): Use move2add_valid_value_p and
move2add_record_mode. Invalidate call-clobbered and REG_INC
affected regs by setting reg_mode to VOIDmode.
(move2add_note_store): Don't pretend the inside of a SUBREG is
the actual destination. Invalidate single/leading registers by
setting reg_mode to VOIDmode.
Use move2add_record_sym_value, move2add_valid_value_p and
move2add_record_mode.
ebotcazou [Sun, 26 May 2013 10:19:00 +0000 (10:19 +0000)]
* gcc-interface/decl.c (vinfo_t): New type and associated vector.
(components_to_record): Change return type to bool.
Lay out the variants in two passes. Do not force a specific layout for
the variant part if the variants do not have a representation clause.
Take the alignment of the variant part into account when laying out
variants without rep clause in a record type with a partial rep clause.
(create_rep_part): Do not set the position of the field.
ebotcazou [Sun, 26 May 2013 09:52:10 +0000 (09:52 +0000)]
* gcc-interface/gigi.h (create_type_decl): Adjust prototype.
(create_label_decl): Complete prototype.
(process_attributes): Declare.
* gcc-interface/decl.c (gnat_to_gnu_entity): Adjust multiple calls to
create_type_decl throughout.
<E_Enumeration_Type>: Do the layout of the type manually and call
process_attributes on it. Reindent.
<E_Enumeration_Subtype>: Minor tweak.
<E_Floating_Point_Subtype>: Reindent.
<E_Array_Subtype>: Call process_attributes on the array type built
for a packed array type.
<E_Record_Type>: Call process_attributes on the type.
<E_Record_Subtype>: Likewise.
<E_Access_Type>: Likewise.
<E_Subprogram_Type>: Likewise.
Likewise for all types at the end of the processing.
* gcc-interface/utils.c (make_aligning_type): Adjust call to
create_type_decl.
(maybe_pad_type): Likewise.
(create_index_type): Likewise.
(create_type_decl): Remove attr_list parameter and associated code.
(create_var_decl_1): Call process_attributes on the variable.
(process_attributes): Take a pointer to the object and add in_place
and gnat_node parameters and adjust throughout.
<ATTR_MACHINE_ATTRIBUTE>: Pass ATTR_FLAG_TYPE_IN_PLACE only on demand
and set the input location.
Zap the attribute list at the end.
(create_subprog_decl): Call process_attributes on the subprogram.
(build_unc_object_type): Adjust call to create_type_decl.
(handle_vector_type_attribute): Remove dead code.
ebotcazou [Sun, 26 May 2013 08:55:43 +0000 (08:55 +0000)]
* gcc-interface/gigi.h (make_aligning_type): Adjust prototype.
* gcc-interface/utils.c (make_aligning_type): Take GNAT_NODE parameter
for the position of the associated TYPE_DECL.
* gcc-interface/decl.c (gnat_to_gnu_entity): Adjust call to above.
* gcc-interface/utils2.c (maybe_wrap_malloc): Likewise.
ebotcazou [Sun, 26 May 2013 08:48:22 +0000 (08:48 +0000)]
* gcc-interface/decl.c (gnat_to_gnu_entity): Do not prematurely
elaborate the full view of a type with a freeze node.
* gcc-interface/trans.c (process_type): Add explicit predicate.
rsandifo [Sat, 25 May 2013 16:00:12 +0000 (16:00 +0000)]
gcc/
PR target/53916
* config/mips/constraints.md (kl): New constraint.
* config/mips/mips.md (divmod<mode>4, udivmod<mode>4): Delete.
(divmod<mode>4_internal): Rename to divmod<mode>4. Use "kl" as the
constraint for operand 0. Split after CSE for MIPS16. Emit a move
from LO for MIPS16.
(udivmod<mode>4_internal): Likewise udivmod<mode>4.
gcc/testsuite/
PR target/53916
* gcc.target/mips/div-13.c: New test.
steven [Sat, 25 May 2013 10:31:43 +0000 (10:31 +0000)]
* sched-int.h (ds_t, dw_t): Make unsigned int.
Fix documentation that describes how all the ds_t bits are used.
Reserve the last bit for delayed-branch scheduling.
(BITS_PER_DEP_STATUS): Move to ds_t typedef.
(BITS_PER_DEP_WEAK): Fix definition and documentation.
(gen_dep_weak_1): Remove prototype.
* sched-deps.c (get_dep_weak_1): Make static.
* target.def (speculate_insn, needs_block_p, gen_spec_check,
get_insn_spec_ds, get_insn_checked_ds): Adjust hook prototypes.
* doc/tm.texi: Regenerate.
* config/ia64/ia64.c (ia64_needs_block_p): Update prototype.
law [Fri, 24 May 2013 17:13:38 +0000 (17:13 +0000)]
PR tree-optimization/57124
* tree-vrp.c (simplify_cond_using_ranges): Only simplify a
conversion feeding a condition if the range has an overflow
if -fstrict-overflow. Add warnings for when we do make the
transformation.
PR tree-optimization/57124
* gcc.c-torture/execute/pr57124.c: New test.
* gcc.c-torture/execute/pr57124.x: Set -fno-strict-overflow.
jamborm [Fri, 24 May 2013 15:35:21 +0000 (15:35 +0000)]
2013-05-24 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/57294
* cgraph.h (ipa_record_stmt_references): Declare.
* cgraphbuild.c (ipa_record_stmt_references): New function.
(build_cgraph_edges): Use ipa_record_stmt_references.
(rebuild_cgraph_edges): Likewise.
(cgraph_rebuild_references): Likewise.
* ipa-prop.c (ipa_modify_call_arguments): Discard references
associated with the old statement and build references from the
newly built statements.
* ipa-ref.c (ipa_remove_stmt_references): New function.
* ipa-ref.h (ipa_remove_stmt_references): Declare.
vmakarov [Fri, 24 May 2013 15:30:47 +0000 (15:30 +0000)]
2013-05-24 Vladimir Makarov <vmakarov@redhat.com>
* lra-constraints.c (emit_spill_move): Use smaller mode for
mem-mem moves.
(check_and_process_move): Consider mem-reg moves for secondary
too.
(curr_insn_transform): Don't lose insns emitted before for
secondary memory moves.
(inherit_in_ebb): Mark defined reg. Add usage only if it is not a
reg set up in the current insn.
ebotcazou [Fri, 24 May 2013 08:52:35 +0000 (08:52 +0000)]
* gcc-interface/ada-tree.h (LOOP_STMT_NO_UNROLL): New define.
(LOOP_STMT_UNROLL): Likewise.
(LOOP_STMT_NO_VECTOR): Likewise.
(LOOP_STMT_VECTOR): Likewise.
* gcc-interface/trans.c (struct loop_info_d): Replace label field
with stmt field.
(Pragma_to_gnu) <Pragma_Loop_Optimize>: New case.
(Loop_Statement_to_gnu): Save the loop statement onto the stack
instead of the label.
(gnat_to_gnu) <N_Exit_Statement>: Retrieve the loop label.
ebotcazou [Fri, 24 May 2013 08:27:55 +0000 (08:27 +0000)]
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type>: Constify
a handful of local variables.
For a derived untagged type that renames discriminants, change the type
of the stored discriminants to a subtype with the bounds of the type
of the visible discriminants.
(build_subst_list): Rename local variable.
ebotcazou [Fri, 24 May 2013 06:46:11 +0000 (06:46 +0000)]
PR rtl-optimization/55177
* simplify-rtx.c (simplify_unary_operation_1) <NOT>: Deal with BSWAP.
(simplify_byte_swapping_operation): New.
(simplify_binary_operation_1): Call it for AND, IOR and XOR.
(simplify_relational_operation_1): Deal with BSWAP.
mshawcroft [Thu, 23 May 2013 13:36:41 +0000 (13:36 +0000)]
[AArch64] Support for CLZ
2013-05-23 Vidya Praveen <vidyapraveen@arm.com>
* config/aarch64/aarch64-simd.md (clzv4si2): Support for CLZ
instruction (AdvSIMD).
* config/aarch64/aarch64-builtins.c
(aarch64_builtin_vectorized_function): Handler for BUILT_IN_CLZ.
* config/aarch64/aarch-simd-builtins.def: Entry for CLZ.
jamborm [Thu, 23 May 2013 13:20:41 +0000 (13:20 +0000)]
2013-05-22 Martin Jambor <mjambor@suse.cz>
PR middle-end/57347
* tree.h (contains_bitfld_component_ref_p): Declare.
* tree-sra.c (contains_bitfld_comp_ref_p): Move...
* tree.c (contains_bitfld_component_ref_p): ...here. Adjust its caller.
* ipa-prop.c (determine_known_aggregate_parts): Check that LHS does
not access a bit-field. Assert all final offsets are byte-aligned.
rguenth [Thu, 23 May 2013 12:23:59 +0000 (12:23 +0000)]
2013-05-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/57380
* tree-ssa-phiprop.c (propagate_with_phi): Do not require at
least one invariant or re-used load.
* passes.c (init_optimization_passes): Move pass_phiprop before
pass_forwprop.
jakub [Thu, 23 May 2013 09:17:34 +0000 (09:17 +0000)]
PR middle-end/57344
* expmed.c (store_split_bit_field): If op0 is a REG or
SUBREG of a REG, don't lower unit. Handle unit not being
always BITS_PER_WORD.
* gcc.c-torture/execute/pr57344-1.c: New test.
* gcc.c-torture/execute/pr57344-2.c: New test.
* gcc.c-torture/execute/pr57344-3.c: New test.
* gcc.c-torture/execute/pr57344-4.c: New test.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__CRYPTO__ if the crypto instructions are available.
(altivec_overloaded_builtins): Add support for overloaded power8
builtins.
* config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add
support for power8 crypto builtins.
(builtin_function_type): Likewise.
(altivec_init_builtins): Add support for builtins that take vector
long long (V2DI) arguments.
* config/rs6000/crypto.md: New file, define power8 crypto
instructions.
2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com>
Pat Haugen <pthaugen@us.ibm.com>
Peter Bergner <bergner@vnet.ibm.com>
* doc/md.texi (PowerPC and IBM RS6000 constraints): Update to use
constraints.md instead of rs6000.h. Reorder w* constraints. Add
wm, wn, wr documentation.
* gcc/config/rs6000/constraints.md (wm): New constraint for VSX
registers if direct move instructions are enabled.
(wn): New constraint for no registers.
(wq): New constraint for quad word even GPR registers.
(wr): New constraint if 64-bit instructions are enabled.
(wv): New constraint if power8 vector instructions are enabled.
(wQ): New constraint for quad word memory locations.
* gcc/config/rs6000/predicates.md (const_0_to_15_operand): New
constraint for 0..15 for crypto instructions.
(gpc_reg_operand): If VSX allow registers in VSX registers as well
as GPR and floating point registers.
(int_reg_operand): New predicate to match only GPR registers.
(base_reg_operand): New predicate to match base registers.
(quad_int_reg_operand): New predicate to match even GPR registers
for quad memory operations.
(vsx_reg_or_cint_operand): New predicate to allow vector logical
operations in both GPR and VSX registers.
(quad_memory_operand): New predicate for quad memory operations.
(reg_or_indexed_operand): New predicate for direct move support.
* gcc/config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED):
Inherit from ISA_2_4_MASKS, not ISA_2_2_MASKS.
(ISA_2_7_MASKS_SERVER): New mask for ISA 2.07 (i.e. power8).
(POWERPC_MASKS): Add power8 options.
(power8 cpu): Use ISA_2_7_MASKS_SERVER instead of specifying the
various options.
* gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
Define _ARCH_PWR8 and __POWER8_VECTOR__ for power8.
* gcc/config/rs6000/rs6000.c (power8_cost): Initial definition for
power8.
(rs6000_hard_regno_mode_ok): Make PTImode only match even GPR
registers.
(rs6000_debug_reg_print): Print the base register class if
-mdebug=reg.
(rs6000_debug_vector_unit): Add p8_vector.
(rs6000_debug_reg_global): If -mdebug=reg, print power8 constraint
definitions. Also print fusion state.
(rs6000_init_hard_regno_mode_ok): Set up power8 constraints.
(rs6000_builtin_mask_calculate): Add power8 builtin support.
(rs6000_option_override_internal): Add support for power8.
(rs6000_common_init_builtins): Add debugging for skipped builtins
if -mdebug=builtin.
(rs6000_adjust_cost): Add power8 support.
(rs6000_issue_rate): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_POWER8_SPEC): If we don't have a
power8 capable assembler, default to power7 options.
(TARGET_DIRECT_MOVE): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_P8_VECTOR): Likewise.
(VECTOR_UNIT_P8_VECTOR_P): Define power8 vector support.
(VECTOR_UNIT_VSX_OR_P8_VECTOR_P): Likewise.
(VECTOR_MEM_P8_VECTOR_P): Likewise.
(VECTOR_MEM_VSX_OR_P8_VECTOR_P): Likewise.
(VECTOR_MEM_ALTIVEC_OR_VSX_P): Likewise.
(TARGET_XSCVDPSPN): Likewise.
(TARGET_XSCVSPDPN): Likewsie.
(TARGET_SYNC_HI_QI): Likewise.
(TARGET_SYNC_TI): Likewise.
(MASK_CRYPTO): Likewise.
(MASK_DIRECT_MOVE): Likewise.
(MASK_P8_FUSION): Likewise.
(MASK_P8_VECTOR): Likewise.
(REG_ALLOC_ORDER): Move fr13 to be lower in priority so that the
TFmode temporary used by some of the direct move instructions to
get two FP temporary registers does not force creation of a stack
frame.
(VLOGICAL_REGNO_P): Allow vector logical operations in GPRs.
(MODES_TIEABLE_P): Move the VSX tests above the Altivec tests so
that any VSX registers are tieable, even if they are also an
Altivec vector mode.
(r6000_reg_class_enum): Add wm, wr, wv constraints.
(RS6000_BTM_P8_VECTOR): Power8 builtin support.
(RS6000_BTM_CRYPTO): Likewise.
(RS6000_BTM_COMMON): Likewise.
PR target/19599
PR target/57340
* config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
(any_sibcall_could_use_r3): this and handle indirect calls.
(arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.
projects / thirdparty / gcc.git / log
