Andrew Goodbody [Mon, 4 Aug 2025 16:03:57 +0000 (17:03 +0100)]
net: fm: Correct test for timeout
In bmi_rx_port_disable and bmi_tx_port_disable the use of post-decrement
on the test in the while loop for a timeout means that timeout will be
equal to -1 on exit in that case. Adjust the test for this expected
value.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Anshul Dalal [Thu, 14 Aug 2025 15:21:43 +0000 (20:51 +0530)]
remoteproc: k3: update compatible for am654 syscon
The existing compatible name for U-Boot's k3 system controller driver
i.e "ti,am625-system-controller" has been added to linux[1] device-tree.
This compatible in kernel is meant for configuring the Control Module
registers (CTRL_MMR0).
However in U-Boot, the matching driver was being used to load the system
firmware on the secure M-cores by the R5 SPL and therefore must be
updated to a different compatible to avoid conflicts.
Therefore, this patch renames all references of the compatible to
"ti,am654-tisci-rproc-r5". The "-r5" is appended so as to avoid any
future conflicts since r5 specific compatibles should only be useful for
U-Boot.
configs: versal2: Add usb_pgood_delay for versal2 boards
Add usb_pgood_delay to ensure proper detection of USB devices.
Increase the USB power good delay for versal2 specific boards,
as certain USB sticks may not be detected without it.
Andrew Goodbody [Mon, 18 Aug 2025 09:24:36 +0000 (10:24 +0100)]
net: axi_emac: Fix timeout test
The timeout test in axi_dma_init is not correct due to the
post-decrement used on the timeout variable which will mean timeout is
not 0 if the timeout occurs. Make the timeout variable an int instead of
a u32 and then test for timeout being -1.
Michal Simek [Tue, 29 Jul 2025 13:55:20 +0000 (15:55 +0200)]
arm64: zynqmp: Add missing ethernet alias for kr260-revB
Ethernet aliases are used in fdt_fixup_ethernet() to inject
local-mac-address in every boot for OS. Similar change has been done for
other carrier cards by commit c4a711253613 ("arm64: zynqmp: Describe
ethernet controllers via aliases on SOM").
Michal Simek [Mon, 28 Jul 2025 07:07:54 +0000 (09:07 +0200)]
fpga: lattice: Remove unused support
There is no single platform which is using this driver that's why remove it
completely. Some issues regarding this code are also reported by Coverity
(CID 583143, 583144, 583145, 583146).
Frank Böwingloh [Fri, 8 Aug 2025 12:31:34 +0000 (14:31 +0200)]
soc: xilinx: zynqmp: Fix zu1cg device detection
Currently u-boot displayed a zu1cg soc as "Chip: zu1eg".
A value of 0468_8093h in the IDCODE (CSU) Register defines a ZU1 soc
not only for the EG family but also for the CG family as described
in the Xilinx Zynq UltraScale+ UG1085 documentation in Table 1-2.
Andrew Goodbody [Thu, 7 Aug 2025 10:04:05 +0000 (11:04 +0100)]
pinctrl: zynqmp: Avoid using uninitialised variable
In zynqmp_pinconf_set if param is PIN_CFG_IOSTANDARD or
PIN_CONFIG_POWER_SOURCE and zynqmp_pm_pinctrl_get_config returns an
error then value will not be assigned to when its value is tested to be
not equal to arg. Add code to only test value not equal to arg if ret is
false.
Andrew Goodbody [Thu, 7 Aug 2025 10:04:04 +0000 (11:04 +0100)]
pinctrl: zynqmp: Ensure ret is initialised
In zynqmp_pinctrl_prepare_func_groups if called with func->ngroups == 0
then ret will not be assigned to before its value is returned on exit.
Initialise ret to ensure it is always valid.
- Fix the environment location when booting from USB on i.MX93.
- Fix env location when booting from USB on phycore-imx93.
- Fix conflict early SPL malloc address on imx93 boards.
Patrick Delaunay [Wed, 23 Jul 2025 15:09:16 +0000 (17:09 +0200)]
usb: dwc2: fix reset logic in dwc2_core_reset
Use GUSBCFG_FORCEHOSTMODE to detected the HOST forced mode as it is done
in the Linux driver drivers/usb/dwc2/core.c:dwc2_core_reset().
The host polling must be executed only if the current mode is host,
either due to the force HOST mode (which persists after core reset)
or the connector id pin.
The GUSBCFG_FORCEDEVMODE bits is used to force the device mode (for
example used on STM32MP1x platform) and when it is activated the DWC2 reset
failed with the trace:
"dwc2_core_reset: Waiting for GINTSTS_CURMODE_HOST timeout"
Fixes: c5d685b8993c ("usb: dwc2: Unify flush and reset logic with v4.20a support") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Junhui Liu <junhui.liu@pigmoral.tech> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Tim Harvey [Mon, 21 Jul 2025 18:02:05 +0000 (11:02 -0700)]
usb: ehci-mx6: Add i.MX95 OTG support
When the usb node is defined dr_mode="otg" ehci_usb_phy_mode() is called
to determine the mode from status registers.
The IMX95RM does not currently define the USBNC STATUS register but it is
assumed to be an omission as the first three registers are defined.
It has been expirimentally verified that the USBNC_PHY_STATUS register
at offset 0x23C bit4 (USBNC_PHYSTATUS_ID_DIG) reads 0 when USB_ID is GND
and 1 when floating.
Use is_imx9() as this driver works for i.MX91, i.MX93 and i.MX95 and all
of these determine the role based on the USBNC_PHY_STATUS register.
Fixes: 801b5fafd35d "(usb: ehci-mx6: Add i.MX95 support") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tim Harvey [Wed, 9 Jul 2025 15:24:08 +0000 (08:24 -0700)]
phy: phy-imx8mq-usb: Add support for i.MX95 USB3 PHY
Add initial support for i.MX95 USB.30 PHY, which is similar to
the i.MX8MQ and i.MX8MP USB PHY.
The i.MX95 USB3 PHY has a Type-C Assist block (TCA) consisting of two
functional blocks (XBar assist and VBus assist) and is documented
in the i.MX95 RM Chapter 163.3.8 Type-C assist (TCA) block.
Instead of relying on an external MUX for Type-C plug orientation the
XBar can handle the flip internally.
Add initial support for i.MX95 by:
- allowing the driver to be enabled i.MX95
- resetting the XBar
- configuring the TCA in System Configuration mode (which was determined
to be necessary to enable the PHY in device-mode)
Follow-on support will need to be added to steer the XBar based on
either board design (if only one pair is brought out) or if used with a
Type-C controller.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Alice Guo <alice.guo@nxp.com>
Andrew Goodbody [Thu, 31 Jul 2025 16:21:32 +0000 (17:21 +0100)]
mtd: nand: Do not dereference before NULL check
In nanddev_init mtd and memorg are assigned values that dereference nand
but this happens before a NULL check for nand. Move the assignments
after the NULL check.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Miquel Raynal [Mon, 4 Aug 2025 09:21:37 +0000 (11:21 +0200)]
cmd: mtd: Enable speed benchmarking
Linux features a flash_speed speed test from the mtd-utils suite, U-Boot
does not. Benchmarks are useful for speed improvement developments as
well as troubleshooting or regression testing sometimes.
david regan [Thu, 14 Aug 2025 18:04:55 +0000 (11:04 -0700)]
cmd: nand: bug fix MTD_OOB_AUTO to MTD_OPS_AUTO_OOB
bug fix MTD_OOB_AUTO to MTD_OPS_AUTO_OOB since MTD_OOB_AUTO does not exist
Fixes: dfe64e2c8973 ("mtd: resync with Linux-3.7.1") Signed-off-by: david regan <dregan@broadcom.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The driver currently does:
mtd->dev->parent = cadence->dev;
This works in Linux because `struct mtd_info` embeds a `struct device`,
so `mtd->dev` is always valid and its `.parent` can be set.
In U-Boot, however, `mtd->dev` is only a pointer to a `struct udevice`.
Dereferencing it before assignment is invalid, which breaks the device
hierarchy. As a result, consumers relying on `mtd->dev` (e.g. partition
parser, reset and re-init paths) operate on a dangling pointer. This
leads to failures during warm reset when the NAND device is accessed
again.
Fix by assigning the device pointer directly:
mtd->dev = cadence->dev;
This matches U-Boot’s device model, preserves a valid hierarchy, and
resolves the warm reset issue on Cadence NAND.
Fixes: ebc41cad ("drivers: mtd: nand: Add driver for Cadence Nand") Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Ye Li [Wed, 20 Aug 2025 13:08:51 +0000 (15:08 +0200)]
imx: imx93_{evk, frdm, qsb}: Fix conflict SPL early malloc address
Because the early malloc pool size is set to 0x18000, so using this
start address may cause conflict with ATF, then corrupt the heap data.
So we delete the definition to use the default early malloc pool from
CONFIG_SPL_STACK to avoid any conflict
Jérémie Dautheribes: applied the same patch to the frdm and qsb
imx93-based boards Signed-off-by: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>
Primoz Fiser [Tue, 19 Aug 2025 05:39:41 +0000 (07:39 +0200)]
board: phytec: phycore-imx93: Fix EEPROM bus mismatch in SPL
Fix PHYTEC EEPROM bus mismatch between SPL and U-Boot proper by enabling
CONFIG_SPL_DM_SEQ_ALIAS=y on phyCORE-i.MX93 boards. This way, both the
SPL and U-Boot proper will respect the device-tree aliases for I2C devs
and use the same I2C bus number for phytec_eeprom_data_setup() function
calls. This makes code less confusing and more robust.
Fixes an issue apparent since commit 79f3e77133bd ("Subtree merge tag
'v6.16-dts' of dts repo [1] into dts/upstream") where SPL would spew the
following error:
phytec_eeprom_read: i2c EEPROM not found: -110.
phytec_eeprom_data_setup: EEPROM data init failed
While later in U-Boot proper, EEPROM would be successfully read out.
This happens because Linux device-tree for phyBOARD-Segin-i.MX93 since
aforementioned commit enables I2C bus 2 (lpi2c2 is used for audio codec
and RTC) which breaks SPL I2C bus number ordering and I2C EEPROM bus is
shifted by +1. Now, lets prevent this from happening again by utilizing
device-tree aliases also in the SPL.
arm: imx: imx9: soc: Fix env location when booting from USB
On i.MX9 platforms, when booting from USB, the U-Boot environment is
always assumed to be in RAM. However, this causes the boot to hang when
`CONFIG_ENV_IS_NOWHERE` is not enabled. The boot also hangs even if the
environment is present in another storage media (for example, eMMC). Fix
the issue by correctly handling the U-Boot environment's location when
booting from USB. Also for i.MX95, set the environment location based on
the ENV config and not solely based on the boot device type.
Suggested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
Tom Rini [Thu, 21 Aug 2025 21:05:15 +0000 (15:05 -0600)]
Merge patch series "bootstd: rauc: Fix segfault when scanning device with unsupported layout"
Martin Schwan <m.schwan@phytec.de> says:
This series fixes a segfault, that would occur at the end of scanning a
device, which does not contain the required partition layout scheme for
a RAUC system.
With this series, a "bootflow scan" should now correctly scan the
specified devices with boot method "rauc" without crashing on invalid
partition schemes.
Anshul Dalal [Thu, 14 Aug 2025 15:21:43 +0000 (20:51 +0530)]
remoteproc: k3: update compatible for am654 syscon
The existing compatible name for U-Boot's k3 system controller driver
i.e "ti,am625-system-controller" has been added to linux[1] device-tree.
This compatible in kernel is meant for configuring the Control Module
registers (CTRL_MMR0).
However in U-Boot, the matching driver was being used to load the system
firmware on the secure M-cores by the R5 SPL and therefore must be
updated to a different compatible to avoid conflicts.
Therefore, this patch renames all references of the compatible to
"ti,am654-tisci-rproc-r5". The "-r5" is appended so as to avoid any
future conflicts since r5 specific compatibles should only be useful for
U-Boot.
Philip Molloy [Thu, 14 Aug 2025 13:28:13 +0000 (13:28 +0000)]
mach-sc5xx: generate U-Boot proper in ADI ldr format
Generating an ldr boot stream containing U-Boot Proper was never added
to U-Boot because it is done by the ADI Yocto layer. Add it to U-Boot to
support projects that do not use that layer.
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Maxim Kochetkov [Wed, 13 Aug 2025 05:54:32 +0000 (08:54 +0300)]
serial-uclass: set GD_FLG_SERIAL_READY only when cur_serial_dev is assigned
serial_find_console_or_panic() may left cur_serial_dev unassigned if
REQUIRE_SERIAL_CONSOLE is not set. Setting GD_FLG_SERIAL_READY in
this situation confuses serial console code. It tries to use
unassigned driver instead of debug port and stops printing.
So check cur_serial_dev before setting GD_FLG_SERIAL_READY to allow
console to keep printing via debug port.
Andrew Goodbody [Tue, 12 Aug 2025 10:26:06 +0000 (11:26 +0100)]
sound: maxim_codec: Fix coding mistake
In maxim_i2c_read the code mistakenly just returned the return value
from dm_i2c_read leaving the following code unreachable. Instead assign
ret to be the return value from dm_i2c_read so that the following code
can operate as expected.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Fri, 8 Aug 2025 11:32:36 +0000 (12:32 +0100)]
ram: renesas: dbsc5: Fix off by 1 errors
In dbsc5_read_vref_training the arrays dvw_min_byte0_table and
dvw_min_byte1_table have 128 elements per channel. The variable
vref_stop_index is limited to be a maximum of 128. This means that the
index used to access the arrays must use a test of '< vref_stop_index'
rather than '<= vref_stop_index' in order to prevent out of bounds
accesses to the arrays.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Wed, 20 Aug 2025 17:07:22 +0000 (11:07 -0600)]
Merge patch series "Add support for Ethernet boot"
Chintan Vankar <c-vankar@ti.com> says:
This series adds bind method for CPSW to avoid explicit probing, removes
explicit probing of CPSW, adds support for Ethernet boot on SK-AM68,
SK-AM62P-LP, J722S, SK-AM69.
net: ti: Kconfig: Enable SPL_SYSCON config for CPSW
TI's Ethernet switch needs system controllers enabled in R5SPL stage while
booting via Ethernet. Enable SPL_SYSCON config for
CONFIG_TI_AM65_CPSW_NUSS.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Bind method of "am65_cpsw_nuss" driver will ensure binding of it's child
driver "am65_cpsw_nuss_ports", and there is no need to probe CPSW driver
explicitly.
Bind method of "am65_cpsw_nuss" driver will ensure binding of it's child
driver "am65_cpsw_nuss_ports", and there is no need to probe CPSW driver
explicitly.
Bind method of am65_cpsw_nuss driver will ensure binding of it's child
driver am65_cpsw_nuss_ports, and there is no need to call CPSW driver
explicitly. Remove explicit probing of CPSW driver for AM62x.
net: ti: am65-cpsw-nuss: Define bind method for CPSW driver
CPSW driver is defined as UCLASS_MISC driver which needs to be probed
explicitly. Define bind method for CPSW driver to scan and bind
ethernet-ports with UCLASS_ETH driver which will eventually probe CPSW
driver and avoid probing CPSW driver explicitly.
Tom Rini [Tue, 19 Aug 2025 17:26:39 +0000 (11:26 -0600)]
Merge patch series "ram: k3-ddrss: Support partial inline ECC"
Neha Malcom Francis <n-francis@ti.com> says:
Currently, the inline ECC implementation enables inline ECC across the
entire DDR space. However this is not always required and a more common
ask is to have only a portion of the DDR protected as enabling ECC
impacts read/write performance metrics.
This series aims to modify the logic to firstly support partial inline
ECC in its' most basic form which works for single controllers. Then it
introduces an algorithm to support multi DDR controllers where
interleaving plays a role. Since interleaving is handled by the MSMC, it
only makes sense to have the MSMC decide the inline ECC ranges for each
DDR.
This series also introduces support for multiple partial regions of inline
ECC however due to complexity only support for single DDR is present now.
WIP: A commandline test case patch for verifying the correct behaviour
of inline ECC including partial case. Was targeted for v2 however a little
tricky to make it a general test case especially for multi-DDR cases, so
have not combined it in this series for now.
Testing:
- Memtester runs for J721S2 and J784S4 platforms with and without ECC
enablement runs fine.
- Along with patches that add support for the commandline test (see WIP
note above) J784S4 shows expected behavior for three sets of partial
inline ECC regions (non-overlapping, and after modifying J784S4 to
have single DDR instead of multi-DDR):
https://gist.github.com/nehamalcom/bde7e14e96485e4a188c3af3af6d75d6
ram: k3-ddrss: Add support for partial inline ECC in multi-DDR systems
The existing approach does not account for interleaving in the DDRs when
setting up regions. There is support for MSMC to calculate the regions
for each DDR, so modify k3_ddrss_probe to set the regions accordingly
for multi-DDR systems.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for MSMC calculation of DDR inline ECC regions
Add support for calculation of the protected regions for each DDR in
multi-DDR systems. Since MSMC is the parent node of the individual DDRs
as well as responsible for their interleaving, it only makes sense for
MSMC to contain the logic for dividing the regions.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for number of controllers under MSMC
In K3 multi-DDR systems, the MSMC is responsible for the interleave
mechanism across all the DDR controllers. Add support for MSMC to obtain
the number of controllers it's responsible for using the DT.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
As we increase the functionalities that the K3 DDRSS sub-system support,
it is becoming more evident that the same logic cannot apply to both
single as well as multiple DDR controller devices. Add
CONFIG_K3_MULTI_DDR to be used to differentiate between the two.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add comment about ecc_reserved_space
The reserved space needed for storing the parity remains the same no
matter the size of the region that is being protected. Add this as a
comment for better code understanding.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
To prevent checkpatch warning once we start using this macro more
frequently, shorten the length of it. While at it, also move the
structure k3_ddrss_ecc_region above k3_msmc so that future patches can
have it as a member of k3_msmc.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Use DDR address instead of system address for ecc_regions
Let ecc_regions[x].start reflect the start of the ECC region in terms of
DDR addressing rather than system addressing. This will make it easier
to extend the usage of the same ecc_regions structure for multi-DDR
systems as well.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Andrew Goodbody [Tue, 12 Aug 2025 10:13:50 +0000 (11:13 +0100)]
soc: ti: k3-navss-ringacc: Do not use uninitialised variable
In k3_nav_ringacc_probe_dt there can be no error code returned from
dev_read_u32_default so ret is not assigned to and should not be used.
Remove the use of ret from the dev_err call as it is unitialised.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Fri, 8 Aug 2025 12:00:22 +0000 (13:00 +0100)]
remoteproc: ti_k3_arm64: Cannot set or compare u8 to 16bits
In the struct ti_sci_proc the fields proc_id and host_id are declared as
u8 so cannot be set to nor compared with a macro defined with a value
using 16 bits. Change the macro to only use 8 bits to make the code work
as expected.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Tom Rini [Tue, 12 Aug 2025 17:59:08 +0000 (11:59 -0600)]
sandbox: Add generic asm/atomic.h
In order to compile code that uses <asm/atomic.h> on sandbox, we must
provide this header. RISC-V shows us today how to do so with the generic
header implementation, so copy that.
Normally, local_save_flags is used as part of the local_irq_* macros, so
remove that as it's unused. Make local_irq_save do something to the
passed variable so that it won't trigger unused variable warnings later.
Andrew Goodbody [Tue, 12 Aug 2025 10:36:53 +0000 (11:36 +0100)]
sound: rt5677: Cannot test unsigned for being negative
In rt5677_bic_or the call to rt5677_i2c_read returns an int so old
should also be an int to receive that value and then be able to test it
for being negative which would indicate an error.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
projects / thirdparty / u-boot.git / log
