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13 months agodt-bindings: pinctrl: aspeed,ast2600-pinctrl: add NCSI groups
Potin Lai [Fri, 21 Jun 2024 09:31:41 +0000 (17:31 +0800)] 
dt-bindings: pinctrl: aspeed,ast2600-pinctrl: add NCSI groups

In the NCSI pin table, the reference clock output pin (RMIIXRCLKO) is not
needed on the management controller side.

Add "NCSI" pin groups that are equivalent to the RMII pin groups, but
without the RMIIXRCLKO pin.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/20240621093142.698529-2-potin.lai.pt@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: qcom: Introduce SM4250 LPI pinctrl driver
Srinivas Kandagatla [Sat, 22 Jun 2024 16:49:31 +0000 (17:49 +0100)] 
pinctrl: qcom: Introduce SM4250 LPI pinctrl driver

Add support for the pin controller block on SM4250 Low Power Island.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/20240612-sm4250-lpi-v4-2-a0342e47e21b@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: qcom: Add SM4250 pinctrl
Srinivas Kandagatla [Sat, 22 Jun 2024 16:49:30 +0000 (17:49 +0100)] 
dt-bindings: pinctrl: qcom: Add SM4250 pinctrl

Add device tree binding Documentation details for Qualcomm SM4250 LPASS
LPI(Low power Island) pinctrl device.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20240612-sm4250-lpi-v4-1-a0342e47e21b@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: k210: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:17 +0000 (21:20 +0800)] 
pinctrl: k210: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-19-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: freescale: mxs: Fix refcount of child
Peng Fan [Sat, 4 May 2024 13:20:16 +0000 (21:20 +0800)] 
pinctrl: freescale: mxs: Fix refcount of child

of_get_next_child() will increase refcount of the returned node, need
use of_node_put() on it when done.

Per current implementation, 'child' will be override by
for_each_child_of_node(np, child), so use of_get_child_count to avoid
refcount leakage.

Fixes: 17723111e64f ("pinctrl: add pinctrl-mxs support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-18-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: pinconf-generic: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:15 +0000 (21:20 +0800)] 
pinctrl: pinconf-generic: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-17-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: bcm: bcm63xx: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:14 +0000 (21:20 +0800)] 
pinctrl: bcm: bcm63xx: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-16-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: mediatek: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:12 +0000 (21:20 +0800)] 
pinctrl: mediatek: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-14-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: nomadik: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:11 +0000 (21:20 +0800)] 
pinctrl: nomadik: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-13-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: s32cc: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:10 +0000 (21:20 +0800)] 
pinctrl: s32cc: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-12-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: at91: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:09 +0000 (21:20 +0800)] 
pinctrl: at91: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-11-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: rockchip: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:07 +0000 (21:20 +0800)] 
pinctrl: rockchip: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-9-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: spear: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:04 +0000 (21:20 +0800)] 
pinctrl: spear: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-6-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: sprd: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:03 +0000 (21:20 +0800)] 
pinctrl: sprd: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-5-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: starfive: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:02 +0000 (21:20 +0800)] 
pinctrl: starfive: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-4-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: tegra: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:00 +0000 (21:20 +0800)] 
pinctrl: tegra: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-2-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: freescale: Select missing features
Linus Walleij [Tue, 18 Jun 2024 11:26:07 +0000 (13:26 +0200)] 
pinctrl: freescale: Select missing features

Fix the compile problem for pinctrl-imx-scmi by selecting the
right core features so the symbols resolve.

Fixes: 1e37f761d016 ("pinctrl: imx: support SCMI pinctrl protocol for i.MX95")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406172317.Sds860AS-lkp@intel.com/
Link: https://lore.kernel.org/20240618-imx-scmi-generic-v1-1-67808a48beac@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: nuvoton: ma35d1: Fix an IS_ERR() vs NULL check
Dan Carpenter [Wed, 12 Jun 2024 10:43:33 +0000 (13:43 +0300)] 
pinctrl: nuvoton: ma35d1: Fix an IS_ERR() vs NULL check

The fwnode_iomap() function doesn't return error pointers, it returns
NULL.  It's the same as of_iomap() in that way.  Update the check
accordingly.

Fixes: ecc5bf868673 ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/840152f9-d3bb-410e-8164-4c5043e1983e@moroto.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: add missing MODULE_DESCRIPTION() macros
Jeff Johnson [Tue, 11 Jun 2024 04:21:05 +0000 (21:21 -0700)] 
pinctrl: add missing MODULE_DESCRIPTION() macros

When ARCH=x86, make allmodconfig && make W=1 C=1 reports:
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/bcm/pinctrl-bcm4908.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08_i2c.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08_spi.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/meson/pinctrl-meson.o

Add the missing invocation of the MODULE_DESCRIPTION() macro to all
files which have a MODULE_LICENSE().

This includes many meson drivers which, although they did not produce
a warning with the x86 allmodconfig configuration, may cause this
warning with ARM or ARM64 configurations.

Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for Amlogic Pinctrl drivers
Link: https://lore.kernel.org/r/20240610-md-drivers-pinctrl-v1-1-68462e3d960c@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: zynqmp: Support muxing individual pins
Sean Anderson [Mon, 10 Jun 2024 22:35:50 +0000 (18:35 -0400)] 
pinctrl: zynqmp: Support muxing individual pins

While muxing groups of pins at once can be convenient for large
interfaces, it can also be rigid. This is because the group is set to
all pins which support a particular function, even though not all pins
may be used. For example, the sdhci0 function may be used with a 8-bit
eMMC, 4-bit SD card, or even a 1-bit SD card. In these cases, the extra
pins may be repurposed for other uses, but this is not currently
allowed.

There is not too much point in pin "groups" when there are not actual
pin groups at the hardware level. The pins can all be muxed
individually, so there's no point in adding artificial groups on top.
Just mux the pins like the hardware allows.

To this effect, add a new group for each pin which can be muxed. These
groups are part of each function the pin can be muxed to. We treat group
selectors beyond the number of groups as "pin" groups. To set this up,
we initialize groups before functions, and then create a bitmap of used
pins for each function. These used pins are appended to the function's
list of groups.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240610223550.2449230-3-sean.anderson@linux.dev
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: xilinx: Add support for function with pins
Sean Anderson [Mon, 10 Jun 2024 22:35:49 +0000 (18:35 -0400)] 
dt-bindings: pinctrl: xilinx: Add support for function with pins

Support specifying the function per-pin. The driver doesn't care
whether you use pins or groups for this purpose.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240610223550.2449230-2-sean.anderson@linux.dev
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails
Yang Yingliang [Thu, 6 Jun 2024 02:37:04 +0000 (10:37 +0800)] 
pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails

This driver calls pinctrl_register_and_init() which is not
devm_ managed, it will leads memory leak if pinctrl_enable()
fails. Replace it with devm_pinctrl_register_and_init().
And add missing of_node_put() in the error path.

Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240606023704.3931561-4-yangyingliang@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: single: fix possible memory leak when pinctrl_enable() fails
Yang Yingliang [Thu, 6 Jun 2024 02:37:03 +0000 (10:37 +0800)] 
pinctrl: single: fix possible memory leak when pinctrl_enable() fails

This driver calls pinctrl_register_and_init() which is not
devm_ managed, it will leads memory leak if pinctrl_enable()
fails. Replace it with devm_pinctrl_register_and_init().
And call pcs_free_resources() if pinctrl_enable() fails.

Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240606023704.3931561-3-yangyingliang@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: core: fix possible memory leak when pinctrl_enable() fails
Yang Yingliang [Thu, 6 Jun 2024 02:37:02 +0000 (10:37 +0800)] 
pinctrl: core: fix possible memory leak when pinctrl_enable() fails

In devm_pinctrl_register(), if pinctrl_enable() fails in pinctrl_register(),
the "pctldev" has not been added to dev resources, so devm_pinctrl_dev_release()
can not be called, it leads memory leak.

Introduce pinctrl_uninit_controller(), call it in the error path to free memory.

Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240606023704.3931561-2-yangyingliang@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: bcm2835: Use string_choices API instead of ternary operator
Stefan Wahren [Mon, 3 Jun 2024 18:19:38 +0000 (20:19 +0200)] 
pinctrl: bcm2835: Use string_choices API instead of ternary operator

Use modern string_choices API instead of manually determining the
output using ternary operator.

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20240603181938.76047-3-wahrenst@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: aspeed,ast2600-pinctrl: Describe I3C, USB
Andrew Jeffery [Fri, 31 May 2024 03:02:49 +0000 (12:32 +0930)] 
dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Describe I3C, USB

I3C1 and I3C2 become muxed functions in the mass production release of
the AST2600. Also document the USB2A device and USB2B HID mux options.

Squash warnings such as:

    arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dtb: pinctrl: usb2ad_default:function:0: 'USB2AD' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NR
 I4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB
 2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']

Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240531-dt-warnings-gpio-ast2600-pinctrl-funcs-groups-v1-3-a6fe2281a1b8@codeconstruct.com.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: aspeed,ast2500-pinctrl: Describe SGPM
Andrew Jeffery [Fri, 31 May 2024 03:02:48 +0000 (12:32 +0930)] 
dt-bindings: pinctrl: aspeed,ast2500-pinctrl: Describe SGPM

Squash warnings such as:

    arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb: pinctrl@80: sgpm_default:groups:0: 'SGPM' is not one of ['ACPI', 'ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'DDCCLK', 'DDCDAT', 'ESPI', 'FWSPICS1', 'FWSPICS2', 'GPID0', 'GPID2', 'GPID4', 'GPID6', 'GPIE0', 'GPIE2', 'GPIE4', 'GPIE6', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'LAD0', 'LAD1', 'LAD2', 'LAD3', 'LCLK', 'LFRAME', 'LPCHC', 'LPCPD', 'LPCPLUS', 'LPCPME', 'LPCRST', 'LPCSMI', 'LSIRQ', 'MAC1LINK', 'MAC2LINK', 'MDIO1', 'MDIO2', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PNOR', 'PWM0', 'PWM1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'RGMII1', 'RGMII2', 'RMII1', 'RMII2', 'RXD1', '
 RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SCL1', 'SCL2', 'SD1', 'SD2', 'SDA1', 'SDA2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1CS1', 'SPI1DEBUG', 'SPI1PASSTHRU', 'SPI2CK', 'SPI2CS0', 'SPI2CS1', 'SPI2MISO', 'SPI2MOSI', 'TIMER3', 'TIMER4', 'TIMER5', 'TIMER6', 'TIMER7', 'TIMER8', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART6', 'USB11BHID', 'USB2AD', 'USB2AH', 'USB2BD', 'USB2BH', 'USBCKI', 'VGABIOSROM', 'VGAHS', 'VGAVS', 'VPI24', 'VPO', 'WDTRST1', 'WDTRST2']

Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240531-dt-warnings-gpio-ast2600-pinctrl-funcs-groups-v1-2-a6fe2281a1b8@codeconstruct.com.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: aspeed: Use block syntax for function and groups
Andrew Jeffery [Fri, 31 May 2024 03:02:47 +0000 (12:32 +0930)] 
dt-bindings: pinctrl: aspeed: Use block syntax for function and groups

The expansion makes the documents a lot longer, but it's easier to
review changes to functions and groups when we're not having to deal
with line wrapping.

Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240531-dt-warnings-gpio-ast2600-pinctrl-funcs-groups-v1-1-a6fe2281a1b8@codeconstruct.com.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agoMerge tag 'renesas-pinctrl-for-v6.11-tag1' of git://git.kernel.org/pub/scm/linux...
Linus Walleij [Mon, 17 Jun 2024 07:27:36 +0000 (09:27 +0200)] 
Merge tag 'renesas-pinctrl-for-v6.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.11

  - Add support for the new RZ/V2H(P) (R9A09G057) Soc,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: keembay: Fix func conversion in keembay_build_functions()
Nathan Chancellor [Tue, 11 Jun 2024 18:13:32 +0000 (11:13 -0700)] 
pinctrl: keembay: Fix func conversion in keembay_build_functions()

A recent refactoring to use the func member in struct function_desc
missed converting one uses of name in keembay_build_functions(),
resulting in a build failure:

  drivers/pinctrl/pinctrl-keembay.c: In function 'keembay_build_functions':
  drivers/pinctrl/pinctrl-keembay.c:1630:35: error: 'struct function_desc' has no member named 'name'
   1630 |                         if (!fdesc->name) {
        |                                   ^~

Perform the same conversion to resolve the build error.

Fixes: 73ee52205e5a ("pinctrl: keembay: Convert to use func member")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/20240611-pinctrl-keembay-fix-func-conversion-v1-1-3197f2ded3f7@kernel.org
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406131133.WwdetfBL-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: imx: support SCMI pinctrl protocol for i.MX95
Peng Fan [Tue, 21 May 2024 06:25:59 +0000 (14:25 +0800)] 
pinctrl: imx: support SCMI pinctrl protocol for i.MX95

The generic pinctrl-scmi.c driver could not be used for i.MX95 because
i.MX95 SCMI firmware not supports functions, groups or generic
'Pin Configuration Type and Enumerations' listed in SCMI Specification.

i.MX95 System Control Management Interface(SCMI) firmware only supports
below pin configuration types which are OEM specific types:
    192: PIN MUX
    193: PIN CONF
    194: DAISY ID
    195: DAISY VAL

To Support fsl,pins property together with SCMI OEM protocol, add this
driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-3-9a1175d735fd@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: scmi: add blocklist
Peng Fan [Tue, 21 May 2024 06:25:58 +0000 (14:25 +0800)] 
pinctrl: scmi: add blocklist

i.MX95 will have its own pinctrl scmi driver, so need block
pinctrl-scmi driver for i.MX95, otherwise there will be two pinctrl
devices for a single scmi protocol@19.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-2-9a1175d735fd@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensions
Peng Fan [Tue, 21 May 2024 06:25:57 +0000 (14:25 +0800)] 
dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensions

i.MX95 Pinctrl is managed by System Control Management Interface(SCMI)
firmware using OEM extensions. No functions, no groups are provided by
the firmware. So add i.MX95 specific properties.

To keep aligned with current i.MX pinctrl bindings, still use "fsl,pins"
for i.MX95.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-1-9a1175d735fd@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: qcom: sdm670: add pdc wakeirq map
Richard Acayan [Thu, 23 May 2024 23:06:20 +0000 (19:06 -0400)] 
pinctrl: qcom: sdm670: add pdc wakeirq map

The PDC was hooked up as a wakeup parent in the DTS in
commit 71f080633d1e ("arm64: dts: qcom: sdm670: Hook up PDC as
wakeup-parent of TLMM"), but the wakeirq mapping was not defined so it
had no effect. Add the mapping for wakeup interrupts on the PDC to their
corresponding pins.

Configuring a pin IRQ as dual-edge would break it unless the
wakeirq_dual_edge_errata flag is set.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20240523230619.256882-2-mailingradian@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: cy8c95x0: Use REGCACHE_MAPLE
Patrick Rudolph [Tue, 21 May 2024 15:25:59 +0000 (17:25 +0200)] 
pinctrl: cy8c95x0: Use REGCACHE_MAPLE

Use REGCACHE_MAPLE instead of REGCACHE_FLAT.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/20240521152602.1097764-3-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: cy8c95x0: Use regmap ranges
Patrick Rudolph [Tue, 21 May 2024 15:25:58 +0000 (17:25 +0200)] 
pinctrl: cy8c95x0: Use regmap ranges

Instead of implementing a custom register paging mechanism in
the driver use the existing regmap ranges feature.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/20240521152602.1097764-2-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: cy8c95x0: Use single I2C lock
Patrick Rudolph [Tue, 21 May 2024 15:25:57 +0000 (17:25 +0200)] 
pinctrl: cy8c95x0: Use single I2C lock

Currently there are 3 locks being used when accessing the chip, one
in the driver and one in each regmap. Reduce that to one driver only
lock that protects all regmap and regcache accesses.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/20240521152602.1097764-1-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: pinmux: Remove unused members from struct function_desc
Andy Shevchenko [Thu, 30 May 2024 08:55:20 +0000 (11:55 +0300)] 
pinctrl: pinmux: Remove unused members from struct function_desc

All drivers are converted to use embedded struct pinfunction.
Remove unused members from struct function_desc.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-12-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: mediatek: moore: Convert to use func member
Andy Shevchenko [Thu, 30 May 2024 08:55:19 +0000 (11:55 +0300)] 
pinctrl: mediatek: moore: Convert to use func member

Convert drivers to use func member embedded in struct function_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin function description.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-11-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: keembay: Convert to use func member
Andy Shevchenko [Thu, 30 May 2024 08:55:18 +0000 (11:55 +0300)] 
pinctrl: keembay: Convert to use func member

Convert drivers to use func member embedded in struct function_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin function description.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-10-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: ingenic: Convert to use func member
Andy Shevchenko [Thu, 30 May 2024 08:55:17 +0000 (11:55 +0300)] 
pinctrl: ingenic: Convert to use func member

Convert drivers to use func member embedded in struct function_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin function description.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-9-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: imx: Convert to use func member
Andy Shevchenko [Thu, 30 May 2024 08:55:16 +0000 (11:55 +0300)] 
pinctrl: imx: Convert to use func member

Convert drivers to use func member embedded in struct function_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin function description.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-8-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: pinmux: Embed struct pinfunction into struct function_desc
Andy Shevchenko [Thu, 30 May 2024 08:55:15 +0000 (11:55 +0300)] 
pinctrl: pinmux: Embed struct pinfunction into struct function_desc

struct function_desc is a particular version of the struct pinfunction
with associated opaque data. Start switching pin control core and
drivers to use it explicitly.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-7-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: pinmux: Add a convenient define PINCTRL_FUNCTION_DESC()
Andy Shevchenko [Thu, 30 May 2024 08:55:14 +0000 (11:55 +0300)] 
pinctrl: pinmux: Add a convenient define PINCTRL_FUNCTION_DESC()

Add PINCTRL_FUNCTION_DESC() macro for inline use.

While at it, fix adjective form in the comment of PINCTRL_GROUP_DESC().

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-6-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: mediatek: moore: Provide a helper macro PINCTRL_PIN_FUNCTION()
Andy Shevchenko [Thu, 30 May 2024 08:55:13 +0000 (11:55 +0300)] 
pinctrl: mediatek: moore: Provide a helper macro PINCTRL_PIN_FUNCTION()

Provide a helper macro to assign the struct function_desc entries.
This helps further refactoring.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-5-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: ingenic: Provide a helper macro INGENIC_PIN_FUNCTION()
Andy Shevchenko [Thu, 30 May 2024 08:55:12 +0000 (11:55 +0300)] 
pinctrl: ingenic: Provide a helper macro INGENIC_PIN_FUNCTION()

Provide a helper macro to assign the struct function_desc entries.
This helps further refactoring.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-4-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: equilibrium: Make use of struct pinfunction
Andy Shevchenko [Thu, 30 May 2024 08:55:11 +0000 (11:55 +0300)] 
pinctrl: equilibrium: Make use of struct pinfunction

Since pin control provides a generic data type for the pin function,
use it in the driver.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-3-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: berlin: Make use of struct pinfunction
Andy Shevchenko [Thu, 30 May 2024 08:55:10 +0000 (11:55 +0300)] 
pinctrl: berlin: Make use of struct pinfunction

Since pin control provides a generic data type for the pin function,
use it in the driver.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240530085745.1539925-2-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: rockchip: update rk3308 iomux routes
Dmitry Yashin [Wed, 15 May 2024 12:16:32 +0000 (17:16 +0500)] 
pinctrl: rockchip: update rk3308 iomux routes

Some of the rk3308 iomux routes in rk3308_mux_route_data belong to
the rk3308b SoC. Remove them and correct i2c3 routes.

Fixes: 7825aeb7b208 ("pinctrl: rockchip: add rk3308 SoC support")
Signed-off-by: Dmitry Yashin <dmt.yashin@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240515121634.23945-2-dmt.yashin@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: pinctrl-zynqmp: Use pin numbers stored in pin descriptor
Swati Agarwal [Mon, 27 May 2024 10:57:15 +0000 (12:57 +0200)] 
pinctrl: pinctrl-zynqmp: Use pin numbers stored in pin descriptor

Use pin numbers stored in the pin descriptors instead of index value while
creating the pin groups. Pin Id's are not same as Index values for Xilinx
Versal platform, so use the pin values from descriptor which works for both
ZynqMP and Versal platforms.

Signed-off-by: Swati Agarwal <swati.agarwal@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2413a1f99278d70313960f13daecda9ef54172d8.1716807432.git.michal.simek@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: ralink: mt76x8: fix pinmux function
Weihao Li [Mon, 27 May 2024 02:20:36 +0000 (10:20 +0800)] 
pinctrl: ralink: mt76x8: fix pinmux function

The current version of the pinctrl driver has some issues:

1. Duplicated "gpio" pmx function

The common code will add a "gpio" pmx functon to every pin group, so
it's not necessary to define a separate "gpio" pmx function in pin
groups.

2. Duplicated pmx function name

There are some same function name in different pin groups, which will
cause some problems. For example, when we want to use PAD_GPIO0 as
refclk output function, the common clk framework code will search the
entire pin function lists, then return the first one matched, in this
case the matched function list only include the PAD_CO_CLKO pin group
because there are three "refclk" pin function, which is added by
refclk_grp, spi_cs1_grp and gpio_grp.

To solve this problem, a simple way is just add a pingrp refix to
function name like mt7620 pinctrl driver does.

3. Useless "-" or "rsvd" functon

It's really unnecessary to add a reserved pin mux function to the
function lists, because we never use it.

Signed-off-by: Weihao Li <cn.liweihao@gmail.com>
Link: https://lore.kernel.org/r/20240527022036.31985-1-user@blabla
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: pinctrl-tps6594: make tps65224_muxval_remap and tps6594_muxval_remap as...
Nirmala Devi Mal Nadar [Fri, 17 May 2024 05:22:11 +0000 (05:22 +0000)] 
pinctrl: pinctrl-tps6594: make tps65224_muxval_remap and tps6594_muxval_remap as static to fix sparse warning

pinctrl: tps6594: Fix sparse warning.

warning: symbol 'tps65224_muxval_remap' was not declared. Should it be static?
warning: symbol 'tps6594_muxval_remap' was not declared. Should it be static?

Signed-off-by: Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202405111523.9yt759uX-lkp@intel.com/
Link: https://lore.kernel.org/r/0109018f85002ae1-6fb831b2-74c2-4559-98f1-a3ef25e72558-000000@ap-south-1.amazonses.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: qcom: spmi: Add PMC8380
Konrad Dybcio [Fri, 24 May 2024 23:37:29 +0000 (01:37 +0200)] 
pinctrl: qcom: spmi: Add PMC8380

PMC8380 is a new chip, featuring 10 GPIOs. Describe it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240525-topic-pmc8380_gpio-v2-2-2de50cb28ac1@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: qcom,pmic-gpio: Document PMC8380
Konrad Dybcio [Fri, 24 May 2024 23:37:28 +0000 (01:37 +0200)] 
dt-bindings: pinctrl: qcom,pmic-gpio: Document PMC8380

PMC8380 is a new PMIC used with X1 SoCs. Document it

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240525-topic-pmc8380_gpio-v2-1-2de50cb28ac1@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: core: reset gpio_device in loop in pinctrl_pins_show()
Léo DUBOIN [Thu, 25 Apr 2024 13:58:02 +0000 (15:58 +0200)] 
pinctrl: core: reset gpio_device in loop in pinctrl_pins_show()

We were not resetting the pointer to the associated gpio_device once
we are done displaying a pin's information.

This meant that once we reached the end of a gpio-range, if there
were pins right after it that did not belong to any known range,
they would be associated with the previous range's gpio device.

This resulted in those pins appearing as <4294966783:old_gdev> instead
of the expected <0:?> (due to gpio_num being -1).

Signed-off-by: Léo DUBOIN <lduboin@freebox.fr>
Link: https://lore.kernel.org/r/c40d0634abefa19e689ffd450e0f48a8d63c4fc4.1714049455.git.lduboin@freebox.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: core: take into account the pins array in pinctrl_pins_show()
Léo DUBOIN [Thu, 25 Apr 2024 13:58:01 +0000 (15:58 +0200)] 
pinctrl: core: take into account the pins array in pinctrl_pins_show()

We previously only looked at the 'pin_base' of the pinctrl_gpio_ranges
struct for determining if a pin matched a GPIO number.

This value is present only if the 'pins' array is not NULL,
and is 0 otherwise. This means that GPIO ranges declared using
gpiochip_add_pingroup_range(), thus making use of pins, were always matched
by the pins in the range [0-npins] even if they contained pins in a
completely separate range.

Signed-off-by: Léo DUBOIN <lduboin@freebox.fr>
Link: https://lore.kernel.org/r/6df39bd47942156be5713f8f4e317d2ad3e0ddeb.1714049455.git.lduboin@freebox.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver
Jacky Huang [Tue, 21 May 2024 01:24:47 +0000 (01:24 +0000)] 
pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver

Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and
add support for ma35d1 pinctrl.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: Document nuvoton ma35d1 pin control
Jacky Huang [Tue, 21 May 2024 01:24:46 +0000 (01:24 +0000)] 
dt-bindings: pinctrl: Document nuvoton ma35d1 pin control

Add documentation to describe nuvoton ma35d1 pin control and GPIO.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240521012447.42211-3-ychuang570808@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: reset: Add syscon to nuvoton ma35d1 system-management node
Jacky Huang [Tue, 21 May 2024 01:24:45 +0000 (01:24 +0000)] 
dt-bindings: reset: Add syscon to nuvoton ma35d1 system-management node

Add a compatible 'syscon' to the system management node since the system
control registers are mapped by this driver. The other driver must access
the system control registers through 'regmap' using a phandle that
references this node.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20240521012447.42211-2-ychuang570808@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: st: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:06 +0000 (21:20 +0800)] 
pinctrl: st: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20240504-pinctrl-cleanup-v2-8-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: stm32: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:01 +0000 (21:20 +0800)] 
pinctrl: stm32: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20240504-pinctrl-cleanup-v2-3-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agopinctrl: imx: Add pinctrl driver support for i.MX91
Peng Fan [Mon, 13 May 2024 09:20:47 +0000 (17:20 +0800)] 
pinctrl: imx: Add pinctrl driver support for i.MX91

Add NXP i.MX91 pinctrl driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20240513-imx91-pinctrl-v1-2-c99a23c6843a@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 months agodt-bindings: pinctrl: imx: Support i.MX91 IOMUXC
Peng Fan [Mon, 13 May 2024 09:20:46 +0000 (17:20 +0800)] 
dt-bindings: pinctrl: imx: Support i.MX91 IOMUXC

i.MX91 and i.MX93 share similar design. They could share same dt-binding
doc, so rename fsl,imx93-pinctrl.yaml to fsl,imx9-pinctrl.yaml and add
i.MX91 compatible string

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240513-imx91-pinctrl-v1-1-c99a23c6843a@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
14 months agopinctrl: renesas: rzg2l: Add support for RZ/V2H SoC
Lad Prabhakar [Thu, 30 May 2024 17:38:57 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC

Add pinctrl driver support for RZ/V2H(P) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240530173857.164073-16-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agodt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC
Lad Prabhakar [Thu, 6 Jun 2024 08:51:33 +0000 (09:51 +0100)] 
dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC

Add documentation for the pin controller found on the Renesas RZ/V2H(P)
(R9A09G057) SoC.  The RZ/V2H PFC varies slightly compared to the RZ/G2L
family:
  - Additional bits need to be set during pinmuxing,
  - The GPIO pin count is different.

Hence, a SoC-specific compatible string, 'renesas,r9a09g057-pinctrl', is
added for the RZ/V2H(P) SoC.

Also, add the 'renesas,output-impedance' property.  The drive strength
settings on RZ/V2H(P) depend on the different power rails coming out from
the PMIC (connected via I2C).  These power rails (required for drive
strength) can be 1.2V, 1.8V, or 3.3V.

Pins are grouped into 4 groups:

Group 1: Impedance
  - 150/75/38/25 ohms (at 3.3V)
  - 130/65/33/22 ohms (at 1.8V)

Group 2: Impedance
  - 50/40/33/25 ohms (at 1.8V)

Group 3: Impedance
  - 150/75/37.5/25 ohms (at 3.3V)
  - 130/65/33/22 ohms (at 1.8V)

Group 4: Impedance
  - 110/55/30/20 ohms (at 1.8V)
  - 150/75/38/25 ohms (at 1.2V)

The 'renesas,output-impedance' property, as documented, can be
[0, 1, 2, 3], these correspond to register bit values that can
be set in the PFC_IOLH_mn register, which adjusts the drive
strength value and is pin-dependent.

As power rail information may not be available very early in the boot
process, the 'renesas,output-impedance' property is added instead of
reusing the 'output-impedance-ohms' property.

Also, allow bias-disable, bias-pull-down and bias-pull-up properties
as these can be used to configure the pins.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240606085133.632307-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Acquire lock in rzg2l_pinctrl_pm_setup_pfc()
Lad Prabhakar [Thu, 30 May 2024 17:38:56 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Acquire lock in rzg2l_pinctrl_pm_setup_pfc()

To keep consistency with rzg2l_pinctrl_set_pfc_mode(), acquire the lock
in rzg2l_pinctrl_pm_setup_pfc() during PFC setup.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-15-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Add support for custom parameters
Lad Prabhakar [Thu, 30 May 2024 17:38:55 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add support for custom parameters

In preparation for passing custom params for RZ/V2H(P) SoC assign the
custom params that are being passed via struct rzg2l_pinctrl_data.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240530173857.164073-14-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Pass pincontrol device to pinconf_generic_parse_dt_config()
Lad Prabhakar [Thu, 30 May 2024 17:38:54 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Pass pincontrol device to pinconf_generic_parse_dt_config()

Pass the pincontrol device pointer to pinconf_generic_parse_dt_config()
in preparation for passing custom params.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-13-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Add support for pull-up/down
Lad Prabhakar [Thu, 30 May 2024 17:38:53 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add support for pull-up/down

Add support to configure bias-disable, bias-pull-up, and bias-pull-down
properties of the pin.

Two new function pointers, hw_to_bias_param() and bias_param_to_hw(),
are introduced in the struct rzg2l_pinctrl_data to configure bias
settings, as the values in the PUPD register differ when compared to the
RZ/G2L family and the RZ/V2H(P) SoC.

Value | RZ/G2L        | RZ/V2H
---------------------------------
00b:  | Bias Disabled | Pull up/down disabled
01b:  | Pull-up       | Pull up/down disabled
10b:  | Pull-down     | Pull-down
11b:  | Prohibited    | Pull-up

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240530173857.164073-12-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Add support to configure slew-rate
Lad Prabhakar [Thu, 30 May 2024 17:38:52 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add support to configure slew-rate

Add support to configure slew-rate property of the pin.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240530173857.164073-11-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Add function pointers for OEN register access
Lad Prabhakar [Thu, 30 May 2024 17:38:51 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add function pointers for OEN register access

Introduce function pointers oen_read() and oen_write(), in the struct
rzg2l_pinctrl_data to facilitate reading and writing to the PFC_OEN
register.  On the RZ/V2H(P) SoC, unlocking the PWPR.REGWE_B bit before
writing to the PFC_OEN register is necessary, and the PFC_OEN register
has more bits compared to the RZ/G2L family.  To handle these
differences between RZ/G2L and RZ/V2H(P) and to reuse the existing code
for RZ/V2H(P), these function pointers are introduced.

Additionally, populate these function pointers with appropriate data for
existing SoCs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Add function pointer for PMC register write
Lad Prabhakar [Thu, 30 May 2024 17:38:50 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add function pointer for PMC register write

Introduces pmc_writeb() function pointer, in the struct
rzg2l_pinctrl_data to facilitate writing to the PMC register.  On the
RZ/V2H(P) SoC, unlocking the PWPR.REGWE_A bit before writing to PMC
registers is required, whereas this is not the case for the existing
RZ/G2L family.  This addition enables the reuse of existing code for
RZ/V2H(P).  Additionally, populate this function pointer with
appropriate data for existing SoCs.

Note that this functionality is only handled in rzg2l_gpio_request(), as
PMC unlock/lock during PFC setup will be taken care of in the
pwpr_pfc_lock_unlock() function pointer.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Add function pointer for PFC register locking
Lad Prabhakar [Thu, 30 May 2024 17:38:49 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Add function pointer for PFC register locking

On the RZ/G2L SoC, the PFCWE bit controls writing to PFC registers.
However, on the RZ/V2H(P) SoC, the PFCWE (REGWE_A on RZ/V2H) bit controls
writing to both PFC and PMC registers.  Additionally, BIT(7) B0WI is
undocumented for the PWPR register on RZ/V2H(P) SoC.  To accommodate these
differences across SoC variants, introduce the pwpr_pfc_lock_unlock()
function pointer.

Note, in rzg2l_pinctrl_set_pfc_mode() the pwpr_pfc_lock_unlock(.., false)
is now called before PMC read/write and pwpr_pfc_lock_unlock(.., true) is
now called after PMC read/write this is to keep changes minimal for
RZ/V2H(P) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Validate power registers for SD and ETH
Lad Prabhakar [Thu, 30 May 2024 17:38:48 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Validate power registers for SD and ETH

On RZ/V2H(P) SoC, the power registers for SD and ETH do not exist,
resulting in invalid register offsets.  Ensure that the register offsets
are valid before any read/write operations are performed.  If the power
registers are not available, both SD and ETH will be set to '0'.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Enable variable configuration for all
Lad Prabhakar [Thu, 30 May 2024 17:38:47 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Enable variable configuration for all

Enable parsing of variable configuration for all architectures. This
prepares for adding support for the RZ/V2H SoC, which utilizes the ARM64
architecture and features port pins with variable configuration.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Drop struct rzg2l_variable_pin_cfg
Lad Prabhakar [Thu, 30 May 2024 17:38:46 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Drop struct rzg2l_variable_pin_cfg

Drop the rzg2l_variable_pin_cfg struct and instead use the
RZG2L_VARIABLE_PIN_CFG_PACK() macro for the variable pin configuration.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Allow more bits for pin configuration
Lad Prabhakar [Thu, 30 May 2024 17:38:45 +0000 (18:38 +0100)] 
pinctrl: renesas: rzg2l: Allow more bits for pin configuration

The pin configuration bits have been growing for every new SoCs being
added for the pinctrl-rzg2l driver which would mean updating the macros
every time for each new configuration.  To avoid this allocate additional
bits for pin configuration by relocating the known fixed bits to the very
end of the configuration.

Also update the size of 'cfg' to 'u64' to allow more configuration bits
in the 'struct rzg2l_variable_pin_cfg'.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240530173857.164073-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzn1: Use for_each_child_of_node_scoped()
Geert Uytterhoeven [Thu, 30 May 2024 09:19:29 +0000 (11:19 +0200)] 
pinctrl: renesas: rzn1: Use for_each_child_of_node_scoped()

Use the scoped variant of for_each_child_of_node() to simplify the code.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c0a28f466c42d5d59c7fadfa1fd05fd512d43b6f.1717060708.git.geert+renesas@glider.be
14 months agopinctrl: renesas: Use scope based of_node_put() cleanups
Peng Fan [Sat, 4 May 2024 13:20:05 +0000 (21:20 +0800)] 
pinctrl: renesas: Use scope based of_node_put() cleanups

Use scope based of_node_put() cleanup to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240504-pinctrl-cleanup-v2-7-26c5f2dc1181@nxp.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agodt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object
Lad Prabhakar [Tue, 23 Apr 2024 17:58:48 +0000 (18:58 +0100)] 
dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object

Drop the bogus check from object as this didn't really add restriction
check.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240423175900.702640-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agopinctrl: renesas: rzg2l: Use spin_{lock,unlock}_irq{save,restore}
Claudiu Beznea [Wed, 22 May 2024 05:54:21 +0000 (08:54 +0300)] 
pinctrl: renesas: rzg2l: Use spin_{lock,unlock}_irq{save,restore}

On PREEMPT_RT kernels the spinlock_t maps to an rtmutex. Using
raw_spin_lock_irqsave()/raw_spin_unlock_irqrestore() on
&pctrl->lock.rlock breaks the PREEMPT_RT builds. To fix this use
spin_lock_irqsave()/spin_unlock_irqrestore() on &pctrl->lock.

Fixes: 02cd2d3be1c3 ("pinctrl: renesas: rzg2l: Configure the interrupt type on resume")
Reported-by: Diederik de Haas <didi.debian@cknow.org>
Closes: https://lore.kernel.org/all/131999629.KQPSlr0Zke@bagend
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240522055421.2842689-1-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 months agoLinux 6.10-rc1 v6.10-rc1
Linus Torvalds [Sun, 26 May 2024 22:20:12 +0000 (15:20 -0700)] 
Linux 6.10-rc1

14 months agomm: percpu: Include smp.h in alloc_tag.h
Kent Overstreet [Fri, 24 May 2024 15:42:09 +0000 (11:42 -0400)] 
mm: percpu: Include smp.h in alloc_tag.h

percpu.h depends on smp.h, but doesn't include it directly because of
circular header dependency issues; percpu.h is needed in a bunch of low
level headers.

This fixes a randconfig build error on mips:

  include/linux/alloc_tag.h: In function '__alloc_tag_ref_set':
  include/asm-generic/percpu.h:31:40: error: implicit declaration of function 'raw_smp_processor_id' [-Werror=implicit-function-declaration]

Reported-by: kernel test robot <lkp@intel.com>
Fixes: 24e44cc22aa3 ("mm: percpu: enable per-cpu allocation tagging")
Closes: https://lore.kernel.org/oe-kbuild-all/202405210052.DIrMXJNz-lkp@intel.com/
Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
14 months agoMerge tag 'perf-tools-fixes-for-v6.10-1-2024-05-26' of git://git.kernel.org/pub/scm...
Linus Torvalds [Sun, 26 May 2024 16:54:26 +0000 (09:54 -0700)] 
Merge tag 'perf-tools-fixes-for-v6.10-1-2024-05-26' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools

Pull perf tool fix from Arnaldo Carvalho de Melo:
 "Revert a patch causing a regression.

  This made a simple 'perf record -e cycles:pp make -j199' stop working
  on the Ampere ARM64 system Linus uses to test ARM64 kernels".

* tag 'perf-tools-fixes-for-v6.10-1-2024-05-26' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools:
  Revert "perf parse-events: Prefer sysfs/JSON hardware events over legacy"

14 months agoRevert "perf parse-events: Prefer sysfs/JSON hardware events over legacy"
Arnaldo Carvalho de Melo [Sun, 26 May 2024 11:13:21 +0000 (08:13 -0300)] 
Revert "perf parse-events: Prefer sysfs/JSON hardware events over legacy"

This reverts commit 617824a7f0f73e4de325cf8add58e55b28c12493.

This made a simple 'perf record -e cycles:pp make -j199' stop working on
the Ampere ARM64 system Linus uses to test ARM64 kernels, as discussed
at length in the threads in the Link tags below.

The fix provided by Ian wasn't acceptable and work to fix this will take
time we don't have at this point, so lets revert this and work on it on
the next devel cycle.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Cc: Ethan Adams <j.ethan.adams@gmail.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Tycho Andersen <tycho@tycho.pizza>
Cc: Yang Jihong <yangjihong@bytedance.com>
Link: https://lore.kernel.org/lkml/CAHk-=wi5Ri=yR2jBVk-4HzTzpoAWOgstr1LEvg_-OXtJvXXJOA@mail.gmail.com
Link: https://lore.kernel.org/lkml/CAHk-=wiWvtFyedDNpoV7a8Fq_FpbB+F5KmWK2xPY3QoYseOf_A@mail.gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
14 months agoMerge tag '6.10-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6
Linus Torvalds [Sun, 26 May 2024 05:33:10 +0000 (22:33 -0700)] 
Merge tag '6.10-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6

Pull smb client fixes from Steve French:

 - two important netfs integration fixes - including for a data
   corruption and also fixes for multiple xfstests

 - reenable swap support over SMB3

* tag '6.10-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6:
  cifs: Fix missing set of remote_i_size
  cifs: Fix smb3_insert_range() to move the zero_point
  cifs: update internal version number
  smb3: reenable swapfiles over SMB3 mounts

14 months agoMerge tag 'mm-hotfixes-stable-2024-05-25-09-13' of git://git.kernel.org/pub/scm/linux...
Linus Torvalds [Sat, 25 May 2024 22:10:33 +0000 (15:10 -0700)] 
Merge tag 'mm-hotfixes-stable-2024-05-25-09-13' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm

Pull misc fixes from Andrew Morton:
 "16 hotfixes, 11 of which are cc:stable.

  A few nilfs2 fixes, the remainder are for MM: a couple of selftests
  fixes, various singletons fixing various issues in various parts"

* tag 'mm-hotfixes-stable-2024-05-25-09-13' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
  mm/ksm: fix possible UAF of stable_node
  mm/memory-failure: fix handling of dissolved but not taken off from buddy pages
  mm: /proc/pid/smaps_rollup: avoid skipping vma after getting mmap_lock again
  nilfs2: fix potential hang in nilfs_detach_log_writer()
  nilfs2: fix unexpected freezing of nilfs_segctor_sync()
  nilfs2: fix use-after-free of timer for log writer thread
  selftests/mm: fix build warnings on ppc64
  arm64: patching: fix handling of execmem addresses
  selftests/mm: compaction_test: fix bogus test success and reduce probability of OOM-killer invocation
  selftests/mm: compaction_test: fix incorrect write of zero to nr_hugepages
  selftests/mm: compaction_test: fix bogus test success on Aarch64
  mailmap: update email address for Satya Priya
  mm/huge_memory: don't unpoison huge_zero_folio
  kasan, fortify: properly rename memintrinsics
  lib: add version into /proc/allocinfo output
  mm/vmalloc: fix vmalloc which may return null if called with __GFP_NOFAIL

14 months agoMerge tag 'irq-urgent-2024-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sat, 25 May 2024 21:48:40 +0000 (14:48 -0700)] 
Merge tag 'irq-urgent-2024-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Ingo Molnar:

 - Fix x86 IRQ vector leak caused by a CPU offlining race

 - Fix build failure in the riscv-imsic irqchip driver
   caused by an API-change semantic conflict

 - Fix use-after-free in irq_find_at_or_after()

* tag 'irq-urgent-2024-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  genirq/irqdesc: Prevent use-after-free in irq_find_at_or_after()
  genirq/cpuhotplug, x86/vector: Prevent vector leak during CPU offline
  irqchip/riscv-imsic: Fixup riscv_ipi_set_virq_range() conflict

14 months agoMerge tag 'x86-urgent-2024-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sat, 25 May 2024 21:40:09 +0000 (14:40 -0700)] 
Merge tag 'x86-urgent-2024-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar:

 - Fix regressions of the new x86 CPU VFM (vendor/family/model)
   enumeration/matching code

 - Fix crash kernel detection on buggy firmware with
   non-compliant ACPI MADT tables

 - Address Kconfig warning

* tag 'x86-urgent-2024-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Fix x86_match_cpu() to match just X86_VENDOR_INTEL
  crypto: x86/aes-xts - switch to new Intel CPU model defines
  x86/topology: Handle bogus ACPI tables correctly
  x86/kconfig: Select ARCH_WANT_FRAME_POINTERS again when UNWINDER_FRAME_POINTER=y

14 months agoMerge tag 'for-linus-6.10-1' of https://github.com/cminyard/linux-ipmi
Linus Torvalds [Sat, 25 May 2024 21:32:29 +0000 (14:32 -0700)] 
Merge tag 'for-linus-6.10-1' of https://github.com/cminyard/linux-ipmi

Pull ipmi updates from Corey Minyard:
 "Mostly updates for deprecated interfaces, platform.remove and
  converting from a tasklet to a BH workqueue.

  Also use HAS_IOPORT for disabling inb()/outb()"

* tag 'for-linus-6.10-1' of https://github.com/cminyard/linux-ipmi:
  ipmi: kcs_bmc_npcm7xx: Convert to platform remove callback returning void
  ipmi: kcs_bmc_aspeed: Convert to platform remove callback returning void
  ipmi: ipmi_ssif: Convert to platform remove callback returning void
  ipmi: ipmi_si_platform: Convert to platform remove callback returning void
  ipmi: ipmi_powernv: Convert to platform remove callback returning void
  ipmi: bt-bmc: Convert to platform remove callback returning void
  char: ipmi: handle HAS_IOPORT dependencies
  ipmi: Convert from tasklet to BH workqueue

14 months agoMerge tag 'ceph-for-6.10-rc1' of https://github.com/ceph/ceph-client
Linus Torvalds [Sat, 25 May 2024 21:23:58 +0000 (14:23 -0700)] 
Merge tag 'ceph-for-6.10-rc1' of https://github.com/ceph/ceph-client

Pull ceph updates from Ilya Dryomov:
 "A series from Xiubo that adds support for additional access checks
  based on MDS auth caps which were recently made available to clients.

  This is needed to prevent scenarios where the MDS quietly discards
  updates that a UID-restricted client previously (wrongfully) acked to
  the user.

  Other than that, just a documentation fixup"

* tag 'ceph-for-6.10-rc1' of https://github.com/ceph/ceph-client:
  doc: ceph: update userspace command to get CephFS metadata
  ceph: add CEPHFS_FEATURE_MDS_AUTH_CAPS_CHECK feature bit
  ceph: check the cephx mds auth access for async dirop
  ceph: check the cephx mds auth access for open
  ceph: check the cephx mds auth access for setattr
  ceph: add ceph_mds_check_access() helper
  ceph: save cap_auths in MDS client when session is opened

14 months agoMerge tag 'ntfs3_for_6.10' of https://github.com/Paragon-Software-Group/linux-ntfs3
Linus Torvalds [Sat, 25 May 2024 21:19:01 +0000 (14:19 -0700)] 
Merge tag 'ntfs3_for_6.10' of https://github.com/Paragon-Software-Group/linux-ntfs3

Pull ntfs3 updates from Konstantin Komarov:
 "Fixes:
   - reusing of the file index (could cause the file to be trimmed)
   - infinite dir enumeration
   - taking DOS names into account during link counting
   - le32_to_cpu conversion, 32 bit overflow, NULL check
   - some code was refactored

  Changes:
   - removed max link count info display during driver init

  Remove:
   - atomic_open has been removed for lack of use"

* tag 'ntfs3_for_6.10' of https://github.com/Paragon-Software-Group/linux-ntfs3:
  fs/ntfs3: Break dir enumeration if directory contents error
  fs/ntfs3: Fix case when index is reused during tree transformation
  fs/ntfs3: Mark volume as dirty if xattr is broken
  fs/ntfs3: Always make file nonresident on fallocate call
  fs/ntfs3: Redesign ntfs_create_inode to return error code instead of inode
  fs/ntfs3: Use variable length array instead of fixed size
  fs/ntfs3: Use 64 bit variable to avoid 32 bit overflow
  fs/ntfs3: Check 'folio' pointer for NULL
  fs/ntfs3: Missed le32_to_cpu conversion
  fs/ntfs3: Remove max link count info display during driver init
  fs/ntfs3: Taking DOS names into account during link counting
  fs/ntfs3: remove atomic_open
  fs/ntfs3: use kcalloc() instead of kzalloc()

14 months agoMerge tag '6.10-rc-ksmbd-server-fixes' of git://git.samba.org/ksmbd
Linus Torvalds [Sat, 25 May 2024 21:15:39 +0000 (14:15 -0700)] 
Merge tag '6.10-rc-ksmbd-server-fixes' of git://git.samba.org/ksmbd

Pull smb server fixes from Steve French:
 "Two ksmbd server fixes, both for stable"

* tag '6.10-rc-ksmbd-server-fixes' of git://git.samba.org/ksmbd:
  ksmbd: ignore trailing slashes in share paths
  ksmbd: avoid to send duplicate oplock break notifications

14 months agoMerge tag 'rtc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Linus Torvalds [Sat, 25 May 2024 20:33:53 +0000 (13:33 -0700)] 
Merge tag 'rtc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC updates from Alexandre Belloni:
 "There is one new driver and then most of the changes are the device
  tree bindings conversions to yaml.

  New driver:
   - Epson RX8111

  Drivers:
   - Many Device Tree bindings conversions to dtschema
   - pcf8563: wakeup-source support"

* tag 'rtc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  pcf8563: add wakeup-source support
  rtc: rx8111: handle VLOW flag
  rtc: rx8111: demote warnings to debug level
  rtc: rx6110: Constify struct regmap_config
  dt-bindings: rtc: convert trivial devices into dtschema
  dt-bindings: rtc: stmp3xxx-rtc: convert to dtschema
  dt-bindings: rtc: pxa-rtc: convert to dtschema
  rtc: Add driver for Epson RX8111
  dt-bindings: rtc: Add Epson RX8111
  rtc: mcp795: drop unneeded MODULE_ALIAS
  rtc: nuvoton: Modify part number value
  rtc: test: Split rtc unit test into slow and normal speed test
  dt-bindings: rtc: nxp,lpc1788-rtc: convert to dtschema
  dt-bindings: rtc: digicolor-rtc: move to trivial-rtc
  dt-bindings: rtc: alphascale,asm9260-rtc: convert to dtschema
  dt-bindings: rtc: armada-380-rtc: convert to dtschema
  rtc: cros-ec: provide ID table for avoiding fallback match

14 months agoMerge tag 'i3c/for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux
Linus Torvalds [Sat, 25 May 2024 20:28:29 +0000 (13:28 -0700)] 
Merge tag 'i3c/for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux

Pull i3c updates from Alexandre Belloni:
 "Runtime PM (power management) is improved and hot-join support has
  been added to the dw controller driver.

  Core:
   - Allow device driver to trigger controller runtime PM

  Drivers:
   - dw: hot-join support
   - svc: better IBI handling"

* tag 'i3c/for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux:
  i3c: dw: Add hot-join support.
  i3c: master: Enable runtime PM for master controller
  i3c: master: svc: fix invalidate IBI type and miss call client IBI handler
  i3c: master: svc: change ENXIO to EAGAIN when IBI occurs during start frame
  i3c: Add comment for -EAGAIN in i3c_device_do_priv_xfers()

14 months agoMerge tag 'jffs2-for-linus-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 25 May 2024 20:23:42 +0000 (13:23 -0700)] 
Merge tag 'jffs2-for-linus-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull jffs2 updates from Richard Weinberger:

 - Fix illegal memory access in jffs2_free_inode()

 - Kernel-doc fixes

 - print symbolic error names

* tag 'jffs2-for-linus-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  jffs2: Fix potential illegal address access in jffs2_free_inode
  jffs2: Simplify the allocation of slab caches
  jffs2: nodemgmt: fix kernel-doc comments
  jffs2: print symbolic error name instead of error code

14 months agoMerge tag 'uml-for-linus-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sat, 25 May 2024 20:17:48 +0000 (13:17 -0700)] 
Merge tag 'uml-for-linus-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux

Pull UML updates from Richard Weinberger:

 - Fixes for -Wmissing-prototypes warnings and further cleanup

 - Remove callback returning void from rtc and virtio drivers

 - Fix bash location

* tag 'uml-for-linus-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux: (26 commits)
  um: virtio_uml: Convert to platform remove callback returning void
  um: rtc: Convert to platform remove callback returning void
  um: Remove unused do_get_thread_area function
  um: Fix -Wmissing-prototypes warnings for __vdso_*
  um: Add an internal header shared among the user code
  um: Fix the declaration of kasan_map_memory
  um: Fix the -Wmissing-prototypes warning for get_thread_reg
  um: Fix the -Wmissing-prototypes warning for __switch_mm
  um: Fix -Wmissing-prototypes warnings for (rt_)sigreturn
  um: Stop tracking host PID in cpu_tasks
  um: process: remove unused 'n' variable
  um: vector: remove unused len variable/calculation
  um: vector: fix bpfflash parameter evaluation
  um: slirp: remove set but unused variable 'pid'
  um: signal: move pid variable where needed
  um: Makefile: use bash from the environment
  um: Add winch to winch_handlers before registering winch IRQ
  um: Fix -Wmissing-prototypes warnings for __warp_* and foo
  um: Fix -Wmissing-prototypes warnings for text_poke*
  um: Move declarations to proper headers
  ...

14 months agoMerge tag 'drm-next-2024-05-25' of https://gitlab.freedesktop.org/drm/kernel
Linus Torvalds [Sat, 25 May 2024 00:28:02 +0000 (17:28 -0700)] 
Merge tag 'drm-next-2024-05-25' of https://gitlab.freedesktop.org/drm/kernel

Pull drm fixes from Dave Airlie:
 "Some fixes for the end of the merge window, mostly amdgpu and panthor,
  with one nouveau uAPI change that fixes a bad decision we made a few
  months back.

  nouveau:
   - fix bo metadata uAPI for vm bind

  panthor:
   - Fixes for panthor's heap logical block.
   - Reset on unrecoverable fault
   - Fix VM references.
   - Reset fix.

  xlnx:
   - xlnx compile and doc fixes.

  amdgpu:
   - Handle vbios table integrated info v2.3

  amdkfd:
   - Handle duplicate BOs in reserve_bo_and_cond_vms
   - Handle memory limitations on small APUs

  dp/mst:
   - MST null deref fix.

  bridge:
   - Don't let next bridge create connector in adv7511 to make probe
     work"

* tag 'drm-next-2024-05-25' of https://gitlab.freedesktop.org/drm/kernel:
  drm/amdgpu/atomfirmware: add intergrated info v2.3 table
  drm/mst: Fix NULL pointer dereference at drm_dp_add_payload_part2
  drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs
  drm/amdkfd: handle duplicate BOs in reserve_bo_and_cond_vms
  drm/bridge: adv7511: Attach next bridge without creating connector
  drm/buddy: Fix the warn on's during force merge
  drm/nouveau: use tile_mode and pte_kind for VM_BIND bo allocations
  drm/panthor: Call panthor_sched_post_reset() even if the reset failed
  drm/panthor: Reset the FW VM to NULL on unplug
  drm/panthor: Keep a ref to the VM at the panthor_kernel_bo level
  drm/panthor: Force an immediate reset on unrecoverable faults
  drm/panthor: Document drm_panthor_tiler_heap_destroy::handle validity constraints
  drm/panthor: Fix an off-by-one in the heap context retrieval logic
  drm/panthor: Relax the constraints on the tiler chunk size
  drm/panthor: Make sure the tiler initial/max chunks are consistent
  drm/panthor: Fix tiler OOM handling to allow incremental rendering
  drm: xlnx: zynqmp_dpsub: Fix compilation error
  drm: xlnx: zynqmp_dpsub: Fix few function comments

14 months agocifs: Fix missing set of remote_i_size
David Howells [Fri, 24 May 2024 14:23:36 +0000 (15:23 +0100)] 
cifs: Fix missing set of remote_i_size

Occasionally, the generic/001 xfstest will fail indicating corruption in
one of the copy chains when run on cifs against a server that supports
FSCTL_DUPLICATE_EXTENTS_TO_FILE (eg. Samba with a share on btrfs).  The
problem is that the remote_i_size value isn't updated by cifs_setsize()
when called by smb2_duplicate_extents(), but i_size *is*.

This may cause cifs_remap_file_range() to then skip the bit after calling
->duplicate_extents() that sets sizes.

Fix this by calling netfs_resize_file() in smb2_duplicate_extents() before
calling cifs_setsize() to set i_size.

This means we don't then need to call netfs_resize_file() upon return from
->duplicate_extents(), but we also fix the test to compare against the pre-dup
inode size.

[Note that this goes back before the addition of remote_i_size with the
netfs_inode struct.  It should probably have been setting cifsi->server_eof
previously.]

Fixes: cfc63fc8126a ("smb3: fix cached file size problems in duplicate extents (reflink)")
Signed-off-by: David Howells <dhowells@redhat.com>
cc: Steve French <sfrench@samba.org>
cc: Paulo Alcantara <pc@manguebit.com>
cc: Shyam Prasad N <nspmangalore@gmail.com>
cc: Rohith Surabattula <rohiths.msft@gmail.com>
cc: Jeff Layton <jlayton@kernel.org>
cc: linux-cifs@vger.kernel.org
cc: netfs@lists.linux.dev
Signed-off-by: Steve French <stfrench@microsoft.com>
14 months agocifs: Fix smb3_insert_range() to move the zero_point
David Howells [Wed, 22 May 2024 08:38:48 +0000 (09:38 +0100)] 
cifs: Fix smb3_insert_range() to move the zero_point

Fix smb3_insert_range() to move the zero_point over to the new EOF.
Without this, generic/147 fails as reads of data beyond the old EOF point
return zeroes.

Fixes: 3ee1a1fc3981 ("cifs: Cut over to using netfslib")
Signed-off-by: David Howells <dhowells@redhat.com>
cc: Shyam Prasad N <nspmangalore@gmail.com>
cc: Rohith Surabattula <rohiths.msft@gmail.com>
cc: Jeff Layton <jlayton@kernel.org>
cc: linux-cifs@vger.kernel.org
cc: netfs@lists.linux.dev
Signed-off-by: Steve French <stfrench@microsoft.com>