Alan Modra [Fri, 30 Nov 2018 05:04:11 +0000 (15:34 +1030)]
PR23937, powerpc64le local ifunc IRELATIVE relocs are wrong
IFUNC resolvers must always be called via their global entry point.
They will be called from ld.so rather than from the local executable.
PR 23937
bfd/
* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't add local
entry offset for ifuncs.
ld/
* testsuite/ld-powerpc/pr23937.d,
* testsuite/ld-powerpc/pr23937.s: New test.
* testsuite/ld-powerpc/powerpc.exp: Run it.
Tamar Christina [Tue, 27 Nov 2018 12:33:21 +0000 (12:33 +0000)]
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904)
The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed
into MOVZ, however this causes issues for the erratum code.
The erratum code scans the input sections looking for ADRP instructions
and notes their location in the stream.
It then later tries to find them again in order to generate the linker
stubs. Due to the relaxation it instead finds a MOVZ and hard aborts.
Since this relaxation is a valid one, and in which case the erratum no
longer applies, it shouldn't abort but instead just continue.
This changes the TLS relaxation code such that when it finds an ADRP and
it relaxes it, it removes the erratum entry from the work list by changing
the stub type into none so the stub is ignored.
The entry is not actually removed as removal is a more expensive operation
and we have already allocated the memory anyway.
The clearing is done for IE->LE and GD->LE relaxations, and a testcase is
added for the IE case. The GD case I believe to be impossible to get together
with the erratum sequence due to the required BL which would break the sequence.
However to cover all basis I have added the guard there as well.
build on native hardware and regtested on
aarch64-none-elf, aarch64-none-elf (32 bit host),
aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host)
Cross-compiled and regtested on
aarch64-none-linux-gnu, aarch64_be-none-linux-gnu
Testcase in PR23940 tested and works as expected now and benchmarks ran on A53
showing no regressions and no issues.
bfd/ChangeLog:
PR ld/23904
* elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants.
(_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p.
(struct erratum_835769_branch_to_stub_clear_data): New.
(_bfd_aarch64_erratum_843419_clear_stub): New.
(clear_erratum_843419_entry): New.
(elfNN_aarch64_tls_relax): Use it.
(elfNN_aarch64_relocate_section): Pass input_section.
(aarch64_map_one_stub): Handle branch type none as valid.
ld/ChangeLog:
PR ld/23904
* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie.
* testsuite/ld-aarch64/erratum843419_tls_ie.d: New test.
* testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
Fixed issue related to TLS and partial static linking of libraries:
This issue was detected when throwing exceptions in C++ while linking with
-static-libstdc++.
TLS relocation from the libstdc++ wasn't being patched as local now that it was
static linked with the executable.
Fix for TLS with static and pie. Problem introduced by earlier patch:
Fixes the following glibc tests:
- elf/tst-tls1-static
bfd/
xxxx-xx-xx Cupertino Miranda <cmiranda@synopsys.com>
* arc-got.h (arc_got_entry_type_for_reloc): Changed to
correct static TLS relocs.
* elf32-arc.c (elf_arc_check_relocs): Introduced warning to
TLS relocs which require -fPIC.
(arc_create_forced_local_got_entries_for_tls): Created.
Traverses list of GOT entries to be resolved statically
when needed.
(elf_arc_finish_dynamic_sections): Changed. Calls
arc_create_forced_local_got_entries_for_tls for each known
possibly GOT symbol.
* arc-got.h (arc_get_local_got_ents): Revamp it; use
elf_local_got_ents to store the local got list.
(get_got_entry_list_for_symbo): Restructure it.
* elf32-arc.c (elf_arc_relocate_section): Correct the call to
get_got_entry_list_for_symbol.
Inserted offset in final section in the GOT entry of type DTSOFF soon to be
relocated by the dynamic loader.
bfd/
2018-09-06 Cupertino Miranda <cmiranda@synopsys.com>
* arc-got.h (relocate_fix_got_relocs_for_got_info): Changed. Take TLS
section alignment in consideration for this relocation.
* elf32-arc.c (FINAL_SECTSTART): Added this formula macro.
(ARC_TLS_DTPOFF) Updated reloc to use new created macro instead.
[ARC] Make sure global symbol is not an indirect or warning.
Problem identified in the context of glibc with latest upstream binutils.
Dynamic symbol space was being reserved but, no actual information for the
symbol was being set. Data for the symbol was kept initialized with -1.
No easy test case was possible to be created.
bfd/
2018-03-01 Cupertino Miranda <cmiranda@synopsys.com>
[ARC] Refactored location where GOT information is collected.
Change location where GOT information is collected for ARC target, avoiding
posible use conflicts of the previous .got field in the symbols hash_entry.
bfd/
2018-03-01 Cupertino Miranda <cmiranda@synopsys.com>
* arc-got.h (get_got_entry_list_for_symbol): Changed.
* ef32-arc.c (struct elf_arc_link_hash_entry): Moved and changed.
(elf_arc_link_hash_newfunc): Changed.
(arc_elf_link_hash_table_create): Removed old initializations.
(elf_arc_relocate_section, elf_arc_finish_dynamic_symbol): Changed.
Tamar Christina [Fri, 19 Oct 2018 15:18:37 +0000 (16:18 +0100)]
Arm: Skip new binary decode tests on pe targets
The two new test I added require the use of the ".inst" directive which the PE
targets don't support. Because of that I excluded *-unknown-pe but the mask needs
to be wider. I am now excluding *-*-pe.
gas/ChangeLog:
* testsuite/gas/arm/undefined-insn-arm.d: Widen pe skip.
* testsuite/gas/arm/undefined-insn-thumb.d: Likewise.
Tamar Christina [Fri, 19 Oct 2018 09:31:42 +0000 (10:31 +0100)]
Arm: Fix disassembler crashing on -b binary when thumb file and thumb not forced.
The disassembler for Arm has some aborts in it in places it assumes can never
be reached. Under normal circumstances they indeed cannot be reached because
the right options are selected from the ARM attributes in the ELF file.
However when disassembling with -b binary then if you do not get the options
right the disassembler just aborts. This changes it so it just prints how it
was trying to interpret the instruction and prints UNKNOWN instructions next to it.
This way the user has an idea of what's going.
gas/ChangeLog:
* testsuite/gas/arm/undefined-insn-arm.d: New test.
* testsuite/gas/arm/undefined-insn-thumb.d: New test.
* testsuite/gas/arm/undefined-insn.s: New test.
opcodes/ChangeLog:
* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
AArch64: Fix error checking for SIMD udot (by element)
Committed on behalf of Matthew Malcomson:
The SIMD UDOT instruction assembly has an unusual operand that selects a single
32 bit element with the mnemonic 4B.
This unusual mnemonic is handled by a special operand qualifier and associated
qualifier data in `aarch64_opnd_qualifiers`.
The current qualifier data describes 4 1-byte elements with the structure
{1, 4, 0x0, "4b", OQK_OPD_VARIANT}
This makes sense, as the instruction does work on 4 1-byte elements, however
some logic in the `operand_general_constraint_met_p` makes assumptions about
the range of index allowed when selecting a SIMD_ELEMENT depending on element
size.
That function reasons that e.g. in order to select a byte-sized element in a 16
byte V register an index must allow selection of one of the 16 elements and
hence its range will be in [0,15].
This reasoning breaks with the above description of a 4 part selection of 1
byte elements and allows an index outside the valid [0,3] range, triggering an
assert later on in the program in `aarch64_ins_reglane`.
This patch changes the operand qualifier data so that it describes a single
32 bit element.
{4, 1, 0x0, "4b", OQK_OPD_VARIANT}
Hence the calculation in `operand_general_constraint_met_p` provides the
correct answer and the usual error checking machinery is used.
vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
{standard input}: Assembler messages:
{standard input}:1: Error: register element index out of range 0 to 3 at operand 3 -- `udot v0.2s,v1.8b,v2.4b[4]'
projects / thirdparty / binutils-gdb.git / log
