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5 weeks agosemihosting: Fix GDB File-I/O FLEN
Sean Anderson [Mon, 27 Oct 2025 11:03:42 +0000 (11:03 +0000)] 
semihosting: Fix GDB File-I/O FLEN

fstat returns 0 on success and -1 on error. Since we have already
checked for error, ret must be zero. Therefore, any call to fstat on a
non-empty file will return -1/EOVERFLOW.

Restore the original logic that just did a byteswap. I don't really know
what the intention of the fixed commit was.

Fixes: a6300ed6b7 ("semihosting: Split out semihost_sys_flen")
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20251027110344.2289945-36-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agogdbstub: Fix %s formatting
Sean Anderson [Mon, 27 Oct 2025 11:03:41 +0000 (11:03 +0000)] 
gdbstub: Fix %s formatting

The format string for %s has two format characters. This causes it to
emit strings like "466f5bd8/6x" instead of "466f5bd8/6". GDB detects
this and returns EIO, causing all open File I/O calls to fail.

Fixes: 0820a075af ("gdbstub: Adjust gdb_do_syscall to only use uint32_t and uint64_t")
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-35-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoconfigs: drop SBSA_REF from minimal specification
Alex Bennée [Mon, 27 Oct 2025 11:03:40 +0000 (11:03 +0000)] 
configs: drop SBSA_REF from minimal specification

The whole point of SBSA_REF is for testing firmware which by
definition requires TCG. This means the configuration of:

  --disable-tcg --with-devices-aarch64=minimal

makes no sense (and indeed is broken for the
ubuntu-24.04-aarch64-notcg) test. Drop it from minimal and remove the
allow_failure from the test case.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-34-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoplugins/core: add missing QEMU_DISABLE_CFI annotations
Alex Bennée [Mon, 27 Oct 2025 11:03:39 +0000 (11:03 +0000)] 
plugins/core: add missing QEMU_DISABLE_CFI annotations

Most of the memory callbacks come directly from the generated code
however we have do have a a direct from C callback for the slow-path
and memory helpers.

There is also a reset callback that calls out to plugins.

Like the other plugin points we need to disable CFI as we are making
function calls to dynamically linked libraries.

Fixes: https://gitlab.com/qemu-project/qemu/-/issues/3175
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20251027110344.2289945-33-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotests: add test with interrupted memory accesses on rv64
Julian Ganz [Mon, 27 Oct 2025 11:03:38 +0000 (11:03 +0000)] 
tests: add test with interrupted memory accesses on rv64

This test aims at catching API misbehaviour w.r.t. the interaction
between interrupts and memory accesses, such as the bug fixed in

    27f347e6a1d269c533633c812321cabb249eada8
    (accel/tcg: also suppress asynchronous IRQs for cpu_io_recompile)

Because the condition for triggering misbehaviour may not be
deterministic and the cross-section between memory accesses and
interrupt handlers may be small, we have to place our trust in large
numbers. Instead of guessing/trying an arbitrary, fixed loop-bound, we
decided to loop for a fixed amount of real-time. This avoids the test
running into a time-out on slower machines while enabling a high number
of possible interactions on faster machines.

The test program sends a single '.' per 1000000 loads/stores over the
serial. This output is not captured, but may be used by developers to
gauge the number of possible interactions.

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-32-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotests: add test for double-traps on rv64
Julian Ganz [Mon, 27 Oct 2025 11:03:37 +0000 (11:03 +0000)] 
tests: add test for double-traps on rv64

We do have a number of test-case for various architectures exercising
their interrupt/exception logic. However, for the recently introduced
trap API we also want to exercise the logic for double traps on at least
one architecture.

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-31-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotests: add plugin asserting correctness of discon event's to_pc
Julian Ganz [Mon, 27 Oct 2025 11:03:36 +0000 (11:03 +0000)] 
tests: add plugin asserting correctness of discon event's to_pc

We recently introduced plugin API for the registration of callbacks for
discontinuity events, specifically for interrupts, exceptions and host
call events. The callback receives various bits of information,
including the VCPU index and PCs.

This change introduces a test plugin asserting the correctness of that
behaviour in cases where this is possible with reasonable effort.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-30-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/xtensa: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:35 +0000 (11:03 +0000)] 
target/xtensa: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for xtensa targets.

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-29-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/tricore: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:34 +0000 (11:03 +0000)] 
target/tricore: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places an exception hook for TriCore targets. Interrupts are
not implemented for this target and it has no host calls.

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-28-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/sparc: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:33 +0000 (11:03 +0000)] 
target/sparc: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for SPARC (32bit and 64bit) targets. We treat
any interrupt other than EXTINT and IVEC as exceptions as they appear to
be synchroneous events.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-27-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/sh4: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:32 +0000 (11:03 +0000)] 
target/sh4: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for SuperH targets.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-26-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/s390x: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:31 +0000 (11:03 +0000)] 
target/s390x: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for IBM System/390 targets. We treat "program
interrupts" and service calls as exceptions. We treat external and io
"exceptions" as well as resets as interrupts.

Acked-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-25-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/rx: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:30 +0000 (11:03 +0000)] 
target/rx: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for Renesas Xtreme targets.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com>
Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-24-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/riscv: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:29 +0000 (11:03 +0000)] 
target/riscv: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for RISC-V targets.

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-23-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/ppc: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:28 +0000 (11:03 +0000)] 
target/ppc: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for Power PC targets.

Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-22-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/openrisc: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:27 +0000 (11:03 +0000)] 
target/openrisc: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for OpenRISC targets. We treat anything other
than resets, timer and device interrupts as exceptions.

Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-21-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/mips: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:26 +0000 (11:03 +0000)] 
target/mips: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for MIPS targets. We consider the exceptions
NMI and EXT_INTERRUPT to be asynchronous interrupts rather than
exceptions.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-20-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/microblaze: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:25 +0000 (11:03 +0000)] 
target/microblaze: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places the hook for MicroBlaze targets. This architecture
has one special "exception" for interrupts and no host calls.

Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-19-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/m68k: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:24 +0000 (11:03 +0000)] 
target/m68k: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for Motorola 68000 targets.

Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-18-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/loongarch: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:23 +0000 (11:03 +0000)] 
target/loongarch: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for loongarch targets. This architecture
has one special "exception" for interrupts and no host calls.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20251027110344.2289945-17-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/i386: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:22 +0000 (11:03 +0000)] 
target/i386: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places the hook for x86 targets.

Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-16-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/hppa: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:21 +0000 (11:03 +0000)] 
target/hppa: call plugin trap callbacks

We identified a number of exceptions as interrupts, and we assume every
other exception is a (syncroneous) exceptions. PA-RISC appears to not
have any form of host-call.

This change places the hook for PA-RISC targets.

Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-15-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/avr: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:20 +0000 (11:03 +0000)] 
target/avr: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places the hook for AVR targets. That architecture appears
to only know interrupts.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-14-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/arm: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:19 +0000 (11:03 +0000)] 
target/arm: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for ARM (and Aarch64) targets. We decided to
treat the (V)IRQ, (VI/VF)NMI, (V)FIQ and VSERR exceptions as interrupts
since they are, presumably, async in nature.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-13-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotarget/alpha: call plugin trap callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:18 +0000 (11:03 +0000)] 
target/alpha: call plugin trap callbacks

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for Alpha targets.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-12-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agocontrib/plugins: add plugin showcasing new dicontinuity related API
Julian Ganz [Mon, 27 Oct 2025 11:03:17 +0000 (11:03 +0000)] 
contrib/plugins: add plugin showcasing new dicontinuity related API

We recently introduced new plugin API for registration of discontinuity
related callbacks. This change introduces a minimal plugin showcasing
the new API. It simply counts the occurances of interrupts, exceptions
and host calls per CPU and reports the counts when exitting.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-11-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoplugins: add hooks for new discontinuity related callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:16 +0000 (11:03 +0000)] 
plugins: add hooks for new discontinuity related callbacks

The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. In addition, we
recently introduced API for registering callbacks for discontinuity
events, specifically for interrupts, exceptions and host calls.

This change introduces the corresponding hooks called from target
specific code inside qemu.

Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-10-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoplugins: add API for registering discontinuity callbacks
Julian Ganz [Mon, 27 Oct 2025 11:03:15 +0000 (11:03 +0000)] 
plugins: add API for registering discontinuity callbacks

The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. In addition to
those events, we recently defined discontinuity events, which include
traps.

This change introduces a function to register callbacks for these
events. We define one distinct plugin event type for each type of
discontinuity, granting fine control to plugins in term of which events
they receive.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-9-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoplugins: add types for callbacks related to certain discontinuities
Julian Ganz [Mon, 27 Oct 2025 11:03:14 +0000 (11:03 +0000)] 
plugins: add types for callbacks related to certain discontinuities

The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. However, traps of
any kind, i.e. interrupts or exceptions, were previously not covered.
These kinds of events are arguably quite significant and usually go hand
in hand with a PC discontinuity. On most platforms, the discontinuity
also includes a transition from some "mode" to another. Thus, plugins
for the analysis of (virtualized) embedded systems may benefit from or
even require the possiblity to perform work on the occurance of an
interrupt or exception.

This change introduces the concept of such a discontinuity event in the
form of an enumeration. Currently only traps are covered. Specifically
we (loosely) define interrupts, exceptions and host calls across all
platforms. In addition, this change introduces a type to use for
callback functions related to such events. Since possible modes and the
enumeration of interupts and exceptions vary greatly between different
architectures, the callback type only receives the VCPU id, the type of
event as well as the old and new PC.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-8-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoscripts/ci: modify gitlab runner deb setup
Alex Bennée [Mon, 27 Oct 2025 11:03:13 +0000 (11:03 +0000)] 
scripts/ci: modify gitlab runner deb setup

Both Debian and Ubuntu are setup the same way.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20251027110344.2289945-7-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agotests/lcitool: generate a yaml file for the ppc64le runner
Alex Bennée [Mon, 27 Oct 2025 11:03:12 +0000 (11:03 +0000)] 
tests/lcitool: generate a yaml file for the ppc64le runner

Unlike the Aarch64 runners this comes with pure Debian out of the box.
We need a minor tweak to build-environment to deal with the
differences in naming convention.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20251027110344.2289945-6-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoscripts/ci: allow both Ubuntu or Debian to run upgrade
Alex Bennée [Mon, 27 Oct 2025 11:03:11 +0000 (11:03 +0000)] 
scripts/ci: allow both Ubuntu or Debian to run upgrade

There is no practical difference between the systems when it comes to
updating the installed system.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20251027110344.2289945-5-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoscripts/ci: move build-environment.yaml up a level
Alex Bennée [Mon, 27 Oct 2025 11:03:10 +0000 (11:03 +0000)] 
scripts/ci: move build-environment.yaml up a level

We can share the setup of the build environment with multiple
operating systems as we just need to check the YAML for each env is
present in the directory structure.

Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20251027110344.2289945-4-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoscripts/ci/setup: regenerate yaml
Alex Bennée [Mon, 27 Oct 2025 11:03:09 +0000 (11:03 +0000)] 
scripts/ci/setup: regenerate yaml

We inadvertently updated the base libvirt-ci project which has
resulted in changes. Make sure the output matches what we generate.

Fixes: 0d4fb8f746d (configure: set the bindgen cross target)
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20251027110344.2289945-3-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoci: clean-up remaining bits of armhf builds.
Alex Bennée [Mon, 27 Oct 2025 11:03:08 +0000 (11:03 +0000)] 
ci: clean-up remaining bits of armhf builds.

We no longer need to support 32 bit builds and we missed this while
cleaning up.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251027110344.2289945-2-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 weeks agoMerge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
Richard Henderson [Wed, 29 Oct 2025 09:44:15 +0000 (10:44 +0100)] 
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2025-10-29

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# gpg: Signature made Wed 29 Oct 2025 10:01:02 AM CET
# gpg:                using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478
# gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [unknown]
# gpg:                 aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199  28F1 61AD 3D98 ECDF 2C8E
#      Subkey fingerprint: 64AA 2AB5 31D5 6903 366B  FEF9 82AA 4A24 3B1E 9478

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
  linux-user: Use correct type for FIBMAP and FIGETBSZ emulation
  hw/xen: Avoid non-inclusive language in params.h
  docs/system/sriov.rst: Fix typo in title
  tests/functional/i386: Remove unused variable from the replay test
  docs/system/keys: fix incorrect reset scaling key binding
  net/stream: remove deprecated 'reconnect' option
  chardev: remove deprecated 'reconnect' option

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Richard Henderson [Wed, 29 Oct 2025 09:43:56 +0000 (10:43 +0100)] 
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* char: rename CharBackend->CharFrontend
* esp: fix esp_cdb_ready() FIFO wraparound limit calculation
* isapc: warn rather than reject modern x86 CPU models
* mshv: fix Coverity issues
* qdev: Change PropertyInfo method print() to return malloc'ed string
* qobject: make refcount atomic
* rcu: make synchronize_rcu() more efficient
* rust: cleanup glib_sys bindings
* rust: Convert bit value to u8 within #[property]
* rust: only leave leaf crates as workspace members
* scripts: clean up meson-buildoptions.py
* scsi: make refcount atomic
* target/i386: Init SMM cpu address space for hotplugged CPUs

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# gpg: Signature made Wed 29 Oct 2025 10:24:21 AM CET
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  rust: migration: allow passing ParentField<> to vmstate_of!
  target/i386: clear CPU_INTERRUPT_SIPI for all accelerators
  docs/about/deprecated.rst: document isapc deprecation for modern x86 CPU models
  hw/i386/isapc.c: warn rather than reject modern x86 CPU models
  qdev: Change PropertyInfo method print() to return malloc'ed string
  scsi: make SCSIRequest refcount atomic
  rust/qemu-macros: Convert bit value to u8 within #[property]
  qtest/am53c974-test: add additional test for cmdfifo overflow
  esp.c: fix esp_cdb_ready() FIFO wraparound limit calculation
  accel/mshv: use return value of handle_pio_str_read
  accel/mshv: initialize thread name
  char: rename CharBackend->CharFrontend
  qobject: make refcount atomic
  rust: only leave leaf crates as workspace members
  rust: remove useless glib_sys bindings
  rcu: Unify force quiescent state
  i386/kvm/cpu: Init SMM cpu address space for hotplugged CPUs
  scripts: clean up meson-buildoptions.py

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agorust: migration: allow passing ParentField<> to vmstate_of!
Paolo Bonzini [Tue, 28 Oct 2025 11:21:29 +0000 (12:21 +0100)] 
rust: migration: allow passing ParentField<> to vmstate_of!

The common superclass for devices could have its own migration state;
for it to be included in the subclass's VMState, ParentField<> must
implement the VMState trait.

Reported-by: Chen Miao <chenmiao@openatom.club>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agolinux-user: Use correct type for FIBMAP and FIGETBSZ emulation
Bastian Blank [Tue, 28 Oct 2025 12:16:12 +0000 (13:16 +0100)] 
linux-user: Use correct type for FIBMAP and FIGETBSZ emulation

Both the FIBMAP and FIGETBSZ ioctl get "int *" (pointer to 32bit
integer) as argument, not "long *" as specified in qemu.  Using the
correct type makes the emulation work in cross endian context.

Both ioctl does not seem to be documented. However the kernel
implementation has always used "int *".

Signed-off-by: Bastian Blank <waldi@debian.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3185
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Helge Deller <deller@gmx.de>
Reviwed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agohw/xen: Avoid non-inclusive language in params.h
Thomas Huth [Mon, 13 Oct 2025 11:11:52 +0000 (13:11 +0200)] 
hw/xen: Avoid non-inclusive language in params.h

Copy the latest version of Xen's params.h to the QEMU repository:

https://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=0291089f6ea81690f37035a124d54c51fa7ba097#patch8

With this patch, we get rid of a non-inclusive word in the comment
there.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Acked-by: Anthony PERARD <anthony.perard@vates.tech>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agodocs/system/sriov.rst: Fix typo in title
Peter Maydell [Mon, 27 Oct 2025 15:04:20 +0000 (15:04 +0000)] 
docs/system/sriov.rst: Fix typo in title

Fix a typo in the title of the sriov.rst document.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agotarget/i386: clear CPU_INTERRUPT_SIPI for all accelerators
Paolo Bonzini [Fri, 24 Oct 2025 07:18:43 +0000 (09:18 +0200)] 
target/i386: clear CPU_INTERRUPT_SIPI for all accelerators

Similar to what commit df32e5c5 did for TCG; fixes boot with multiple
processors on WHPX and probably more accelerators

Fixes: df32e5c568c ("i386/cpu: Prevent delivering SIPI during SMM in TCG mode", 2025-10-14)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3178
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agotests/functional/i386: Remove unused variable from the replay test
Thomas Huth [Mon, 27 Oct 2025 10:40:12 +0000 (11:40 +0100)] 
tests/functional/i386: Remove unused variable from the replay test

Remove a left-over from the time when this test was still an
avocado-based test.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agodocs/about/deprecated.rst: document isapc deprecation for modern x86 CPU models
Mark Cave-Ayland [Thu, 23 Oct 2025 14:28:10 +0000 (15:28 +0100)] 
docs/about/deprecated.rst: document isapc deprecation for modern x86 CPU models

Add a new paragraph in the "Backwards compatibility" section documenting that
using modern x86 CPU models with the isapc machine is deprecated, and will be
rejected in a future release.

Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20251023142926.964718-3-mark.caveayland@nutanix.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agohw/i386/isapc.c: warn rather than reject modern x86 CPU models
Mark Cave-Ayland [Thu, 23 Oct 2025 14:28:09 +0000 (15:28 +0100)] 
hw/i386/isapc.c: warn rather than reject modern x86 CPU models

Commit e1e2909f8e ("hw/i386/pc_piix.c: restrict isapc machine to 32-bit CPUs")
restricted the isapc machine to 32-bit CPUs, but subsequent concern has been
expressed as to the effect this could have on users.

The outcome of the latest discussion is that we should exercise more caution
and follow the official deprecation route, so instead of rejecting modern x86
CPUs issue a deprecation warning but allow the user to continue.

Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20251023142926.964718-2-mark.caveayland@nutanix.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoqdev: Change PropertyInfo method print() to return malloc'ed string
Markus Armbruster [Wed, 22 Oct 2025 10:14:18 +0000 (12:14 +0200)] 
qdev: Change PropertyInfo method print() to return malloc'ed string

Simpler (more so after the next commit), and no risk of truncation
because the caller's buffer is too small.  Performance doesn't matter;
the method is only used for "info qdev".

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Link: https://lore.kernel.org/r/20251022101420.36059-2-armbru@redhat.com
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoscsi: make SCSIRequest refcount atomic
Paolo Bonzini [Sat, 18 Oct 2025 08:13:45 +0000 (10:13 +0200)] 
scsi: make SCSIRequest refcount atomic

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agorust/qemu-macros: Convert bit value to u8 within #[property]
Zhao Liu [Fri, 24 Oct 2025 04:13:44 +0000 (12:13 +0800)] 
rust/qemu-macros: Convert bit value to u8 within #[property]

For bit property, make the type conversion within the #[property] macro
so that users do not need to handle the conversion.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20251024041344.1389488-1-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoqtest/am53c974-test: add additional test for cmdfifo overflow
Mark Cave-Ayland [Thu, 25 Sep 2025 12:28:46 +0000 (13:28 +0100)] 
qtest/am53c974-test: add additional test for cmdfifo overflow

Based upon the qtest reproducer posted to Gitlab issue #3082 at
https://gitlab.com/qemu-project/qemu/-/issues/3082.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20250925122846.527615-3-mark.cave-ayland@ilande.co.uk
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoesp.c: fix esp_cdb_ready() FIFO wraparound limit calculation
Mark Cave-Ayland [Thu, 25 Sep 2025 12:28:45 +0000 (13:28 +0100)] 
esp.c: fix esp_cdb_ready() FIFO wraparound limit calculation

The original calculation in commit 3cc70889a3 ("esp.c: prevent cmdfifo overflow
in esp_cdb_ready()") subtracted cmdfifo_cdb_offset from fifo8_num_used() to
calculate the outstanding cmdfifo length, but this is incorrect because
fifo8_num_used() can also include wraparound data.

Instead calculate the maximum offset used by scsi_cdb_length() which is just
the first byte after cmdfifo_cdb_offset, and then peek the entire content
of the cmdfifo. The fifo8_peek_bufptr() result will then return the maximum
length of remaining data up to the end of the internal cmdfifo array, which
can then be used for the overflow check.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: 3cc70889a3 ("esp.c: prevent cmdfifo overflow in esp_cdb_ready()")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3082
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20250925122846.527615-2-mark.cave-ayland@ilande.co.uk
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoaccel/mshv: use return value of handle_pio_str_read
Paolo Bonzini [Wed, 22 Oct 2025 12:54:30 +0000 (14:54 +0200)] 
accel/mshv: use return value of handle_pio_str_read

Coverity complains because we assign to ret here but
then never read it again before we overwrite it with
the call to set_x64_registers().

Analyzed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoaccel/mshv: initialize thread name
Paolo Bonzini [Wed, 22 Oct 2025 12:52:48 +0000 (14:52 +0200)] 
accel/mshv: initialize thread name

The initialization was dropped when the code was copied from existing
accelerators.  Coverity knows (CID 1641400).  Fix it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agochar: rename CharBackend->CharFrontend
Marc-André Lureau [Wed, 22 Oct 2025 07:46:10 +0000 (11:46 +0400)] 
char: rename CharBackend->CharFrontend

The actual backend is "Chardev", CharBackend is the frontend side of
it (whatever talks to the backend), let's rename it for readability.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Link: https://lore.kernel.org/r/20251022074612.1258413-1-marcandre.lureau@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agodocs/system/keys: fix incorrect reset scaling key binding
Nir Lichtman [Fri, 15 Aug 2025 09:00:25 +0000 (09:00 +0000)] 
docs/system/keys: fix incorrect reset scaling key binding

Fix incorrect key binding for resetting the graphical frontends scaling

Signed-off-by: Nir Lichtman <nir@lichtman.org>
Fixes: 15421f7113 "ui/sdl2: fix reset scaling binding to be consistent with gtk"
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agonet/stream: remove deprecated 'reconnect' option
Vladimir Sementsov-Ogievskiy [Wed, 24 Sep 2025 13:33:09 +0000 (16:33 +0300)] 
net/stream: remove deprecated 'reconnect' option

It was deprecated in 9.2, time to remove.

Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Daniil Tatianin <d-tatianin@yandex-team.ru>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agochardev: remove deprecated 'reconnect' option
Vladimir Sementsov-Ogievskiy [Wed, 24 Sep 2025 13:33:08 +0000 (16:33 +0300)] 
chardev: remove deprecated 'reconnect' option

It was deprecated in 9.2, time to remove.

Note, that (which become obvious with this commit) we forget to do some
checks for reconnect-ms options, for example, it was silently ignored
for listening server, instead of error-out. The commit fixes this, as
now we use reconnect_ms everywhere.

Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Daniil Tatianin <d-tatianin@yandex-team.ru>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
5 weeks agoqobject: make refcount atomic
Paolo Bonzini [Tue, 30 Sep 2025 11:17:11 +0000 (13:17 +0200)] 
qobject: make refcount atomic

The Rust bindings for QObject will only operate on complete objects,
treating them as immutable as long as the Rust QObject is live.

With that constraint, it is trivial for Rust code to treat QObjects as
thread-safe; all that's needed is to make reference count operations
atomic.  Do the same when the C code adds or removes references, since
we don't really know what the Rust code is up to; of course C code will
have to agree with not making changes to the QObjects after they've
been passed to Rust code.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agorust: only leave leaf crates as workspace members
Paolo Bonzini [Fri, 17 Oct 2025 13:21:11 +0000 (15:21 +0200)] 
rust: only leave leaf crates as workspace members

Everything else can be obtained as a dependency.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agorust: remove useless glib_sys bindings
Martin Kletzander [Thu, 16 Oct 2025 12:11:15 +0000 (14:11 +0200)] 
rust: remove useless glib_sys bindings

The definition of types needed for g_autolist(), g_autoslist(),
g_autoqueue() need the imports for GList, GSList and GQueue
to appear everything.  Rust code is never going to see those,
since they are not used in structs.  Block the types from
appearing in the bindings.

Co-authored-by: Martin Kletzander <mkletzan@redhat.com>
Signed-off-by: Martin Kletzander <mkletzan@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agorcu: Unify force quiescent state
Akihiko Odaki [Thu, 16 Oct 2025 06:34:41 +0000 (15:34 +0900)] 
rcu: Unify force quiescent state

Borrow the concept of force quiescent state from Linux to ensure readers
remain fast during normal operation and to avoid stalls.

Background
==========

The previous implementation had four steps to begin reclamation.

1. call_rcu_thread() would wait for the first callback.

2. call_rcu_thread() would periodically poll until a decent number of
   callbacks piled up or it timed out.

3. synchronize_rcu() would statr a grace period (GP).

4. wait_for_readers() would wait for the GP to end. It would also
   trigger the force_rcu notifier to break busy loops in a read-side
   critical section if drain_call_rcu() had been called.

Problem
=======

The separation of waiting logic across these steps led to suboptimal
behavior:

The GP was delayed until call_rcu_thread() stops polling.

force_rcu was not consistently triggered when call_rcu_thread() detected
a high number of pending callbacks or a timeout. This inconsistency
sometimes led to stalls, as reported in a virtio-gpu issue where memory
unmapping was blocked[1].

wait_for_readers() imposed unnecessary overhead in non-urgent cases by
unconditionally executing qatomic_set(&index->waiting, true) and
qemu_event_reset(&rcu_gp_event), which are necessary only for expedited
synchronization.

Solution
========

Move the polling in call_rcu_thread() to wait_for_readers() to prevent
the delay of the GP. Additionally, reorganize wait_for_readers() to
distinguish between two states:

Normal State: it relies exclusively on periodic polling to detect
the end of the GP and maintains the read-side fast path.

Force Quiescent State: Whenever expediting synchronization, it always
triggers force_rcu and executes both qatomic_set(&index->waiting, true)
and qemu_event_reset(&rcu_gp_event). This avoids stalls while confining
the read-side overhead to this state.

This unified approach, inspired by the Linux RCU, ensures consistent and
efficient RCU grace period handling and confirms resolution of the
virtio-gpu issue.

[1] https://lore.kernel.org/qemu-devel/20251014111234.3190346-9-alex.bennee@linaro.org/

Signed-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Link: https://lore.kernel.org/r/20251016-force-v1-1-919a82112498@rsg.ci.i.u-tokyo.ac.jp
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoi386/kvm/cpu: Init SMM cpu address space for hotplugged CPUs
Xiaoyao Li [Tue, 14 Oct 2025 09:42:14 +0000 (17:42 +0800)] 
i386/kvm/cpu: Init SMM cpu address space for hotplugged CPUs

The SMM cpu address space is initialized in a machine_init_done
notifier. It only runs once when QEMU starts up, which leads to the
issue that for any hotplugged CPU after the machine is ready, SMM
cpu address space doesn't get initialized.

Fix the issue by initializing the SMM cpu address space in x86_cpu_plug()
when the cpu is hotplugged.

Fixes: 591f817d819f ("target/i386: Define enum X86ASIdx for x86's address spaces")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Closes: https://lore.kernel.org/qemu-devel/CAFEAcA_3kkZ+a5rTZGmK8W5K6J7qpYD31HkvjBnxWr-fGT2h_A@mail.gmail.com/
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Link: https://lore.kernel.org/r/20251014094216.164306-2-xiaoyao.li@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoscripts: clean up meson-buildoptions.py
Paolo Bonzini [Tue, 29 Aug 2023 08:37:12 +0000 (10:37 +0200)] 
scripts: clean up meson-buildoptions.py

Fix a few issues reported by flake8 and pylint, mostly parameter names
that shadow globals.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
5 weeks agoMerge tag 'hw-misc-20251028' of https://github.com/philmd/qemu into staging
Richard Henderson [Tue, 28 Oct 2025 10:48:05 +0000 (11:48 +0100)] 
Merge tag 'hw-misc-20251028' of https://github.com/philmd/qemu into staging

Misc HW patches

Various fixes and cleanups:
- Set FPCR exception flag bits for HPPA non-trapped exceptions
- Convert VirtIONet::vlans from pointer to array
  and remove VMSTATE_BUFFER_POINTER_UNSAFE()
- Remove redundant QOM typedef when OBJECT_DECLARE_SIMPLE_TYPE() is used
- Have various QDev / SysBus helpers take a const device argument
- Improve errors when loaders parse images
- Remove IntelIOMMUState::dma_translation leftover
- Remove most target_[u]long uses in hw/riscv/
- Fix DS1225Y MemoryRegion owner
- Simplification refactors on Raven PCI Host Bridge

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* tag 'hw-misc-20251028' of https://github.com/philmd/qemu: (23 commits)
  hw/riscv: Widen OpenSBI dynamic info struct
  hw/riscv: Use generic hwaddr for firmware addresses
  hw/i386/intel_iommu: Remove an unused state field
  nw/nvram/ds1225y: Fix nvram MemoryRegion owner
  hw/ppc: Pass error_fatal to load_image_targphys()
  hw/core/loader: Pass errp to load_image_targphys_as()
  hw/core/loader: add check for zero size in load_image_targphys_as
  hw/core/loader: improve error handling in image loading functions
  hw/core/loader: capture Error from load_image_targphys
  hw/core/loader: Use qemu_open() instead of open() in get_image_size()
  hw/int/loongarch: Include missing 'system/memory.h' header
  hw/uefi: Include missing 'system/memory.h' header
  hw/sysbus: Have various helpers take a const SysBusDevice argument
  hw/qdev: Have qdev_get_gpio_out_connector() take const DeviceState arg
  hw/pci-host/raven: Simplify PCI bus creation
  hw/pci-host/raven: Use DEFINE_TYPES macro
  hw/pci-host/raven: Simplify host bridge type declaration
  hw/pci-host/raven: Simplify PCI facing part
  hw/pci-host/raven: Simplify creating PCI facing part
  migration/vmstate: remove VMSTATE_BUFFER_POINTER_UNSAFE macro
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agoMerge tag 'devel-scsi-ncr710-pull-request' of https://github.com/hdeller/qemu-hppa...
Richard Henderson [Tue, 28 Oct 2025 10:47:14 +0000 (11:47 +0100)] 
Merge tag 'devel-scsi-ncr710-pull-request' of https://github.com/hdeller/qemu-hppa into staging

HP-PARISC 715 machine with NCR710 SCSI chip

This series adds a new emulation for a HP PA-RISC 715/64 model,
as descrived here: https://www.openpa.net/systems/hp-9000_715.html.

That machine has no PCI bus and instead uses a "LASI" chip which has built-in
NCR 53c710 SCSI and i82596 network chips. Compared to the other already
emulated machines B160L and C3700, this machine should be able to support older
operating systems like HP-UX 9 as well.

The QEMU project participated in the Google Summer of Code 2025 program by
"Implementing LASI Network Card and NCR 710 SCSI Controller Device Models", and
Soumyajyotii Ssarkar stepped up to develop those drivers.

This patch series includes the code for the NCR710 SCSI controller,
the network code will follow in later patch series.

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* tag 'devel-scsi-ncr710-pull-request' of https://github.com/hdeller/qemu-hppa:
  hw/hppa: Add 715 machine type including NCR710 SCSI
  hw/hppa: Require SeaBIOS version 19 for 715 machine
  hw/hppa: PCI devices depend on availability of PCI bus
  hw/hppa: Add NCR 710 SCSI driver to LASI chip Kconfig entry
  hw/hppa: Fix interrupt of LASI parallel port
  hw/hppa: Fix firmware end address for LASI chip
  hw/scsi: Add config option for new ncr710 driver
  lasi: Forward LASI SCSI ports to NCR 53c710 driver
  ncr710: Add driver for the NCR 53c710 SCSI chip
  lasi_ncr710: Add LASI wrapper for NCR 53c710 SCSI chip
  target/hppa: Update SeaBIOS-hppa to version 19

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agoMerge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging
Richard Henderson [Tue, 28 Oct 2025 10:46:40 +0000 (11:46 +0100)] 
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging

Pull request

Fiona's virtio-scsi TMF deadlock fix.

Paolo: I merged the scsi fix in my block tree, but realize now that it belongs
to the scsi subsystem. Sorry about that, I'll be more careful next time. Please
reply if you want to handle this patch yourself.

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# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
  hw/scsi: avoid deadlock upon TMF request cancelling with VirtIO

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agohw/riscv: Widen OpenSBI dynamic info struct
Anton Johansson [Mon, 27 Oct 2025 12:35:12 +0000 (13:35 +0100)] 
hw/riscv: Widen OpenSBI dynamic info struct

Since fw_dynamic_info is only used for non 32 bit targets, target_long
is int64_t anyway.  Rename struct to fw_dynamic_info64 and use int64_t.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027-feature-single-binary-hw-v1-v2-3-44478d589ae9@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/riscv: Use generic hwaddr for firmware addresses
Anton Johansson [Mon, 27 Oct 2025 12:35:10 +0000 (13:35 +0100)] 
hw/riscv: Use generic hwaddr for firmware addresses

Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-ID: <20251027-feature-single-binary-hw-v1-v2-1-44478d589ae9@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[PMD: Do not update riscv_load_kernel()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/i386/intel_iommu: Remove an unused state field
CLEMENT MATHIEU--DRIF [Mon, 27 Oct 2025 07:52:57 +0000 (07:52 +0000)] 
hw/i386/intel_iommu: Remove an unused state field

dma_translation has been moved to x86-iommu and is no longer referenced.

Fixes: b6b49c2cd6c2 (intel-iommu: Move dma_translation to x86-iommu)
Signed-off-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027075232.95262-1-clement.mathieu--drif@eviden.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agonw/nvram/ds1225y: Fix nvram MemoryRegion owner
Akihiko Odaki [Mon, 27 Oct 2025 01:05:38 +0000 (10:05 +0900)] 
nw/nvram/ds1225y: Fix nvram MemoryRegion owner

s points to the MemoryRegion itself. dev points to DS1225Y, the real
owner.

Signed-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027-ds1225y-v1-1-406888eb495f@rsg.ci.i.u-tokyo.ac.jp>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/ppc: Pass error_fatal to load_image_targphys()
Vishal Chourasia [Fri, 24 Oct 2025 13:06:03 +0000 (18:36 +0530)] 
hw/ppc: Pass error_fatal to load_image_targphys()

Pass error_fatal to load_image_targphys() calls in ppc machine initialization
to capture detailed error information when loading firmware, kernel,
and initrd images.

Passing error_fatal automatically reports detailed error messages and
exits immediately on failure. Eliminating redundant exit(1) calls, as
error_fatal handles termination

The behavior remains functionally identical, but error messages now
come directly from the loader function with more context about the
failure cause.

Reviewed-by: Aditya Gupta <adityag@linux.ibm.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Message-ID: <20251024130556.1942835-14-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/core/loader: Pass errp to load_image_targphys_as()
Vishal Chourasia [Fri, 24 Oct 2025 13:06:01 +0000 (18:36 +0530)] 
hw/core/loader: Pass errp to load_image_targphys_as()

Pass errp to load_image_targphys_as() in generic-loader and
guest-loader to capture detailed error information from the
loader functions.

Use error_prepend() instead of error_setg() to preserve the
underlying error details while adding context about which image
failed to load.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Message-ID: <20251024130556.1942835-12-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/core/loader: add check for zero size in load_image_targphys_as
Vishal Chourasia [Fri, 24 Oct 2025 13:05:59 +0000 (18:35 +0530)] 
hw/core/loader: add check for zero size in load_image_targphys_as

Currently load_image_targphys_as() returns -1 on file open failure or
when max size is exceeded. Add an explicit check for zero-sized files
to catch this error early, since some callers check for size <= 0.

Also, remove the redundant size > 0 check later in the function.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Message-ID: <20251024130556.1942835-10-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/core/loader: improve error handling in image loading functions
Vishal Chourasia [Fri, 24 Oct 2025 13:05:57 +0000 (18:35 +0530)] 
hw/core/loader: improve error handling in image loading functions

Add error checking for lseek() failure and provide better error
messages when image loading fails, including filenames and addresses.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Aditya Gupta <adityag@linux.ibm.com>
Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Message-ID: <20251024130556.1942835-8-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/core/loader: capture Error from load_image_targphys
Vishal Chourasia [Fri, 24 Oct 2025 13:05:55 +0000 (18:35 +0530)] 
hw/core/loader: capture Error from load_image_targphys

Add Error **errp parameter to load_image_targphys(),
load_image_targphys_as(), and get_image_size() to enable better
error reporting when image loading fails.

Pass NULL for errp in all existing call sites to maintain current
behavior. No functional change intended in this patch.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Aditya Gupta <adityag@linux.ibm.com>
Tested-by: Aditya Gupta <adityag@linux.ibm.com>
Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Message-ID: <20251024130556.1942835-6-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/core/loader: Use qemu_open() instead of open() in get_image_size()
Vishal Chourasia [Fri, 24 Oct 2025 13:05:53 +0000 (18:35 +0530)] 
hw/core/loader: Use qemu_open() instead of open() in get_image_size()

Replace open() with qemu_open() which provides better error handling
via the Error object, automatically sets O_CLOEXEC, and supports FD
passing with /dev/fdset.

Currently pass errp argument as NULL.

Suggested-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com>
Message-ID: <20251024130556.1942835-4-vishalc@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/int/loongarch: Include missing 'system/memory.h' header
Philippe Mathieu-Daudé [Fri, 24 Oct 2025 14:24:09 +0000 (16:24 +0200)] 
hw/int/loongarch: Include missing 'system/memory.h' header

"system/memory.h" header is indirectly pulled by "hw/sysbus.h".
Include it explicitly to avoid when refactoring the latter:

  In file included from ../../hw/intc/loongson_ipi.c:9:
  In file included from /Users/philmd/source/qemu/include/hw/intc/loongson_ipi.h:12:
  include/hw/intc/loongson_ipi_common.h:37:18: error: field has incomplete type 'MemoryRegion' (aka 'struct MemoryRegion')
     37 |     MemoryRegion ipi_iocsr_mem;
        |                  ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20251024190416.8803-21-philmd@linaro.org>

5 weeks agohw/uefi: Include missing 'system/memory.h' header
Philippe Mathieu-Daudé [Fri, 24 Oct 2025 13:33:02 +0000 (15:33 +0200)] 
hw/uefi: Include missing 'system/memory.h' header

"system/memory.h" header is indirectly pulled by "hw/sysbus.h".
Include it explicitly to avoid when refactoring the latter:

  include/hw/uefi/var-service.h:50:39: error: field has incomplete type 'MemoryRegion' (aka 'struct MemoryRegion')
     50 |     MemoryRegion                      mr;
        |                                       ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20251024190416.8803-14-philmd@linaro.org>

5 weeks agohw/sysbus: Have various helpers take a const SysBusDevice argument
Philippe Mathieu-Daudé [Fri, 24 Oct 2025 11:17:18 +0000 (13:17 +0200)] 
hw/sysbus: Have various helpers take a const SysBusDevice argument

These getters don't update any SysBusDevice internal fields,
make the argument const.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20251024190416.8803-3-philmd@linaro.org>

5 weeks agohw/qdev: Have qdev_get_gpio_out_connector() take const DeviceState arg
Philippe Mathieu-Daudé [Fri, 24 Oct 2025 14:49:52 +0000 (16:49 +0200)] 
hw/qdev: Have qdev_get_gpio_out_connector() take const DeviceState arg

This getter doesn't update any DeviceState internal fields,
make it const.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20251024190416.8803-2-philmd@linaro.org>

5 weeks agohw/pci-host/raven: Simplify PCI bus creation
BALATON Zoltan [Thu, 23 Oct 2025 15:26:25 +0000 (17:26 +0200)] 
hw/pci-host/raven: Simplify PCI bus creation

Instead of doing it manually use pci_register_root_bus() to create and
register the PCI bus. Also drop pci_bus from PREPPCIState and use the
existing bus field in the parent PCIHostState.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-ID: <4ffa168d68947d95a16c51d73cedd141b0df0ea0.1761232472.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/pci-host/raven: Use DEFINE_TYPES macro
BALATON Zoltan [Thu, 23 Oct 2025 15:26:24 +0000 (17:26 +0200)] 
hw/pci-host/raven: Use DEFINE_TYPES macro

Convert to using DEFINE_TYPES macro and move raven_pcihost_class_init
so methods of each object are grouped together.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-ID: <4ff8a3e1de847846f08d9ea6b389efeb3eb12aed.1761232472.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/pci-host/raven: Simplify host bridge type declaration
BALATON Zoltan [Thu, 23 Oct 2025 15:26:23 +0000 (17:26 +0200)] 
hw/pci-host/raven: Simplify host bridge type declaration

Use OBJECT_DECLARE_SIMPLE_TYPE macro instead of open coding it and
change state struct name to match the previous typedef.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-ID: <e14793737092eac0642aa87214801a1f4bb1e2e7.1761232472.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/pci-host/raven: Simplify PCI facing part
BALATON Zoltan [Thu, 23 Oct 2025 15:26:22 +0000 (17:26 +0200)] 
hw/pci-host/raven: Simplify PCI facing part

The raven PCI device does not need a state struct as it has no data to
store there any more, so we can remove that to simplify code.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-ID: <3c4cb144c24a2a729669549c4c0e6e47d230e68e.1761232472.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/pci-host/raven: Simplify creating PCI facing part
BALATON Zoltan [Thu, 23 Oct 2025 15:26:21 +0000 (17:26 +0200)] 
hw/pci-host/raven: Simplify creating PCI facing part

There is no need to init and realize the PCI facing part of the host
bridge separately as it does not expose any properties that need to be
available before realize. It can be simpilfied using pci_create_simple.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-ID: <5a60e395d72e5eb4d01093434fbb645d72ac567a.1761232472.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agomigration/vmstate: remove VMSTATE_BUFFER_POINTER_UNSAFE macro
Michael Tokarev [Thu, 23 Oct 2025 13:53:10 +0000 (16:53 +0300)] 
migration/vmstate: remove VMSTATE_BUFFER_POINTER_UNSAFE macro

The only user of this macro was VirtIONet.vlans, which has been
converted to regular VMSTATE_BUFFER.

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Peter Xu <peterx@redhat.com>
Message-ID: <20251023135316.31128-3-mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/net/virtio-net: make VirtIONet.vlans an array instead of a pointer
Michael Tokarev [Thu, 23 Oct 2025 13:53:09 +0000 (16:53 +0300)] 
hw/net/virtio-net: make VirtIONet.vlans an array instead of a pointer

This field is a fixed-size buffer (number of elements is MAX_VLAN,
known at build time).  There's no need to allocate it dynamically,
it can be made an integral part of VirtIONet structure.

This field is the only user of VMSTATE_BUFFER_POINTER_UNSAFE() macro.

Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Message-ID: <20251023135316.31128-2-mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agoqom: remove redundant typedef when use OBJECT_DECLARE_SIMPLE_TYPE
Nguyen Dinh Phi [Thu, 23 Oct 2025 06:34:28 +0000 (14:34 +0800)] 
qom: remove redundant typedef when use OBJECT_DECLARE_SIMPLE_TYPE

When OBJECT_DECLARE_SIMPLE_TYPE is used, it automatically provides
the typedef, so we don’t have to define it ourselves.

Signed-off-by: Nguyen Dinh Phi <phind.uet@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251023063429.1400398-1-phind.uet@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agotarget/hppa: Set FPCR exception flag bits for non-trapped exceptions
Peter Maydell [Fri, 17 Oct 2025 08:53:50 +0000 (09:53 +0100)] 
target/hppa: Set FPCR exception flag bits for non-trapped exceptions

In commit ebd394948de4e8 ("target/hppa: Fix FPE exceptions") when
we added the code for setting up the registers correctly on trapping
FP exceptions, we accidentally broke the handling of the flag bits
for non-trapping exceptions.

In update_fr0_op() we incorrectly zero out the flag bits and the C
bit, so any fp operation would clear previously set flag bits. We
also stopped setting the flag bits when the fp operation raises
an exception and the trap is not enabled.

Adjust the code so that we set the Flag bits for every exception that
happened and where the trap is not enabled.  (This is the correct
behaviour for the case where an instruction triggers two exceptions,
one of which traps and one of which does not; that can only happen
for inexact + underflow or inexact + overflow.)

Cc: qemu-stable@nongnu.org
Fixes: ebd394948de4e8 ("target/hppa: Fix FPE exceptions")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3158
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>
Message-ID: <20251017085350.895681-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/hppa: Add 715 machine type including NCR710 SCSI
Helge Deller [Sat, 25 Oct 2025 09:30:39 +0000 (11:30 +0200)] 
hw/hppa: Add 715 machine type including NCR710 SCSI

Add a new emulation for a 715/64 machine.
This machines has no PCI bus, and has the majority of the devices (SCSI,
network, serial ports, ...) provided by a LASI multi-function I/O chip.

Signed-off-by: Helge Deller <deller@gmx.de>
5 weeks agohw/hppa: Require SeaBIOS version 19 for 715 machine
Helge Deller [Tue, 14 Oct 2025 21:15:53 +0000 (23:15 +0200)] 
hw/hppa: Require SeaBIOS version 19 for 715 machine

Require at least SeaBIOS version 19 before adding the 715 machine.  This is
required, because the machine inventory of the 715 is provided by the SeaBIOS
firmware.

Signed-off-by: Helge Deller <deller@gmx.de>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agohw/hppa: PCI devices depend on availability of PCI bus
Helge Deller [Sat, 25 Oct 2025 09:22:45 +0000 (11:22 +0200)] 
hw/hppa: PCI devices depend on availability of PCI bus

Only create the PCI serial ports (DIVA) and PCI network cards when there is
actually a PCI bus. The shortly added 715 machine will not have a PCI bus, so
avoid creating further PCI devices.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agohw/hppa: Add NCR 710 SCSI driver to LASI chip Kconfig entry
Helge Deller [Sat, 25 Oct 2025 09:11:23 +0000 (11:11 +0200)] 
hw/hppa: Add NCR 710 SCSI driver to LASI chip Kconfig entry

The LASI chip is a multi I/O chip used in many older PA-RISC machines.
It includes functionality for NCR710 SCSI, serial, parallel, audio,
i82596 networking and PS/2 ports.

Add the functionality for NCR710_SCSI to the LASI Kconfig option
and move over the relevant parts from the generic HPPA_B160L Kconfig
option to get the dependency right.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Helge Deller <deller@gmx.de>
5 weeks agohw/hppa: Fix interrupt of LASI parallel port
Helge Deller [Tue, 14 Oct 2025 20:59:05 +0000 (22:59 +0200)] 
hw/hppa: Fix interrupt of LASI parallel port

Fix wrong assignment where the LASI parallel port was using the IRQ line of the
LASI LAN card.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5 weeks agohw/hppa: Fix firmware end address for LASI chip
Helge Deller [Tue, 14 Oct 2025 20:48:07 +0000 (22:48 +0200)] 
hw/hppa: Fix firmware end address for LASI chip

The base address of a LASI chip on a 715 machine starts at HPA
0xf0100000.  Make sure that the firmware does not extend beyond that
address, otherwise it's not possible to access the LASI ports.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agohw/scsi: Add config option for new ncr710 driver
Soumyajyotii Ssarkar [Tue, 14 Oct 2025 20:46:15 +0000 (22:46 +0200)] 
hw/scsi: Add config option for new ncr710 driver

Add config option and wire up in meson makefile.

Signed-off-by: Soumyajyotii Ssarkar <soumyajyotisarkar23@gmail.com>
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 weeks agolasi: Forward LASI SCSI ports to NCR 53c710 driver
Soumyajyotii Ssarkar [Tue, 14 Oct 2025 20:44:16 +0000 (22:44 +0200)] 
lasi: Forward LASI SCSI ports to NCR 53c710 driver

Signed-off-by: Soumyajyotii Ssarkar <soumyajyotisarkar23@gmail.com>
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Helge Deller <deller@gmx.de>
5 weeks agoncr710: Add driver for the NCR 53c710 SCSI chip
Soumyajyotii Ssarkar [Tue, 14 Oct 2025 20:40:18 +0000 (22:40 +0200)] 
ncr710: Add driver for the NCR 53c710 SCSI chip

Add an emulation for the NCR 53c710 SCSI chip.
This SCSI chip was used widely in historic machines, e.g. as SCSI core
in the LASI controller in HP PA-RISC machines.

This driver was developed as part of the Google Summer of Code 2025 program.

Signed-off-by: Soumyajyotii Ssarkar <soumyajyotisarkar23@gmail.com>
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Helge Deller <deller@gmx.de>
5 weeks agolasi_ncr710: Add LASI wrapper for NCR 53c710 SCSI chip
Soumyajyotii Ssarkar [Tue, 14 Oct 2025 20:40:18 +0000 (22:40 +0200)] 
lasi_ncr710: Add LASI wrapper for NCR 53c710 SCSI chip

The LASI multi I/O chip in older PA-RISC machines includes a SCSI
core based on the NCR 53c710 SCSI chip.
This driver adds the glue code to talk to the NCR710 via LASI.

This driver was developed as part of the Google Summer of Code 2025 program.

Signed-off-by: Soumyajyotii Ssarkar <soumyajyotisarkar23@gmail.com>
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Helge Deller <deller@gmx.de>
5 weeks agohw/scsi: avoid deadlock upon TMF request cancelling with VirtIO
Fiona Ebner [Fri, 17 Oct 2025 09:43:30 +0000 (11:43 +0200)] 
hw/scsi: avoid deadlock upon TMF request cancelling with VirtIO

When scsi_req_dequeue() is reached via
scsi_req_cancel_async()
virtio_scsi_tmf_cancel_req()
virtio_scsi_do_tmf_aio_context(),
there is a deadlock when trying to acquire the SCSI device's requests
lock, because it was already acquired in
virtio_scsi_do_tmf_aio_context().

In particular, the issue happens with a FreeBSD guest (13, 14, 15,
maybe more), when it cancels SCSI requests, because of timeout.

This is a regression caused by commit da6eebb33b ("virtio-scsi:
perform TMFs in appropriate AioContexts") and the introduction of the
requests_lock earlier.

To fix the issue, only cancel the requests after releasing the
requests_lock. For this, the SCSI device's requests are iterated while
holding the requests_lock and the requests to be cancelled are
collected in a list. Then, the collected requests are cancelled
one by one while not holding the requests_lock. This is safe, because
only requests from the current AioContext are collected and acted
upon.

Originally reported by Proxmox VE users:
https://bugzilla.proxmox.com/show_bug.cgi?id=6810
https://forum.proxmox.com/threads/173914/

Fixes: da6eebb33b ("virtio-scsi: perform TMFs in appropriate AioContexts")
Suggested-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
Message-id: 20251017094518.328905-1-f.ebner@proxmox.com
[Changed g_list_append() to g_list_prepend() to avoid traversing the
list each time.
--Stefan]
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
5 weeks agoMerge tag 'next-pr-pull-request' of https://gitlab.com/berrange/qemu into staging
Richard Henderson [Sat, 25 Oct 2025 08:42:55 +0000 (10:42 +0200)] 
Merge tag 'next-pr-pull-request' of https://gitlab.com/berrange/qemu into staging

Merge misc, crypto and I/O subsystems changes

 * Fix use after free in websocket handshake (CVE-2025-11234)
 * Improved stack traces fatal errors/aborts raised for
   user creatable objects
 * Stop requiring 'key encipherment' usage in x509 certs
 * Only sanity check CA certs needed in the chain of trust
 * Allow intermediate CA certs to be present in client/server
   cert file
 * Fix regression propagating errors in premature shutdown
   of TLS connections

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE2vOm/bJrYpEtDo4/vobrtBUQT98FAmj7nZQACgkQvobrtBUQ
# T9+ezBAAsgKl5O/8FYGoSAaVHq4dzbXl/Q0NzHzX7NJ7W8K6LvNy4w8zpuPZEWIt
# luo3uAeRFmWGCE5kAe/rfySwvNAYfKTJWbd4+c/DN6spK8MViMfY/mL2Zows3LsJ
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# pvqoeXNVu3Mw4CmY3jb0fArRD8G6g8y0USahVNfXV3cYFXp1/SaEL4sNbYU3VhxG
# MJXvA+uVir6HHJWiDbjiAG+6zjoggaPAwkp5f4M89fnPGgX9sRRAsCdJnR5IIEDo
# 58bc1WWni+KzkDXY/GJ1lMQ6jJuQxavIcpW/zi/sSLu1ceK+j+JqLmjGzpr1mPrk
# D63MvLSOsKFgJNP51OeC5s3GN9UOo6jO/wOMyLTDUTdhc/WOz3Q+f5/E/bRXtaE0
# S+NxMTHJdwDfeRpDXMglL9f5K1ApBo7GAMmjhwXCD3XqUb1pD7RbFNu+QKMqgT4Z
# Jv/Rsik3XOHMFNoMtm+fSaUfeETASJBQQancnLyUcCUrWR9MTKBAtlm0fJypxaBp
# 787FL5LthIX5u7tNf5Btl67BJalHFICVEQrFe/gPq5YnuIRDmwo=
# =WY6C
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 24 Oct 2025 05:39:00 PM CEST
# gpg:                using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [unknown]
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* tag 'next-pr-pull-request' of https://gitlab.com/berrange/qemu:
  crypto: switch to newer gnutls API for distinguished name
  crypto: stop requiring "key encipherment" usage in x509 certs
  crypto: allow client/server cert chains
  crypto: fix error reporting in cert chain checks
  crypto: validate an error is reported in test expected fails
  crypto: remove extraneous pointer usage in gnutls certs
  crypto: only verify CA certs in chain of trust
  io: fix use after free in websocket handshake code
  io: move websock resource release to close method
  io: release active GSource in TLS channel finalizer
  tests: use macros for registering char tests for sockets
  qom: use ERRP_GUARD in user_creatable_complete
  crypto: propagate Error object on premature termination

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>