hw/i2c/imx: Always set interrupt status bit if interrupt condition occurs
According to the i.MX 8M Plus reference manual, the status flag
I2C_I2SR[IIF] continues to be set when an interrupt condition
occurs even when I2C interrupts are disabled (I2C_I2CR[IIEN] is
clear). However, the device model only sets the flag when I2C
interrupts are enabled which causes U-Boot to loop forever. Fix
the device model by always setting the flag and let I2C_I2CR[IIEN]
guard I2C interrupts only.
Also remove the comment in the code since it merely stated the
obvious and would be outdated now.
Currently hvf_enabled() is restricted to target-specific code.
By defining CONFIG_HVF_IS_POSSIBLE we allow its use anywhere.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250403235821.9909-28-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Since commit d5bd8d8267e ("hvf: only update sysreg from owning
thread") hvf-all.c accesses the run_on_cpu_data type and calls
run_on_cpu(), both defined in the "hw/core/cpu.h" header.
Fortunately, it is indirectly included via:
"system/hvf.h" however doesn't need "target/arm/cpu.h" and we
want to remove it there. In order to do that we first need to
include it in hvf-all.c, otherwise we get:
../accel/hvf/hvf-all.c:61:54: error: unknown type name 'run_on_cpu_data'
61 | static void do_hvf_update_guest_debug(CPUState *cpu, run_on_cpu_data arg)
| ^
../accel/hvf/hvf-all.c:68:5: error: call to undeclared function 'run_on_cpu'
68 | run_on_cpu(cpu, do_hvf_update_guest_debug, RUN_ON_CPU_NULL);
| ^
../accel/hvf/hvf-all.c:68:48: error: use of undeclared identifier 'RUN_ON_CPU_NULL'
68 | run_on_cpu(cpu, do_hvf_update_guest_debug, RUN_ON_CPU_NULL);
| ^
VMSTATE_CPU() is only used in 4 places and doesn't provide
much, directly inline it using VMSTATE_STRUCT().
This removes the last COMPILING_PER_TARGET in "hw/core/cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250429085148.11876-1-philmd@linaro.org>
Steve Sistare [Mon, 3 Mar 2025 21:09:57 +0000 (13:09 -0800)]
qom: Factor qom_resolve_path() out
Factor out a helper to resolve the user's path and print error messages.
No functional change.
Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <1741036202-265696-2-git-send-email-steven.sistare@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Stefan Hajnoczi [Wed, 7 May 2025 18:28:20 +0000 (14:28 -0400)]
Merge tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
* arm/hvf: fix crashes when using gdbstub
* target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug
* hw/arm/virt: Remove deprecated old versions of 'virt' machine
* tests/functional: Add test for imx8mp-evk board with USDHC coverage
* hw/arm: Attach PSPI module to NPCM8XX SoC
* target/arm: Don't assert() for ISB/SB inside IT block
* docs: Don't define duplicate label in qemu-block-drivers.rst.inc
* target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
* hw/pci-host/designware: Fix viewport configuration
* hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
Stefan Hajnoczi [Tue, 6 May 2025 15:03:45 +0000 (11:03 -0400)]
Merge tag 'pull-loongarch-20250506' of https://github.com/bibo-mao/qemu into staging
loongarch queue
# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQQNhkKjomWfgLCz0aQfewwSUazn0QUCaBljTgAKCRAfewwSUazn
# 0cSzAPoCbqppm5lUPgFAacD4m1sUI6jLk5pJGMsQTQHkMZ34yQD7BswZhMWPL44Z
# LmrZgO7NfqAv96AF1mpRawV9ZXSOGAQ=
# =3itp
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 05 May 2025 21:18:06 EDT
# gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C
# Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1
* tag 'pull-loongarch-20250506' of https://github.com/bibo-mao/qemu:
hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID
hw/loongarch/virt: Replace RSDT with XSDT table
hw/loongarch/virt: Get physical entry address with elf file
hw/intc/loongarch_pch: Replace legacy reset callback with new api
hw/intc/loongarch_pch: Add reset support
hw/intc/loongarch_extioi: Replace legacy reset callback with new api
hw/intc/loongarch_extioi: Add reset support
hw/intc/loongarch_ipi: Add reset support
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'pull-tcg-20250501-v2' of https://gitlab.com/rth7680/qemu: (59 commits)
accel/tcg: Build user-exec.c once
accel/tcg: Avoid abi_ptr in user-exec.c
accel/tcg: Remove TARGET_PAGE_DATA_SIZE
accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
include/user: Use vaddr in guest-host.h
include/user: Convert GUEST_ADDR_MAX to a variable
accel/tcg: Build cputlb.c once
accel/tcg: Use vaddr for plugin_{load,store}_cb
accel/tcg: Use target_long_bits() in cputlb.c
accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
accel/tcg: Move user-only tlb_vaddr_to_host out of line
accel/tcg: Use vaddr in cpu_loop.h
accel/tcg: Build tcg-all.c twice
accel/tcg: Build translate-all.c twice
accel/tcg: Use target_long_bits() in translate-all.c
accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
tcg: Define INSN_START_WORDS as constant 3
qemu: Introduce target_long_bits()
qemu/target_info: Add %target_cpu_type field to TargetInfo
system/vl: Filter machine list available for a particular target binary
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Update comment about Multiprocessor Affinity Register
Support on ARMv7 has been dropped in commit 82bf7ae84ce
("target/arm: Remove KVM support for 32-bit Arm hosts").
Update the comment in virt_cpu_mp_affinity() to avoid
mentioning it.
Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
According to the i.MX 8M Plus reference manual, a GPIO pin is
configured as an output when the corresponding bit in the GDIR
register is set. The function imx_gpio_set_int_line() is intended to
be a no-op if the pin is configured as an output, returning early in
such cases. However, it inverts the condition. Fix this by
returning early when the bit is set.
cc: qemu-stable@nongnu.org Fixes: f44272809779 ("i.MX: Add GPIO device") Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20250501183445.2389-4-shentey@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit 6970f91ac781, "hw/pci-host/designware: Use deposit/extract
API" accidentally introduced a copy-and-paste error, causing Linux
6.14 to hang when initializing the PCIe bridge on the imx8mp-evk
machine. This fix corrects the error.
Fixes: 6970f91ac781 ("hw/pci-host/designware: Use deposit/extract API") Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250501183445.2389-3-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The DEFINE_TYPES() macro doesn't need the qemu/module.h include.
Fixes: 13a07eb146c8 ("hw/pci-host/designware: Declare CPU QOM types using DEFINE_TYPES() macro") Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250501183445.2389-2-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 18 Mar 2025 11:42:22 +0000 (11:42 +0000)]
target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
Our KVM code includes backwards compatibility support for ancient
kernels which don't support the KVM_ARM_PREFERRED_TARGET ioctl. This
ioctl was introduced in kernel commit 42c4e0c77ac91 in September
2013 and is in v3.12, so it's reasonable to assume it's present.
(We already dropped support for kernels without KVM_CAP_DEVICE_CTRL,
a feature added to the kernel in April 2013, in our commit 84f298ea3e; so there are only about six months' worth of kernels,
from v3.9 to v3.11, that we don't already fail to run on and that
this commit is dropping handling for.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250318114222.1018200-1-peter.maydell@linaro.org
Peter Maydell [Thu, 1 May 2025 09:31:26 +0000 (10:31 +0100)]
docs: Don't define duplicate label in qemu-block-drivers.rst.inc
Sphinx requires that labels within documents are unique across the
whole manual. This is because the "create a hyperlink" directive
specifies only the name of the label, not a filename+label. Some
Sphinx versions will warn about duplicate labels, but even if there
is no warning there is still an ambiguity and no guarantee that the
hyperlink will be created to the right target.
For QEMU this is awkward, because we have various .rst.inc fragments
which we include into multiple .rst files. If you define a label in
the .rst.inc file then it will be a duplicate label. We have mostly
worked around this by not putting labels into those .rst.inc files,
or by adding "insert a label" functionality into the hxtool extension
(see commit 1eeb432a953b0 "doc/sphinx/hxtool.py: add optional label
argument to SRST directive").
Unfortunately in commit 7f6314427e78 ("docs/devel: add a codebase
section") we accidentally added a duplicate label, because not all
Sphinx versions warn about the mistake.
In this case the link was only from the developer docs codebase
summary, so as the simplest fix for the stable branch, we drop
the link entirely.
Cc: qemu-stable@nongnu.org Fixes: 1eeb432a953b0 "doc/sphinx/hxtool.py: add optional label argument to SRST directive" Reported-by: Dario Faggioli <dfaggioli@suse.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Eric Blake <eblake@redhat.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20250501093126.716667-1-peter.maydell@linaro.org
Both calls are in arm_tr_tb_stop(), one for the
DISAS_NEXT/DISAS_TOO_MANY handling, and one for the dc->condjump
condition-failed codepath. The DISAS_NEXT handling doesn't have this
problem because arm_post_translate_insn() does the handling of "emit
the label for the condition-failed conditional execution" and so
arm_tr_tb_stop() doesn't have dc->condjump set. But for
DISAS_TOO_MANY we don't do that.
Fix the bug by making arm_post_translate_insn() handle the
DISAS_TOO_MANY case. This only affects the SB and ISB insns when
used in Thumb mode inside an IT block: only these insns specifically
set is_jmp to TOO_MANY, and their A32 encodings are unconditional.
For the major TOO_MANY case (breaking the TB because it would cross a
page boundary) we do that check and set is_jmp to TOO_MANY only after
the call to arm_post_translate_insn(); so arm_post_translate_insn()
sees is_jmp == DISAS_NEXT, and we emit the correct code for that
situation.
With this fix we generate the somewhat more sensible set of TCG ops:
brcond_i32 ZF,$0x0,ne,$L1
set_label $L1
add_i32 pc,pc,$0x4
goto_tb $0x1
exit_tb $0x7c5434001b81
(NB: the TCG optimizer doesn't optimize out the jump-to-next, but
we can't really avoid emitting it because we don't know at the
point we're emitting the handling for the condexec check whether
this insn is going to happen to be a nop for us or not.)
Cc: qemu-stable@nongnu.org Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2942 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250501125544.727038-1-peter.maydell@linaro.org
tests/functional: Add test for imx8mp-evk board with USDHC coverage
Introduce a functional test which boots Debian 12 on the imx8mp-evk board. Since
the root filesystem resides on an SD card, the test also verifies the basic
operation of the USDHC.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20250409202630.19667-1-shentey@gmail.com
[PMM: added extra blank line as suggested by thuth;
set timeout to 240s] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam field
The VirtMachineClass::no_highmem_ecam field was only
used by virt-2.12 machine, which got removed. Remove it
and simplify virt_instance_init().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver field
The VirtMachineClass::smbios_old_sys_ver field was
only used by virt-2.11 machine, which got removed.
Remove it and simplify virt_build_smbios().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers field
The VirtMachineClass::claim_edge_triggered_timers field
was only used by virt-2.8 machine, which got removed.
Remove it and simplify fdt_add_timer_nodes() and build_gtdt().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::no_its field
The VirtMachineClass::no_its field was only used by
virt-2.7 machine, which got removed. Remove it and
simplify virt_instance_init() and virt_acpi_build().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The VirtMachineClass::disallow_affinity_adjustment
field was only used by virt-2.6 machine, which got
removed. Remove it and simplify virt_cpu_mp_affinity().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
[PMM: Remove now-unused variable] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::no_pmu field
The VirtMachineClass::no_pmu field was only used by
virt-2.6 machine, which got removed. Remove it and
simplify machvirt_init().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
It was reported that QEMU monitor command gva2gpa was reporting unmapped
memory for a valid access (qemu-system-aarch64), during a copy from
kernel to user space (__arch_copy_to_user symbol in Linux) [1].
This was affecting cpu_memory_rw_debug also, which
is used in numerous places in our codebase. After investigating, the
problem was specific to arm_cpu_get_phys_page_attrs_debug.
When performing user access from a privileged space, we need to do a
second lookup for user mmu idx, following what get_a64_user_mem_index is
doing at translation time.
hv_vcpu_set_sys_reg should only be called from the owning thread of the
vCPU, so to avoid crashes, the call to hvf_update_guest_debug is
dispatched to the individual threads.
Tested-by: Daniel Gomez <da.gomez@samsung.com> Signed-off-by: Mads Ynddal <m.ynddal@samsung.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20250402135229.28143-3-mads@ynddal.dk Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tim Lee [Mon, 28 Apr 2025 02:29:34 +0000 (10:29 +0800)]
hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.
Cc: qemu-stable@nongnu.org Fixes: 7e70eb3cad7c83 ("hw/arm: Add NPCM845 Evaluation board") Signed-off-by: Tim Lee <timlee660101@gmail.com>
Message-id: 20250428022934.3081139-1-timlee660101@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Bibo Mao [Tue, 4 Mar 2025 06:59:17 +0000 (14:59 +0800)]
hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID
On LoongArch virt machine, the default OEM ID and OEM table ID is
"BOCHS " and "BXPC ". Here property x-oem-id and x-oem-table-id
is added on virt machine to set customized OEM ID and OEM table ID.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 28 Feb 2025 01:44:12 +0000 (09:44 +0800)]
hw/loongarch/virt: Replace RSDT with XSDT table
XSDT table is introduced in ACPI Specification 5.0, it supports 64-bit
address in the table. There is LoongArch system support from ACPI
Specification 6.4 and later, XSDT is supported by LoongArch system.
Here replace RSDT with XSDT table.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 25 Apr 2025 02:05:04 +0000 (10:05 +0800)]
hw/loongarch/virt: Get physical entry address with elf file
With load_elf() api, image load low address and high address is converted
to physical address if parameter translate_fn is provided. However
executing entry address is still virtual address. Here convert entry
address into physical address, since MMU is disabled when system power on,
the first PC instruction should be physical address.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 06:20:13 +0000 (14:20 +0800)]
hw/intc/loongarch_pch: Replace legacy reset callback with new api
Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object.
The internal state has been cleared in parent object
LOONGARCH_PIC_COMMON, here parent_phases.hold() is directly called.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 03:57:31 +0000 (11:57 +0800)]
hw/intc/loongarch_pch: Add reset support
Add reset support with LoongArch pci irqchip, and register reset
callback support with new API resettable_class_set_parent_phases().
Clear internal HW registers and SW state when virt machine resets.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 02:23:21 +0000 (10:23 +0800)]
hw/intc/loongarch_extioi: Replace legacy reset callback with new api
Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object and then itself.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 02:12:09 +0000 (10:12 +0800)]
hw/intc/loongarch_extioi: Add reset support
Add reset support with extioi irqchip, and register reset callback
support with new API resettable_class_set_parent_phases(). Clear
internal HW registers and SW state when virt machine resets.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
In page_dump/dump_region, use guest_addr_max to check the
size of the guest address space and size the output
appropriately. This will change output with small values
of -R reserved_va, but shouldn't affect anything else.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This macro is used by only one target, and even then under
unusual conditions -- AArch64 with mmap's PROT_MTE flag.
Since page size for aarch64-linux-user is variable, the
per-page data size is also variable.
Since page_reset_target_data via target_munmap does not
have ready access to CPUState, simply pass in the size
from the first allocation and remember that.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Stefan Hajnoczi [Mon, 5 May 2025 15:26:59 +0000 (11:26 -0400)]
Merge tag 'pull-9p-20250505' of https://github.com/cschoenebeck/qemu into staging
9pfs changes:
* Fixes for file descriptor reclaiming algorithm (i.e. when running
towards host's allowed limit of max. open file descriptors).
* Additional fixes on use-after-unlink idiom (i.e. client operations on a
file descriptor after file has been removed).
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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 05 May 2025 05:50:37 EDT
# gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395
# gpg: issuer "qemu_oss@crudebyte.com"
# gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4
# Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395
* tag 'pull-9p-20250505' of https://github.com/cschoenebeck/qemu:
9pfs: fix 'total_open_fd' decrementation
tests/9p: Test `Tsetattr` can truncate unlinked file
tests/9p: add 'Tsetattr' request to test client
9pfs: Introduce futimens file op
9pfs: Introduce ftruncate file op
9pfs: Don't use file descriptors in core code
9pfs: local : Introduce local_fid_fd() helper
9pfs: fix FD leak and reduce latency of v9fs_reclaim_fd()
9pfs: fix concurrent v9fs_reclaim_fd() calls
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'pull-aspeed-20250505' of https://github.com/legoater/qemu: (24 commits)
docs: Add support for ast2700fc machine
tests/function/aspeed: Add functional test for ast2700fc
hw/arm: Introduce ASPEED AST2700 A1 full core machine
hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC
hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC
hw/intc/aspeed: Add support for AST2700 TSP INTC
hw/intc/aspeed: Add support for AST2700 SSP INTC
aspeed: ast27x0: Correct hex notation for device addresses
aspeed: ast27x0: Map unimplemented devices in SoC memory
docs/system/arm/aspeed: Support vbootrom for AST2700
docs/system/arm/aspeed: move AST2700 content to new section
tests/functional/aspeed: Add to test vbootrom for AST2700
hw/arm/aspeed: Add support for loading vbootrom image via "-bios"
hw/arm/aspeed_ast27x0 Introduce vbootrom memory region
tests/functional/aspeed: extract boot and login sequence into helper function
tests/functional/aspeed: Update test ASPEED SDK v09.06
tests/functional/aspeed: Move I2C test into shared helper for AST2700 reuse
hw/arm/aspeed_ast27x0: Rename variable sram_name to name in ast2700 realize
tests/functional/aspeed: Update test ASPEED SDK v03.00 for AST1030
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2600
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
monitor: don't wake up qmp_dispatcher_co coroutine upon cleanup
rust: centralize config in workspace root
hw/char/serial: Remove unused prog_if compat property
target/i386: do not block singlestep for STI
target/i386: do not trigger IRQ shadow for LSS
target/i386/hvf: fix a compilation error
target/i386/emulate: remove rflags leftovers
rust/hpet: Support migration
rust/timer: Define NANOSECONDS_PER_SECOND binding as u64
rust/vmstate_test: Test varray with num field wrapped in BqlCell
rust: assertions: Support index field wrapped in BqlCell
vmstate: support varray for vmstate_clock!
rust/vmstate: Add support for field_exists checks
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 5 May 2025 15:26:40 +0000 (11:26 -0400)]
Merge tag 'migration-20250502-pull-request' of https://gitlab.com/peterx/qemu into staging
Migration pull request
- Prasad's few pre-requisite patches from multifd+postcopy enablement series
- Markus's fix on a latent bug for tls_authz setup
- Zhijian's latest RDMA series (includes the rdma soft-RoCE unit test)
- Jack's RDMA migration patch to re-enable ipv6
- Thomas's vmstate static checker update on rename field in acpi/ghes
- Peter's postcopy preempt optimization for locality hint
* tag 'migration-20250502-pull-request' of https://gitlab.com/peterx/qemu:
scripts/vmstate-static-checker.py: Allow new name for ghes_addr_le field
migration/rdma: Remove qemu_rdma_broken_ipv6_kernel
migration/postcopy: Spatial locality page hint for preempt mode
tests/qtest/migration: consolidate set capabilities
migration/ram: Implement save_postcopy_prepare()
migration: Add save_postcopy_prepare() savevm handler
migration: refactor channel discovery mechanism
migration/multifd: move macros to multifd header
migration: Fix latent bug in migrate_params_test_apply()
migration: Add qtest for migration over RDMA
migration: Unfold control_save_page()
migration/rdma: Remove redundant migration_in_postcopy checks
migration: disable RDMA + postcopy-ram
migration: check RDMA and capabilities are compatible on both sides
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 5 May 2025 15:26:28 +0000 (11:26 -0400)]
Merge tag 'pull-request-2025-04-30' of https://gitlab.com/thuth/qemu into staging
* Extend s390x diagnose call 308 subcode 10 to return more information
* Make valgrind support configurable
* Drop support for Python 3.8
* Some other misc cosmetic changes
* tag 'pull-request-2025-04-30' of https://gitlab.com/thuth/qemu:
docs/devel/build-environment: enhance MSYS2 instructions
hw/rtc/mc146818rtc: Drop pre-v3 migration stream support
meson.build: Put the D-Bus summary into the UI section
tests/functional/test_ppc64_pseries: Skip test_ppc64_linux_smt_boot if necessary
Drop support for Python 3.8
meson/configure: add 'valgrind' option & --{en, dis}able-valgrind flag
target/s390x: Return UVC cmd code, RC and RRC value when DIAG 308 Subcode 10 fails to enter secure mode
target/s390x: Introduce function when exiting PV
target/s390x: Introduce constant when checking if PV header couldn't be decrypted
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
According to 'man 2 close' errors returned by close() should only be used
for either diagnostic purposes or for catching data loss due to a previous
write error, as an error result of close() usually indicates a deferred
error of a previous write operation.
Therefore not decrementing 'total_open_fd' on a close() error is wrong
and would yield in a higher open file descriptor count than actually the
case, leading to 9p server reclaiming open file descriptors too soon.
Based-on: <20250312152933.383967-7-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <E1tvEyJ-004dMa-So@kylie.crudebyte.com>
Greg Kurz [Wed, 12 Mar 2025 15:29:32 +0000 (16:29 +0100)]
tests/9p: Test `Tsetattr` can truncate unlinked file
Enhance the `use-after-unlink` test with a new check for the
case where the client wants to alter the size of an unlinked
file for which it still has an active fid.
Suggested-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-7-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Add and implement functions to 9pfs test client for sending a 9p2000.L
'Tsetattr' request and receiving its 'Rsetattr' response counterpart.
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20250312152933.383967-6-groug@kaod.org>
Greg Kurz [Wed, 12 Mar 2025 15:29:30 +0000 (16:29 +0100)]
9pfs: Introduce futimens file op
Add an futimens operation to the fs driver and use if when a fid has
a valid file descriptor. This is required to support more cases where
the client wants to do an action on an unlinked file which it still
has an open file decriptor for.
Only 9P2000.L was considered.
Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-5-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Greg Kurz [Wed, 12 Mar 2025 15:29:29 +0000 (16:29 +0100)]
9pfs: Introduce ftruncate file op
Add an ftruncate operation to the fs driver and use if when a fid has
a valid file descriptor. This is required to support more cases where
the client wants to do an action on an unlinked file which it still
has an open file decriptor for.
Only 9P2000.L was considered.
Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-4-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Greg Kurz [Wed, 12 Mar 2025 15:29:28 +0000 (16:29 +0100)]
9pfs: Don't use file descriptors in core code
v9fs_getattr() currently peeks into V9fsFidOpenState to know if a fid
has a valid file descriptor or directory stream. Even though the fields
are accessible, this is an implementation detail of the local backend
that should not be manipulated directly by the server code.
Abstract that with a new has_valid_file_handle() backend operation.
Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-3-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Greg Kurz [Wed, 12 Mar 2025 15:29:27 +0000 (16:29 +0100)]
9pfs: local : Introduce local_fid_fd() helper
Factor out duplicated code to a single helper. More users to come.
Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Message-Id: <20250312152933.383967-2-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
9pfs: fix FD leak and reduce latency of v9fs_reclaim_fd()
This patch fixes two different bugs in v9fs_reclaim_fd():
1. Reduce latency:
This function calls v9fs_co_close() and v9fs_co_closedir() in a loop. Each
one of the calls adds two thread hops (between main thread and a fs driver
background thread). Each thread hop adds latency, which sums up in
function's loop to a significant duration.
Reduce overall latency by open coding what v9fs_co_close() and
v9fs_co_closedir() do, executing those and the loop itself altogether in
only one background thread block, hence reducing the total amount of
thread hops to only two.
2. Fix file descriptor leak:
The existing code called v9fs_co_close() and v9fs_co_closedir() to close
file descriptors. Both functions check right at the beginning if the 9p
request was cancelled:
if (v9fs_request_cancelled(pdu)) {
return -EINTR;
}
So if client sent a 'Tflush' message, v9fs_co_close() / v9fs_co_closedir()
returned without having closed the file descriptor and v9fs_reclaim_fd()
subsequently freed the FID without its file descriptor being closed, hence
leaking those file descriptors.
This 2nd bug is fixed by this patch as well by open coding v9fs_co_close()
and v9fs_co_closedir() inside of v9fs_reclaim_fd() and not performing the
v9fs_request_cancelled(pdu) check there.
Even though this function is serialized to be always called from main
thread, v9fs_reclaim_fd() is dispatching the coroutine to a worker thread
in between via its v9fs_co_*() calls, hence leading to the situation where
v9fs_reclaim_fd() is effectively executed multiple times simultaniously,
which renders its LRU algorithm useless and causes high latency.
Fix this by adding a simple boolean variable to ensure this function is
only called once at a time. No synchronization needed for this boolean
variable as this function is only entered and returned on main thread.
Fixes: 7a46274529c ('hw/9pfs: Add file descriptor reclaim support') Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <5c622067efd66dd4ee5eca740dcf263f41db20b2.1741339452.git.qemu_oss@crudebyte.com>
Steven Lee [Fri, 2 May 2025 10:34:45 +0000 (18:34 +0800)]
docs: Add support for ast2700fc machine
- Updated Aspeed family boards list to include `ast2700fc`.
- Added boot instructions for the `ast2700fc` machine.
- Detailed the configuration and loading of firmware for the
Cortex-A35 and Cortex-M4 processors.
Steven Lee [Fri, 2 May 2025 10:34:43 +0000 (18:34 +0800)]
hw/arm: Introduce ASPEED AST2700 A1 full core machine
- Added new machine type `ast2700fc` with full core support.
- Defined `Ast2700FCState` structure for the new machine type.
- Implemented initialization functions for CA35, SSP, and TSP components.
- Updated `ast2700fc_types` to include the new machine type.
- Set machine class properties for `ast2700fc`.
Test Step:
- Download ast2700-default-obmc.tar.gz from AspeedTech-BMC OpenBmc
release page.
- Run the following QEMU command:
AST2700 TSP(Tertiary Service Processor) is a Cortex-M4 coprocessor
The patch adds support for TSP with following update:
- Introduce Aspeed27x0TSPSoCState structure in aspeed_soc.h
- Implement initialization and realization functions
- Add support for UART, INTC, and SCU devices
- Map unimplemented devices for IPC and SCUIO
- Defined memory map and IRQ maps for AST27x0 A1 TSP SoC
The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level
interrupt controller.
Difference from AST2700:
- AST2700
- Support GICINT128 to GICINT136 in INTC
- The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
Bit 0 -> GIC 192
Bit 1 -> GIC 193
Bit 2 -> GIC 194
Bit 3 -> GIC 195
Bit 4 -> GIC 196
- AST2700-tsp
- Support TSPINT128 to TSPINT136 in INTC
- The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows:
Bit 0 -> TSPINT 160
Bit 1 -> TSPINT 161
Bit 2 -> TSPINT 162
Bit 3 -> TSPINT 163
Bit 4 -> TSPINT 164
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I69eec2b68b26ef04187b2922c5f2e584b9076c66 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-7-steven_lee@aspeedtech.com
[ clg: removed local 'Error* err' in aspeed_soc_ast27x0tsp_realize() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
The AST2700 SSP (Secondary Service Processor) is a Cortex-M4 coprocessor.
This patch adds support for A1 SSP with the following updates:
- Introduce Aspeed27x0SSPSoCState structure in aspeed_soc.h
- Define memory map and IRQ map for AST27x0 A1 SSP SoC
- Implement initialization and realization functions
- Add support for UART, INTC, and SCU devices
- Map unimplemented devices for IPC and SCUIO
The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level
interrupt controller.
Difference from AST2700:
- AST2700
- Support GICINT128 to GICINT136 in INTC
- The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
Bit 0 -> GIC 192
Bit 1 -> GIC 193
Bit 2 -> GIC 194
Bit 3 -> GIC 195
Bit 4 -> GIC 196
- AST2700-ssp
- Support SSPINT128 to SSPINT136 in INTC
- The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows:
Bit 0 -> SSPINT 160
Bit 1 -> SSPINT 161
Bit 2 -> SSPINT 162
Bit 3 -> SSPINT 163
Bit 4 -> SSPINT 164
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Change-Id: I924bf1a657f1e83f9e16d6673713f4a06ecdb496 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-6-steven_lee@aspeedtech.com
[ clg: removed local 'Error* err' in aspeed_soc_ast27x0ssp_realize() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
Steven Lee [Fri, 2 May 2025 10:34:40 +0000 (18:34 +0800)]
hw/intc/aspeed: Add support for AST2700 TSP INTC
- Define new types for ast2700tsp INTC and INTCIO
- Add register definitions for TSP INTC and INTCIO
- Implement write handlers for TSP INTC and INTCIO
- Register new types in aspeed_intc_register_types
The design of the TSP INTC and INTCIO controllers is similar to
AST2700, with the following differences:
- AST2700
Support GICINT128 to GICINT136 in INTC
The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
Bit 0 -> GIC 192
Bit 1 -> GIC 193
Bit 2 -> GIC 194
Bit 3 -> GIC 195
Bit 4 -> GIC 196
- AST2700-tsp
Support TSPINT128 to TSPINT136 in INTC
The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows:
Bit 0 -> TSPINT 160
Bit 1 -> TSPINT 161
Bit 2 -> TSPINT 162
Bit 3 -> TSPINT 163
Bit 4 -> TSPINT 164
Steven Lee [Fri, 2 May 2025 10:34:39 +0000 (18:34 +0800)]
hw/intc/aspeed: Add support for AST2700 SSP INTC
- Define new types for ast2700ssp INTC and INTCIO
- Add register definitions for SSP INTC and INTCIO
- Implement write handlers for SSP INTC and INTCIO
- Register new types in aspeed_intc_register_types
The design of the SSP INTC and INTCIO controllers is similar to
AST2700, with the following differences:
- AST2700
Support GICINT128 to GICINT136 in INTC
The INTCIO GIC_192_201 has 10 output pins, mapped as follows:
Bit 0 -> GIC 192
Bit 1 -> GIC 193
Bit 2 -> GIC 194
Bit 3 -> GIC 195
Bit 4 -> GIC 196
- AST2700-ssp
Support SSPINT128 to SSPINT136 in INTC
The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows:
Bit 0 -> SSPINT 160
Bit 1 -> SSPINT 161
Bit 2 -> SSPINT 162
Bit 3 -> SSPINT 163
Bit 4 -> SSPINT 164
Steven Lee [Fri, 2 May 2025 10:34:37 +0000 (18:34 +0800)]
aspeed: ast27x0: Map unimplemented devices in SoC memory
Maps following unimplemented devices in SoC memory
- dpmcu
- iomem
- iomem0
- iomem1
- ltpi
Iomem, Iomem0 and Iomem1 include unimplemented controllers in the memory ranges 0x0 - 0x1000000, 0x120000000 - 0x121000000 and
0x14000000 - 0x141000000.
For instance:
- USB hub at 0x12010000
- eSPI at 0x14C5000
- PWM at 0x140C0000
DPMCU stands for Display Port MCU controller. LTPI is used to connect to AST1700.
AST1700 is an I/O expander that supports the DC-SCM 2.1 LTPI protocol.
It provides AST2700 with additional GPIO, UART, I3C, and other interfaces.
Jamin Lin [Thu, 24 Apr 2025 07:51:33 +0000 (15:51 +0800)]
docs/system/arm/aspeed: move AST2700 content to new section
Moved AST2700-related content from the general Aspeed board list into a
dedicated section for Aspeed 2700 family boards. Improves clarity and
readability.
Jamin Lin [Thu, 24 Apr 2025 07:51:32 +0000 (15:51 +0800)]
tests/functional/aspeed: Add to test vbootrom for AST2700
Add the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
projects / thirdparty / qemu.git / log
