nickc [Fri, 15 Jun 2018 15:25:16 +0000 (15:25 +0000)]
Force user provided warning and error messages to only occupy one line.
PR 84195
gcc: * tree.c (escaped_string): New class. Converts an unescaped
string into its escaped equivalent.
(warn_deprecated_use): Use the new class to convert the
deprecation message, if present.
(test_escaped_strings): New self test.
(test_c_tests): Add test_escaped_strings.
* doc/extend.texi (deprecated): Add a note that the
deprecation message is affected by the -fmessage-length
option, and that control characters will be escaped.
(#pragma GCC error): Document this pragma.
(#pragma GCC warning): Likewise.
* doc/invoke.texi (-fmessage-length): Document this option's
effect on the #warning and #error preprocessor directives and
the deprecated attribute.
testsuite;
* gcc.c-torture/compile/pr84195.c: New test.
sh [Fri, 15 Jun 2018 05:19:44 +0000 (05:19 +0000)]
RISC-V: Add custom RTEMS multilibs
Add multilib variants for -march=rv64imafd, e.g. to support the BOOMv2 core.
Add -mcmodel=medany as a variant of the 64-bit multilibs for RTEMS. The
rationale for this change is that several existing RISC-V chips map the
RAM at 0x80000000. In RTEMS, we do not use virtual memory, so
applications will run at this location which is outside the +-2GiB range
in a 64-bit configuration.
gcc/
* config.gcc (riscv*-*-elf* | riscv*-*-rtems*): Use custom
multilibs for *-*-rtems*.
* config/riscv/t-rtems: New file.
redi [Fri, 15 Jun 2018 00:19:07 +0000 (00:19 +0000)]
LWG 3039 Unnecessary decay in thread and packaged_task
* include/std/future (__constrain_pkgdtask): Replace with ...
(packaged_task::__not_same): New alias template, using
__remove_cvref_t instead of decay.
* include/std/thread (thread::__not_same): Add comment.
redi [Thu, 14 Jun 2018 20:27:04 +0000 (20:27 +0000)]
LWG 3075 basic_string needs deduction guides from basic_string_view
* testsuite/21_strings/basic_string/cons/char/deduction.cc: Test
deduction from string views.
* testsuite/21_strings/basic_string/cons/wchar_t/deduction.cc:
Likewise.
jakub [Thu, 14 Jun 2018 19:05:13 +0000 (19:05 +0000)]
P0624R2 - Default constructible and assignable stateless lambdas
* method.c (synthesized_method_walk): For C++2a don't mark
sfk_constructor or sfk_copy_assignment as deleted if lambda has
no lambda-captures.
* g++.dg/cpp2a/lambda1.C: New test.
* g++.dg/cpp0x/lambda/lambda-ice2.C: Adjust expected diagnostics
for -std=c++2a.
redi [Thu, 14 Jun 2018 19:02:40 +0000 (19:02 +0000)]
Partially revert move of std::tuple_element_t to <tuple>
Defining std::tuple_element_t in <utility> makes it available wherever
std::tuple_element is available.
* include/std/tuple (__cpp_lib_tuple_element_t, tuple_element_t):
Move back to <utility>.
* include/std/utility (__cpp_lib_tuple_element_t. tuple_element_t):
Restore to here.
paolo [Thu, 14 Jun 2018 17:49:21 +0000 (17:49 +0000)]
/cp
2018-06-14 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (duplicate_decls): Use DECL_SOURCE_LOCATION in
OPT_Wshadow warning_at.
(grokfndecl): Consistently use the location_t argument in
literal operator diagnostic messages.
(grokdeclarator): Use declspecs->locations[ds_storage_class]
in error_at call.
* decl2.c (finish_static_data_member_decl): Use DECL_SOURCE_LOCATION
in permerror call.
/testsuite
2018-06-14 Paolo Carlini <paolo.carlini@oracle.com>
redi [Thu, 14 Jun 2018 14:01:29 +0000 (14:01 +0000)]
Define __cpp_lib_tuple_element_t in <tuple> not <utility>
* include/std/tuple (__cpp_lib_tuple_element_t): Move feature test
macro from <utility> and change type to long.
* include/std/utility (__cpp_lib_tuple_element_t): Remove.
* testsuite/20_util/tuple/tuple_element_t.cc: Check for feature test
macro.
The param_type constructors of each random number distribution should
mirror the constructors of the distribution itself, so make the same
changes w.r.t explicit on default constructors.
redi [Thu, 14 Jun 2018 09:26:51 +0000 (09:26 +0000)]
PR libstdc++/83982 fix exception-safety guarantee of std::vector::resize
Construct new elements before moving existing ones, so that if a default
constructor throws, the existing elements are not left in a moved-from
state.
2018-06-14 Daniel Trebbien <dtrebbien@gmail.com>
Jonathan Wakely <jwakely@redhat.com>
PR libstdc++/83982
* include/bits/vector.tcc (vector::_M_default_append(size_type)):
Default-construct new elements before moving existing ones.
* testsuite/23_containers/vector/capacity/resize/strong_guarantee.cc:
New.
sh [Thu, 14 Jun 2018 05:10:51 +0000 (05:10 +0000)]
RTEMS: Prefer int for int32_t
Common systems like glibc and FreeBSD define int32_t to int. This means
a lot of third party code works well in these cases:
#include <stdint.h>
void f(int32_t);
void f(int);
void g(int32_t *);
void h(void)
{
int i;
g(&i);
}
On RTEMS you got however in C
test.c:5:6: error: conflicting types for 'f'
void f(int);
^
test.c:3:6: note: previous declaration of 'f' was here
void f(int32_t);
^
test.c: In function 'h':
test.c:12:4: warning: passing argument 1 of 'g' from incompatible
pointer type [-Wincompatible-pointer-types]
g(&i);
^
test.c:7:6: note: expected 'int32_t * {aka long int *}' but argument
is of type 'int *' void g(int32_t *);
and C++
test.c: In function 'void h()':
test.c:12:4: error: invalid conversion from 'int*' to 'int32_t* {aka
long int*}' [-fpermissive]
g(&i);
^~
test.c:7:6: note: initializing argument 1 of 'void g(int32_t*)'
void g(int32_t *);
^
This was due to a Newlib speciality which uses long for int32_t if long
is a 32-bit type. To ease the use of third party software in RTEMS we
override this Newlib option now and use int for int32_t if int is a
32-bit type.
The traversal used by the write barrier insertion phase can sometimes
wind up visiting new statements inserted during the traversal, which
then results in duplicate / redundant write barrier guards. Example
program to reproduce:
package small
type S struct {
N *S
K int
}
var G *S = &S{N: nil, K: 101}
This patch changes the traversal code to keep track of statements
already added and avoid processing them again later in the traversal.
jason [Wed, 13 Jun 2018 19:39:36 +0000 (19:39 +0000)]
PR c++/86094 - wrong code with defaulted move ctor.
gcc/c-family/
* c-opts.c (c_common_post_options): Bump the current ABI version to
13. Set warn_abi_version and flag_abi_compat_version to the current
version rather than 0. Fix defaulting flag_abi_compat_version from
warn_abi_version.
gcc/cp/
* class.c (classtype_has_non_deleted_move_ctor): New.
* tree.c (maybe_warn_parm_abi, type_has_nontrivial_copy_init):
Handle v12 breakage.
ian [Wed, 13 Jun 2018 17:24:45 +0000 (17:24 +0000)]
compiler: include global variable preinit blocks in ast dumps
Dump out the blocks corresponding to variable pre-inits when
-fgo-dump-ast is in effect. Each preinit block is prefixed with a
comment indicating the variable it is initializing.
There is no need to use an allocator of the correct value_type when
calling allocator_traits::construct and allocator_traits::destroy. The
existing node allocator can be used, instead of constructing a new
allocator object every time.
There's also no benefit to using __gnu_cxx::__alloc_traits instead of
std::allocator_traits to get the pointer and const_pointer types.
std::forward_list is only available for C++11 and later, when
std::allocator_traits is available too.
PR libstdc++/86127
* include/bits/forward_list.h (_Fwd_list_base::_Tp_alloc_type): Remove
unused typedef.
(_Fwd_list_base::_Node_alloc_traits): Use allocator_traits instead of
__gnu_cxx::__alloc_traits.
(_Fwd_list_base::_M_create_node, _Fwd_list_base::_M_erase_after):
Use node allocator to create and destroy elements.
(forward_list::_Tp_alloc_type): Remove unused typedef.
(forward_list::_Alloc_traits): Use allocator_traits instead of
__gnu_cxx::__alloc_traits.
rguenth [Wed, 13 Jun 2018 15:03:50 +0000 (15:03 +0000)]
2018-06-13 Richard Biener <rguenther@suse.de>
* tree-vect-patterns.c (vect_recog_vector_vector_shift_pattern):
Properly set vector type of the intermediate stmt.
* tree-vect-stmts.c (vectorizable_operation): The destination
var always has vectype_out type.
dmalcolm [Wed, 13 Jun 2018 13:43:32 +0000 (13:43 +0000)]
emit-rtl.c: more typesafety
This patch converts various rtx to rtx_insn * (or rtx_code_label *).
It also convert the various "_loc" params from int to location_t
gcc/ChangeLog:
* config/arc/arc.c (hwloop_optimize): Strengthen local "end_label"
from rtx to rtx_insn *.
* config/bfin/bfin.c (hwloop_optimize): Likewise for local
"label".
(add_sched_insns_for_speculation): Likewise for local "target",
converting usage of JUMP_LABEL to JUMP_LABEL_AS_INSN.
* config/c6x/c6x.c (reorg_split_calls): Strengthen param "call_labels"
from rtx_insn ** to rtx_code_label **.
(reorg_emit_nops): Likewise.
(c6x_reorg): Likewise for local "call_labels".
* config/sh/sh-protos.h (get_dest_uid): Strengthen 1st param from
rtx to rtx_insn *.
* config/sh/sh.c (dump_table): Strengthen local "lab" from rtx to
rtx_code_label *, adding safe_as_a <rtx_code_label *> casts to
the loops over LABEL_REFS.
(fixup_addr_diff_vecs): Add as_a <rtx_insn *> to usage of
braf_label.
(barrier_align): Convert usage of JUMP_LABEL to JUMP_LABEL_AS_INSN.
(get_dest_uid): Strengthen param "label" from rtx to rtx_insn *.
(split_branches): Strengthen local "olabel" from rtx to
rtx_insn *, adding a safe_as_a cast.
* emit-rtl.c (next_real_insn): Strengthen param from "rtx"
to "rtx_insn *".
(add_insn_after): Likewise for first two params.
(add_insn_before): Likewise.
(remove_insn): Likewise for param.
(emit_pattern_before_noloc): Likewise for second and third params.
(emit_jump_insn_before_noloc): Convert NULL_RTX to NULL.
(emit_call_insn_before_noloc): Likewise.
(emit_debug_insn_before_noloc): Strengthen "before" param from "rtx"
to "rtx_insn *".
(emit_barrier_before): Likewise.
(emit_label_before): Strengthen "label" param from "rtx" to
"rtx_code_label *". Strengthen "before" param from "rtx" to
"rtx_insn *".
(emit_insn_after_1): Strengthen "after" param from "rtx" to
"rtx_insn *".
(emit_pattern_after_noloc): Likewise.
(emit_insn_after_noloc): Likewise.
(emit_jump_insn_after_noloc): Likewise.
(emit_call_insn_after_noloc): Likewise.
(emit_debug_insn_after_noloc): Likewise.
(emit_barrier_after): Likewise.
(emit_label_after): Likewise for both params.
(emit_pattern_after_setloc): Likewise for "after" param. Convert
"loc" param from "int" to "location_t".
(emit_insn_after_setloc): Likewise.
(emit_jump_insn_after_setloc): Likewise.
(emit_call_insn_after_setloc): Likewise.
(emit_debug_insn_after_setloc): Likewise.
(emit_pattern_before_setloc): Likewise for "before" param. Convert
"loc" param from "int" to "location_t".
(emit_pattern_before): Convert NULL_RTX to NULL.
(emit_insn_before_setloc): Convert "loc" param from "int" to
"location_t".
(emit_jump_insn_before_setloc): Likewise.
(emit_call_insn_before_setloc): Likewise.
(emit_debug_insn_before_setloc): Strengthen "before" param from rtx to
rtx_insn *. Convert "loc" param from "int" to "location_t".
* rtl.h (emit_insn_before_setloc, emit_jump_insn_before_setloc,
emit_call_insn_before_setloc, emit_debug_insn_before_setloc):
Convert 3rd param from "int" to "location_t".
(emit_barrier_before, emit_barrier_after, next_real_insn):
Strengthen param from rtx to rtx_insn *.
(emit_label_before): Strengthen 1st param from "rtx" to
"rtx_code_label *". Strengthen 2nd param from "rtx" to
"rtx_insn *".
(emit_insn_after_noloc, emit_jump_insn_after_noloc,
emit_call_insn_after_noloc, emit_debug_insn_after_noloc):
Strengthen 2nd param from "rtx" to "rtx_insn *".
(emit_insn_after_setloc, emit_jump_insn_after_setloc)
emit_call_insn_after_setloc, emit_debug_insn_after_setloc):
Likewise. Convert 3rd param from "int" to "location_t".
(emit_label_after): Strengthen 1st param from "rtx" to
"rtx_code_label *".
(next_real_insn, remove_insn): Strengthen param from "rtx" to
"rtx_insn *".
(add_insn_before, add_insn_after): Strengthen 1st and 2nd params
from "rtx" to "rtx_insn *".
ebotcazou [Wed, 13 Jun 2018 11:20:23 +0000 (11:20 +0000)]
PR target/86048
* config/i386/winnt.c (i386_pe_seh_cold_init): Do not emit negative
offsets for register save directives. Emit a second batch of save
directives, if need be, when the function accesses prior frames.
claziss [Wed, 13 Jun 2018 08:43:56 +0000 (08:43 +0000)]
[ARC] Reimplement return padding operation for ARC700.
For ARC700, adding padding if necessary to avoid a mispredict. A
return could happen immediately after the function start. A
call/return and return/return must be 6 bytes apart to avoid
mispredict.
The old implementation was doing this operation very late in the
compilation process, and the additional nop instructions and/or
forcing some other instruction to take their long form was not taken
into account when generating brcc instructions. Thus, wrong code could
be generated.
* config/arc/arc-protos.h (arc_pad_return): Remove.
* config/arc/arc.c (machine_function): Remove force_short_suffix
and size_reason.
(arc_print_operand): Adjust printing of '&'.
(arc_verify_short): Remove conditional printing of short suffix.
(arc_final_prescan_insn): Remove reference to size_reason.
(pad_return): New function.
(arc_reorg): Call pad_return.
(arc_pad_return): Remove.
(arc_init_machine_status): Remove reference to force_short_suffix.
* config/arc/arc.md (vunspec): Add VUNSPEC_ARC_BLOCKAGE.
(attr length): When attribute iscompact is true force to 2
regardless; in the case of maybe check if we want to force the
instruction to have 4 bytes length.
(nopv): Change it to generate 4 byte long nop as well.
(blockage): New pattern.
(simple_return): Remove call to arc_pad_return.
(p_return_i): Likewise.
after creating loop allocnos. It happens that the ALLOCNO_WMODEs for
both 112 and 517 were not set to V2DI due to another bug that I'll post
a separate patch for, but we nevertheless got a valid allocation of
register 1.
LRA's first try at constraining the instruction gave:
Choosing alt 5 in insn 74: (0) ?w (1) r {*aarch64_simd_movv2di}
at which point all was good. But LRA later decided it needed
to spill r517:
Spill r517 after risky transformations
so the next constraint attempt gave:
Choosing alt 0 in insn 74: (0) =w (1) m {*aarch64_simd_movv2di}
which was still good. Then during inheritance we had:
Creating newreg=672 from oldreg=517, assigning class GENERAL_REGS to inheritance r672
Original reg change 517->672 (bb8):
74: r287:V2DI=r672:DI#0
Add inheritance<-original before:
939: r672:DI=r517:DI
Use smallest class of POINTER_REGS and GENERAL_REGS
Creating newreg=673 from oldreg=517, assigning class POINTER_REGS to inheritance r673
Original reg change 517->673 (bb8):
936: r669:DI=r673:DI
Add inheritance<-original before:
940: r673:DI=r517:DI
("Use smallest class of POINTER_REGS and GENERAL_REGS" ought to
give GENERAL_REGS. That might be a missed optimisation, and probably
due to both classes having the same number of allocatable registers.
I'll look at that as a follow-on.)
Thus LRA created two inheritance registers for r517, one (r673)
that included the unallocatable x31 and another (r672) that didn't.
The r672 references included the paradoxical subreg in insn 74 but the
r673 ones didn't. LRA then allocated x30 to r673, which was a valid
choice.
Later LRA decided to "undo" the inheritance for insn 620, but because
of the double inheritance, it got confused as to what the original
situation was, and made insn 74 use the other inheritance register
instead of r517:
********** Undoing inheritance #2: **********
Inherit 11 out of 12 (91.67%)
Insn after restoring regs:
620: r572:DI=r517:DI
REG_DEAD r517:DI
Change reload insn:
74: r287:V2DI=r673:DI#0 <-------------------
Insn after restoring regs:
939: r517:DI=r673:DI
REG_DEAD r673:DI
This might be a bug in itself: we should probably look through sets
of other inheritance pseudos to find the "real" origin.
Either way, at this point we had a situation in which r673 was used in an
insn whose subreg was larger than the biggest_mode that r673 had when it
was allocated. While x30 was valid for the original biggest_mode, it
wasn't valid for this subreg use.
The next attempt to constrain insn 74 was:
Choosing alt 5 in insn 74: (0) ?w (1) r {*aarch64_simd_movv2di}
Creating newreg=684, assigning class GENERAL_REGS to r684
74: r287:V2DI=r684:V2DI
Inserting insn reload before:
951: r684:V2DI=r673:DI#0
where LRA reloaded the SUBREG rather than the SUBREG_REG. And it
then cycled trying the same thing when reloading the reload (and the
reload of the reload, etc.).
What it should be doing here is reloading the SUBREG_REG instead.
There's already code to cope with this case when the paradoxical
subreg falls outside the class (which isn't true here, since r673
is POINTER_REGS and POINTER_REGS includes x31). But I think we
should also test whether LRA is entitled to allocate the spanned
registers. Not doing that seems like a bug regardless of the above
missed optimisation and the mix-up undoing inheritance.
2018-05-30 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* lra-constraints.c (simplify_operand_subreg): In the paradoxical
case, check whether the outer register overlaps an unallocatable
register, not just whether it fits the required class.
gcc/testsuite/
* g++.dg/torture/aarch64-vect-init-1.C: New test.
rsandifo [Tue, 12 Jun 2018 22:31:14 +0000 (22:31 +0000)]
Use poly_int rtx accessors instead of hwi accessors
This patch generalises various places that used hwi rtx accessors so
that they can handle poly_ints instead. In many cases these changes
are by inspection rather than because something had shown them to be
necessary.
2018-06-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* poly-int.h (can_div_trunc_p): Add new overload in which all values
are poly_ints.
* alias.c (get_addr): Extend CONST_INT handling to poly_int_rtx_p.
(memrefs_conflict_p): Likewise.
(init_alias_analysis): Likewise.
* cfgexpand.c (expand_debug_expr): Likewise.
* combine.c (combine_simplify_rtx, force_int_to_mode): Likewise.
* cse.c (fold_rtx): Likewise.
* explow.c (adjust_stack, anti_adjust_stack): Likewise.
* expr.c (emit_block_move_hints): Likewise.
(clear_storage_hints, push_block, emit_push_insn): Likewise.
(store_expr_with_bounds, reduce_to_bit_field_precision): Likewise.
(emit_group_load_1): Use rtx_to_poly_int64 for group offsets.
(emit_group_store): Likewise.
(find_args_size_adjust): Use strip_offset. Use rtx_to_poly_int64
to read the PRE/POST_MODIFY increment.
* calls.c (store_one_arg): Use strip_offset.
* rtlanal.c (rtx_addr_can_trap_p_1): Extend CONST_INT handling to
poly_int_rtx_p.
(set_noop_p): Use rtx_to_poly_int64 for the elements selected
by a VEC_SELECT.
* simplify-rtx.c (avoid_constant_pool_reference): Use strip_offset.
(simplify_binary_operation_1): Extend CONST_INT handling to
poly_int_rtx_p.
* var-tracking.c (compute_cfa_pointer): Take a poly_int64 rather
than a HOST_WIDE_INT.
(hard_frame_pointer_adjustment): Change from HOST_WIDE_INT to
poly_int64.
(adjust_mems, add_stores): Update accodingly.
(vt_canonicalize_addr): Track polynomial offsets.
(emit_note_insn_var_location): Likewise.
(vt_add_function_parameter): Likewise.
(vt_initialize): Likewise.
mpolacek [Tue, 12 Jun 2018 20:20:11 +0000 (20:20 +0000)]
Core issue 1331 - const mismatch with defaulted copy constructor
* class.c (check_bases_and_members): When checking a defaulted
function, mark it as deleted rather than giving an error.
* g++.dg/cpp0x/defaulted15.C (struct F): Remove dg-error.
* g++.dg/cpp0x/defaulted52.C: New test.
* g++.dg/cpp0x/defaulted53.C: New test.
* g++.dg/cpp0x/defaulted54.C: New test.
* g++.dg/cpp0x/defaulted55.C: New test.
* g++.dg/cpp0x/defaulted56.C: New test.
* g++.dg/cpp0x/defaulted57.C: New test.
* g++.dg/cpp0x/defaulted58.C: New test.
* g++.dg/cpp0x/defaulted59.C: New test.
* g++.dg/cpp0x/defaulted60.C: New test.
willschm [Tue, 12 Jun 2018 15:54:17 +0000 (15:54 +0000)]
[testsuite]
2018-06-12 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-load-vec_xl-char.c: New testcase.
* gcc.target/powerpc/fold-vec-load-vec_xl-double.c: New testcase.
* gcc.target/powerpc/fold-vec-load-vec_xl-float.c: New testcase.
* gcc.target/powerpc/fold-vec-load-vec_xl-int.c: New testcase.
* gcc.target/powerpc/fold-vec-load-vec_xl-longlong.c: New testcase.
* gcc.target/powerpc/fold-vec-load-vec_xl-short.c: New testcase.
to reduce the size of __private_tm to make room for __private_ss, which
was supposed to be used for TARGET_THREAD_SPLIT_STACK_OFFSET:
typedef struct
{
void *tcb; /* Pointer to the TCB. Not necessarily the
thread descriptor used by libpthread. */
dtv_t *dtv;
void *self; /* Pointer to the thread descriptor. */
int multiple_threads;
uintptr_t sysinfo;
uintptr_t stack_guard;
uintptr_t pointer_guard;
int gscope_flag;
int __glibc_reserved1;
/* Reservation of some values for the TM ABI. */
void *__private_tm[4];
/* GCC split stack support. */
void *__private_ss;
} tcbhead_t;
But the offset of __private_ss for i386 was mistakenly set to 0x30,
instead of 0x34 and libgcc/config/i386/morestack.S has:
cmpl %gs:0x30,%eax # See if we have enough space.
movl %eax,%gs:0x30 # Save the new stack boundary.
movl %eax,%gs:0x30 # Save the new stack boundary.
movl %ecx,%gs:0x30 # Save new stack boundary.
movl %eax,%gs:0x30
movl %gs:0x30,%eax
movl %eax,%gs:0x30
Since update TARGET_THREAD_SPLIT_STACK_OFFSET changes split stack ABI,
glibc 2.28 has been changed by
i386: Change offset of __private_ss to 0x30 [BZ #23250]
to match GCC:
typedef struct
{
void *tcb; /* Pointer to the TCB. Not necessarily the
thread descriptor used by libpthread. */
dtv_t *dtv;
void *self; /* Pointer to the thread descriptor. */
int multiple_threads;
uintptr_t sysinfo;
uintptr_t stack_guard;
uintptr_t pointer_guard;
int gscope_flag;
int __glibc_reserved1;
/* Reservation of some values for the TM ABI. */
void *__private_tm[3];
/* GCC split stack support. */
void *__private_ss;
void *__glibc_reserved2;
} tcbhead_t;
claziss [Tue, 12 Jun 2018 13:28:46 +0000 (13:28 +0000)]
[ARC] Update warning messges.
When we pass an mcpu to the compiler we have two types of (hardware
configuration) flags that are set:
1. Architecture specific, for example code-density is always enabled
for ARCHS architectures. These options are overwriting whatever the
corresponding user options with the preset ones.
2. CPU specific, for example archs is using LL64 option by
default. These options can be freely enabled or disabled.
Because of the above complexity, we need to throw some errors for the
user to know when he/she does something which goes against the above
rules. Thus, I came up with the following set of rules:
1. Overwriting default architecture specific hardware option: it is
ignored, a warning is thrown;
2. Overwriting default CPU specific hardware option: it is taken into
account, a warning is thrown.
hjl [Tue, 12 Jun 2018 11:08:52 +0000 (11:08 +0000)]
libitm/x86: Correct offsets of __private_tm and pointer_guard
In glibc, sysdeps/i386/nptl/tls.h has
typedef struct
{
void *tcb; /* Pointer to the TCB. Not necessarily the
thread descriptor used by libpthread. */
dtv_t *dtv;
void *self; /* Pointer to the thread descriptor. */
int multiple_threads;
uintptr_t sysinfo;
uintptr_t stack_guard;
uintptr_t pointer_guard;
int gscope_flag;
int __glibc_reserved1;
/* Reservation of some values for the TM ABI. */
void *__private_tm[4];
/* GCC split stack support. */
void *__private_ss;
} tcbhead_t;
and sysdeps/x86_64/nptl/tls.h has
typedef struct
{
void *tcb; /* Pointer to the TCB. Not necessarily the
thread descriptor used by libpthread. */
dtv_t *dtv;
void *self; /* Pointer to the thread descriptor. */
int multiple_threads;
int gscope_flag;
uintptr_t sysinfo;
uintptr_t stack_guard;
uintptr_t pointer_guard;
unsigned long int vgetcpu_cache[2];
int __glibc_reserved1;
int __glibc_unused1;
/* Reservation of some values for the TM ABI. */
void *__private_tm[4];
/* GCC split stack support. */
void *__private_ss;
long int __glibc_reserved2;
/* Must be kept even if it is no longer used by glibc since programs,
like AddressSanitizer, depend on the size of tcbhead_t. */
__128bits __glibc_unused2[8][4] __attribute__ ((aligned (32)));
SEG_READ, SEG_WRITE, SEG_DECODE_READ and SEG_ENCODE_WRITE were correct
only for x86-64.
Update SEG_READ and SEG_WRITE to use the offset of __private_tm as base
and correct the offset of pointer_guard for x32. This patch doesn't
change ABI of libitm.
PR libitm/85988
* config/linux/x86/tls.h (SEG_READ): Use the offset of
__private_tm as base.
(SEG_WRITE): Likewise.
(SEG_ENCODE_WRITE): Correct the offset of pointer_guard for x32.
(gtm_thr): Replace SEG_READ(10) with SEG_READ(0).
(set_gtm_thr): Replace SEG_WRITE(10) with SEG_WRITE(0).
(abi_disp): Replace SEG_DECODE_READ(11) with SEG_DECODE_READ(1).
(set_abi_disp): Replace SEG_ENCODE_WRITE(11) with
SEG_ENCODE_WRITE(1).
rts [Tue, 12 Jun 2018 10:36:12 +0000 (10:36 +0000)]
MIPS: Add i6500 processor as an alias for i6400.
gcc/ChangeLog:
2018-06-12 Matthew Fortune <mfortune@gmail.com>
* config/mips/mips-cpus.def: New MIPS_CPU for i6500.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Mark i6500 as
mips64r6.
* doc/invoke.texi: Document -march=i6500.
ebotcazou [Tue, 12 Jun 2018 10:34:26 +0000 (10:34 +0000)]
* gcc-interface/ada-tree.h (TYPE_RETURN_BY_DIRECT_REF_P): Change from
using TYPE_LANG_FLAG_4 to using TYPE_LANG_FLAG_0.
(TYPE_ALIGN_OK): Move around.
(TYPE_PADDING_FOR_COMPONENT): Remove superfluous parentheses.
* gcc-interface/decl.c (change_qualified_type): Move to...
(gnat_to_gnu_entity): Adjust comment.
* gcc-interface/gigi.h (change_qualified_type): ...here; make inline.
(ceil_pow2): Use ceil_log2.
* gcc-interface/utils.c (finish_subprog_decl): Add couple of comments
and do not set TREE_SIDE_EFFECTS.
(handle_noreturn_attribute): Use change_qualified_type.
ebotcazou [Tue, 12 Jun 2018 10:19:40 +0000 (10:19 +0000)]
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Constant>: Do not get
the expression of a dispatch table that is not being defined.
<E_Record_Subtype>: Remove obsolete kludge.
ebotcazou [Tue, 12 Jun 2018 10:01:36 +0000 (10:01 +0000)]
* gcc-interface/decl.c (warn_on_field_placement): Use specific wording
for discriminants.
(warn_on_list_placement): New static function.
(components_to_record): Use it to warn on multiple fields in list.
ebotcazou [Tue, 12 Jun 2018 09:51:26 +0000 (09:51 +0000)]
* gcc-interface/decl.c (variant_desc): Add AUX field.
(gnat_to_gnu_entity) <discrete_type>: Do not call compute_record_mode
directly.
(reverse_sort_field_list): New static function.
(components_to_record): Place the variant part at the beginning of the
field list when there is an obvious order of increasing position.
(build_variant_list): Initialize it.
(create_variant_part_from): Do not call compute_record_mode directly.
(copy_and_substitute_in_layout): Likewise. Always sort the fields with
fixed position in order of increasing position, in the record and all
the variants, in any. Call reverse_sort_field_list.
* gcc-interface/utils.c (make_packable_type): Compute the sizes before
calling finish_record_type. Do not call compute_record_mode directly.
(finish_record_type): Overhaul final processing depending on REP_LEVEL
and call finish_bitfield_layout if it is equal to one or two.
ebotcazou [Tue, 12 Jun 2018 06:52:55 +0000 (06:52 +0000)]
* gcc.c: Document new %@{...} sequence.
(LINK_COMMAND_SPEC): Use it for the -L switches.
(cpp_unique_options): Use it for the -I switches.
(at_file_argbuf): New global variable.
(in_at_file): Likewise.
(alloc_args): Create at_file_argbuf.
(clear_args): Truncate at_file_argbuf.
(store_arg): If in_at_file, push the argument onto at_file_argbuf.
(open_at_file): New function.
(close_at_file): Likewise.
(create_at_file): Delete.
(do_spec_1) <'i'>: Use open_at_file/close_at_file.
<'o'>: Likewise.
<'@'>: New case.
(validate_switches_from_spec): Deal with %@{...} sequence.
(validate_switches): Likewise.
(driver::finalize): Call clear_args.
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