rguenth [Wed, 16 May 2018 13:02:27 +0000 (13:02 +0000)]
2018-05-16 Richard Biener <rguenther@suse.de>
* params.def (PARAM_DSE_MAX_ALIAS_QUERIES_PER_STORE): New param.
* doc/invoke.texi (dse-max-alias-queries-per-store): Document.
* tree-ssa-dse.c: Include tree-ssa-loop.h.
(check_name): New callback.
(dse_classify_store): Track cycles via a visited bitmap of PHI
defs and simplify handling of in-loop and across loop dead stores
and properly fail for loop-variant refs. Handle byte-tracking with
multiple defs. Use PARAM_DSE_MAX_ALIAS_QUERIES_PER_STORE for
limiting the walk.
* gcc.dg/tree-ssa/ssa-dse-32.c: New testcase.
* gcc.dg/tree-ssa/ssa-dse-33.c: Likewise.
* gcc.dg/uninit-pr81897-2.c: Use -fno-tree-dse.
rsandifo [Wed, 16 May 2018 11:50:44 +0000 (11:50 +0000)]
Handle vector boolean types when calculating the SLP unroll factor
The SLP unrolling factor is calculated by finding the smallest
scalar type for each SLP statement and taking the number of required
lanes from the vector versions of those scalar types. E.g. for an
int32->int64 conversion, it's the vector of int32s rather than the
vector of int64s that determines the unroll factor.
We rely on tree-vect-patterns.c to replace boolean operations like:
bool a, b, c;
a = b & c;
with integer operations of whatever the best size is in context.
E.g. if b and c are fed by comparisons of ints, a, b and c will become
the appropriate size for an int comparison. For most targets this means
that a, b and c will end up as int-sized themselves, but on targets like
SVE and AVX512 with packed vector booleans, they'll instead become a
small bitfield like :1, padded to a byte for memory purposes.
The SLP code would then take these scalar types and try to calculate
the vector type for them, causing the unroll factor to be much higher
than necessary.
This patch tries to make the SLP code use the same approach as the
loop vectorizer, by splitting out the code that calculates the
statement vector type and the vector type that should be used for
the number of units.
2018-05-16 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vectorizer.h (vect_get_vector_types_for_stmt): Declare.
(vect_get_mask_type_for_stmt): Likewise.
* tree-vect-slp.c (vect_two_operations_perm_ok_p): New function,
split out from...
(vect_build_slp_tree_1): ...here. Use vect_get_vector_types_for_stmt
to determine the statement's vector type and the vector type that
should be used for calculating nunits. Deal with cases in which
the type has to be deferred.
(vect_slp_analyze_node_operations): Use vect_get_vector_types_for_stmt
and vect_get_mask_type_for_stmt to calculate STMT_VINFO_VECTYPE.
* tree-vect-loop.c (vect_determine_vf_for_stmt_1)
(vect_determine_vf_for_stmt): New functions, split out from...
(vect_determine_vectorization_factor): ...here.
* tree-vect-stmts.c (vect_get_vector_types_for_stmt)
(vect_get_mask_type_for_stmt): New functions, split out from
vect_determine_vectorization_factor.
redi [Tue, 15 May 2018 15:36:46 +0000 (15:36 +0000)]
PR libstdc++/85749 constrain seed sequences for random number engines
Constrain constructors and member functions of random number engines so
that functions taking seed sequences can only be called with types that
meet the seed sequence requirements.
PR libstdc++/85749
* include/bits/random.h (__detail::__is_seed_seq): New SFINAE helper.
(linear_congruential_engine, mersenne_twister_engine)
(subtract_with_carry_engine, discard_block_engine)
(independent_bits_engine, shuffle_order_engine): Use __is_seed_seq to
constrain function templates taking seed sequences.
* include/bits/random.tcc (linear_congruential_engine::seed(_Sseq&))
(mersenne_twister_engine::seed(_Sseq&))
(subtract_with_carry_engine::seed(_Sseq&)): Change return types to
match declarations.
* include/ext/random (simd_fast_mersenne_twister_engine): Use
__is_seed_seq to constrain function templates taking seed sequences.
* include/ext/random.tcc (simd_fast_mersenne_twister_engine::seed):
Change return type to match declaration.
* testsuite/26_numerics/random/discard_block_engine/cons/seed_seq2.cc:
New.
* testsuite/26_numerics/random/independent_bits_engine/cons/
seed_seq2.cc: New.
* testsuite/26_numerics/random/linear_congruential_engine/cons/
seed_seq2.cc: New.
* testsuite/26_numerics/random/mersenne_twister_engine/cons/
seed_seq2.cc: New.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error lineno.
* testsuite/26_numerics/random/shuffle_order_engine/cons/seed_seq2.cc:
New.
* testsuite/26_numerics/random/subtract_with_carry_engine/cons/
seed_seq2.cc: New.
* testsuite/ext/random/simd_fast_mersenne_twister_engine/cons/
seed_seq2.cc: New.
redi [Tue, 15 May 2018 12:07:09 +0000 (12:07 +0000)]
PR libstdc++/84159 fix appending strings to paths
The path::operator/=(const Source&) and path::append overloads were
still following the semantics of the Filesystem TS not C++17. Only
the path::operator/=(const path&) overload was correct.
This change adds more tests for path::operator/=(const path&) and adds
new tests to verify that the other append operations have equivalent
behaviour.
PR libstdc++/84159
* include/bits/fs_path.h (path::operator/=, path::append): Construct
temporary path before calling _M_append.
(path::_M_append): Change parameter to path and implement C++17
semantics.
* testsuite/27_io/filesystem/path/append/path.cc: Add helper function
and more examples from the standard.
* testsuite/27_io/filesystem/path/append/source.cc: New.
* testsuite/27_io/filesystem/path/decompose/filename.cc: Add comment.
* testsuite/27_io/filesystem/path/nonmember/append.cc: New.
rguenth [Tue, 15 May 2018 11:30:29 +0000 (11:30 +0000)]
2018-05-15 Richard Biener <rguenther@suse.de>
* tree-ssa-dse.c (dse_classify_store): Remove use_stmt parameter,
add by_clobber_p one. Change algorithm to collect all defs
representing uses we need to walk and try reducing them to
a single one before failing.
(dse_dom_walker::dse_optimize_stmt): Adjust.
mark [Tue, 15 May 2018 08:37:46 +0000 (08:37 +0000)]
DWARF: Use DW_OP_addrx and DW_OP_constx for DWARF5.
For older DWARF and -gsplit-dwarf we want to emit DW_OP_GNU_addr_index
and DW_OP_GNU_const_index, but for DWARF5 we should use DW_OP_addrx
and DW_OP_constx.
gcc/ChangeLog:
* dwarf2out.c (dwarf_OP): Handle DW_OP_addrx and DW_OP_constx.
(size_of_loc_descr): Likewise.
(output_loc_operands): Likewise.
(output_loc_operands_raw): Likewise.
(dw_addr_op): Use dwarf_OP () for DW_OP_constx and DW_OP_addrx.
(resolve_addr_in_expr): Handle DW_OP_addrx and DW_OP_constx.
(hash_loc_operands): Likewise.
(compare_loc_operands): Likewise.
mark [Tue, 15 May 2018 08:34:29 +0000 (08:34 +0000)]
DWARF calculate the number of indexed addresses.
The length in the .debug_addr unit header was calculated using the number
of elements in the addr_index_table. This is wrong because the entries in
the table are refcounted and only those with a refcount > 0 are actually
put in the index. Add a helper function count_index_addrs to get the
correct number of addresses in the index.
gcc/ChangeLog:
* dwarf2out.c (count_index_addrs): New function.
(dwarf2out_finish): Use count_index_addrs to calculate addrs_length.
jason [Mon, 14 May 2018 20:08:11 +0000 (20:08 +0000)]
Handle TYPE_HAS_LATE_RETURN_TYPE like ref-qualifier and eh spec.
* tree.c (build_cp_fntype_variant): New.
(build_ref_qualified_type, build_exception_variant)
(strip_typedefs, cxx_copy_lang_qualifiers): Use it.
(cxx_type_hash_eq, cp_check_qualified_type): Check
TYPE_HAS_LATE_RETURN_TYPE.
(cp_build_type_attribute_variant): Check cxx_type_hash_eq.
(cp_build_qualified_type_real): No need to preserve C++ qualifiers.
* class.c (build_clone): Use cxx_copy_lang_qualifiers.
(adjust_clone_args): Likewise.
* decl.c (grokfndecl): Add late_return_type_p parameter. Use
build_cp_fntype_variant.
(grokdeclarator): Pass late_return_type_p to grokfndecl.
(check_function_type): Use cxx_copy_lang_qualifiers.
(static_fn_type): Use cxx_copy_lang_qualifiers.
* decl2.c (build_memfn_type, maybe_retrofit_in_chrg)
(cp_reconstruct_complex_type, coerce_new_type, coerce_delete_type)
(change_return_type): Use cxx_copy_lang_qualifiers.
* mangle.c (write_type): Use cxx_copy_lang_qualifiers.
* parser.c (cp_parser_lambda_declarator_opt): Represent an explicit
return type on the declarator like a normal trailing return type.
* pt.c (tsubst_function_type): Use build_cp_fntype_variant.
(copy_default_args_to_explicit_spec): Use cxx_copy_lang_qualifiers.
* typeck.c (merge_types): Use build_cp_fntype_variant.
redi [Mon, 14 May 2018 18:57:45 +0000 (18:57 +0000)]
PR libstdc++/81256 fix exception handling in basic_filebuf::close
PR libstdc++/81256
* include/bits/fstream.tcc (basic_filebuf::close): Do not swallow
exceptions from _M_terminate_output().
* include/std/fstream (basic_filebuf::~basic_filebuf): Swallow any
exceptions from close().
* testsuite/27_io/basic_filebuf/close/81256.cc: New.
ktkachov [Mon, 14 May 2018 16:29:13 +0000 (16:29 +0000)]
[AArch64] Add combine pattern to fuse AESE/AESMC instructions
When the AESE,AESD and AESMC, AESMC instructions are generated through the appropriate arm_neon.h intrinsics
we really want to keep them together when the AESE feeds into an AESMC and fusion is supported by the target CPU.
We have macro-fusion hooks and scheduling model forwarding paths defined to facilitate that.
It is, however, not always enough.
This patch adds another mechanism for doing that.
When we can detect during combine that the required dependency is exists (AESE -> AESMC, AESD -> AESIMC)
just keep them together with a combine pattern throughout the rest of compilation.
We won't ever want to split them.
The testcases generate 4 AESE(D) instructions in a block followed by 4 AES(I)MC instructions that
consume the corresponding results and it also adds a bunch of computations in-between so that the
AESE and AESMC instructions are not trivially back-to-back, thus exercising the compiler's ability
to bring them together.
With this patch all 4 pairs are fused whereas before a couple of fusions would be missed due to intervening
arithmetic and memory instructions.
* config/aarch64/aarch64-simd.md (*aarch64_crypto_aese_fused):
New pattern.
(aarch64_crypto_aesd_fused): Likewise.
* gcc.target/aarch64/crypto-fuse-1.c: New test.
* gcc.target/aarch64/crypto-fuse-2.c: Likewise.
wilco [Mon, 14 May 2018 16:10:19 +0000 (16:10 +0000)]
Remove remaining uses of * in patterns
Remove the remaining uses of '*' from aarch64.md.
Using '*' in alternatives is typically incorrect as it tells the register
allocator to ignore those alternatives. Also add a missing '?' so we
prefer a floating point register for same-size int<->fp conversions.
gcc/
* config/aarch64/aarch64.md (mov<mode>): Remove '*' in alternatives.
(movsi_aarch64): Likewise.
(load_pairsi): Likewise.
(load_pairdi): Likewise.
(store_pairsi): Likewise.
(store_pairdi): Likewise.
(load_pairsf): Likewise.
(load_pairdf): Likewise.
(store_pairsf): Likewise.
(store_pairdf): Likewise.
(zero_extend): Likewise.
(trunc): Swap alternatives.
(fcvt_target): Add '?' to prefer w over r.
uros [Mon, 14 May 2018 15:53:58 +0000 (15:53 +0000)]
PR target/85756
* config/i386/i386.md: Disallow non-commutative arithmetics in
last twpeephole for mem {+,-,&,|,^}= x; mem != 0 after cmpelim
optimization. Use COMMUTATIVE_ARITH_P test rather than != MINUS
in the peephole2 before it.
redi [Mon, 14 May 2018 14:27:54 +0000 (14:27 +0000)]
PR libstdc++/82966 fix swapping of node handles
PR libstdc++/82966
* include/bits/node_handle.h (_Node_handle_common::_M_swap): Use value
instead of type.
* testsuite/23_containers/set/modifiers/node_swap.cc: New.
pault [Sun, 13 May 2018 17:01:16 +0000 (17:01 +0000)]
2018-05-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/85742
* trans-types.c (gfc_get_dtype_rank_type): Reorder evaluation
of 'size'. If the element type is a pointer use the size of the
TREE_TYPE of the type, unless it is VOID_TYPE. In this latter
case, set the size to zero.
2018-05-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/85742
* gfortran.dg/assumed_type_9.f90 : New test.
meissner [Fri, 11 May 2018 22:47:03 +0000 (22:47 +0000)]
2018-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (mov<mode>_softfloat, FMOVE32):
Reformat alternatives and attributes so it is easier to identify
which constraints/attributes go with which instruction.
(mov<mode>_hardfloat32, FMOVE64): Likewise.
(mov<mode>_softfloat32, FMOVE64): Likewise.
(mov<mode>_hardfloat64, FMOVE64): Likewise.
(mov<mode>_softfloat64, FMOVE64): Likewise.
emsr [Fri, 11 May 2018 16:58:46 +0000 (16:58 +0000)]
Restore the testcase that was clobbered by the recent PR83140 patches.
* libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions
/02_assoc_legendre/check_value.cc
kelvin [Fri, 11 May 2018 16:53:38 +0000 (16:53 +0000)]
gcc/ChangeLog:
2018-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
* doc/extend.texi (PowerPC Built-in Functions): Rename this
subsection.
(Basic PowerPC Built-in Functions): The new name of the
subsection previously known as "PowerPC Built-in Functions".
(Basic PowerPC Built-in Functions Available on all Configurations):
New subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.05): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.06): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.07): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 3.0): Likewise.
rearnsha [Fri, 11 May 2018 13:29:41 +0000 (13:29 +0000)]
[arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products deriving from its capabilities
My patch last year to automate passing the be8 flag to the linker had
a nasty flaw in that I forgot entirely that the ARMv6-M architecture
did not derive its capabilities directly from the ARMv6 capability
list, but was a new group of capabilities (since it needs to leave out
the ARM -- notm -- feature bit). The feature list defined was thus
missing the be8 bit. Furthermore, any product derived from that
feature group consequently lacked the be8 feature as well and this
included all ARMv7 and ARMv8 parts.
rearnsha [Fri, 11 May 2018 09:28:10 +0000 (09:28 +0000)]
[arm] PR target/85606 prefer armv6s-m for armv6-m parts
When Arm introduced ARMv6-M there were two variants, ARMv6-M and
ARMv6S-M. The two differed only in support for the SVC instruction.
Later on SVC was then made a mandatory part of ARMv6-M and the
ARMv6S-M name was dropped. GCC and GAS, however still recognize both
names and at least some versions of GAS still distinguish between the
two.
To address this, this patch changes the architecture for the ARMv6-m
cortex parts (m0, m0plus, m1 and the variants will small multiply
units) to use the ARMv6S-M name in conjunction with the assembler.
This avoids problems with them rejecting code that was previously
accepted with older versions of GCC where we did not pass an explicit
architecture string through to the compiler when using -mcpu on the
command line.
PR target/85606
* config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now
equivalent.
(cortex-m0): Use armv6s-m isa.
(cortex-m0plus): Likewise.
(cortex-m1): Likewise.
(cortex-m0.small-multiply): Likewise.
(cortex-m0plus.small-multiply): Likewise.
(cortex-m1.small-multiply): Likewise.
jakub [Fri, 11 May 2018 07:42:50 +0000 (07:42 +0000)]
PR c/85696
* c-omp.c (c_omp_predetermined_sharing): Return
OMP_CLAUSE_DEFAULT_SHARED for artificial vars with integral type.
* cp-tree.h (cxx_omp_predetermined_sharing_1): New prototype.
* cp-gimplify.c (cxx_omp_predetermined_sharing): New wrapper around
cxx_omp_predetermined_sharing_1. Rename old function to ...
(cxx_omp_predetermined_sharing_1): ... this.
* semantics.c (finish_omp_clauses): Use cxx_omp_predetermined_sharing_1
instead of cxx_omp_predetermined_sharing.
meissner [Thu, 10 May 2018 22:46:21 +0000 (22:46 +0000)]
2018-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (mode_supports_dq_form): Rename
mode_supports_vsx_dform_quad to mode_supports_dq_form.
(mode_supports_vsx_dform_quad): Likewise.
(mode_supports_vmx_dform): Move these functions to be next to the
other mode_supports functions.
(mode_supports_dq_form): Likewise.
(quad_address_p): Change calls of mode_supports_vsx_dform_quad to
mode_supports_dq_form.
(reg_offset_addressing_ok_p): Likewise.
(offsettable_ok_by_alignment): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(legitimate_lo_sum_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_secondary_reload_inner): Likewise.
(rs6000_preferred_reload_class): Likewise.
(rs6000_output_move_128bit): Likewise.
redi [Thu, 10 May 2018 19:13:42 +0000 (19:13 +0000)]
Document Dual ABI for std::ios_base::failure
* doc/xml/faq.xml: Link to C++17 status. Add note to outdated answer.
* doc/xml/manual/debug_mode.xml: Add array and forward_list to list
of C++11 containers with Debug Mode support.
* doc/xml/manual/using.xml: Document Dual ABI for ios_base::failure.
* doc/html/*: Regenerate.
jakub [Thu, 10 May 2018 17:40:28 +0000 (17:40 +0000)]
PR c++/85662
* c-common.h (fold_offsetof_1): Removed.
(fold_offsetof): Add TYPE argument defaulted to size_type_node and
CTX argument defaulted to ERROR_MARK.
* c-common.c (fold_offsetof_1): Renamed to ...
(fold_offsetof): ... this. Remove wrapper function. Add TYPE
argument, convert the pointer constant to TYPE and use size_binop
with PLUS_EXPR instead of fold_build_pointer_plus if type is not
a pointer type. Adjust recursive calls.
* c-fold.c (c_fully_fold_internal): Use fold_offsetof rather than
fold_offsetof_1, pass TREE_TYPE (expr) as TYPE to it and drop the
fold_convert_loc.
* c-typeck.c (build_unary_op): Use fold_offsetof rather than
fold_offsetof_1, pass argtype as TYPE to it and drop the
fold_convert_loc.
* cp-gimplify.c (cp_fold): Use fold_offsetof rather than
fold_offsetof_1, pass TREE_TYPE (x) as TYPE to it and drop the
fold_convert.
jakub [Thu, 10 May 2018 07:38:24 +0000 (07:38 +0000)]
PR tree-optimization/85699
* gcc.dg/nextafter-1.c (NO_LONG_DOUBLE): Define if not defined. Use
!NO_LONG_DOUBLE instead of __LDBL_MANT_DIG__ != 106.
* gcc.dg/nextafter-2.c: Include stdlib.h. For glibc < 2.24 define
NO_LONG_DOUBLE to 1 before including nextafter-1.c.
ebotcazou [Thu, 10 May 2018 07:36:38 +0000 (07:36 +0000)]
PR c++/85400
cp/
* decl2.c (adjust_var_decl_tls_model): New static function.
(comdat_linkage): Call it on a variable.
(maybe_make_one_only): Likewise.
c-family/
* c-attribs.c (handle_visibility_attribute): Do not set no_add_attrs.
ian [Wed, 9 May 2018 21:49:47 +0000 (21:49 +0000)]
go/build, cmd/go: update to match recent changes to gc
Several recent changes to the gc version of cmd/go improve the
gofrontend support. These changes are partially copies of existing
gofrontend differences, and partially new code. This CL makes the
gofrontend match the upstream code.
The changes included here come from:
https://golang.org/cl/111575
https://golang.org/cl/111595
https://golang.org/cl/111635
https://golang.org/cl/111636
For the record, the following recent gc changes are based on code
already present in the gofrontend repo:
https://golang.org/cl/110915
https://golang.org/cl/111615
For the record, a gc change, partially based on earlier gofrontend
work, also with new gc code, was already copied to gofrontend repo in
CL 111099:
https://golang.org/cl/111097
This moves the generated list of standard library packages from
cmd/go/internal/load to go/build.
projects / thirdparty / gcc.git / log
