Jonathan Wakely [Wed, 11 Aug 2021 21:11:19 +0000 (22:11 +0100)]
libstdc++: Fix test that fails randomly [PR101866]
This test assumes that the same sequence of three values cannot occur,
which is incorect. It's unlikely, but not impossible.
Perform the check in a loop, so that in the unlikely event of an
identical sequence, we retry. If the library code is buggy it will keep
producing the same sequence and the test will time out. If the code is
working correctly then we will usually break out of the loop after one
iteration, or very rarely after two or three.
libstdc++-v3/ChangeLog:
PR libstdc++/101866
* testsuite/experimental/random/randint.cc: Loop and retry if
reseed() produces the same sequence.
Patrick Palka [Wed, 11 Aug 2021 20:53:53 +0000 (16:53 -0400)]
c++: parameterized requires-expr as default argument [PR101725]
Here we're rejecting the default template argument
requires (T t) { x(t); }
because we consider the 't' in the requirement to be a local variable
(according to local_variable_p), and we generally forbid local variables
from appearing inside default arguments. We can perhaps fix this by
giving special treatment to parameters introduced by requires-expressions,
but DR 2082 relaxed the restriction about local variables appearing within
default arguments to permit them inside unevaluated operands thereof.
So this patch just implements DR 2082 which also fixes this PR since a
requires-expression is an unevaluated context.
PR c++/101725
DR 2082
gcc/cp/ChangeLog:
* cp-tree.h (unevaluated_p): Return true for REQUIRES_EXPR.
* decl.c (local_variable_p_walkfn): Don't walk into unevaluated
operands.
* parser.c (cp_parser_primary_expression) <case CPP_NAME>: Never
reject uses of local variables in unevaluated contexts.
* tree.c (cp_walk_subtrees) <case REQUIRES_EXPR>: Increment
cp_unevaluated_operand. Use cp_walk_tree directly instead of
WALK_SUBTREE to avoid the goto. Use REQUIRES_EXPR_REQS instead
of TREE_OPERAND directly.
gcc/testsuite/ChangeLog:
* g++.dg/DRs/dr2082.C: New test.
* g++.dg/cpp2a/concepts-uneval4.C: New test.
Jakub Jelinek [Wed, 11 Aug 2021 20:00:29 +0000 (22:00 +0200)]
c++: Optimize constinit thread_local vars [PR101786]
The paper that introduced constinit mentioned in rationale that constinit
can be used on externs as well and that it can be used to avoid the
thread_local initialization wrappers, because the standard requires that
if constinit is present on any declaration, it is also present on the
initialization declaration, even if it is in some other TU etc.
There is a small problem though, we use the tls wrappers not just if
the thread_local variable needs dynamic initialization, but also when
it has static initialization, but non-trivial destructor, as the
"dynamic initialization" in that case needs to register the destructor.
So, the following patch optimizes constinit thread_local vars only
if we can prove they will not have non-trivial destructors. That includes
the case where we have incomplete type where we don't know and need to
conservatively assume the type will have non-trivial destructor at the
initializing declaration side.
2021-08-11 Jakub Jelinek <jakub@redhat.com>
PR c++/101786
* decl2.c (var_defined_without_dynamic_init): Return true for
DECL_DECLARED_CONSTINIT_P with complete type and trivial destructor.
It looks like we still don't recognize class-scope non-template
deduction guides even after r12-2260. This is because deduction guides
are tagged as such in cp_parser_init_declarator after calling
cp_parser_declarator, but in cp_parser_member_declaration we call
cp_parser_declarator directly.
So let's tag them in cp_parser_member_declaration as well.
PR c++/79501
gcc/cp/ChangeLog:
* parser.c (maybe_adjust_declarator_for_dguide): New, split
out from ...
(cp_parser_init_declarator): ... here.
(cp_parser_member_declaration): Use it.
Patrick Palka [Wed, 11 Aug 2021 19:58:30 +0000 (15:58 -0400)]
c++: most vexing parse and braced CTAD [PR89062]
Here grokdeclarator is emitting the error
error: class template placeholder ‘Foo’ not permitted in this context
during the tentative (and ultimately futile) parse of 'x' as a function
declaration. This happens because when parsing 'Foo{1}',
cp_parser_parameter_declaration yields a parameter declaration with no
declarator and whose type is a CTAD placeholder, and stops short of
consuming the '{'. The caller cp_parser_parameter_declaration_list then
calls grokdeclarator on this declarator, hence the error, and soon
thereafter we abort this tentative parse since the next token '{'
doesn't make sense in the context of a parameter list.
Note that we don't have this issue with parenthesized CTAD
Foo<int> x(Foo(1));
because in this case cp_parser_direct_declarator (called indirectly from
c_p_p_d) consumes the '(' and returns cp_error_declarator instead of a
NULL declarator (and also simulates a parse error), and grokdeclarator
exits early for this declarator without emitting any error.
Since grokdeclarator doesn't take a 'complain' parameter, to fix this we
need to avoid calling grokdeclarator in this situation. To that end
this patch makes c_p_p_d simulate an error when a construct is a CTAD
expression and definitely not a parameter declaration, so that c_p_p_d_l
can avoid calling grokdeclarator by checking for this simulated error.
Alternatively we could keep all this logic inside c_p_p_d_l and not
touch c_p_p_d at all, but this approach seems slightly less adhoc.
PR c++/89062
gcc/cp/ChangeLog:
* parser.c (cp_parser_parameter_declaration_list): Don't call
grokdeclarator if cp_parser_error_occurred.
(cp_parser_parameter_declaration): Simulate an error if we see
the beginning of a CTAD form, i.e. if we see an opening brace
after the decl-specifier-seq and the type is a CTAD placeholder.
Jonathan Wakely [Tue, 10 Aug 2021 14:37:23 +0000 (15:37 +0100)]
libstdc++: Define std::is_pointer_interconvertible_base_of for C++20
Implement these traits using the new built-ins that Jakub added
recently.
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>
libstdc++-v3/ChangeLog:
* include/std/type_traits (__cpp_lib_is_pointer_interconvertible)
(is_pointer_interconvertible_base_of_v)
(is_pointer_interconvertible_base_of): Define for C++20.
* include/std/version (__cpp_lib_is_pointer_interconvertible):
Define.
* testsuite/23_containers/span/layout_compat.cc: Use correct
feature test macro for std::is_layout_compatible_v.
* testsuite/20_util/is_pointer_interconvertible/value.cc: New test.
* testsuite/20_util/is_pointer_interconvertible/version.cc: New test.
Fortran: Fix c_float128 and c_float128_complex definitions.
gfc_float128_type_node is only non-NULL on targets that support a
128-bit type that is not long double. Use float128_type_node instead
when computing the value of the kind constants c_float128 and
c_float128_complex from the ISO_C_BINDING intrinsic module; this also
ensures it actually corresponds to __float128 (the IEEE encoding) and
not some other 128-bit floating-point type.
Richard Biener [Wed, 11 Aug 2021 14:28:33 +0000 (16:28 +0200)]
Fix gcc.dg/lto/pr48622_0.c testcase
This fixes the testcase to not rely on the reference to
ashift_qi_1 being optimized out by RTL optimization via
help of the initregs pass that changes comparisons of
uninitialized data with a comparison that is always false.
2021-08-11 Richard Biener <rguenther@suse.de>
* gcc.dg/lto/pr48622_1.c: Provide non-LTO definition
of ashift_qi_1.
Richard Biener [Mon, 9 Aug 2021 11:12:08 +0000 (13:12 +0200)]
Adjust volatile handling of the operand scanner
The GIMPLE SSA operand scanner handles COMPONENT_REFs that are
not marked TREE_THIS_VOLATILE but have a TREE_THIS_VOLATILE
FIELD_DECL as volatile. That's inconsistent in how TREE_THIS_VOLATILE
testing on GENERIC refs works which requires operand zero of
component references to mirror TREE_THIS_VOLATILE to the ref
so that testing TREE_THIS_VOLATILE on the outermost reference
is enough to determine the volatileness.
The following patch thus removes FIELD_DECL scanning from
the GIMPLE SSA operand scanner, possibly leaving fewer stmts
marked as gimple_has_volatile_ops.
It shows we miss at least one case in the fortran frontend, though
there's a suspicious amount of COMPONENT_REF creation compared
to little setting of TREE_THIS_VOLATILE. This fixes the FAIL
of gfortran.dg/volatile11.f90 that would otherwise occur.
Visually inspecting fortran/ reveals a bunch of likely to fix
cases but I don't know the constraints of 'volatile' uses in
the fortran language to assess whether some of these are not
necessary.
2021-08-09 Richard Biener <rguenther@suse.de>
gcc/
* tree-ssa-operands.c (operands_scanner::get_expr_operands):
Do not look at COMPONENT_REF FIELD_DECLs TREE_THIS_VOLATILE
to determine has_volatile_ops.
gcc/fortran/
* trans-common.c (create_common): Set TREE_THIS_VOLATILE on the
COMPONENT_REF if the field is volatile.
Jakub Jelinek [Wed, 11 Aug 2021 08:23:34 +0000 (10:23 +0200)]
sanitizer: Cherry-pick realpath fix
tsan in some cases starts ignoring interceptors and only calls the
intercepted functions. But for realpath the behavior for NULL second argument
was only handled in the interceptor and intercepted function was the one
found by dlsym which is often one that doesn't handle NULL as second argument.
Fixed by using dlvsym with "GLIBC_2.3" if possible for intercepted function
and don't emulate behavior in the wrapper.
Ada: Remove debug line number for DECL_IGNORED_P functions
It was pointed out in PR101598 to be inappropriate, that
ignored Ada decls receive the source line number which was
recorded in the function decl's DECL_SOURCE_LOCATION.
Therefore set all front-end-generated Ada decls with
DECL_IGNORED_P to UNKNOWN_LOCATION.
Adding to the growing list, for autotester accounting purposes.
FWIW I see this fails for m68k too:
https://gcc.gnu.org/pipermail/gcc-testresults/2021-August/712395.html
and moxie:
https://gcc.gnu.org/pipermail/gcc-testresults/2021-August/712389.html
and pru:
https://gcc.gnu.org/pipermail/gcc-testresults/2021-August/712366.html
testsuite:
PR middle-end/101674
* gcc.dg/uninit-pred-9_b.c: Xfail for cris-*-* too.
Jakub Jelinek [Tue, 10 Aug 2021 16:01:23 +0000 (18:01 +0200)]
openmp: Fix up cp/parser.c build with GCC 4.8 to 6
Christophe Lyon reported that cp/parser.c no longer compiles with
GCC 4.8.5 after my recent OpenMP changes.
A goto out; there crosses odsd variable declaration, and odsd has
a vec<...> member where vec has = default; default constructor
and gcc before r7-2822-gd0b0fbd9fce2f30a82558bf2308b3a7b56c2f364
treated that as error.
Fixed by moving the declaration earlier before the goto.
Tested on x86_64-linux with GCC 4.8.5 system gcc, committed to trunk
as obvious.
2021-08-10 Jakub Jelinek <jakub@redhat.com>
* parser.c (cp_parser_member_declaration): Move odsd declaration
before cp_parser_using_declaration call to avoid errors with
GCC 4.8 to 6.
ISO_Fortran_binding.h is written in the build dir - hence, a previous commit
added it as include directory for in-build-tree testing. However,
it turned out that -I$specdir/libgfortran interferes with reading .mod files
as they are then no longer regareded as intrinsic modules. Solution: Create
an extra include/ directory in the libgfortran build dir and copy
ISO_Fortran_binding.h to that directory. As -B$specdir/libgfortran already
causes gfortran to read that include subdirectory, the -I flag is no longer
needed.
* Makefile.am (ISO_Fortran_binding.h): Create include/ in the build dir
and copy the include file to it.
(clean-local): Add for removing the 'include' directory.
* Makefile.in: Regenerate.
gcc/testsuite/ChangeLog:
* lib/gfortran.exp (gfortran_init): Remove -I$specpath/libgfortran
from the string used to set GFORTRAN_UNDER_TEST.
Jakub Jelinek [Tue, 10 Aug 2021 10:38:00 +0000 (12:38 +0200)]
i386: Allow some V32HImode and V64QImode permutations even without AVX512BW [PR80355]
When working on the PR, I've noticed we generate terrible code for
V32HImode or V64QImode permutations for -mavx512f -mno-avx512bw.
Generally we can't do much with such permutations, but since PR68655
we can handle at least some, those expressible using V16SImode or V8DImode
permutations, but that wasn't reachable, because ix86_vectorize_vec_perm_const
didn't even try, it said without TARGET_AVX512BW it can't do anything, and
with it can do everything, no d.testing_p attempts.
This patch makes it try it for TARGET_AVX512F && !TARGET_AVX512BW.
The first hunk is to avoid ICE, expand_vec_perm_even_odd_1 asserts d->vmode
isn't V32HImode because expand_vec_perm_1 for AVX512BW handles already
all permutations, but when we let it through without !TARGET_AVX512BW,
expand_vec_perm_1 doesn't handle it.
If we want, that hunk can be dropped if we implement in
expand_vec_perm_even_odd_1 and its helper the even permutation as
vpmovdw + vpmovdw + vinserti64x4 and odd permutation as
vpsrld $16 + vpsrld $16 + vpmovdw + vpmovdw + vinserti64x4.
2021-08-10 Jakub Jelinek <jakub@redhat.com>
PR target/80355
* config/i386/i386-expand.c (expand_vec_perm_even_odd): Return false
for V32HImode if !TARGET_AVX512BW.
(ix86_vectorize_vec_perm_const) <case E_V32HImode, case E_V64QImode>:
If !TARGET_AVX512BW and TARGET_AVX512F and d.testing_p, don't fail
early, but actually check the permutation.
Richard Biener [Tue, 10 Aug 2021 08:54:58 +0000 (10:54 +0200)]
tree-optimization/101809 - support emulated gather for double[int]
This adds emulated gather support for index vectors with more
elements than the data vector. The internal function gather
vectorization code doesn't currently handle this (but the builtin
decl code does). This allows vectorization of double data gather
with int indexes on 32bit platforms where there isn't an implicit
widening to 64bit present.
2021-08-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/101809
* tree-vect-stmts.c (get_load_store_type): Allow emulated
gathers with offset vector nunits being a constant multiple
of the data vector nunits.
(vect_get_gather_scatter_ops): Use the appropriate nunits
for the offset vector defs.
(vectorizable_store): Adjust call to
vect_get_gather_scatter_ops.
(vectorizable_load): Likewise. Handle the case of less
offset vectors than data vectors.
Jakub Jelinek [Tue, 10 Aug 2021 09:34:53 +0000 (11:34 +0200)]
i386: Improve single operand AVX512F permutations [PR80355]
On the following testcase we emit
vmovdqa32 .LC0(%rip), %zmm1
vpermd %zmm0, %zmm1, %zmm0
and
vmovdqa64 .LC1(%rip), %zmm1
vpermq %zmm0, %zmm1, %zmm0
instead of
vshufi32x4 $78, %zmm0, %zmm0, %zmm0
and
vshufi64x2 $78, %zmm0, %zmm0, %zmm0
we can emit with the patch. We have patterns that match two argument
permutations for vshuf[if]*, but for one argument it doesn't trigger.
Either we can add two patterns for that, or we would need to add another
routine to i386-expand.c that would transform under certain condition
these cases to the two argument vshuf*, doing it in sse.md looked simpler.
We don't need this for 32-byte vectors, we already emit single insn
permutation that doesn't need memory op there.
2021-08-10 Jakub Jelinek <jakub@redhat.com>
PR target/80355
* config/i386/sse.md (*avx512f_shuf_<shuffletype>64x2_1<mask_name>_1,
*avx512f_shuf_<shuffletype>32x4_1<mask_name>_1): New define_insn
patterns.
Jakub Jelinek [Tue, 10 Aug 2021 09:22:33 +0000 (11:22 +0200)]
openmp: Add support for declare simd and declare variant in a attribute syntax
This patch adds support for declare simd and declare variant in attribute
syntax. Either in attribute-specifier-seq at the start of declaration, in
that case it has similar restriction to pragma-syntax, that there is a single
function declaration/definition in the declaration, rather than variable
declaration or more than one function declarations or mix of function and
variable declarations. Or after the declarator id, in that case it applies
just to the single function declaration and the same declaration can have
multiple such attributes. Or both.
Furthermore, cp_parser_statement has been adjusted so that it doesn't
accept [[omp::directive (parallel)]] etc. before statements that don't
take attributes at all, or where those attributes don't appertain to
the statement but something else (e.g. to label, using directive,
declaration, etc.).
2021-08-10 Jakub Jelinek <jakub@redhat.com>
gcc/cp/
* parser.h (struct cp_omp_declare_simd_data): Remove
in_omp_attribute_pragma and clauses members, add loc and attribs.
(struct cp_oacc_routine_data): Remove loc member, add clauses
member.
* parser.c (cp_finalize_omp_declare_simd): New function.
(cp_parser_handle_statement_omp_attributes): Mention in
function comment the function is used also for
attribute-declaration.
(cp_parser_handle_directive_omp_attributes): New function.
(cp_parser_statement): Don't call
cp_parser_handle_statement_omp_attributes if statement doesn't
have attribute-specifier-seq at the beginning at all or if
if those attributes don't appertain to the statement.
(cp_parser_simple_declaration): Call
cp_parser_handle_directive_omp_attributes and
cp_finalize_omp_declare_simd.
(cp_parser_explicit_instantiation): Likewise.
(cp_parser_init_declarator): Initialize prefix_attributes
only after parsing declarators.
(cp_parser_direct_declarator): Call
cp_parser_handle_directive_omp_attributes and
cp_finalize_omp_declare_simd.
(cp_parser_member_declaration): Likewise.
(cp_parser_single_declaration): Likewise.
(cp_parser_omp_declare_simd): Don't initialize
data.in_omp_attribute_pragma, instead initialize
data.attribs[0] and data.attribs[1].
(cp_finish_omp_declare_variant): Remove
in_omp_attribute_pragma argument, instead use
parser->lexer->in_omp_attribute_pragma.
(cp_parser_late_parsing_omp_declare_simd): Adjust
cp_finish_omp_declare_variant caller. Handle attribute-syntax
declare simd/variant.
gcc/testsuite/
* g++.dg/gomp/attrs-1.C (bar): Add missing semicolon after
[[omp::directive (threadprivate (t2))]]. Add tests with
if/while/switch after parallel in attribute syntax.
(corge): Add missing omp:: before directive.
* g++.dg/gomp/attrs-2.C (bar): Add missing semicolon after
[[omp::directive (threadprivate (t2))]].
* g++.dg/gomp/attrs-10.C: New test.
* g++.dg/gomp/attrs-11.C: New test.
Richard Biener [Mon, 9 Aug 2021 09:42:47 +0000 (11:42 +0200)]
tree-optimization/101801 - rework generic vector vectorization more
This builds ontop of the vect_worthwhile_without_simd_p refactoring
done earlier. It was wrong in dropping the appearant double checks
for operation support since the optab check can happen with an
integer vector emulation mode and thus succeed but vector lowering
might not actually support the operation on word_mode.
The following patch adds a vect_emulated_vector_p helper and
re-instantiates the check where it was previously. It also adds
appropriate costing of the scalar stmts emitted by vector lowering
to vectorizable_operation which should be the only place such
operations are synthesized. I've also cared for the case where
the vector mode is supported but the operation is not (though
I think this will be unlikely given we're talking about plus, minus
and negate).
This fixes the observed FAIL of gcc.dg/tree-ssa/gen-vect-11b.c
with -m32 where we end up vectorizing a multiplication that ends up
being teared down to scalars again by vector lowering.
I'm not super happy about all the other places where we're now
and previously feeding scalar modes to optab checks where we
want to know whether we can vectorize sth but well.
2021-09-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/101801
PR tree-optimization/101819
* tree-vectorizer.h (vect_emulated_vector_p): Declare.
* tree-vect-loop.c (vect_emulated_vector_p): New function.
(vectorizable_reduction): Re-instantiate a check for emulated
operations.
* tree-vect-stmts.c (vectorizable_shift): Likewise.
(vectorizable_operation): Likewise. Cost emulated vector
operations according to the scalar sequence synthesized by
vector lowering.
Richard Biener [Mon, 9 Aug 2021 08:19:10 +0000 (10:19 +0200)]
middle-end/101824 - properly handle volatiles in nested fn lowering
When we build the COMPONENT_REF of a formerly volatile local off
the FRAME decl we have to make sure to mark the COMPONENT_REF
as TREE_THIS_VOLATILE. While the GIMPLE operand scanner looks
at the FIELD_DECL this is not how volatile GENERIC refs work.
2021-08-09 Richard Biener <rguenther@suse.de>
PR middle-end/101824
* tree-nested.c (get_frame_field): Mark the COMPONENT_REF as
volatile in case the variable was.
Martin Uecker [Tue, 10 Aug 2021 05:42:51 +0000 (07:42 +0200)]
Evaluate arguments of sizeof that are structs of variable size.
Evaluate arguments of sizeof for all types of variable size
and not just for VLAs. This fixes some issues related to
[PR29970] where statement expressions need to be evaluated
so that the size is well defined.
2021-08-10 Martin Uecker <muecker@gwdg.de>
gcc/c/
PR c/29970
* c-typeck.c (c_expr_sizeof_expr): Evaluate
size expressions for structs of variable size.
gcc/testsuite/
PR c/29970
* gcc.dg/vla-stexp-1.c: New test.
H.J. Lu [Fri, 6 Aug 2021 19:32:01 +0000 (12:32 -0700)]
x86: Optimize load of const FP all bits set vectors
Check float_vector_all_ones_operand for vector floating-point modes to
optimize load of const floating-point all bits set vectors.
gcc/
PR target/101804
* config/i386/constraints.md (BC): Document for integer SSE
constant all bits set operand.
(BF): New constraint for const floating-point all bits set
vectors.
* config/i386/i386.c (standard_sse_constant_p): Likewise.
(standard_sse_constant_opcode): Likewise.
* config/i386/sse.md (sseconstm1): New mode attribute.
(mov<mode>_internal): Replace BC with <sseconstm1>.
liuhongt [Thu, 5 Aug 2021 09:51:48 +0000 (17:51 +0800)]
Support cond_ashr/lshr/ashl for vector integer modes under AVX512.
gcc/ChangeLog:
* config/i386/sse.md (cond_<insn><mode>): New expander.
(VI248_AVX512VLBW): New mode iterator.
* config/i386/predicates.md
(nonimmediate_or_const_vec_dup_operand): New predicate.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cond_op_shift_d-1.c: New test.
* gcc.target/i386/cond_op_shift_d-2.c: New test.
* gcc.target/i386/cond_op_shift_q-1.c: New test.
* gcc.target/i386/cond_op_shift_q-2.c: New test.
* gcc.target/i386/cond_op_shift_ud-1.c: New test.
* gcc.target/i386/cond_op_shift_ud-2.c: New test.
* gcc.target/i386/cond_op_shift_uq-1.c: New test.
* gcc.target/i386/cond_op_shift_uq-2.c: New test.
* gcc.target/i386/cond_op_shift_uw-1.c: New test.
* gcc.target/i386/cond_op_shift_uw-2.c: New test.
* gcc.target/i386/cond_op_shift_w-1.c: New test.
* gcc.target/i386/cond_op_shift_w-2.c: New test.
Jonathan Wakely [Mon, 9 Aug 2021 10:49:09 +0000 (11:49 +0100)]
libstdc++: Reduce use of debug containers in <regex>
The std::regex code uses std::map and std::vector, which means that when
_GLIBCXX_DEBUG is defined it uses the debug versions of those
containers. That no longer compiles, because I changed <regex> to
include <bits/stl_map.h> and <bits/stl_vector.h> instead of <map> and
<vector>, so the debug versions aren't defined, and std::map doesn't
compile. There is also a use of std::stack, which defaults to std::deque
which is the debug deque when _GLIBCXX_DEBUG is defined.
Using std::map, std::vector, and std::deque is probably a mistake, and
we should qualify them with _GLIBCXX_STD_C instead so that the debug
versions aren't used. We do not need the overhead of checking our own
uses of those containers, which should be correct anyway. The exception
is the vector base class of std::match_results, which exposes iterators
to users, so can benefit from debug mode checks for its iterators. For
other accesses to the vector elements, match_results already does its
own checks, so can access the _GLIBCXX_STD_C::vector base class
directly.
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>
libstdc++-v3/ChangeLog:
* include/bits/regex.h (basic_regex::transform_primary): Use
_GLIBCXX_STD_C::vector for local variable.
* include/bits/regex.tcc (__regex_algo_impl): Use reference to
_GLIBCXX_STD_C::vector base class of match_results.
* include/bits/regex_automaton.tcc (_StateSeq:_M_clone): Use
_GLIBCXX_STD_C::map and _GLIBCXX_STD_C::deque for local
variables.
* include/bits/regex_compiler.h (_BracketMatcher): Use
_GLIBCXX_STD_C::vector for data members.
* include/bits/regex_executor.h (_Executor): Likewise.
* include/std/regex [_GLIBCXX_DEBUG]: Include <debug/vector>.
Martin Jambor [Mon, 9 Aug 2021 15:35:39 +0000 (17:35 +0200)]
ipa: Fix testsuite/gcc.dg/ipa/remref-6.c
I forgot to add -fdump-ipa-inline to options of
testsuite/gcc.dg/ipa/remref-6.c and so the dump scan test were not
PASSing but ended up as UNRESOLVED. Fixing that revealed that the one
of the dumps it was looking for had a double space, so I removed it
too.
gcc/ChangeLog:
2021-08-09 Martin Jambor <mjambor@suse.cz>
PR testsuite/101654
* ipa-prop.c (propagate_controlled_uses): Removed a spurious space.
Thomas Schwinge [Mon, 9 Aug 2021 10:21:43 +0000 (12:21 +0200)]
Cross-reference parts adapted in 'gcc/omp-oacc-neuter-broadcast.cc'
gcc/
* config/nvptx/nvptx.c: Cross-reference parts adapted in
'gcc/omp-oacc-neuter-broadcast.cc'.
* omp-low.c: Likewise.
* omp-oacc-neuter-broadcast.cc: Cross-reference parts adapted from
the above files.
Julian Brown [Tue, 2 Mar 2021 12:20:11 +0000 (04:20 -0800)]
openacc: Middle-end worker-partitioning support
This patch implements worker-partitioning support in the middle end,
by rewriting gimple. The OpenACC execution model requires that code
can run in either "worker single" mode where only a single worker per
gang is active, or "worker partitioned" mode, where multiple workers
per gang are active. This means we need to do something equivalent
to spawning additional workers when transitioning from worker-single
to worker-partitioned mode. However, GPUs typically fix the number of
threads of invoked kernels at launch time, so we need to do something
with the "extra" threads when they are not wanted.
The scheme used is to conditionalise each basic block that executes
in "worker single" mode for worker 0 only. Conditional branches
are handled specially so "idle" (non-0) workers follow along with
worker 0. On transitioning to "worker partitioned" mode, any variables
modified by worker 0 are propagated to the other workers via GPU shared
memory. Special care is taken for routine calls, writes through pointers,
and so forth, as follows:
- There are two types of function calls to consider in worker-single
mode: "normal" calls to maths library routines, etc. are called from
worker 0 only. OpenACC routines may contain worker-partitioned loops
themselves, so are called from all workers, including "idle" ones.
- SSA names set in worker-single mode, but used in worker-partitioned
mode, are copied to shared memory in worker 0. Other workers retrieve
the value from the appropriate shared-memory location after a barrier,
and new phi nodes are introduced at the convergence point to resolve
the worker 0/other worker copies of the value.
- Local scalar variables (on the stack) also need special handling. We
broadcast any variables that are written in the current worker-single
block, and that are read in any worker-partitioned block. (This is
believed to be safe, and is flow-insensitive to ease analysis.)
- Local aggregates (arrays and composites) on the stack are *not*
broadcast. Instead we force gimple stmts modifying elements/fields of
local aggregates into fully-partitioned mode. The RHS of the
assignment is a scalar, and is thus subject to broadcasting as above.
- Writes through pointers may affect any local variable that has
its address taken. We use points-to analysis to determine the set
of potentially-affected variables for a given pointer indirection.
We broadcast any such variable which is used in worker-partitioned
mode, on a per-block basis for any block containing a write through
a pointer.
Some slides about the implementation (from 2018) are available at:
Tejas Belagod [Mon, 9 Aug 2021 10:33:30 +0000 (11:33 +0100)]
PR101609: Use the correct iterator for AArch64 vector right shift pattern
Loops containing long long shifts fail to vectorize due to the vectorizer
not being able to recognize long long right shifts. This is due to a bug
in the iterator used for the vashr and vlshr patterns in aarch64-simd.md.
2021-08-09 Tejas Belagod <tejas.belagod@arm.com>
gcc/ChangeLog
PR target/101609
* config/aarch64/aarch64-simd.md (vlshr<mode>3, vashr<mode>3): Use
the right iterator.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/vect-shr-reg.c: New testcase.
* gcc.target/aarch64/vect-shr-reg-run.c: Likewise.
Thomas Schwinge [Mon, 2 Aug 2021 16:33:50 +0000 (18:33 +0200)]
Don't consider '-foffload-abi' in 'DEF_GOACC_BUILTIN', 'DEF_GOMP_BUILTIN'
Since Tom's PR64707 commit r220037 (Git commit 1506ae0e1e865fb7a42fc37a47f1799b71f21c53) "Make fopenmp an LTO option" as well
as PR64672 commit r220038 (Git commit a0c88d0629a33161add8d5bc083f1e59f3f756f7)
"Make fopenacc an LTO option", we're now actually passing
'-fopenacc'/'-fopenmp' to the 'mkoffload's, which will pass these on to the
offload compilers.
Roger Sayle [Mon, 9 Aug 2021 11:02:53 +0000 (12:02 +0100)]
Improve handling of unknown sign bit in CCP.
This middle-end patch implements several related improvements to
tree-ssa's conditional (bit) constant propagation pass. The current
code handling ordered comparisons contains the comment "If the
most significant bits are not known we know nothing" which is not
entirely true [this test even prevents this pass understanding these
comparisons always have a zero or one result]. This patch introduces
a new value_mask_to_min_max helper function, that understands the
different semantics of the most significant bit on signed vs.
unsigned values. This allows us to generalize ordered comparisons,
GE_EXPR, GT_EXPR, LE_EXPR and LT_EXPR, where to code is tweaked to
correctly handle the potential equal cases. Then finally support
is added for the related tree codes MIN_EXPR, MAX_EXPR, ABS_EXPR
and ABSU_EXPR.
Regression testing revealed three test cases in the testsuite that
were checking for specific optimizations that are now being performed
earlier than expected. These tests can continue to check their
original transformations by explicitly adding -fno-tree-ccp to their
dg-options (some already specify -fno-ipa-vrp or -fno-tree-forwprop
for the same reason).
2021-08-09 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* tree-ssa-ccp.c (value_mask_to_min_max): Helper function to
determine the upper and lower bounds from a mask-value pair.
(bit_value_unop) [ABS_EXPR, ABSU_EXPR]: Add support for
absolute value and unsigned absolute value expressions.
(bit_value_binop): Initialize *VAL's precision.
[LT_EXPR, LE_EXPR]: Use value_mask_to_min_max to determine
upper and lower bounds of operands. Add LE_EXPR/GE_EXPR
support when the operands are unknown but potentially equal.
[MIN_EXPR, MAX_EXPR]: Support minimum/maximum expressions.
Tobias Burnus [Mon, 9 Aug 2021 10:35:23 +0000 (12:35 +0200)]
testsuite/lib/gfortran.exp: Add -I for ISO*.h [PR101305, PR101660]
This patch adds -I$specdir/libgfortran to GFORTRAN_UNDER_TEST, when
set by proc gfortran_init. As the $specdir depends on the multilib
setting, it has to be re-set for a different multilib; hence, we track
whether a previous call to gfortran_init set that var or whether it
was set differently.
Bin Cheng [Mon, 9 Aug 2021 09:21:03 +0000 (17:21 +0800)]
aarch64: Expand %<w> correctly according to mode iterator
Pattern "*extend<SHORT:mode><GPI:mode>2_aarch64" is duplicated
from the corresponding zero_extend pattern, however %<w> needs
to be expanded according to its mode iterator because the smov
instruction is different to umov.
2021-08-09 Bin Cheng <bin.cheng@linux.alibaba.com>
gcc/
* config/aarch64/aarch64.md
(*extend<SHORT:mode><GPI:mode>2_aarch64): Use %<GPI:w>0.
Jonathan Wright [Fri, 6 Aug 2021 14:37:34 +0000 (15:37 +0100)]
testsuite: aarch64: Fix invalid SVE tests
Some scan-assembler tests for SVE code generation were erroneously
split over multiple lines - meaning they became invalid. This patch
gets the tests working again by putting each test on a single line.
The extract_[1234].c tests are corrected to expect that extracted
32-bit values are moved into 'w' registers rather than 'x' registers.
gcc/testsuite/ChangeLog:
2021-08-06 Jonathan Wright <jonathan.wright@arm.com>
* gcc.target/aarch64/sve/dup_lane_1.c: Don't split
scan-assembler tests over multiple lines. Expect 32-bit
result values in 'w' registers.
* gcc.target/aarch64/sve/extract_1.c: Likewise.
* gcc.target/aarch64/sve/extract_2.c: Likewise.
* gcc.target/aarch64/sve/extract_3.c: Likewise.
* gcc.target/aarch64/sve/extract_4.c: Likewise.
Jonathan Wright [Wed, 4 Aug 2021 08:18:52 +0000 (09:18 +0100)]
testsuite: aarch64: Fix failing vector structure tests on big-endian
Recent refactoring of the arm_neon.h header enabled better code
generation for intrinsics that manipulate vector structures. New
tests were also added to verify the benefit of these changes. It now
transpires that the code generation improvements are observed only on
little-endian systems. This patch restricts the code generation tests
to little-endian targets.
gcc/testsuite/ChangeLog:
2021-08-04 Jonathan Wright <jonathan.wright@arm.com>
* gcc.target/aarch64/vector_structure_intrinsics.c: Restrict
tests to little-endian targets.
libstdc++: Tweak timeout for testsuite/std/ranges/iota/max_size_type.cc
A simulator can easily spend more than 10 minutes running
this test-case, and the default timeout is at 5 minutes.
Better allow even slower machines; use 4 as the factor.
Regarding relative runtime numbers (very local; mmixware simulator for
mmix-knuth-mmixware): test01 and test05 finish momentarily; test02 at
about 2 minutes, and test03 about 2m30, but test04 itself runs for
more than 6 minues and so times out.
Not sure if it's better to split up this test, as the excessive
runtime may be unintended, but this seemed simplest.
libstdc++-v3:
* testsuite/std/ranges/iota/max_size_type.cc: Set
dg-timeout-factor to 4.
Martin Sebor [Fri, 6 Aug 2021 21:29:33 +0000 (15:29 -0600)]
Move more code to new gimple-ssa-warn-access pass.
gcc/ChangeLog:
* builtins.c (expand_builtin_memchr): Move to gimple-ssa-warn-access.cc.
(expand_builtin_strcat): Same.
(expand_builtin_stpncpy): Same.
(expand_builtin_strncat): Same.
(check_read_access): Same.
(check_memop_access): Same.
(expand_builtin_strlen): Move checks to gimple-ssa-warn-access.cc.
(expand_builtin_strnlen): Same.
(expand_builtin_memcpy): Same.
(expand_builtin_memmove): Same.
(expand_builtin_mempcpy): Same.
(expand_builtin_strcpy): Same.
(expand_builtin_strcpy_args): Same.
(expand_builtin_stpcpy_1): Same.
(expand_builtin_strncpy): Same.
(expand_builtin_memset): Same.
(expand_builtin_bzero): Same.
(expand_builtin_strcmp): Same.
(expand_builtin_strncmp): Same.
(expand_builtin): Remove handlers.
(fold_builtin_strlen): Add a comment.
* builtins.h (check_access): Move to gimple-ssa-warn-access.cc.
* calls.c (maybe_warn_nonstring_arg): Same.
* diagnostic-spec.c (nowarn_spec_t::nowarn_spec_t): Add warning option.
* gimple-fold.c (gimple_fold_builtin_strcpy): Pass argument to callee.
(gimple_fold_builtin_stpcpy): Same.
* gimple-ssa-warn-access.cc (has_location): New function.
(get_location): Same.
(get_callee_fndecl): Same.
(call_nargs): Same.
(call_arg): Same.
(warn_string_no_nul): Define.
(unterminated_array): Same.
(check_nul_terminated_array): Same.
(maybe_warn_nonstring_arg): Same.
(maybe_warn_for_bound): Same.
(warn_for_access): Same.
(check_access): Same.
(check_memop_access): Same.
(check_read_access): Same.
(warn_dealloc_offset): Use helper functions.
(maybe_emit_free_warning): Same.
(class pass_waccess): Add members.
(check_strcat): New function.
(check_strncat): New function.
(check_stxcpy): New function.
(check_stxncpy): New function.
(check_strncmp): New function.
(pass_waccess::check_builtin): New function.
(pass_waccess::check): Call it.
* gimple-ssa-warn-access.h (warn_string_no_nul): Move here from
builtins.h.
(maybe_warn_for_bound): Same.
(check_access): Same.
(check_memop_access): Same.
(check_read_access): Same.
* pointer-query.h (struct access_data): Define a ctor overload.
gcc/testsuite/ChangeLog:
* c-c++-common/Wsizeof-pointer-memaccess1.c: Also disable
-Wstringop-overread.
* c-c++-common/attr-nonstring-3.c: Adjust pattern of expected message.
* gcc.dg/Warray-bounds-39.c: Add an xfail due to a known bug.
* gcc.dg/Wstring-compare-3.c: Also disable -Wstringop-overread.
* gcc.dg/attr-nonstring-2.c: Adjust pattern of expected message.
* gcc.dg/attr-nonstring-4.c: Same.
* gcc.dg/Wstringop-overread-6.c: New test.
* gcc.dg/sso-14.c: Fix typos to avoid buffer overflow.
This removes the cost part of vect_worthwhile_without_simd_p, retaining
only the correctness bits. The reason is that the cost heuristic
do not properly account for SLP plus the check whether "without simd"
applies misfires for AVX512 mask vectors at the moment, leading to
missed vectorizations there.
Any costing decision should take place in the cost modeling, no
single stmt is to disable all vectorization on its own.
2021-08-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/101801
* tree-vectorizer.h (vect_worthwhile_without_simd_p): Rename...
(vect_can_vectorize_without_simd_p): ... to this.
* tree-vect-loop.c (vect_worthwhile_without_simd_p): Rename...
(vect_can_vectorize_without_simd_p): ... to this and fold
in vect_min_worthwhile_factor.
(vect_min_worthwhile_factor): Remove.
(vectorizable_reduction): Adjust and remove the cost part.
* tree-vect-stmts.c (vectorizable_shift): Likewise.
(vectorizable_operation): Likewise.
Roger Sayle [Fri, 6 Aug 2021 11:30:53 +0000 (12:30 +0100)]
Use CFN_BUILT_IN_CLRSB instead of BUILT_IN_CLRSB in switch.
This patch replaces the use of BUILT_IN_CLRSB with CFN_BUILT_IN_CLRSB
in my recent patch to tree-ssa-phiopt.c. Both of these have identical
values, so there's no change in behavior, but consistent use of the same
enumeration avoids warnings when using clang (or static analysis tools).
2021-08-06 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* tree-ssa-phiopt.c (cond_removal_in_builtin_zero_pattern): Use
CFN_BUILT_IN_CLRSB* instead of BUILT_IN_CLRSB* for consistency.
Sebastian Huber [Fri, 6 Aug 2021 07:57:43 +0000 (09:57 +0200)]
gcov: Remove <stdint.h> from libgcov-driver.c
In the patch to add __gcov_info_to_gcda(), the include of <stdint.h> was added
to libgcov-driver.c even if inhibit_libc is defined. It turned out that this
header file is not always available. Remove the include of <stdint.h> and
replace the intptr_t with the compiler provided __INTPTR_TYPE__.
libgcc/
* libgcov-driver.c (#include <stdint.h>): Remove.
(write_topn_counters): Use __INTPTR_TYPE__ instead of intptr_t.
Jonathan Wright [Fri, 30 Jul 2021 14:30:19 +0000 (15:30 +0100)]
aarch64: Use memcpy to copy structures in bfloat vst* intrinsics
Use __builtin_memcpy to copy vector structures instead of using a
union - or constructing a new opaque structure one vector at a time -
in each of the vst[234][q] and vst1[q]_x[234] bfloat Neon intrinsics
in arm_neon.h.
Add new code generation tests to verify that superfluous move
instructions are not generated for the vst[234]q or vst1q_x[234]
bfloat intrinsics.
gcc/ChangeLog:
2021-07-30 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/arm_neon.h (vst1_bf16_x2): Use
__builtin_memcpy instead of constructing an additional
__builtin_aarch64_simd_oi one vector at a time.
(vst1q_bf16_x2): Likewise.
(vst1_bf16_x3): Use __builtin_memcpy instead of constructing
an additional __builtin_aarch64_simd_ci one vector at a time.
(vst1q_bf16_x3): Likewise.
(vst1_bf16_x4): Use __builtin_memcpy instead of a union.
(vst1q_bf16_x4): Likewise.
(vst2_bf16): Use __builtin_memcpy instead of constructing an
additional __builtin_aarch64_simd_oi one vector at a time.
(vst2q_bf16): Likewise.
(vst3_bf16): Use __builtin_memcpy instead of constructing an
additional __builtin_aarch64_simd_ci mode one vector at a
time.
(vst3q_bf16): Likewise.
(vst4_bf16): Use __builtin_memcpy instead of constructing an
additional __builtin_aarch64_simd_xi one vector at a time.
(vst4q_bf16): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
tests.
Jonathan Wright [Fri, 30 Jul 2021 10:29:45 +0000 (11:29 +0100)]
aarch64: Use memcpy to copy structures in vst2[q]_lane intrinsics
Use __builtin_memcpy to copy vector structures instead of using a
union - or constructing a new opaque structure one vector at a time -
in each of the vst2[q]_lane Neon intrinsics in arm_neon.h.
Add new code generation tests to verify that superfluous move
instructions are not generated for the vst2q_lane intrinsics.
gcc/ChangeLog:
2021-07-30 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/arm_neon.h (__ST2_LANE_FUNC): Delete.
(__ST2Q_LANE_FUNC): Delete.
(vst2_lane_f16): Use __builtin_memcpy to copy vector
structure instead of constructing __builtin_aarch64_simd_oi
one vector at a time.
(vst2_lane_f32): Likewise.
(vst2_lane_f64): Likewise.
(vst2_lane_p8): Likewise.
(vst2_lane_p16): Likewise.
(vst2_lane_p64): Likewise.
(vst2_lane_s8): Likewise.
(vst2_lane_s16): Likewise.
(vst2_lane_s32): Likewise.
(vst2_lane_s64): Likewise.
(vst2_lane_u8): Likewise.
(vst2_lane_u16): Likewise.
(vst2_lane_u32): Likewise.
(vst2_lane_u64): Likewise.
(vst2_lane_bf16): Likewise.
(vst2q_lane_f16): Use __builtin_memcpy to copy vector
structure instead of using a union.
(vst2q_lane_f32): Likewise.
(vst2q_lane_f64): Likewise.
(vst2q_lane_p8): Likewise.
(vst2q_lane_p16): Likewise.
(vst2q_lane_p64): Likewise.
(vst2q_lane_s8): Likewise.
(vst2q_lane_s16): Likewise.
(vst2q_lane_s32): Likewise.
(vst2q_lane_s64): Likewise.
(vst2q_lane_u8): Likewise.
(vst2q_lane_u16): Likewise.
(vst2q_lane_u32): Likewise.
(vst2q_lane_u64): Likewise.
(vst2q_lane_bf16): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
tests.
Jonathan Wright [Fri, 30 Jul 2021 09:33:08 +0000 (10:33 +0100)]
aarch64: Use memcpy to copy structures in vst3[q]_lane intrinsics
Use __builtin_memcpy to copy vector structures instead of using a
union - or constructing a new opaque structure one vector at a time -
in each of the vst3[q]_lane Neon intrinsics in arm_neon.h.
Add new code generation tests to verify that superfluous move
instructions are not generated for the vst3q_lane intrinsics.
gcc/ChangeLog:
2021-07-30 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/arm_neon.h (__ST3_LANE_FUNC): Delete.
(__ST3Q_LANE_FUNC): Delete.
(vst3_lane_f16): Use __builtin_memcpy to copy vector
structure instead of constructing __builtin_aarch64_simd_ci
one vector at a time.
(vst3_lane_f32): Likewise.
(vst3_lane_f64): Likewise.
(vst3_lane_p8): Likewise.
(vst3_lane_p16): Likewise.
(vst3_lane_p64): Likewise.
(vst3_lane_s8): Likewise.
(vst3_lane_s16): Likewise.
(vst3_lane_s32): Likewise.
(vst3_lane_s64): Likewise.
(vst3_lane_u8): Likewise.
(vst3_lane_u16): Likewise.
(vst3_lane_u32): Likewise.
(vst3_lane_u64): Likewise.
(vst3_lane_bf16): Likewise.
(vst3q_lane_f16): Use __builtin_memcpy to copy vector
structure instead of using a union.
(vst3q_lane_f32): Likewise.
(vst3q_lane_f64): Likewise.
(vst3q_lane_p8): Likewise.
(vst3q_lane_p16): Likewise.
(vst3q_lane_p64): Likewise.
(vst3q_lane_s8): Likewise.
(vst3q_lane_s16): Likewise.
(vst3q_lane_s32): Likewise.
(vst3q_lane_s64): Likewise.
(vst3q_lane_u8): Likewise.
(vst3q_lane_u16): Likewise.
(vst3q_lane_u32): Likewise.
(vst3q_lane_u64): Likewise.
(vst3q_lane_bf16): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
tests.
Jonathan Wright [Thu, 29 Jul 2021 11:24:17 +0000 (12:24 +0100)]
aarch64: Use memcpy to copy structures in vst4[q]_lane intrinsics
Use __builtin_memcpy to copy vector structures instead of using a
union - or constructing a new opaque structure one vector at a time -
in each of the vst4[q]_lane Neon intrinsics in arm_neon.h.
Add new code generation tests to verify that superfluous move
instructions are not generated for the vst4q_lane intrinsics.
gcc/ChangeLog:
2021-07-29 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/arm_neon.h (__ST4_LANE_FUNC): Delete.
(__ST4Q_LANE_FUNC): Delete.
(vst4_lane_f16): Use __builtin_memcpy to copy vector
structure instead of constructing __builtin_aarch64_simd_xi
one vector at a time.
(vst4_lane_f32): Likewise.
(vst4_lane_f64): Likewise.
(vst4_lane_p8): Likewise.
(vst4_lane_p16): Likewise.
(vst4_lane_p64): Likewise.
(vst4_lane_s8): Likewise.
(vst4_lane_s16): Likewise.
(vst4_lane_s32): Likewise.
(vst4_lane_s64): Likewise.
(vst4_lane_u8): Likewise.
(vst4_lane_u16): Likewise.
(vst4_lane_u32): Likewise.
(vst4_lane_u64): Likewise.
(vst4_lane_bf16): Likewise.
(vst4q_lane_f16): Use __builtin_memcpy to copy vector
structure instead of using a union.
(vst4q_lane_f32): Likewise.
(vst4q_lane_f64): Likewise.
(vst4q_lane_p8): Likewise.
(vst4q_lane_p16): Likewise.
(vst4q_lane_p64): Likewise.
(vst4q_lane_s8): Likewise.
(vst4q_lane_s16): Likewise.
(vst4q_lane_s32): Likewise.
(vst4q_lane_s64): Likewise.
(vst4q_lane_u8): Likewise.
(vst4q_lane_u16): Likewise.
(vst4q_lane_u32): Likewise.
(vst4q_lane_u64): Likewise.
(vst4q_lane_bf16): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
tests.
Martin Liska [Tue, 1 Jun 2021 13:39:14 +0000 (15:39 +0200)]
rs6000: Fix restored rs6000_long_double_type_size
As mentioned in the "Fallout: save/restore target options in handle_optimize_attribute"
thread, we need to support target option restore
of rs6000_long_double_type_size == FLOAT_PRECISION_TFmode.
gcc/ChangeLog:
* config/rs6000/rs6000.c (rs6000_option_override_internal): When
a target option is restored, it can have
rs6000_long_double_type_size set to FLOAT_PRECISION_TFmode
and error should not be emitted.
Sebastian Huber [Sat, 14 Nov 2020 12:51:09 +0000 (13:51 +0100)]
gcov: Add __gcov_info_to_gdca()
Add __gcov_info_to_gcda() to libgcov to get the gcda data for a gcda info in a
freestanding environment. It is intended to be used with the
-fprofile-info-section option. A crude test program which doesn't use a linker
script is (use "gcc -coverage -fprofile-info-section -lgcov test.c" to compile
it):
With this patch, <stdint.h> is included in libgcov-driver.c even if
inhibit_libc is defined. This header file should be also available for
freestanding environments. If this is not the case, then we have to define
intptr_t somehow.
The patch removes one use of memset() which makes the <string.h> include
superfluous.
Jonathan Wakely [Thu, 5 Aug 2021 15:46:00 +0000 (16:46 +0100)]
libstdc++: Move [[nodiscard]] attributes again [PR101782]
Where I moved these nodiscard attributes to made them apply to the
function type, not to the function. This meant they no longer generated
the desired -Wunused-result warnings, and were ill-formed with Clang
(but only a pedwarn with GCC).
Clang also detected ill-formed attributes in <queue> which this fixes.
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>
libstdc++-v3/ChangeLog:
PR libstdc++/101782
* include/bits/ranges_base.h (ranges::begin, ranges::end)
(ranges::rbegin, ranges::rend, ranges::size, ranges::ssize)
(ranges::empty, ranges::data): Move attribute after the
declarator-id instead of at the end of the declarator.
* include/bits/stl_iterator.h (__gnu_cxx::__normal_iterator):
Move attributes back to the start of the function declarator,
but move the requires-clause to the end.
(common_iterator): Move attribute after the declarator-id.
* include/bits/stl_queue.h (queue): Remove ill-formed attributes
from friend declaration that are not definitions.
* include/std/ranges (views::all, views::filter)
(views::transform, views::take, views::take_while,
views::drop) (views::drop_while, views::join,
views::lazy_split) (views::split, views::counted,
views::common, views::reverse) (views::elements): Move
attributes after the declarator-id.
Jakub Jelinek [Thu, 5 Aug 2021 15:34:16 +0000 (17:34 +0200)]
libcpp: Fix makeucnid bug with combining values [PR100977]
I've noticed in ucnid.h two adjacent lines that had all flags and combine
values identical and as such were supposed to be merged.
This is due to a bug in makeucnid.c, which records last_flag,
last_combine and really_safe of what has just been printed, but
because of a typo mishandles it for last_combine, always compares against
the combining_value[0] which is 0.
This has two effects on the table, one is that often the table is
unnecessarily large, as for non-zero .combine every character has its own
record instead of adjacent characters with the same flags and combine
being merged. This means larger tables.
The other is that sometimes the last char that has combine set doesn't
actually have it in the tables, because the code is printing entries only
upon seeing the next character and if that character does have
combining_value of 0 and flags are otherwise the same as previously printed,
it will not print anything.
The following patch fixes that, for clarity what exactly it affects
I've regenerated with the same Unicode files as last time it has
been regenerated.
2021-08-05 Jakub Jelinek <jakub@redhat.com>
PR c++/100977
* makeucnid.c (write_table): Fix computation of last_combine.
* ucnid.h: Regenerated using Unicode 6.3.0 files.
Jakub Jelinek [Thu, 5 Aug 2021 15:32:06 +0000 (17:32 +0200)]
libgcc: Honor LDFLAGS_FOR_TARGET when linking libgcc_s
When building gcc with some specific LDFLAGS_FOR_TARGET, e.g.
LDFLAGS_FOR_TARGET=-Wl,-z,relro,-z,now
those flags propagate info linking of target shared libraries,
e.g. lib{ubsan,tsan,stdc++,quadmath,objc,lsan,itm,gphobos,gdruntime,gomp,go,gfortran,atomic,asan}.so.*
but there is one important exception, libgcc_s.so.* linking ignores it.
The following patch fixes that.
Bootstrapped/regtested on x86_64-linux with LDFLAGS_FOR_TARGET=-Wl,-z,relro,-z,now
and verified that libgcc_s.so.* is BIND_NOW when it previously wasn't, and
without any LDFLAGS_FOR_TARGET on x86_64-linux and i686-linux.
There on x86_64-linux I've verified that the libgcc_s.so.1 linking command
line for -m64 is identical except for whitespace to one without the patch,
and for -m32 multilib $(LDFLAGS) actually do supply there an extra -m32
that also repeats later in the @multilib_flags@, which should be harmless.
Chung-Lin Tang [Thu, 5 Aug 2021 15:29:03 +0000 (23:29 +0800)]
openmp: Implement omp_get_device_num routine
This patch implements the omp_get_device_num library routine, specified in
OpenMP 5.0.
GOMP_DEVICE_NUM_VAR is a macro symbol which defines name of a "device number"
variable, is defined on the device-side libgomp, has it's address returned to
host-side libgomp during device initialization, and the host libgomp then
sets its value to the designated device number.
libgomp/ChangeLog:
* icv-device.c (omp_get_device_num): New API function, host side.
* fortran.c (omp_get_device_num_): New interface function.
* libgomp-plugin.h (GOMP_DEVICE_NUM_VAR): Define macro symbol.
* libgomp.map (OMP_5.0.2): New version space with omp_get_device_num,
omp_get_device_num_.
* libgomp.texi (omp_get_device_num): Add documentation for new API
function.
* omp.h.in (omp_get_device_num): Add declaration.
* omp_lib.f90.in (omp_get_device_num): Likewise.
* omp_lib.h.in (omp_get_device_num): Likewise.
* target.c (gomp_load_image_to_device): If additional entry for device
number exists at end of returned entries from 'load_image_func' hook,
copy the assigned device number over to the device variable.
* config/gcn/icv-device.c (GOMP_DEVICE_NUM_VAR): Define static global.
(omp_get_device_num): New API function, device side.
* plugin/plugin-gcn.c ("symcat.h"): Add include.
(GOMP_OFFLOAD_load_image): Add addresses of device GOMP_DEVICE_NUM_VAR
at end of returned 'target_table' entries.
* config/nvptx/icv-device.c (GOMP_DEVICE_NUM_VAR): Define static global.
(omp_get_device_num): New API function, device side.
* plugin/plugin-nvptx.c ("symcat.h"): Add include.
(GOMP_OFFLOAD_load_image): Add addresses of device GOMP_DEVICE_NUM_VAR
at end of returned 'target_table' entries.
* testsuite/lib/libgomp.exp
(check_effective_target_offload_target_intelmic): New function for
testing for intelmic offloading.
* testsuite/libgomp.c-c++-common/target-45.c: New test.
* testsuite/libgomp.fortran/target10.f90: New test.
Jonathan Wakely [Thu, 5 Aug 2021 13:01:31 +0000 (14:01 +0100)]
libstdc++: Add [[nodiscard]] to <compare>
This adds the [[nodiscard]] attribute to all conversion operators,
comparison operators, call operators and non-member functions in
<compare>. Nothing in this header except constructors has side effects.
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>
libstdc++-v3/ChangeLog:
projects / thirdparty / gcc.git / log
