dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
This commit adds support for PKTDMA in k3-udma glue driver. Use new
psil_endpoint_config struct to get static data for a given channel or a
flow during setup. Make sure that the RX flows being mapped to a RX
channel is within the range of flows that is been allocated to that RX
channel.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:39 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma: Initial support for K3 PKTDMA
One of the DMAs introduced with AM64 is the Packet DMA (PKTDMA).
It serves similar purpose as K3 UDMAP channels in packet mode, but with
notable differences, like tflow support and channels being allocated to
service specific peripherals.
The rings for the PKTDMA is integrated within the DMA itself instead of
using rings from the general purpose ringacc.
PKTDMA can be used to service PSI-L peripherals, similarly to
K3 UDMA channels.
Most of the driver code can be reused for PKTDMA tchan/rchan support but
new setup and allocation functions are needed to handle the differences
between the DMAs.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:38 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling
Unlike UDMAP the BCDMA defines the channel TPL levels per channel type.
In UDMAP the number of high and ultra-high channels applies to both tchan
and rchan.
BCDMA defines the TPL per channel types: bchan, tchan and rchan can have
different number of high and ultra-high channels.
In order to support BCDMA channel TPL we need to move the tpl information
as per channel type property for the DMAs.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:37 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma: Initial support for K3 BCDMA
One of the DMAs introduced with AM64 is the Block Copy DMA (BCDMA).
It serves similar purpose as K3 UDMAP channels in TR mode.
The rings for the BCDMA is integrated within the DMA itself instead of
using rings from the general purpose ringacc.
A BCDMA have two different type of channels:
- Block Copy Channels (bchan)
- Split Channels (tchan and rchan)
tchan and rchan can be used to service PSI-L peripherals, similarly to
K3 UDMA channels.
bchan can be only used for block copy operation (TR type15) like the
paired K3 UDMA tchan/rchan configured in block copy mode.
bchans can be also used to service peripherals directly if an external
trigger is selected for the channel.
Most of the driver code can be reused for BCDMA bchan/tchan/rchan support
but new setup and allocation functions are needed to handle the
differences between the DMAs.
The DMAs in AM64 have built in rings compared to AM654/J721e/J7200 where a
separate and generic ringacc is used.
The ring SW interface is similar to ringacc with some major architectural
differences, like
They are part of the DMA (BCDMA or PKTDMA).
They are dual mode rings are modeled as pair of Rings objects which has
common configuration and memory buffer, but separate real-time control
register sets for each direction mem2dev (forward) and dev2mem (reverse).
The ringacc driver must be initialized for DMA rings use with
k3_ringacc_dmarings_init() as it is not an independent device as ringacc
is.
AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:35 +0000 (11:04 +0200)]
dmaengine: ti: Add support for k3 event routers
In k3 architecture a DMA channel (in TR momde) can be triggered by global
events, origination from different modules.
The events for triggers can be sent from any module which is connected to
PSI-L fabric, but the event number to be sent is DMA channel specific, it
is only known after the channel itself is requested.
The router operation needs to be split up:
- route_allocate: configure the dma_spec for the DMA and store the
configuration which is needed for the router's input
- set_event: callback used by the DMA driver to set the event number for
the channel and enable the routing
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:33 +0000 (11:04 +0200)]
dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA
Additional fields needed for K3 PKTDMA to be able to handle the mapped
channels (channels are locked to handle specific threads) and flow ranges
for these mapped threads.
PKTDMA also introduces tflow for tx channels which can not be found in
K3 UDMA architecture.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:30 +0000 (11:04 +0200)]
dmaengine: dmatest: Use dmaengine_get_dma_device
By using the dmaengine_get_dma_device() to get the device for
dma_api use, the dmatest can support per channel coherency if it is
supported by the DMA controller.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:28 +0000 (11:04 +0200)]
dmaengine: Add support for per channel coherency handling
If the DMA device supports per channel coherency configuration (a channel
can be configured to have coherent or not coherent view) then a single
device (the DMA controller's device) can not be used for dma_api for all
channels as channels can have different coherency.
Introduce custom_dma_mapping flag for the dma_chan and a new helper to get
the device pointer to be used for dma_api for the given channel.
Client drivers should be updated to be able to support per channel
coherency by:
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:27 +0000 (11:04 +0200)]
dmaengine: of-dma: Add support for optional router configuration callback
Additional configuration for the DMA event router might be needed for a
channel which can not be done during device_alloc_chan_resources callback
since the router information is not yet present for the drivers.
If there is a need for additional configuration for the channel if DMA
router is in use, then the driver can implement the device_router_config
callback.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:25 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev
If of_xudma_dev_get() returns with the valid udma_dev then the driver
already got the ringacc, there is no need to execute
of_k3_ringacc_get_by_phandle() for each channel via the glue layer.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:24 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API
Glue layer users should use the device of the DMA for DMA mapping and
allocations as it is the DMA which accesses to descriptors and buffers,
not the clients
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:22 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma: Wait for peer teardown completion if supported
Set the TDTYPE if it is supported on the platform (j721e) which will cause
UDMAP to wait for the remote peer to finish the teardown before returning
the teardown completed message.
Peter Ujfalusi [Tue, 8 Dec 2020 09:04:21 +0000 (11:04 +0200)]
dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0
According to different sections of the TRM, the hchan_cnt of CAP3 includes
the number of uchan in UDMA, thus the start offset of the normal channels
are hchan_cnt.
Amelie Delaunay [Fri, 20 Nov 2020 14:33:19 +0000 (15:33 +0100)]
dmaengine: stm32-dma: take address into account when computing max width
DMA_SxPAR or DMA_SxM0AR/M1AR registers have to be aligned on PSIZE or MSIZE
respectively. This means that bus width needs to be forced to 1 byte when
computed width is not aligned with address.
Amelie Delaunay [Fri, 20 Nov 2020 14:33:18 +0000 (15:33 +0100)]
dmaengine: stm32-dma: clean channel configuration when channel is freed
When dma_channel_release is called, it means that the channel won't be used
anymore with the configuration it had. To ensure a future client can safely
use the channel after it has been released, clean the configuration done
when channel was requested.
Amelie Delaunay [Fri, 20 Nov 2020 14:33:17 +0000 (15:33 +0100)]
dmaengine: stm32-dma: rework irq handler to manage error before xfer events
To better understand error that can be detected by the DMA controller,
manage the error flags before the transfer flags.
This way, it is possible to know if the FIFO error flag is set for an
over/underrun condition or a FIFO level error.
When a FIFO over/underrun condition occurs, the data is not lost because
peripheral request is not acknowledged by the stream until the over/
underrun condition is cleared. If this acknowledge takes too much time,
the peripheral itself may detect an over/underrun condition of its internal
buffer and data might be lost.
That's why in case the FIFO error flag is set, we check if the channel is
disabled or not, and if a Transfer Complete flag is set, which means that
the channel is disabled because of the end of transfer.
Because channel is disabled by hardware either by a FIFO level error, or by
an end of transfer.
The reason for the crash we found is, bam_dma_irq() was returning
negative value when the device resumes in some conditions.
In addition, the irq handler should have one of the below return values.
IRQ_NONE interrupt was not from this device or was not handled
IRQ_HANDLED interrupt was handled by this device
IRQ_WAKE_THREAD handler requests to wake the handler thread
Therefore, to resolve this crash, we have changed the return value to
IRQ_NONE.
Dave Jiang [Tue, 17 Nov 2020 20:39:14 +0000 (13:39 -0700)]
dmaengine: idxd: add IAX configuration support in the IDXD driver
Add support to allow configuration of Intel Analytics Accelerator (IAX) in
addition to the Intel Data Streaming Accelerator (DSA). The IAX hardware
has the same configuration interface as DSA. The main difference
is the type of operations it performs. We can support the DSA and
IAX devices on the same driver with some tweaks.
IAX has a 64B completion record that needs to be 64B aligned, as opposed to
a 32B completion record that is 32B aligned for DSA. IAX also does not
support token management.
Update the kerneldoc function headers to fix build warnings:
drivers/dma/qcom/qcom_adm.c:180: warning: Function parameter or member 'chan' not described in 'adm_free_chan'
drivers/dma/qcom/qcom_adm.c:190: warning: Function parameter or member 'burst' not described in 'adm_get_blksize'
drivers/dma/qcom/qcom_adm.c:466: warning: Function parameter or member 'chan' not described in 'adm_terminate_all'
drivers/dma/qcom/qcom_adm.c:466: warning: Excess function parameter 'achan' description in 'adm_terminate_all'
drivers/dma/qcom/qcom_adm.c:503: warning: Function parameter or member 'achan' not described in 'adm_start_dma'
Dave Jiang [Fri, 13 Nov 2020 22:55:05 +0000 (15:55 -0700)]
dmaengine: idxd: add ATS disable knob for work queues
With the DSA spec 1.1 update, a knob to disable ATS for individually is
introduced. Add enabling code to allow a system admin to make the
configuration through sysfs.
dmaengine: ti: drop of_match_ptr and mark of_device_id table as maybe unused
The driver can match only via the DT table so the main table should be
always used and the of_match_ptr does not have any sense (this also
allows ACPI matching via PRP0001, even though it is not relevant here).
The secondary match of_device_id tables (passed to of_match_node) should
be marked as maybe unused to fix compile testing (!CONFIG_OF on x86_64)
warnings:
drivers/dma/ti/dma-crossbar.c:125:34: warning:
‘ti_am335x_master_match’ defined but not used [-Wunused-const-variable=]
drivers/dma/ti/dma-crossbar.c:22:34: warning:
‘ti_dma_xbar_match’ defined but not used [-Wunused-const-variable=]
dmaengine: stm32: mark of_device_id table as maybe unused
The driver uses a second of_device_id table in the probe()
function by passing it to of_match_node(). This code will be a no-op
for compile testing (!CONFIG_OF on x86_64):
drivers/dma/stm32-dmamux.c:171:34: warning:
‘stm32_stm32dma_master_match’ defined but not used [-Wunused-const-variable=]
dmaengine: sf: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here). This fixes
compile warning (!CONFIG_OF on x86_64):
drivers/dma/sf-pdma/sf-pdma.c:576:34: warning:
‘sf_pdma_dt_ids’ defined but not used [-Wunused-const-variable=]
dmaengine: mv_xor: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here). This fixes
compile warning (!CONFIG_OF on x86_64):
drivers/dma/mv_xor.c:1281:34: warning:
‘mv_xor_dt_ids’ defined but not used [-Wunused-const-variable=]
dmaengine: dw-axi-dmac: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here). This fixes
compile warning (!CONFIG_OF on x86_64):
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c:984:34: warning:
‘dw_dma_of_id_table’ defined but not used [-Wunused-const-variable=]
dmaengine: jz4780: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it is not relevant here). This fixes
compile warning (!CONFIG_OF on x86_64):
drivers/dma/dma-jz4780.c:1031:34: warning:
‘jz4780_dma_dt_match’ defined but not used [-Wunused-const-variable=]
Vinod Koul [Mon, 9 Nov 2020 08:54:50 +0000 (14:24 +0530)]
dmaengine: qcom: Add GPI dma driver
This controller provides DMAengine capabilities for a variety of peripheral
buses such as I2C, UART, and SPI. By using GPI dmaengine driver, bus
drivers can use a standardize interface that is protocol independent to
transfer data between memory and peripheral.
Vinod Koul [Mon, 9 Nov 2020 08:54:49 +0000 (14:24 +0530)]
dmaengine: add peripheral configuration
Some complex dmaengine controllers have capability to program the
peripheral device, so pass on the peripheral configuration as part of
dma_slave_config
Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
controller found in the MSM8x60 and IPQ/APQ8064 platforms.
The ADM supports both memory to memory transactions and memory
to/from peripheral device transactions. The controller also provides
flow control capabilities for transactions to/from peripheral devices.
The initial release of this driver supports slave transfers to/from
peripherals and also incorporates CRCI (client rate control interface)
flow control.
The hardware only supports a 32 bit physical address, so specifying
!PHYS_ADDR_T_64BIT gives maximum COMPILE_TEST coverage without having to
spend effort on kludging things in the code that will never actually be
needed on real hardware.
Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Thomas Pedersen <twp@codeaurora.org> Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/20201114140233.GM32650@earth.li Signed-off-by: Vinod Koul <vkoul@kernel.org>
Zhang Qilong [Sun, 22 Nov 2020 03:22:37 +0000 (19:22 -0800)]
soc: ti: Fix reference imbalance in knav_dma_probe
The patch fix two reference leak.
1) pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to call put operation will result in
reference leak.
2) The pm_runtime_enable will increase power disable depth. Thus
a pairing decrement is needed on the error handling path to
keep it balanced.
We fix it by: 1) adding call pm_runtime_put_noidle or
pm_runtime_put_sync in error handling. 2) adding pm_runtime_disable
in error handling, to keep usage counter and disable depth balanced.
soc: ti: pruss: Remove wrong check against *get_match_data return value
Since the of_device_get_match_data() doesn't return error code, remove
wrong IS_ERR test. Proper check against NULL pointer is already done
later before usage: if (data && data->...).
Additionally, proceeding with empty device data is valid (e.g. in case
of "ti,am3356-pruss").
Nishanth Menon [Sun, 22 Nov 2020 03:22:01 +0000 (19:22 -0800)]
soc: ti: Kconfig: Drop ARM64 SoC specific configs
With the integration of chip-id detection scheme in kernel[1], there
is no specific need to maintain multitudes of SoC specific config
options, discussed as per [2], we have deprecated the usage in other
places for v5.10-rc1. Drop the configuration for the follow on kernel.
Lee Jones [Sun, 22 Nov 2020 03:22:01 +0000 (19:22 -0800)]
soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout
Fixes the following W=1 kernel build warning(s):
drivers/soc/ti/wkup_m3_ipc.c:227: warning: Function parameter or member 'm3_ipc' not described in 'wkup_m3_set_mem_type'
drivers/soc/ti/wkup_m3_ipc.c:236: warning: Function parameter or member 'm3_ipc' not described in 'wkup_m3_set_resume_address'
drivers/soc/ti/wkup_m3_ipc.c:248: warning: Function parameter or member 'm3_ipc' not described in 'wkup_m3_request_pm_status'
drivers/soc/ti/wkup_m3_ipc.c:268: warning: Function parameter or member 'm3_ipc' not described in 'wkup_m3_prepare_low_power'
drivers/soc/ti/wkup_m3_ipc.c:322: warning: Function parameter or member 'm3_ipc' not described in 'wkup_m3_finish_low_power'
drivers/soc/ti/wkup_m3_ipc.c:369: warning: Function parameter or member 'm3_ipc' not described in 'wkup_m3_set_rtc_only'
drivers/soc/ti/wkup_m3_ipc.c:369: warning: Excess function parameter 'wkup_m3_wakeup' description in 'wkup_m3_set_rtc_only'
Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Lee Jones [Sun, 22 Nov 2020 03:22:01 +0000 (19:22 -0800)]
soc: ti: pm33xx: Remove set but unused variable 'ret'
Fixes the following W=1 kernel build warning(s):
drivers/soc/ti/pm33xx.c: In function ‘am33xx_do_sram_idle’:
drivers/soc/ti/pm33xx.c:138:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable]
Cc: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Lee Jones [Sun, 22 Nov 2020 03:22:00 +0000 (19:22 -0800)]
soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues
Fixes the following W=1 kernel build warning(s):
drivers/soc/ti/knav_qmss_queue.c:528: warning: Function parameter or member 'flags' not described in 'knav_queue_open'
drivers/soc/ti/knav_qmss_queue.c:528: warning: Function parameter or member 'id' not described in 'knav_queue_open'
drivers/soc/ti/knav_qmss_queue.c:528: warning: Function parameter or member 'name' not described in 'knav_queue_open'
drivers/soc/ti/knav_qmss_queue.c:551: warning: Excess function parameter 'qh' description in 'knav_queue_close'
drivers/soc/ti/knav_qmss_queue.c:551: warning: Function parameter or member 'qhandle' not described in 'knav_queue_close'
drivers/soc/ti/knav_qmss_queue.c:583: warning: Excess function parameter 'qh' description in 'knav_queue_device_control'
drivers/soc/ti/knav_qmss_queue.c:583: warning: Function parameter or member 'arg' not described in 'knav_queue_device_control'
drivers/soc/ti/knav_qmss_queue.c:583: warning: Function parameter or member 'cmd' not described in 'knav_queue_device_control'
drivers/soc/ti/knav_qmss_queue.c:583: warning: Function parameter or member 'qhandle' not described in 'knav_queue_device_control'
drivers/soc/ti/knav_qmss_queue.c:635: warning: Excess function parameter 'data' description in 'knav_queue_push'
drivers/soc/ti/knav_qmss_queue.c:635: warning: Excess function parameter 'qh' description in 'knav_queue_push'
drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'dma' not described in 'knav_queue_push'
drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'flags' not described in 'knav_queue_push'
drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'qhandle' not described in 'knav_queue_push'
drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'size' not described in 'knav_queue_push'
drivers/soc/ti/knav_qmss_queue.c:655: warning: Excess function parameter 'qh' description in 'knav_queue_pop'
drivers/soc/ti/knav_qmss_queue.c:655: warning: Function parameter or member 'qhandle' not described in 'knav_queue_pop'
drivers/soc/ti/knav_qmss_queue.c:655: warning: Function parameter or member 'size' not described in 'knav_queue_pop'
drivers/soc/ti/knav_qmss_queue.c:759: warning: Function parameter or member 'name' not described in 'knav_pool_create'
drivers/soc/ti/knav_qmss_queue.c:759: warning: Function parameter or member 'num_desc' not described in 'knav_pool_create'
drivers/soc/ti/knav_qmss_queue.c:759: warning: Function parameter or member 'region_id' not described in 'knav_pool_create'
drivers/soc/ti/knav_qmss_queue.c:862: warning: Excess function parameter 'pool' description in 'knav_pool_destroy'
drivers/soc/ti/knav_qmss_queue.c:862: warning: Function parameter or member 'ph' not described in 'knav_pool_destroy'
drivers/soc/ti/knav_qmss_queue.c:892: warning: Excess function parameter 'pool' description in 'knav_pool_desc_get'
drivers/soc/ti/knav_qmss_queue.c:892: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_get'
drivers/soc/ti/knav_qmss_queue.c:911: warning: Excess function parameter 'pool' description in 'knav_pool_desc_put'
drivers/soc/ti/knav_qmss_queue.c:911: warning: Function parameter or member 'desc' not described in 'knav_pool_desc_put'
drivers/soc/ti/knav_qmss_queue.c:911: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_put'
drivers/soc/ti/knav_qmss_queue.c:931: warning: Excess function parameter 'pool' description in 'knav_pool_desc_map'
drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'desc' not described in 'knav_pool_desc_map'
drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'dma' not described in 'knav_pool_desc_map'
drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'dma_sz' not described in 'knav_pool_desc_map'
drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_map'
drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'size' not described in 'knav_pool_desc_map'
drivers/soc/ti/knav_qmss_queue.c:956: warning: Excess function parameter 'pool' description in 'knav_pool_desc_unmap'
drivers/soc/ti/knav_qmss_queue.c:956: warning: Function parameter or member 'dma' not described in 'knav_pool_desc_unmap'
drivers/soc/ti/knav_qmss_queue.c:956: warning: Function parameter or member 'dma_sz' not described in 'knav_pool_desc_unmap'
drivers/soc/ti/knav_qmss_queue.c:956: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_unmap'
drivers/soc/ti/knav_qmss_queue.c:975: warning: Excess function parameter 'pool' description in 'knav_pool_count'
drivers/soc/ti/knav_qmss_queue.c:975: warning: Function parameter or member 'ph' not described in 'knav_pool_count'
Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Sandeep Nair <sandeep_n@ti.com> Cc: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Lee Jones [Sun, 22 Nov 2020 03:22:00 +0000 (19:22 -0800)]
soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'
Fixes the following W=1 kernel build warning(s):
drivers/soc/ti/knav_qmss_queue.c: In function ‘knav_setup_queue_pools’:
drivers/soc/ti/knav_qmss_queue.c:1310:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable]
Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Sandeep Nair <sandeep_n@ti.com> Cc: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Tony Lindgren [Sun, 22 Nov 2020 03:22:00 +0000 (19:22 -0800)]
soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
If a rstctrl reset bit is already deasserted, we can just bail out early
not wait for rstst to clear. Otherwise we can have deassert fail for
already deasserted resets.
Fixes: c5117a78dd88 ("soc: ti: omap-prm: poll for reset complete during de-assert") Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Zhang Qilong [Sun, 22 Nov 2020 03:22:00 +0000 (19:22 -0800)]
soc: ti: knav_qmss: fix reference leak in knav_queue_probe
pm_runtime_get_sync will increment pm usage counter even it
failed. Forgetting to pm_runtime_put_noidle will result in
reference leak in knav_queue_probe, so we should fix it.
Barry Song [Tue, 27 Oct 2020 21:52:52 +0000 (10:52 +1300)]
dmaengine: pxa_dma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Link: https://lore.kernel.org/r/20201027215252.25820-11-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Barry Song [Tue, 27 Oct 2020 21:52:51 +0000 (10:52 +1300)]
dmaengine: ste_dma40: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:50 +0000 (10:52 +1300)]
dmaengine: moxart-dma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:49 +0000 (10:52 +1300)]
dmaengine: hisi_dma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:48 +0000 (10:52 +1300)]
dmaengine: k3dma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:47 +0000 (10:52 +1300)]
dmaengine: milbeaut-xdmac: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:46 +0000 (10:52 +1300)]
dmaengine: tegra210-adma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Link: https://lore.kernel.org/r/20201027215252.25820-5-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Barry Song [Tue, 27 Oct 2020 21:52:45 +0000 (10:52 +1300)]
dmaengine: sf-pdma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:44 +0000 (10:52 +1300)]
dmaengine: ti: k3-udma: remove redundant irqsave and irqrestore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
Barry Song [Tue, 27 Oct 2020 21:52:43 +0000 (10:52 +1300)]
dmaengine: ipu_idmac: remove redundant irqsave and restore in hardIRQ
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled
IRQ. This patch removes the irqsave and irqstore to save some instruction
cycles.
dmaengine: ti: k3-udma-glue: move psi-l pairing in channel en/dis functions
The NAVSS UDMA will stuck if target IP module is disabled by PM while PSI-L
threads are paired UDMA<->IP and no further transfers is possible. This
could be the case for IPs J721E Main CPSW (cpsw9g).
Hence, to avoid such situation do PSI-L threads pairing only when UDMA
channel is going to be enabled as at this time DMA consumer module expected
to be active already.
Andy Shevchenko [Tue, 3 Nov 2020 18:39:38 +0000 (20:39 +0200)]
dmaengine: dw: Enable runtime PM
When consumer requests channel power on the DMA controller device
and otherwise on the freeing channel resources.
Note, in some cases consumer acquires channel at the ->probe() stage and
releases it at the ->remove() stage. It will mean that DMA controller device
will be powered during all this time if there is no assist from hardware
to idle it. The above mentioned cases should be investigated separately
and individually.
Peter Ujfalusi [Sun, 25 Oct 2020 19:10:22 +0000 (12:10 -0700)]
soc: ti: k3-ringacc: Use correct device for allocation in RING mode
In RING mode the ringacc does not access the ring memory. In this access
mode the ringacc coherency does not have meaning.
If the ring is configured in RING mode, then the ringacc itself will not
access to the ring memory. Only the requester (user) of the ring is going
to read/write to the memory.
Extend the ring configuration parameters with a device pointer to be used
for DMA API when the ring is configured in RING mode.
Extending the ring configuration struct will allow per ring selection of
device to be used for allocation, thus allowing per ring coherency.
To avoid regression, fall back to use the ringacc dev in case the alloc_dev
is not provided.
Peter Ujfalusi [Sun, 25 Oct 2020 19:10:06 +0000 (12:10 -0700)]
firmware: ti_sci: rm: Add new ops for ring configuration
The sysfw ring configuration message has been extended to include virtid
and asel value for the ring.
Add the ASEL_VALID to TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER as it is required
for DMA rings.
Instead of extending the current .config() ops - which would need same
patch change in the ringacc driver - add ti_sci_msg_rm_ring_cfg struct and
a new ops using it to configure the ring.
This will allow easy update path in case new members are added for the ring
configuration.
Peter Ujfalusi [Sun, 25 Oct 2020 19:10:05 +0000 (12:10 -0700)]
firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
Sysfw added 'extended_ch_type' to the tx_ch_cfg_req message which should be
used when BCDMA block copy channels are configured:
extended_ch_type = 0 : the channel is split tx channel (tchan)
extended_ch_type = 1 : the channel is block copy channel (bchan)
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Peter Ujfalusi [Sun, 25 Oct 2020 19:10:02 +0000 (12:10 -0700)]
firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channel
The system controller's resource manager have support for configuring the
TDTYPE of TCHAN_CFG register on j721e.
With this parameter the teardown completion can be controlled:
TDTYPE == 0: Return without waiting for peer to complete the teardown
TDTYPE == 1: Wait for peer to complete the teardown
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Dave Jiang [Tue, 27 Oct 2020 17:34:40 +0000 (10:34 -0700)]
dmaengine: idxd: Clean up descriptors with fault error
Add code to "complete" a descriptor when the descriptor or its completion
address hit a fault error when SVA mode is being used. This error can be
triggered due to bad programming by the user. A lock is introduced in order
to protect the descriptor completion lists since the fault handler will run
from the system work queue after being scheduled in the interrupt handler.
Dave Jiang [Tue, 27 Oct 2020 17:34:35 +0000 (10:34 -0700)]
dmaengine: idxd: Add shared workqueue support
Add shared workqueue support that includes the support of Shared Virtual
memory (SVM) or in similar terms On Demand Paging (ODP). The shared
workqueue uses the enqcmds command in kernel and will respond with retry if
the workqueue is full. Shared workqueue only works when there is PASID
support from the IOMMU.
dmaengine: ppc4xx: remove xor_hw_desc assignment without reading
The xor_hw_desc local variable is assigned but never read:
drivers/dma/ppc4xx/adma.c: In function ‘ppc440spe_desc_set_src_mult’:
drivers/dma/ppc4xx/adma.c:562:17: warning: variable ‘xor_hw_desc’ set but not used [-Wunused-but-set-variable]
Eugen Hristev [Fri, 16 Oct 2020 09:39:18 +0000 (12:39 +0300)]
dmaengine: at_xdmac: add AXI priority support and recommended settings
The sama7g5 version of the XDMAC supports priority configuration and
outstanding capabilities.
Add defines for the specific registers for this configuration, together
with recommended settings.
However the settings are very different if the XDMAC is a mem2mem or a
per2mem controller.
Thus, we need to differentiate according to device tree property.
Eugen Hristev [Fri, 16 Oct 2020 09:38:50 +0000 (12:38 +0300)]
dmaengine: at_xdmac: add support for sama7g5 based at_xdmac
SAMA7G5 SoC uses a slightly different variant of the AT_XDMAC.
Added support by a new compatible and a layout struct that copes
to the specific version considering the compatible string.
Only the differences in register map are present in the layout struct.
I reworked the register access for this part that has the differences.
Also the Source/Destination Interface bits are no longer valid for this
variant of the XDMAC. Thus, the layout also has a bool for specifying
whether these bits are required or not.
Eugen Hristev [Fri, 16 Oct 2020 09:37:25 +0000 (12:37 +0300)]
dmaengine: at_xdmac: adapt perid for mem2mem operations
The PERID in the CC register for mem2mem operations must match an unused
PERID.
The PERID field is 7 bits, but the selected value is 0x3f.
On later products we can have more reserved PERIDs for actual peripherals,
thus this needs to be increased to maximum size.
Changing the value to 0x7f, which is the maximum for 7 bits field.
DSA spec v1.1 [1] updated to include a stride size register for WQ
configuration that will specify how much space is reserved for the WQ
configuration register set. This change is expected to be in the final
gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ
offset calculation and fixup WQCFG_OFFSET() to use the new calculated
wq size.
Joe Perches [Thu, 22 Oct 2020 02:36:07 +0000 (19:36 -0700)]
treewide: Convert macro and uses of __section(foo) to __section("foo")
Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.
Remove the quote operator # from compiler_attributes.h __section macro.
Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.
projects / thirdparty / kernel / linux.git / log
