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6 years agoPR libstdc++/85965 move is_invocable assertions again
redi [Fri, 17 May 2019 14:13:32 +0000 (14:13 +0000)] 
PR libstdc++/85965 move is_invocable assertions again

This is another attempt to reduce how often the assertions are
evaluated, so that code which doesn't try to use the function objects
doesn't need them to be invocable.

For _Rb_tree we access the _M_key_compare object directly, so can't put
the assertions in an accessor function for it. However, every invocation
of _M_key_compare is accompanied by a use of _S_key, so the assertions
can be put in there.  For _Hashtable there are member functions that are
consistently used to obtain a hash code or test for equality, so the
assertions can go in those members.

PR libstdc++/85965
* include/bits/hashtable.h (_Hashtable::~_Hashtable()): Remove static
assertions from the destructor.
* include/bits/hashtable_policy.h (_Hash_code_base::_M_hash_code):
Move static_assert for hash function to here.
(_Hash_table_base::_M_equals): Move static_assert for equality
predicate to here.
* include/bits/stl_tree.h (_Rb_tree::_S_value(_Const_Link_type)):
Remove.
(_Rb_tree::_S_key(_Const_Link_type)): Move assertions here. Access
the value directly instead of calling _S_value.
(_Rb_tree::_S_value(_Const_Base_ptr)): Remove.
(_Rb_tree::_S_key(_Const_Base_ptr)): Do downcast and forward to
_S_key(_Const_Link_type).
* testsuite/23_containers/set/85965.cc: Check construction,
destruction, assignment and size() do not trigger the assertions.
* testsuite/23_containers/unordered_set/85965.cc: Likewise.
* testsuite/23_containers/map/48101_neg.cc: Call find and adjust
expected errors.
* testsuite/23_containers/multimap/48101_neg.cc: Likewise.
* testsuite/23_containers/multiset/48101_neg.cc: Likewise.
* testsuite/23_containers/set/48101_neg.cc: Likewise.
* testsuite/23_containers/unordered_map/48101_neg.cc: Likewise.
* testsuite/23_containers/unordered_multimap/48101_neg.cc: Likewise.
* testsuite/23_containers/unordered_multiset/48101_neg.cc: Likewise.
* testsuite/23_containers/unordered_set/48101_neg.cc: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271323 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago compiler: use SHA1-hash for symname for long gcbits symbols
ian [Fri, 17 May 2019 13:48:18 +0000 (13:48 +0000)] 
compiler: use SHA1-hash for symname for long gcbits symbols

    The current scheme used by the compiler for "gcbits" symbols involves
    generating a symbol name based on a 32-char encoding of the bits data.
    This scheme works well in most cases but can generate very long symbol
    names in rare cases. To help avoid such long symbol names, switch to a
    different encoding scheme based on the SHA1 digest of the payload if
    the symbol size would be too large.

    Fixes golang/go#32083.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/177598

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271322 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoS/390: Fix larl/PIC test case.
rdapp [Fri, 17 May 2019 12:18:09 +0000 (12:18 +0000)] 
S/390: Fix larl/PIC test case.

This patch adds -march=z900 to a test case that expects larl for loading
a value via the GOT.  On z10 and later, lgrl is used which is tested in
a new, separate test case.

gcc/testsuite/ChangeLog:

2019-05-17  Robin Dapp  <rdapp@linux.ibm.com>

  * gcc.target/s390/global-array-element-pic.c: Add -march=z900.
  * gcc.target/s390/global-array-element-pic2.c: New test for z10+.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271321 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-17 Richard Biener <rguenther@suse.de>
rguenth [Fri, 17 May 2019 12:04:21 +0000 (12:04 +0000)] 
2019-05-17  Richard Biener  <rguenther@suse.de>

c/
* gimple-parser.c (c_parser_gimple_statement): Handle __VEC_PERM.
(c_parser_gimple_unary_expression): Likewise.
(c_parser_gimple_parentized_ternary_expression): New function.

* gimple-pretty-print.c (dump_ternary_rhs): Handle dumping
VEC_PERM_EXPR as __VEC_PERM with -gimple.

* gcc.dg/gimplefe-41.c: New testcase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271320 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR tree-optimization/90106
junma [Fri, 17 May 2019 10:13:29 +0000 (10:13 +0000)] 
PR tree-optimization/90106
* gcc.dg/cdce3.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271319 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoS/390: Fix vec_sldw builtin
krebbel [Fri, 17 May 2019 10:08:13 +0000 (10:08 +0000)] 
S/390: Fix vec_sldw builtin

The builtin was wired up to the wrong pattern.  Fixed with this patch.

gcc/ChangeLog:

2019-05-17  Andreas Krebbel  <krebbel@linux.ibm.com>

* config/s390/s390-builtins.def (s390_vec_sldw_*): Use the
vec_sldw insn pattern.

gcc/testsuite/ChangeLog:

2019-05-17  Andreas Krebbel  <krebbel@linux.ibm.com>

* gcc.target/s390/zvector/vec-sldw.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271318 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoFix __invoke_r<void> to be valid in C++11
redi [Fri, 17 May 2019 09:28:17 +0000 (09:28 +0000)] 
Fix __invoke_r<void> to be valid in C++11

* include/bits/invoke.h [__cplusplus < 201703L] (__invoke_r<void>):
Use _GLIBCXX14_CONSTEXPR because void functions cannot be constexpr
in C++11.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271317 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoAdd missing piece of P0777R1 and update C++20 status docs
redi [Fri, 17 May 2019 09:28:13 +0000 (09:28 +0000)] 
Add missing piece of P0777R1 and update C++20 status docs

* doc/xml/manual/status_cxx2020.xml: Update P0608R3, P0777R1, and
P1165R1 entries.
* doc/html/*: Regenerate.
* include/std/tuple (make_from_tuple): Use remove_reference_t instead
of decay_t (P0777R1).

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271316 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-17 Richard Biener <rguenther@suse.de>
rguenth [Fri, 17 May 2019 08:15:46 +0000 (08:15 +0000)] 
2019-05-17  Richard Biener  <rguenther@suse.de>

* ccmp.c (expand_ccmp_expr_1): Do not use gimple_assign_rhs_to_tree.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271315 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoHandle a location with NULL as a file (PR driver/90496)
marxin [Fri, 17 May 2019 07:24:28 +0000 (07:24 +0000)] 
Handle a location with NULL as a file (PR driver/90496)

2019-05-17  Martin Liska  <mliska@suse.cz>

PR driver/90496
* toplev.c (output_stack_usage): With LTO and sanitizer it
happens that a global ctor (_GLOBAL__sub_I_00099_0_main)
has no file location.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271313 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoHandle a location with NULL as a file (PR driver/90495)
marxin [Fri, 17 May 2019 07:22:00 +0000 (07:22 +0000)] 
Handle a location with NULL as a file (PR driver/90495)

2019-05-17  Martin Liska  <mliska@suse.cz>

PR driver/90495
* toplev.c (output_stack_usage): With LTO and sanitizer it
happens that a global ctor (_GLOBAL__sub_I_00099_0_main)
has no file location.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271312 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoRemove a test-case that leads to a huge stack (and file) allocation (PR middle-end...
marxin [Fri, 17 May 2019 07:21:46 +0000 (07:21 +0000)] 
Remove a test-case that leads to a huge stack (and file) allocation (PR middle-end/90478).

2019-05-17  Martin Liska  <mliska@suse.cz>

PR middle-end/90478
* gcc.dg/tree-ssa/pr90478-2.c: Remove.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271311 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR go/90482
ian [Fri, 17 May 2019 05:49:22 +0000 (05:49 +0000)] 
PR go/90482
    compiler: make value method of direct interface type takes pointer

    Currently, a value method of a direct interface type takes the
    value of the receiver, which is pointer shaped, as the first
    parameter. When this method is called through interface, we
    actually pass the interface data as a pointer. On most platforms
    this is ok, as the underlying calling convention is the same,
    except that on SPARC32, the calling convention is actually
    different.

    This CL changes the method function actually takes a pointer.
    The function will convert the pointer to the pointer-shaped
    receiver type (a no-op conversion from machine code's aspect).
    For a direct call, in the caller we convert the receiver to a
    pointer (also no-op conversion) before invoking the method. For
    an interface call, we pass the pointer as before. This way, it is
    consistent that we always pass a pointer.

    Hopefully this fixes SPARC32 build and https://gcc.gnu.org/PR90482.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/177758

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271310 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-17 François Dumont <fdumont@gcc.gnu.org>
fdumont [Fri, 17 May 2019 04:55:37 +0000 (04:55 +0000)] 
2019-05-17  François Dumont  <fdumont@gcc.gnu.org>

Move from state of allocators (LWG2593)
* include/bits/stl_deque.h
(_Deque_base(_Deque_base&&, false_type)): Remove.
(_Deque_base(_Deque_base&&, true_type)): Remove.
(_Deque_base(_Deque_base&&)): Adapt.
(_Deque_base::_M_move_impl()): Remove.
* testsuite/util/testsuite_allocator.h
(propagating_allocator(propagating_allocator&&)): Preserve move from
state.
* testsuite/23_containers/deque/allocator/move_assign.cc (test02):
Adapt.
* testsuite/23_containers/forward_list/allocator/move_assign.cc (test02):
Adapt.
* testsuite/23_containers/list/allocator/move_assign.cc (test02): Adapt.
* testsuite/23_containers/map/allocator/move_assign.cc (test02): Adapt.
* testsuite/23_containers/multimap/allocator/move_assign.cc (test02):
Adapt.
* testsuite/23_containers/multiset/allocator/move_assign.cc (test02):
Adapt.
* testsuite/23_containers/set/allocator/move_assign.cc (test02): Adapt.
* testsuite/23_containers/unordered_map/allocator/move_assign.cc
(test02): Adapt.
* testsuite/23_containers/unordered_multimap/allocator/move_assign.cc
(test02): Adapt.
* testsuite/23_containers/unordered_multiset/allocator/move_assign.cc
(test02): Adapt.
* testsuite/23_containers/unordered_set/allocator/move_assign.cc
(test02): Adapt.
* testsuite/23_containers/vector/allocator/move_assign.cc (test02):
Adapt.
* testsuite/23_containers/vector/bool/allocator/move_assign.cc (test02):
Adapt.
* testsuite/21_strings/basic_string/allocator/char/move_assign.cc
(test02): Adapt.
* testsuite/21_strings/basic_string/allocator/wchar_t/move_assign.cc
(test02): Adapt.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271309 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago compiler: intrinsify runtime/internal/atomic functions
ian [Fri, 17 May 2019 00:21:22 +0000 (00:21 +0000)] 
compiler: intrinsify runtime/internal/atomic functions

    Currently runtime/internal/atomic functions are implemented in C
    using C compiler intrinsics. This CL lets the Go frontend
    recognize these functions and turn them into intrinsics directly.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/176918

* go-gcc.cc (Gcc_backend::Gcc_backend): Define atomic builtins.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271308 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoDaily bump.
gccadmin [Fri, 17 May 2019 00:16:16 +0000 (00:16 +0000)] 
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271307 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago compiler: add intrinsics for runtime/internal/sys functions
ian [Thu, 16 May 2019 23:23:58 +0000 (23:23 +0000)] 
compiler: add intrinsics for runtime/internal/sys functions

    runtime/internal/sys.Ctz32/64 and Bswap32/64 are currently
    implemented with compiler builtin functions. But if they are
    called from another package, the compiler does not know and
    therefore cannot turn them into compiler intrinsics. This CL
    makes the compiler recognize these functions and turn them into
    intrinsics directly, as the gc compiler does.

    This CL sets up a way for adding intrinsics in the compiler.
    More intrinsics will be added in later CLs.

    Also move the handling of runtime.getcallerpc/sp to the new way
    of generating intrinsics.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/176917

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271303 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoRemove incorrect assertion from filesystem::absolute
redi [Thu, 16 May 2019 22:52:10 +0000 (22:52 +0000)] 
Remove incorrect assertion from filesystem::absolute

The assertion is wrong, it should be *s.end() == 0, but that's not
allowed. Just remove it, but keep the comment.

* src/c++17/fs_ops.cc (absolute(const path&, error_code&))
[_GLIBCXX_FILESYSTEM_IS_WINDOWS]: Remove bogus assertion.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271300 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR c++/90484
jakub [Thu, 16 May 2019 21:45:34 +0000 (21:45 +0000)] 
PR c++/90484
* tree-ssa-scopedtables.c (equal_mem_array_ref_p): Don't assert that
sz0 is equal to sz1, instead return false in that case.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271299 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago * omp-low.c (lower_rec_input_clauses): If OMP_CLAUSE_IF
jakub [Thu, 16 May 2019 21:44:40 +0000 (21:44 +0000)] 
* omp-low.c (lower_rec_input_clauses): If OMP_CLAUSE_IF
has non-constant expression, force sctx.lane and use two
argument IFN_GOMP_SIMD_LANE instead of single argument.
* tree-ssa-dce.c (eliminate_unnecessary_stmts): Don't DCE
two argument IFN_GOMP_SIMD_LANE without lhs.
* tree-vectorizer.h (struct _loop_vec_info): Add simd_if_cond
member.
(LOOP_VINFO_SIMD_IF_COND, LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND):
Define.
(LOOP_REQUIRES_VERSIONING): Or in
LOOP_REQUIRES_VERSIONING_FOR_SIMD_IF_COND.
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
simd_if_cond.
(vect_analyze_loop_2): Punt if LOOP_VINFO_SIMD_IF_COND is constant 0.
* tree-vect-loop-manip.c (vect_loop_versioning): Add runtime check
from simd if clause if needed.

* gcc.dg/vect/vect-simd-1.c: New test.
* gcc.dg/vect/vect-simd-2.c: New test.
* gcc.dg/vect/vect-simd-3.c: New test.
* gcc.dg/vect/vect-simd-4.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271298 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoImplement sane variant converting constructor (P0608R3)
redi [Thu, 16 May 2019 20:30:35 +0000 (20:30 +0000)] 
Implement sane variant converting constructor (P0608R3)

* include/std/variant (__overload_set): Remove.
(_Arr): New helper.
(_Build_FUN): New class template to define a single FUN overload,
with specializations to prevent unwanted conversions, as per P0608R3.
(_Build_FUNs): New class template to build an overload set of FUN.
(_FUN_type): New alias template to perform overload resolution.
(__accepted_type): Use integer_constant base for failure case. Use
_FUN_type for successful case.
(variant::__accepted_index): Use _Tp instead of _Tp&&.
(variant::variant(_Tp&&)): Likewise.
(variant::operator=(_Tp&&)): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271296 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoChanges to std::variant to reduce code size
redi [Thu, 16 May 2019 20:30:27 +0000 (20:30 +0000)] 
Changes to std::variant to reduce code size

* include/std/variant (_Variant_storage<false, _Types...>::_M_reset):
Replace raw visitation with a runtime check for the valueless state
and a non-raw visitor.
(_Variant_storage<false, _Types...>::_M_reset_impl): Remove.
(variant::index()): Remove branch.
(variant::swap(variant&)): Use valueless_by_exception() instead of
comparing the index to variant_npos, and add likelihood attribute.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271295 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-16 Richard Biener <rguenther@suse.de>
rguenth [Thu, 16 May 2019 19:06:55 +0000 (19:06 +0000)] 
2019-05-16  Richard Biener  <rguenther@suse.de>

* tree-affine.c (expr_to_aff_combination): New function split
out from...
(tree_to_aff_combination): ... here.
(aff_combination_expand): Avoid building a GENERIC tree.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271294 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agogcc: move assemble_start_function / assemble_end_function to output_mi_thunk
jcmvbkbc [Thu, 16 May 2019 17:38:29 +0000 (17:38 +0000)] 
gcc: move assemble_start_function / assemble_end_function to output_mi_thunk

Let backends call assemble_start_function after they have generated
thunk function body so that a constant pool could be output if it is
required. This may help backends to avoid implementing custom constant
loading code specifically for the MI thunk and reuse existing
functionality.

gcc/
2019-05-16  Max Filippov  <jcmvbkbc@gmail.com>

* cgraphunit.c (cgraph_node::expand_thunk): Remove
assemble_start_function and assemble_end_function calls.
* config/alpha/alpha.c (alpha_output_mi_thunk_osf): Call
assemble_start_function and assemble_end_function.
* config/arc/arc.c (arc_output_mi_thunk): Likewise.
* config/arm/arm.c (arm_output_mi_thunk): Likewise.
* config/bfin/bfin.c (bfin_output_mi_thunk): Likewise.
* config/c6x/c6x.c (c6x_output_mi_thunk): Likewise.
* config/cris/cris.c (cris_asm_output_mi_thunk): Likewise.
* config/csky/csky.c (csky_output_mi_thunk): Likewise.
* config/epiphany/epiphany.c (epiphany_output_mi_thunk): Likewise.
* config/frv/frv.c (frv_asm_output_mi_thunk): Likewise.
* config/i386/i386.c (x86_output_mi_thunk): Likewise.
* config/ia64/ia64.c (ia64_output_mi_thunk): Likewise.
* config/m68k/m68k.c (m68k_output_mi_thunk): Likewise.
* config/microblaze/microblaze.c (microblaze_asm_output_mi_thunk):
Likewise.
* config/mips/mips.c (mips_output_mi_thunk): Likewise.
* config/mmix/mmix.c (mmix_asm_output_mi_thunk): Likewise.
* config/mn10300/mn10300.c (mn10300_asm_output_mi_thunk): Likewise.
* config/nds32/nds32.c (nds32_asm_output_mi_thunk): Likewise.
* config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise.
* config/or1k/or1k.c (or1k_output_mi_thunk): Likewise.
* config/pa/pa.c (pa_asm_output_mi_thunk): Likewise.
* config/riscv/riscv.c (riscv_output_mi_thunk): Likewise.
* config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise.
* config/s390/s390.c (s390_output_mi_thunk): Likewise.
* config/sh/sh.c (sh_output_mi_thunk): Likewise.
* config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
* config/spu/spu.c (spu_output_mi_thunk): Likewise.
* config/stormy16/stormy16.c (xstormy16_asm_output_mi_thunk):
Likewise.
* config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise.
* config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise.
* config/vax/vax.c (vax_output_mi_thunk): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271293 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago * tree-ssa-alias.c (alias_stats): Add
hubicka [Thu, 16 May 2019 15:33:01 +0000 (15:33 +0000)] 
* tree-ssa-alias.c (alias_stats): Add
aliasing_component_refs_p_may_alias and
aliasing_component_refs_p_no_alias.
(dump_alias_stats): Print aliasing_component_refs_p stats.
(aliasing_component_refs_p): Update stats.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271292 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoReplace _Equal_helper with simpler class template
redi [Thu, 16 May 2019 14:18:50 +0000 (14:18 +0000)] 
Replace _Equal_helper with simpler class template

By defining the new helper inside _Hashtable_base it doesn't need all
the template parameters to be provided, and by making it only
responsible for checking a possibly-cached hash code it only has to do
one thing.  The caller can use the equality predicate itself instead of
duplicating that in the helper template.

* include/bits/hashtable_policy.h (_Equal_helper): Remove.
(_Hashtable_base::_Equal_hash_code): Define new class template.
(_Hashtable_base::_M_equals): Use _Equal_hash_code instead of
_Equal_helper.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271291 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoChange EBO accessors from static to non-static member functions
redi [Thu, 16 May 2019 14:18:45 +0000 (14:18 +0000)] 
Change EBO accessors from static to non-static member functions

* include/bits/hashtable_policy.h (_Hashtable_ebo_helper::_S_get):
Replace with _M_get non-static member function.
(_Hashtable_ebo_helper::_S_cget): Replace with _M_cget non-static
member function.
(_Hash_code_base, _Local_iterator_base, _Hashtable_base):
(_Hashtable_alloc): Adjust to use non-static members of EBO helper.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271290 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoDo not allow target_clones with alias attr (PR lto/90500).
marxin [Thu, 16 May 2019 13:08:48 +0000 (13:08 +0000)] 
Do not allow target_clones with alias attr (PR lto/90500).

2019-05-16  Martin Liska  <mliska@suse.cz>

PR lto/90500
* multiple_target.c (expand_target_clones): Do not allow
target_clones being used with a symbol that is an alias.
2019-05-16  Martin Liska  <mliska@suse.cz>

PR lto/90500
* gcc.target/i386/pr90500-1.c: New test.
* gcc.target/i386/pr90500-2.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271289 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agotree-ssa-uninit: avoid ICE with BIT_AND_EXPR (PR 90394)
amonakov [Thu, 16 May 2019 12:36:33 +0000 (12:36 +0000)] 
tree-ssa-uninit: avoid ICE with BIT_AND_EXPR (PR 90394)

2019-05-16  Vladislav Ivanishin  <vlad@ispras.ru>

PR tree-optimization/90394
* tree-ssa-uninit.c (is_pred_expr_subset_of): Potentially give false
positives rather than ICE for cases where (code2 == NE_EXPR
&& code1 == BIT_AND_EXPR).

testsuite/
* gcc.dg/uninit-pr90394-1-gimple.c: New test.
* gcc.dg/uninit-pr90394.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271287 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoRemove unnecessary non-const accessors in hash table bases
redi [Thu, 16 May 2019 10:04:50 +0000 (10:04 +0000)] 
Remove unnecessary non-const accessors in hash table bases

The const accessors are OK (and arguably more correct) for most callers
to use. The _M_swap functions that use the non-const overloads can just
directly use the _S_get members of the EBO helpers.

* include/bits/hashtable_policy.h (_Hash_code_base::_M_swap): Use
_S_get accessors for members in EBO helpers.
(_Hash_code_base::_M_extract(), _Hash_code_base::_M_ranged_hash())
(_Hash_code_base::_M_h1(), _Hash_code_base::_M_h2()): Remove non-const
overloads.
(_Hashtable_base::_M_swap): Use _S_get accessors for members in EBO
helpers.
(_Hashtable_base::_M_eq()): Remove non-const overload.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271286 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR fortran/90329
jakub [Thu, 16 May 2019 09:37:43 +0000 (09:37 +0000)] 
PR fortran/90329
* tree-core.h (struct tree_decl_common): Document
decl_nonshareable_flag for PARM_DECLs.
* tree.h (DECL_HIDDEN_STRING_LENGTH): Define.
* calls.c (expand_call): Don't try tail call if caller
has any DECL_HIDDEN_STRING_LENGTH PARM_DECLs that are or might be
passed on the stack and callee needs to pass any arguments on the
stack.
* tree-streamer-in.c (unpack_ts_decl_common_value_fields): Use
else if instead of series of mutually exclusive ifs.  Handle
DECL_HIDDEN_STRING_LENGTH for PARM_DECLs.
* tree-streamer-out.c (pack_ts_decl_common_value_fields): Likewise.

* trans-decl.c (create_function_arglist): Set
DECL_HIDDEN_STRING_LENGTH on hidden string length PARM_DECLs if
len is constant.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271285 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago * lto-streamer.h (LTO_major_version): Bump to 9.
jakub [Thu, 16 May 2019 09:30:41 +0000 (09:30 +0000)] 
* lto-streamer.h (LTO_major_version): Bump to 9.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271284 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-16 Richard Biener <rguenther@suse.de>
rguenth [Thu, 16 May 2019 09:12:53 +0000 (09:12 +0000)] 
2019-05-16  Richard Biener  <rguenther@suse.de>

PR testsuite/90502
* gcc.dg/tree-ssa/vector-6.c: Adjust for half of the
transforms happening earlier now.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271283 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agotestsuite - improve check_effective_target_cet.
iains [Thu, 16 May 2019 08:36:05 +0000 (08:36 +0000)] 
testsuite - improve check_effective_target_cet.

In some cases the test using setssbsy was not enough to
detemine support for the CET insns.  Adding -fcf-protection
explicitly causes other insns to be emitted (e.g. endbr32/64)
which are a more complete check.

2019-05-16  Iain Sandoe  <iain@sandoe.co.uk>

* lib/target-supports.exp (check_effective_target_cet): Add the
-fcf-protection flag to the build conditions.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271282 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR tree-optimization/90106
junma [Thu, 16 May 2019 08:21:17 +0000 (08:21 +0000)] 
PR tree-optimization/90106
* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds): Add
new parameter as new internal function call, also move it to new
basic block.
(use_internal_fn): Pass internal function call to
shrink_wrap_one_built_in_call_with_conds.

gcc/testsuite
* gcc.dg/cdce1.c: Check tailcall code generation after cdce pass.
* gcc.dg/cdce2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271281 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago[RTEMS] Change multilibs for ARM
sh [Thu, 16 May 2019 08:06:31 +0000 (08:06 +0000)] 
[RTEMS] Change multilibs for ARM

Account for Cortex-M3 Errata 602117.  The -mfix-cortex-m3-ldrd option is
enabled by default, if -mcpu=cortex-m3 is used.

gcc/

* config/arm/t-rtems: Replace ARMv7-M multilibs with Cortex-M
multilibs.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271280 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-16 Richard Biener <rguenther@suse.de>
rguenth [Thu, 16 May 2019 08:03:49 +0000 (08:03 +0000)] 
2019-05-16  Richard Biener  <rguenther@suse.de>

PR tree-optimization/90424
* tree-ssa.c (non_rewritable_lvalue_p): Handle inserts from
aligned subvectors.
(execute_update_addresses_taken): Likewise.
* tree-cfg.c (verify_gimple_assign_ternary): Likewise.

* g++.target/i386/pr90424-1.C: New testcase.
* g++.target/i386/pr90424-2.C: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271279 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-16 Richard Biener <rguenther@suse.de>
rguenth [Thu, 16 May 2019 08:01:09 +0000 (08:01 +0000)] 
2019-05-16  Richard Biener  <rguenther@suse.de>

c/
* gimple-parser.c (c_parser_gimple_statement): Handle __BIT_INSERT.
(c_parser_gimple_unary_expression): Likewise.

* gimple-pretty-print.c (dump_ternary_rhs): Dump BIT_INSERT_EXPR
as __BIT_INSERT with -gimple.

* gcc.dg/gimplefe-40.c: Amend again.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271278 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoAdd myself to MAINTAINERS.
junma [Thu, 16 May 2019 07:44:34 +0000 (07:44 +0000)] 
Add myself to MAINTAINERS.

2019-05-16  Jun Ma  <junma@linux.alibaba.com>

* MAINTAINERS (Write After Approval): Add myself.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271277 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago compiler: improve escape analysis on interface conversions
ian [Thu, 16 May 2019 04:35:15 +0000 (04:35 +0000)] 
compiler: improve escape analysis on interface conversions

    If an interface does not escape, it doesn't need a heap
    allocation to hold the data (for non-direct interface type).
    This CL improves the escape analysis to track interface
    conversions, and reduces these allocations.

    Implicit interface conversions were mostly added late in the
    compilation pipeline, after the escape analysis. For the escape
    analysis to see them, we move the introduction of these
    conversions earlier, right before the escape analysis.

    Now that the compiler can generate interface conversions inlined,
    gcc/testsuite/go.test/test/nilptr2.go needs to be adjusted as in
    golang.org/cl/176579, so the use function does an actual use.

    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/176459

* go.test/test/nilptr2.go: Change use function to actually do
something.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271276 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoDaily bump.
gccadmin [Thu, 16 May 2019 00:16:25 +0000 (00:16 +0000)] 
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271275 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR middle-end/90478
jakub [Wed, 15 May 2019 22:43:47 +0000 (22:43 +0000)] 
PR middle-end/90478
* gcc.dg/tree-ssa/pr90478.c: Add empty dg-options.  Use long long type
instead of long.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271271 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago * omp-low.c (lower_rec_input_clauses): For if (0) or simdlen (1) set
jakub [Wed, 15 May 2019 21:42:46 +0000 (21:42 +0000)] 
* omp-low.c (lower_rec_input_clauses): For if (0) or simdlen (1) set
max_vf to 1.
* omp-expand.c (expand_omp_simd): For if (0) or simdlen (1) clear
safelen_int and set loop->dont_vectorize.

* c-c++-common/gomp/simd8.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271270 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago PR debug/90197
jakub [Wed, 15 May 2019 21:41:35 +0000 (21:41 +0000)] 
PR debug/90197
* cp-gimplify.c (genericize_cp_loop): Emit a DEBUG_BEGIN_STMT
before the condition (or if missing or constant non-zero at the end
of the loop.  Emit a DEBUG_BEGIN_STMT before the increment expression
if any.  Don't call protected_set_expr_location on incr if it already
has a location.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271269 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoQualify calls in std::visit and std::visit<R>
redi [Wed, 15 May 2019 21:19:39 +0000 (21:19 +0000)] 
Qualify calls in std::visit and std::visit<R>

* include/std/variant (visit, visit<R>): Qualify calls to __do_visit.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271268 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago CWG 2096 - constraints on literal unions.
mpolacek [Wed, 15 May 2019 20:42:52 +0000 (20:42 +0000)] 
CWG 2096 - constraints on literal unions.
* class.c (check_field_decls): Initialize booleans directly.  A union
is literal if at least one of its non-static data members is of
non-volatile literal type.

* g++.dg/cpp0x/literal-type1.C: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271267 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoRemove translation string markers
jb [Wed, 15 May 2019 19:33:32 +0000 (19:33 +0000)] 
Remove translation string markers

C preprocessor definitions should not be translated.

2019-05-15  Janne Blomqvist  <jb@gcc.gnu.org>

        * parse.c (gfc_parse_file): Remove translation string markers.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271261 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoAllow opening file on multiple units
jb [Wed, 15 May 2019 18:02:36 +0000 (18:02 +0000)] 
Allow opening file on multiple units

As of Fortran 2018 it's allowed to open the same file on multiple
units.

libgfortran/ChangeLog:

2019-05-15  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/90461
        * io/open.c (new_unit): Don't check if the file is already open
for F2018.

testsuite/ChangeLog:

2019-05-15  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/90461
        * gfortran.dg/open_errors_2.f90: Add -std=f2008, adjust line number.
* gfortran.dg/open_errors_3.f90: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271260 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago * config/i386/i386-expand.c (ix86_split_idivmod): Rename
uros [Wed, 15 May 2019 17:59:19 +0000 (17:59 +0000)] 
* config/i386/i386-expand.c (ix86_split_idivmod): Rename
signed_p argument to unsigned_p.  Update all uses for changed polarity.
* config/i386/i386.md (u_bool): Handle DIV and UDIV RTXes.
(divmod splitters): Use u_bool macro in the call to ix86_split_idivmod.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271259 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-15 Paolo Carlini <paolo.carlini@oracle.com>
paolo [Wed, 15 May 2019 17:47:55 +0000 (17:47 +0000)] 
2019-05-15  Paolo Carlini  <paolo.carlini@oracle.com>

* cp-tree.h (REFERENCE_VLA_OK): Remove.
* lambda.c (build_capture_proxy): Remove use of the above.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271258 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Add tests for MMX intrinsic emulations with SSE
hjl [Wed, 15 May 2019 15:39:38 +0000 (15:39 +0000)] 
i386: Add tests for MMX intrinsic emulations with SSE

Test MMX intrinsics with -msse2 in 32-bit mode and -msse2 -mno-mmx in
64-bit mode.

PR target/89021
* gcc.target/i386/mmx-vals.h: New file.
* gcc.target/i386/sse2-mmx-2.c: Likewise.
* gcc.target/i386/sse2-mmx-3.c: Likewise.
* gcc.target/i386/sse2-mmx-4.c: Likewise.
* gcc.target/i386/sse2-mmx-5.c: Likewise.
* gcc.target/i386/sse2-mmx-6.c: Likewise.
* gcc.target/i386/sse2-mmx-7.c: Likewise.
* gcc.target/i386/sse2-mmx-8.c: Likewise.
* gcc.target/i386/sse2-mmx-9.c: Likewise.
* gcc.target/i386/sse2-mmx-10.c: Likewise.
* gcc.target/i386/sse2-mmx-11.c: Likewise.
* gcc.target/i386/sse2-mmx-12.c: Likewise.
* gcc.target/i386/sse2-mmx-13.c: Likewise.
* gcc.target/i386/sse2-mmx-14.c: Likewise.
* gcc.target/i386/sse2-mmx-15.c: Likewise.
* gcc.target/i386/sse2-mmx-16.c: Likewise.
* gcc.target/i386/sse2-mmx-17.c: Likewise.
* gcc.target/i386/sse2-mmx-18a.c: Likewise.
* gcc.target/i386/sse2-mmx-18b.c: Likewise.
* gcc.target/i386/sse2-mmx-18c.c: Likewise.
* gcc.target/i386/sse2-mmx-19a.c: Likewise.
* gcc.target/i386/sse2-mmx-18b.c: Likewise.
* gcc.target/i386/sse2-mmx-19c.c: Likewise.
* gcc.target/i386/sse2-mmx-19d.c: Likewise.
* gcc.target/i386/sse2-mmx-19e.c: Likewise.
* gcc.target/i386/sse2-mmx-20.c: Likewise.
* gcc.target/i386/sse2-mmx-21.c: Likewise.
* gcc.target/i386/sse2-mmx-22.c: Likewise.
* gcc.target/i386/sse2-mmx-cvtpi2ps.c: Likewise.
* gcc.target/i386/sse2-mmx-cvtps2pi.c: Likewise.
* gcc.target/i386/sse2-mmx-cvttps2pi.c: Likewise.
* gcc.target/i386/sse2-mmx-maskmovq.c: Likewise.
* gcc.target/i386/sse2-mmx-packssdw.c: Likewise.
* gcc.target/i386/sse2-mmx-packsswb.c: Likewise.
* gcc.target/i386/sse2-mmx-packuswb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddd.c: Likewise.
* gcc.target/i386/sse2-mmx-paddq.c: Likewise.
* gcc.target/i386/sse2-mmx-paddsb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddsw.c: Likewise.
* gcc.target/i386/sse2-mmx-paddusb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddusw.c: Likewise.
* gcc.target/i386/sse2-mmx-paddw.c: Likewise.
* gcc.target/i386/sse2-mmx-pand.c: Likewise.
* gcc.target/i386/sse2-mmx-pandn.c: Likewise.
* gcc.target/i386/sse2-mmx-pavgb.c: Likewise.
* gcc.target/i386/sse2-mmx-pavgw.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpeqb.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpeqd.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpeqw.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpgtb.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpgtd.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpgtw.c: Likewise.
* gcc.target/i386/sse2-mmx-pextrw.c: Likewise.
* gcc.target/i386/sse2-mmx-pinsrw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmaddwd.c: Likewise.
* gcc.target/i386/sse2-mmx-pmaxsw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmaxub.c: Likewise.
* gcc.target/i386/sse2-mmx-pminsw.c: Likewise.
* gcc.target/i386/sse2-mmx-pminub.c: Likewise.
* gcc.target/i386/sse2-mmx-pmovmskb.c: Likewise.
* gcc.target/i386/sse2-mmx-pmulhuw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmulhw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmullw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmuludq.c: Likewise.
* gcc.target/i386/sse2-mmx-por.c: Likewise.
* gcc.target/i386/sse2-mmx-psadbw.c: Likewise.
* gcc.target/i386/sse2-mmx-pshufw.c: Likewise.
* gcc.target/i386/sse2-mmx-pslld.c: Likewise.
* gcc.target/i386/sse2-mmx-pslldi.c: Likewise.
* gcc.target/i386/sse2-mmx-psllq.c: Likewise.
* gcc.target/i386/sse2-mmx-psllqi.c: Likewise.
* gcc.target/i386/sse2-mmx-psllw.c: Likewise.
* gcc.target/i386/sse2-mmx-psllwi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrad.c: Likewise.
* gcc.target/i386/sse2-mmx-psradi.c: Likewise.
* gcc.target/i386/sse2-mmx-psraw.c: Likewise.
* gcc.target/i386/sse2-mmx-psrawi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrld.c: Likewise.
* gcc.target/i386/sse2-mmx-psrldi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlq.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlqi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlw.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlwi.c: Likewise.
* gcc.target/i386/sse2-mmx-psubb.c: Likewise.
* gcc.target/i386/sse2-mmx-psubd.c: Likewise.
* gcc.target/i386/sse2-mmx-psubq.c: Likewise.
* gcc.target/i386/sse2-mmx-psubusb.c: Likewise.
* gcc.target/i386/sse2-mmx-psubusw.c: Likewise.
* gcc.target/i386/sse2-mmx-psubw.c: Likewise.
* gcc.target/i386/sse2-mmx-punpckhbw.c: Likewise.
* gcc.target/i386/sse2-mmx-punpckhdq.c: Likewise.
* gcc.target/i386/sse2-mmx-punpckhwd.c: Likewise.
* gcc.target/i386/sse2-mmx-punpcklbw.c: Likewise.
* gcc.target/i386/sse2-mmx-punpckldq.c: Likewise.
* gcc.target/i386/sse2-mmx-punpcklwd.c: Likewise.
* gcc.target/i386/sse2-mmx-pxor.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271254 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Enable TM MMX intrinsics with SSE2
hjl [Wed, 15 May 2019 15:33:43 +0000 (15:33 +0000)] 
i386: Enable TM MMX intrinsics with SSE2

This patch enables TM MMX intrinsics with SSE2 when MMX is disabled.

PR target/89021
* config/i386/i386-builtins.c (bdesc_tm): Enable MMX intrinsics
with SSE2.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271253 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Allow MMX intrinsic emulation with SSE
hjl [Wed, 15 May 2019 15:32:33 +0000 (15:32 +0000)] 
i386: Allow MMX intrinsic emulation with SSE

Allow MMX intrinsic emulation with SSE/SSE2/SSSE3.  Don't enable MMX ISA
by default with TARGET_MMX_WITH_SSE.

For pr82483-1.c and pr82483-2.c, "-mssse3 -mno-mmx" compiles in 64-bit
mode since MMX intrinsics can be emulated wit SSE.

gcc/

PR target/89021
* config/i386/i386-builtin.def: Enable MMX intrinsics with
SSE/SSE2/SSSE3.
* config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
Likewise.
* config/i386/i386-expand.c (ix86_expand_builtin): Allow
SSE/SSE2/SSSE3 to emulate MMX intrinsics with TARGET_MMX_WITH_SSE.
* config/i386/mmintrin.h: Only require SSE2 if __MMX_WITH_SSE__
is defined.

gcc/testsuite/

PR target/89021
* gcc.target/i386/pr82483-1.c: Error only on ia32.
* gcc.target/i386/pr82483-2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271252 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE
hjl [Wed, 15 May 2019 15:31:18 +0000 (15:31 +0000)] 
i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE

PR target/89021
* config/i386/mmx.md (*vec_dupv2sf): Changed to
define_insn_and_split to support SSE emulation.
(*vec_extractv2sf_0): Likewise.
(*vec_extractv2sf_1): Likewise.
(*vec_extractv2si_0): Likewise.
(*vec_extractv2si_1): Likewise.
(*vec_extractv2si_zext_mem): Likewise.
(vec_setv2sf): Also allow TARGET_MMX_WITH_SSE.
(vec_extractv2sf_1 splitter): Likewise.
(vec_extractv2sfsf): Likewise.
(vec_setv2si): Likewise.
(vec_extractv2si_1 splitter): Likewise.
(vec_extractv2sisi): Likewise.
(vec_setv4hi): Likewise.
(vec_extractv4hihi): Likewise.
(vec_setv8qi): Likewise.
(vec_extractv8qiqi): Likewise.
(vec_extractv2sfsf): Also allow TARGET_MMX_WITH_SSE.  Pass
TARGET_MMX_WITH_SSE ix86_expand_vector_extract.
(vec_extractv2sisi): Likewise.
(vec_extractv4hihi): Likewise.
(vec_extractv8qiqi): Likewise.
(vec_initv2sfsf): Also allow TARGET_MMX_WITH_SSE.  Pass
TARGET_MMX_WITH_SSE to ix86_expand_vector_init.
(vec_initv2sisi): Likewise.
(vec_initv4hihi): Likewise.
(vec_initv8qiqi): Likewise.
(vec_setv2si): Also allow TARGET_MMX_WITH_SSE.  Pass
TARGET_MMX_WITH_SSE to ix86_expand_vector_set.
(vec_setv4hi): Likewise.
(vec_setv8qi): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271251 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE
hjl [Wed, 15 May 2019 15:30:32 +0000 (15:30 +0000)] 
i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE

PR target/89021
* config/i386/mmx.md (MMXMODE:mov<mode>): Also allow
TARGET_MMX_WITH_SSE.
(MMXMODE:*mov<mode>_internal): Likewise.
(MMXMODE:movmisalign<mode>): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271250 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoPrevent allocation of MMX registers with TARGET_MMX_WITH_SSE
hjl [Wed, 15 May 2019 15:29:28 +0000 (15:29 +0000)] 
Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE

2019-05-15  Uroš Bizjak  <ubizjak@gmail.com>

PR target/89021
* config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
* config/i386/sse.md (sse2_cvtpi2pd): Ditto.
(sse2_cvtpd2pi): Ditto.
(sse2_cvttpd2pi): Ditto.
(*vec_concatv2sf_sse4_1): Ditto.
(*vec_concatv2sf_sse): Ditto.
(*vec_concatv2si_sse4_1): Ditto.
(*vec_concatv2si): Ditto.
(*vec_concatv4si_0): Ditto.
(*vec_concatv2di_0): Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271249 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX abs<mode>2 with SSE
hjl [Wed, 15 May 2019 15:28:04 +0000 (15:28 +0000)] 
i386: Emulate MMX abs<mode>2 with SSE

Emulate MMX abs<mode>2 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/sse.md (abs<mode>2): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271248 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ssse3_palignrdi with SSE
hjl [Wed, 15 May 2019 15:27:33 +0000 (15:27 +0000)] 
i386: Emulate MMX ssse3_palignrdi with SSE

Emulate MMX version of palignrq with SSE version by concatenating 2
64-bit MMX operands into a single 128-bit SSE operand, followed by
SSE psrldq.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/sse.md (ssse3_palignrdi): Changed to
define_insn_and_split to support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271247 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ssse3_psign<mode>3 with SSE
hjl [Wed, 15 May 2019 15:26:59 +0000 (15:26 +0000)] 
i386: Emulate MMX ssse3_psign<mode>3 with SSE

Emulate MMX ssse3_psign<mode>3 with SSE.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_psign<mode>3): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271246 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX pshufb with SSE version
hjl [Wed, 15 May 2019 15:26:19 +0000 (15:26 +0000)] 
i386: Emulate MMX pshufb with SSE version

Emulate MMX version of pshufb with SSE version by masking out the bit 3
of the shuffle control byte.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/sse.md (ssse3_pshufbv8qi3): Changed to
define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271245 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE
hjl [Wed, 15 May 2019 15:24:44 +0000 (15:24 +0000)] 
i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE

Emulate MMX ssse3_pmulhrswv4hi3 with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/sse.md (ssse3_pmulhrswv4hi3): Require TARGET_MMX
or TARGET_MMX_WITH_SSE.
(*ssse3_pmulhrswv4hi3): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271244 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ssse3_pmaddubsw with SSE
hjl [Wed, 15 May 2019 15:23:49 +0000 (15:23 +0000)] 
i386: Emulate MMX ssse3_pmaddubsw with SSE

Emulate MMX ssse3_pmaddubsw with SSE.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271243 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE
hjl [Wed, 15 May 2019 15:23:11 +0000 (15:23 +0000)] 
i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE

Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3):
Changed to define_insn_and_split to support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271242 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE
hjl [Wed, 15 May 2019 15:22:39 +0000 (15:22 +0000)] 
i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE

Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
Changed to define_insn_and_split to support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271241 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Make _mm_empty () as NOP without MMX
hjl [Wed, 15 May 2019 15:22:08 +0000 (15:22 +0000)] 
i386: Make _mm_empty () as NOP without MMX

With SSE emulation of MMX intrinsics, we should make _mm_empty () as NOP
without MMX.

PR target/89021
* config/i386/mmx.md (mmx_<emms>): Renamed to ...
(*mmx_<emms>): This.
(mmx_<emms>): New expander.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271240 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX umulv1siv1di3 with SSE2
hjl [Wed, 15 May 2019 15:21:39 +0000 (15:21 +0000)] 
i386: Emulate MMX umulv1siv1di3 with SSE2

Emulate MMX umulv1siv1di3 with SSE2.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation
support.
(*sse2_umulv1siv1di3): Add SSE2 emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271239 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX movntq with SSE2 movntidi
hjl [Wed, 15 May 2019 15:21:04 +0000 (15:21 +0000)] 
i386: Emulate MMX movntq with SSE2 movntidi

Emulate MMX movntq with SSE2 movntidi.  Only register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (sse_movntq): Add SSE2 emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271238 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_psadbw with SSE
hjl [Wed, 15 May 2019 15:20:28 +0000 (15:20 +0000)] 
i386: Emulate MMX mmx_psadbw with SSE

Emulate MMX mmx_psadbw with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_psadbw): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271237 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_uavgv4hi3 with SSE
hjl [Wed, 15 May 2019 15:19:55 +0000 (15:19 +0000)] 
i386: Emulate MMX mmx_uavgv4hi3 with SSE

Emulate MMX mmx_uavgv4hi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_uavgv4hi3): Also check TARGET_MMX and
TARGET_MMX_WITH_SSE.
(*mmx_uavgv4hi3): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271236 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_uavgv8qi3 with SSE
hjl [Wed, 15 May 2019 15:19:19 +0000 (15:19 +0000)] 
i386: Emulate MMX mmx_uavgv8qi3 with SSE

Emulate MMX mmx_uavgv8qi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX
and TARGET_MMX_WITH_SSE.
(*mmx_uavgv8qi3): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271235 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX maskmovq with SSE2 maskmovdqu
hjl [Wed, 15 May 2019 15:18:41 +0000 (15:18 +0000)] 
i386: Emulate MMX maskmovq with SSE2 maskmovdqu

Emulate MMX maskmovq with SSE2 maskmovdqu for TARGET_MMX_WITH_SSE by
zero-extending source and mask operands to 128 bits.  Handle unmapped
bits 64:127 at memory address by adjusting source and mask operands
together with memory address.

PR target/89021
* config/i386/xmmintrin.h: Emulate MMX maskmovq with SSE2
maskmovdqu for __MMX_WITH_SSE__.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271234 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_umulv4hi3_highpart with SSE
hjl [Wed, 15 May 2019 15:17:25 +0000 (15:17 +0000)] 
i386: Emulate MMX mmx_umulv4hi3_highpart with SSE

Emulate MMX mmx_umulv4hi3_highpart with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check
TARGET_MMX and TARGET_MMX_WITH_SSE.
(*mmx_umulv4hi3_highpart): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271233 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_pmovmskb with SSE
hjl [Wed, 15 May 2019 15:16:27 +0000 (15:16 +0000)] 
i386: Emulate MMX mmx_pmovmskb with SSE

Emulate MMX mmx_pmovmskb with SSE by zero-extending result of SSE pmovmskb
from QImode to SImode.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_pmovmskb): Changed to
define_insn_and_split to support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271232 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE
hjl [Wed, 15 May 2019 15:15:44 +0000 (15:15 +0000)] 
i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE

Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_<code>v4hi3): Also check TARGET_MMX
and TARGET_MMX_WITH_SSE.
(mmx_<code>v8qi3): Likewise.
(smaxmin:<code>v4hi3): New.
(umaxmin:<code>v8qi3): Likewise.
(smaxmin:*mmx_<code>v4hi3): Add SSE emulation.
(umaxmin:*mmx_<code>v8qi3): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271231 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_pinsrw with SSE
hjl [Wed, 15 May 2019 15:14:03 +0000 (15:14 +0000)] 
i386: Emulate MMX mmx_pinsrw with SSE

Emulate MMX mmx_pinsrw with SSE.  Only SSE register destination operand
is allowed.

PR target/89021
* config/i386/mmx.md (mmx_pinsrw): Also check TARGET_MMX and
TARGET_MMX_WITH_SSE.
(*mmx_pinsrw): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271230 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_pextrw with SSE
hjl [Wed, 15 May 2019 15:13:31 +0000 (15:13 +0000)] 
i386: Emulate MMX mmx_pextrw with SSE

Emulate MMX mmx_pextrw with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_pextrw): Add SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271229 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX sse_cvtpi2ps with SSE
hjl [Wed, 15 May 2019 15:12:47 +0000 (15:12 +0000)] 
i386: Emulate MMX sse_cvtpi2ps with SSE

Emulate MMX sse_cvtpi2ps with SSE2 cvtdq2ps, preserving upper 64 bits of
destination XMM register.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/sse.md (sse_cvtpi2ps): Changed to
define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271228 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE
hjl [Wed, 15 May 2019 15:12:14 +0000 (15:12 +0000)] 
i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE

Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE.

PR target/89021
* config/i386/sse.md (sse_cvtps2pi): Add SSE emulation.
(sse_cvttps2pi): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271227 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX pshufw with SSE
hjl [Wed, 15 May 2019 15:11:41 +0000 (15:11 +0000)] 
i386: Emulate MMX pshufw with SSE

Emulate MMX pshufw with SSE.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_pshufw): Also check TARGET_MMX and
TARGET_MMX_WITH_SSE.
(mmx_pshufw_1): Add SSE emulation.
(*vec_dupv4hi): Changed to define_insn_and_split and also allow
TARGET_MMX_WITH_SSE to support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271226 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX vec_dupv2si with SSE
hjl [Wed, 15 May 2019 15:11:07 +0000 (15:11 +0000)] 
i386: Emulate MMX vec_dupv2si with SSE

Emulate MMX vec_dupv2si with SSE.  Add the "Yw" constraint to allow
broadcast from integer register for AVX512BW with TARGET_AVX512VL.
Only SSE register source operand is allowed.

PR target/89021
* config/i386/constraints.md (Yw): New constraint.
* config/i386/mmx.md (*vec_dupv2si): Changed to
define_insn_and_split and also allow TARGET_MMX_WITH_SSE to
support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271225 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE
hjl [Wed, 15 May 2019 15:10:32 +0000 (15:10 +0000)] 
i386: Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE

Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_eq<mode>3): Also allow
TARGET_MMX_WITH_SSE.
(*mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
support.
(mmx_gt<mode>3): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271224 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_andnot<mode>3 with SSE
hjl [Wed, 15 May 2019 15:09:50 +0000 (15:09 +0000)] 
i386: Emulate MMX mmx_andnot<mode>3 with SSE

Emulate MMX mmx_andnot<mode>3 with SSE.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/mmx.md (mmx_andnot<mode>3): Also allow
TARGET_MMX_WITH_SSE.  Add SSE support.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271223 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX <any_logic><mode>3 with SSE
hjl [Wed, 15 May 2019 15:09:19 +0000 (15:09 +0000)] 
i386: Emulate MMX <any_logic><mode>3 with SSE

Emulate MMX <any_logic><mode>3 with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow
TARGET_MMX_WITH_SSE.
(any_logic:<code><mode>3): New.
(any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE.
Add SSE support.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271222 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE
hjl [Wed, 15 May 2019 15:08:38 +0000 (15:08 +0000)] 
i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE

Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE.  Only SSE register
source operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_ashr<mode>3): Also allow
TARGET_MMX_WITH_SSE.  Add SSE emulation.
(mmx_<shift_insn><mode>3): Likewise.
(ashr<mode>3): New.
(<shift_insn><mode>3): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271221 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mmx_pmaddwd with SSE
hjl [Wed, 15 May 2019 15:08:04 +0000 (15:08 +0000)] 
i386: Emulate MMX mmx_pmaddwd with SSE

Emulate MMX pmaddwd with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.
(*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.  Add SSE support.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271220 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX smulv4hi3_highpart with SSE
hjl [Wed, 15 May 2019 15:07:04 +0000 (15:07 +0000)] 
i386: Emulate MMX smulv4hi3_highpart with SSE

Emulate MMX mulv4hi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow
TARGET_MMX_WITH_SSE.
(*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add
SSE support.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271219 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX mulv4hi3 with SSE
hjl [Wed, 15 May 2019 15:06:28 +0000 (15:06 +0000)] 
i386: Emulate MMX mulv4hi3 with SSE

Emulate MMX mulv4hi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_mulv4hi3): Also allow
TARGET_MMX_WITH_SSE.
(mulv4hi3): New.
(*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
support.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271218 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX plusminus/sat_plusminus with SSE
hjl [Wed, 15 May 2019 15:05:48 +0000 (15:05 +0000)] 
i386: Emulate MMX plusminus/sat_plusminus with SSE

Emulate MMX plusminus/sat_plusminus with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI.
(plusminus:mmx_<plusminus_insn><mode>3): Check
TARGET_MMX_WITH_SSE.
(sat_plusminus:mmx_<plusminus_insn><mode>3): Likewise.
(<plusminus_insn><mode>3): New.
(*mmx_<plusminus_insn><mode>3): Add SSE emulation.
(*mmx_<plusminus_insn><mode>3): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271217 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX
hjl [Wed, 15 May 2019 15:05:07 +0000 (15:05 +0000)] 
i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX

Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX.  For MMX punpckhXX,
move bits 64:127 to bits 0:63 in SSE register.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/i386-expand.c (ix86_split_mmx_punpck): New function.
* config/i386/i386-protos.h (ix86_split_mmx_punpck): New
prototype.
* config/i386/mmx.m (mmx_punpckhbw): Changed to
define_insn_and_split to support SSE emulation.
(mmx_punpcklbw): Likewise.
(mmx_punpckhwd): Likewise.
(mmx_punpcklwd): Likewise.
(mmx_punpckhdq): Likewise.
(mmx_punpckldq): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271216 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Emulate MMX packsswb/packssdw/packuswb with SSE2
hjl [Wed, 15 May 2019 15:04:08 +0000 (15:04 +0000)] 
i386: Emulate MMX packsswb/packssdw/packuswb with SSE2

Emulate MMX packsswb/packssdw/packuswb with SSE packsswb/packssdw/packuswb
plus moving bits 64:95 to bits 32:63 in SSE register.  Only SSE register
source operand is allowed.

PR target/89021
* config/i386/i386-expand.c (ix86_move_vector_high_sse_to_mmx):
New function.
(ix86_split_mmx_pack): Likewise.
* config/i386/i386-protos.h (ix86_move_vector_high_sse_to_mmx):
New prototype.
(ix86_split_mmx_pack): Likewise.
* config/i386/i386.md (mmx_isa): New.
(enabled): Also check mmx_isa.
* config/i386/mmx.md (any_s_truncate): New code iterator.
(s_trunsuffix): New code attr.
(mmx_packsswb): Removed.
(mmx_packssdw): Likewise.
(mmx_packuswb): Likewise.
(mmx_pack<s_trunsuffix>swb): New define_insn_and_split to emulate
MMX packsswb/packuswb with SSE2.
(mmx_packssdw): Likewise.
* config/i386/predicates.md (register_mmxmem_operand): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271215 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoi386: Allow MMX register modes in SSE registers
hjl [Wed, 15 May 2019 15:02:54 +0000 (15:02 +0000)] 
i386: Allow MMX register modes in SSE registers

In 64-bit mode, SSE2 can be used to emulate MMX instructions without
3DNOW.  We can use SSE2 to support MMX register modes.

PR target/89021
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__MMX_WITH_SSE__ for TARGET_MMX_WITH_SSE.
* config/i386/i386.c (ix86_set_reg_reg_cost): Add support for
TARGET_MMX_WITH_SSE with VALID_MMX_REG_MODE.
(ix86_vector_mode_supported_p): Likewise.
* config/i386/i386.h (TARGET_MMX_WITH_SSE): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271213 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agolto-plugin, removed unused variable
iains [Wed, 15 May 2019 14:10:27 +0000 (14:10 +0000)] 
lto-plugin, removed unused variable

2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

* lto-plugin.c (cleanup_handler): Remove unused var.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271212 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-15 Paolo Carlini <paolo.carlini@oracle.com>
paolo [Wed, 15 May 2019 13:46:29 +0000 (13:46 +0000)] 
2019-05-15  Paolo Carlini  <paolo.carlini@oracle.com>

* call.c (perform_overload_resolution, build_new_method_call_1):
Use OVL_P; remove redundant TEMPLATE_DECL checks.
* decl.c (grokfndecl): Likewise.
* mangle.c (write_expression): Likewise.
* parser.c (cp_parser_template_id): Likewise.
* pt.c (resolve_overloaded_unification, type_dependent_expression_p):
Likewise.
* search.c (build_baselink): Likewise.
* tree.c (is_overloaded_fn, dependent_name, maybe_get_fns): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271211 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agoCheck for overflow in tree-switch-conversion (PR middle-end/90478).
marxin [Wed, 15 May 2019 12:58:53 +0000 (12:58 +0000)] 
Check for overflow in tree-switch-conversion (PR middle-end/90478).

2019-05-15  Martin Liska  <mliska@suse.cz>

PR middle-end/90478
* tree-switch-conversion.c (jump_table_cluster::can_be_handled):
Check for overflow.
2019-05-15  Martin Liska  <mliska@suse.cz>

PR middle-end/90478
* gcc.dg/tree-ssa/pr90478-2.c: New test.
* gcc.dg/tree-ssa/pr90478.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271210 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-15 Richard Biener <rguenther@suse.de>
rguenth [Wed, 15 May 2019 12:57:32 +0000 (12:57 +0000)] 
2019-05-15  Richard Biener  <rguenther@suse.de>

* tree-into-ssa.c (pass_build_ssa::execute): Run
update_address_taken before going into SSA.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271209 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-15 Richard Biener <rguenther@suse.de>
rguenth [Wed, 15 May 2019 12:51:58 +0000 (12:51 +0000)] 
2019-05-15  Richard Biener  <rguenther@suse.de>

c/
* gimple-parser.c (c_parser_gimple_postfix_expression): Handle
__BIT_FIELD_REF.

* tree-pretty-print.c (dump_generic_node): Dump BIT_FIELD_REF
as __BIT_FIELD_REF with type with -gimple.

* gcc.dg/gimplefe-40.c: Amend.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271208 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agotree-ssa-uninit: clean up is_value_included_in
amonakov [Wed, 15 May 2019 12:40:04 +0000 (12:40 +0000)] 
tree-ssa-uninit: clean up is_value_included_in

2019-05-15  Vladislav Ivanishin  <vlad@ispras.ru>

* tree-ssa-uninit.c (is_value_included_in): Remove is_unsigned and merge
semantically equivalent branches (left over after prior refactorings).

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271207 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-15 Richard Biener <rguenther@suse.de>
rguenth [Wed, 15 May 2019 12:14:01 +0000 (12:14 +0000)] 
2019-05-15  Richard Biener  <rguenther@suse.de>

PR c/90474
* c-common.c (c_common_mark_addressable_vec): Also mark
a COMPOUND_LITERAL_EXPR_DECL addressable similar to
c_mark_addressable.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271206 138bc75d-0d04-0410-961f-82ee72b054a4

6 years agodarwin, testsuite, powerpc - handle tests for new processors.
iains [Wed, 15 May 2019 11:47:04 +0000 (11:47 +0000)] 
darwin, testsuite, powerpc - handle tests for new processors.

If we build Darwin with a modern assembler, then it might well
recognise insns that cannot be used on current Darwin systems.

The patch augments the tests for feature support for VSX,
power8 and power9 to exclude Darwin even if the assembler can
handle the instructions.

2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

* lib/target-supports.exp
(check_effective_target_powerpc_p8vector_ok): No support for Darwin.
(check_effective_target_powerpc_p9vector_ok): Likewise.
(check_effective_target_powerpc_float128_sw_ok): Likewise.
(check_effective_target_powerpc_float128_hw_ok): Likewise.
(check_effective_target_powerpc_vsx_ok): Likewise.
* gcc.target/powerpc/bfp/bfp.exp: Don't try to run this for Darwin.
* gcc.target/powerpc/dfp/dfp.exp: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271205 138bc75d-0d04-0410-961f-82ee72b054a4

6 years ago2019-05-15 Richard Biener <rguenther@suse.de>
rguenth [Wed, 15 May 2019 09:59:37 +0000 (09:59 +0000)] 
2019-05-15  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88828
* tree-ssa-forwprop.c (simplify_vector_constructor): Fix
bogus check.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271204 138bc75d-0d04-0410-961f-82ee72b054a4