Luca Weiss [Mon, 23 Jan 2023 13:29:51 +0000 (14:29 +0100)]
arm64: dts: qcom: sm6350: Use specific qmpphy compatible
The sc7180 phy compatible works fine for some cases, but it turns out
sm6350 does need proper phy configuration in the driver, so use the
newly added sm6350 compatible.
Because the sm6350 compatible is using the new binding, we need to
change the node quite a bit to match it.
This fixes qmpphy init when no USB cable is plugged in during bootloader
stage.
Luca Weiss [Fri, 20 Jan 2023 13:13:46 +0000 (14:13 +0100)]
arm64: dts: qcom: sm6350: Add CCI nodes
Add nodes for the two CCI blocks found on SM6350.
The first contains two i2c busses and while the second one might also
contains two busses, the downstream kernel only has one configured, and
some boards use the GPIOs for the potential cci1_i2c1 one other
purposes, so leave that one unconfigured.
Andrew Halaney [Mon, 30 Jan 2023 15:48:22 +0000 (09:48 -0600)]
arm64: dts: qcom: sa8540p-ride: Fix some i2c pinctrl settings
Some of the pinctrl groups were invalid for the selected pins. Select
the proper qup group to fix these warnings:
[ 6.523566] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio135" for function "qup15"
[ 6.535042] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio136" for function "qup15"
[ 6.597536] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio158" for function "qup15"
[ 6.597544] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio159" for function "qup15"
[ 6.597991] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio0" for function "qup15"
[ 6.597996] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio1" for function "qup15"
Abel Vesa [Fri, 27 Jan 2023 13:14:41 +0000 (15:14 +0200)]
arm64: dts: qcom: sm8550: Fix the aoss_qmp node name
The proper name for it is power-management. Currently, with the node
name being power-controller, the bindings check fails due to the
property #power-domain-cells missing.
Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230127131441.1157679-1-abel.vesa@linaro.org
Populate the audio devices found on the OnePlus 6 and 6T using the
sdm845-sndcard driver.
Both devices have the earpiece and headphone jack connected to the
WCD9341 codec. The OnePlus 6 uses the MAX98927 speaker codec which is
already supported upstream. The OnePlus 6T uses a currently unsupported
TFA9894 codec.
Two internal microphones are supported, as well as an external headset
mic. Each DAI link is expected to be used for a single device.
Alsa UCM2 configs for this setup can be found here, they are not yet
upstream and include support for call audio which is missing in this
patch
Clock for WCD9340 is coming from the SoC and is the same in all users,
so move it to common file to reduce the code duplication (which still
allows further customizations per board).
Pin configuration fow WCD9340 is the same in all users, so move it to
common file to reduce the code duplication (which still allows further
customizations per board).
arm64: dts: qcom: sdm845: move codec to separate file
Re-organize SDM845 audio codec into separate, audio DTSI which
should be included and customized by the SDM845 boards wanting audio.
The codec node is anyway not a property of the SoC, but the boards.
On all others boards not using audio, keep the Slimbus node disabled as
it is empty.
There is dedicated compatible for Lenovo Yoga C630 sound card
(documented in bindings and used by Linux driver), so use it along with
a generic sound card fallback. The device is actually fully compatible
with the generic one.
Robert Marko [Mon, 23 Jan 2023 10:16:31 +0000 (11:16 +0100)]
arm64: dts: qcom: ipq8074: add QFPROM node
IPQ8074 has efuses like other Qualcomm SoC-s that are required for
determining various HW quirks which will be required later for CPR etc,
so lets add the QFPROM node for start.
Individidual fuses will be added as they are required.
Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230123101631.475712-2-robimarko@gmail.com
Johan Hovold [Mon, 23 Jan 2023 10:16:07 +0000 (11:16 +0100)]
arm64: dts: qcom: sm8550: fix USB-DP PHY resets
The USB-DP PHY resets have been switched.
Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230123101607.2413-1-johan+linaro@kernel.org
Dmitry Baryshkov [Fri, 20 Jan 2023 06:14:15 +0000 (08:14 +0200)]
arm64: dts: qcom: msm8996 switch from RPM_SMD_BB_CLK1 to RPM_SMD_XO_CLK_SRC
The vendor kernel uses RPM_SMD_XO_CLK_SRC clock as an CXO clock rather
than using the RPM_SMD_BB_CLK1 directly. Follow this example and switch
msm8996.dtsi to use RPM_SMD_XO_CLK_SRC clock instead of RPM_SMB_BB_CLK1.
Fixes: 2b8c9c77c268 ("arm64: dts: qcom: msm8996: convert xo_board to RPM_SMD_BB_CLK1") Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120061417.2623751-7-dmitry.baryshkov@linaro.org
arm64: dts: qcom: sc7280-idp: drop incorrect properties
The sound card does not expose DAIs and does not use custom qcom
properties, so drop '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh' and
'qcom,msm-mbhc-hphl-swh':
sc7280-idp.dtb: sound: '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh', 'qcom,msm-mbhc-hphl-swh' do not match any of the regexes: '^dai-link@[0-9a-f]$', 'pinctrl-[0-9]+'
Reported-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230119122205.73372-2-krzysztof.kozlowski@linaro.org
arm64: dts: qcom: sc7280-herobrine-audio-wcd9385: drop incorrect properties
The sound card does not expose DAIs and does not use custom qcom
properties, so drop '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh' and
'qcom,msm-mbhc-hphl-swh':
sc7280-herobrine-crd.dtb: sound: '#sound-dai-cells', 'qcom,msm-mbhc-gnd-swh', 'qcom,msm-mbhc-hphl-swh' do not match any of the regexes: '^dai-link@[0-9a-f]$', 'pinctrl-[0-9]+'
Reported-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230119122205.73372-1-krzysztof.kozlowski@linaro.org
Konrad Dybcio [Thu, 19 Jan 2023 10:16:44 +0000 (11:16 +0100)]
arm64: dts: qcom: sm6115: Use 64 bit addressing
SM6115's SMMU uses 36bit VAs, which is a good indicator that we
should increase (dma-)ranges - and by extension #address- and
#size-cells to prevent things from getting lost in translation
(both literally and figuratively). Do so.
Yang Xiwen [Sat, 14 Jan 2023 06:38:46 +0000 (14:38 +0800)]
arm64: dts: qcom: msm8916-thwc: Add initial device trees
This commit adds support for the ufi-001C and uf896 WiFi/LTE dongle made by
Tong Heng Wei Chuang based on MSM8916.
uf896 is another variant for the usb stick. The board design
differs by using different gpios for the keys and leds.
Note: The original firmware does not support 64-bit OS. It is necessary
to flash 64-bit TZ firmware to boot arm64.
Currently supported:
- All CPU cores
- Buttons
- LEDs
- Modem
- SDHC
- USB Device Mode
- UART
arm64: dts: qcom: sm8550: add GPR and LPASS pin controller
Add the ADSP GPR (Generic Packet Router) and LPASS LPI (Low Power Audio
SubSystem Low Power Island) pin controller nodes used as part of audio
subsystem on SM8550.
Rajendra Nayak [Fri, 16 Dec 2022 11:29:18 +0000 (16:59 +0530)]
arm64: dts: qcom: sc7280: Add a herobrine CRD Pro SKU
Some of the qualcomm qcard based herobrine devices can come with
a Pro variant of the chipset on the qcard. Such Pro qcards have
the smps9 from pm8350c ganged up with smps7 and smps8, so add a
.dtsi for pro skus that deletes the smps9 node and include it from
the new dts for the CRD Pro
Melody Olvera [Thu, 12 Jan 2023 21:07:21 +0000 (13:07 -0800)]
arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIs
Add the base DTSI files for QDU1000 and QRU1000 SoCs, including base
descriptions of CPUs, GCC, RPMHCC, QUP, TLMM, and interrupt-controller
to boot to shell with console on these SoCs.
Konrad Dybcio [Fri, 20 Jan 2023 21:00:59 +0000 (22:00 +0100)]
arm64: dts: qcom: sm8350: Add mdss_ prefix to DSIn out labels
Add the mdss_ prefix to DSIn labels, so that the hardware blocks can
be organized near each other while retaining the alphabetical order
in device DTs when referencing by label.
Current PCIe QMP PHY output name were changed in ("arm64: dts: qcom: Fix
IPQ8074 PCIe PHY nodes") however it did not account for the fact that GCC
driver is relying on the old names to match them as they are being used as
the parent for the gcc_pcie0_pipe_clk and gcc_pcie1_pipe_clk.
This broke parenting as GCC could not find the parent clock, so fix it by
changing to the names that driver is expecting.
Robert Marko [Fri, 13 Jan 2023 16:44:48 +0000 (17:44 +0100)]
arm64: dts: qcom: ipq8074: fix Gen3 PCIe node
IPQ8074 comes in 2 silicon versions:
* v1 with 2x Gen2 PCIe ports and QMP PHY-s
* v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s
v2 is the final and production version that is actually supported by the
kernel, however it looks like PCIe related nodes were added for the v1 SoC.
Finish the PCIe fixup by using the correct compatible, adding missing ATU
register space, declaring max-link-speed, use correct ranges, add missing
clocks and resets.
Robert Marko [Fri, 13 Jan 2023 16:44:44 +0000 (17:44 +0100)]
arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed
Add the generic 'max-link-speed' property to describe the Gen2 PCIe link
generation limit.
This allows the generic DWC code to configure the link speed correctly.
arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller
The devicetree should specify both MSI implementations and the OS/driver
should choose the one based on the platform requirements. Currently, Linux
DWC driver will choose GIC-ITS over the internal MSI controller.
Fixes: a11bbf6adef4 ("arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1") Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111123004.21048-2-manivannan.sadhasivam@linaro.org
It seems that clock-output-names for the USB3 QMP PHY-s where set without
actually checking what is the GCC clock driver expecting, so clock core
could never actually find the parents for usb0_pipe_clk_src and
usb1_pipe_clk_src clocks in the GCC driver.
So, correct the names to be what the driver expects so that parenting
works.
Before:
gcc_usb0_pipe_clk_src 0 0 0 125000000 0 0 50000 Y
gcc_usb1_pipe_clk_src 0 0 0 125000000 0 0 50000 Y
After:
usb3phy_0_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y
usb0_pipe_clk_src 1 1 0 125000000 0 0 50000 Y
gcc_usb0_pipe_clk 1 1 0 125000000 0 0 50000 Y
usb3phy_1_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y
usb1_pipe_clk_src 1 1 0 125000000 0 0 50000 Y
gcc_usb1_pipe_clk 1 1 0 125000000 0 0 50000 Y
Fixes: 5e09bc51d07b ("arm64: dts: ipq8074: enable USB support") Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230108130440.670181-2-robimarko@gmail.com
Jasper Korten [Sat, 7 Jan 2023 14:19:10 +0000 (19:19 +0500)]
arm64: dts: qcom: Add device tree for Samsung Galaxy Tab A 9.7 (2015)
The Galaxy Tab A 9.7 (2015) is a Snapdragon 410 based tablet.
This commit introduces basic support for the tablet including the
following features:
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- Regulators
- WCNSS (WiFi/BT)
- GPIO keys
- Fuel gauge
- Touchscreen
- Accelerometer
Part of the DT is split out into a common dtsi since the tablet shares
majority of the design with another variant having a different screen
size.
Brian Masney [Tue, 3 Jan 2023 18:22:29 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: add rng device tree node
Add the necessary device tree node for qcom,prng-ee so we can use the
hardware random number generator. This functionality was tested on a
SA8540p automotive development board using kcapi-rng from libkcapi.
Brian Masney [Tue, 3 Jan 2023 18:22:28 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: add aliases for i2c4 and i2c21
Add aliases for i2c4 and i2c21 to the crd and x13s DTS files so that
what's exposed to userspace doesn't change in the future if additional
i2c buses are enabled on these platforms.
Brian Masney [Tue, 3 Jan 2023 18:22:27 +0000 (13:22 -0500)]
arm64: dts: qcom: sa8540p-ride: add i2c nodes
Add the necessary nodes in order to get i2c0, i2c1, i2c12, i2c15, and
i2c18 functioning on the automotive board and exposed to userspace.
This work was derived from various patches that Qualcomm delivered
to Red Hat in a downstream kernel. This change was validated by using
i2c-tools 4.3.3 on CentOS Stream 9:
Brian Masney [Tue, 3 Jan 2023 18:22:24 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup0_i2c4 to i2c4.
Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.
Brian Masney [Tue, 3 Jan 2023 18:22:23 +0000 (13:22 -0500)]
arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th
index under qup2, which starts at index 16.
Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.
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