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7 weeks agotcg: Merge INDEX_op_sub_{i32,i64}
Richard Henderson [Tue, 7 Jan 2025 06:06:32 +0000 (22:06 -0800)] 
tcg: Merge INDEX_op_sub_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert sub to TCGOutOpSubtract
Richard Henderson [Tue, 7 Jan 2025 05:57:43 +0000 (21:57 -0800)] 
tcg: Convert sub to TCGOutOpSubtract

Create a special subclass for sub, because two backends can
support "subtract from immediate".  Drop all backend support
for an immediate as the second operand, as we transform sub
to add during optimize.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/arm: Fix constraints for sub
Richard Henderson [Thu, 2 Jan 2025 21:25:15 +0000 (13:25 -0800)] 
tcg/arm: Fix constraints for sub

In 7536b82d288 we lost the rI constraint that allowed the use of
RSB to perform reg = imm - reg.  At the same time, drop support
for reg = reg - imm, which is now transformed generically to
addition, and need not be handled by the backend.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_nor_{i32,i64}
Richard Henderson [Tue, 7 Jan 2025 05:02:17 +0000 (21:02 -0800)] 
tcg: Merge INDEX_op_nor_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert nor to TCGOutOpBinary
Richard Henderson [Tue, 7 Jan 2025 04:57:21 +0000 (20:57 -0800)] 
tcg: Convert nor to TCGOutOpBinary

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/loongarch64: Do not accept constant argument to nor
Richard Henderson [Tue, 7 Jan 2025 04:37:25 +0000 (20:37 -0800)] 
tcg/loongarch64: Do not accept constant argument to nor

The instruction set does not implement nor with immediate.
There is no reason to pretend that we do.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_nand_{i32,i64}
Richard Henderson [Tue, 7 Jan 2025 04:32:54 +0000 (20:32 -0800)] 
tcg: Merge INDEX_op_nand_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert nand to TCGOutOpBinary
Richard Henderson [Tue, 7 Jan 2025 00:18:19 +0000 (16:18 -0800)] 
tcg: Convert nand to TCGOutOpBinary

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_eqv_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 23:47:53 +0000 (15:47 -0800)] 
tcg: Merge INDEX_op_eqv_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert eqv to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 23:37:43 +0000 (15:37 -0800)] 
tcg: Convert eqv to TCGOutOpBinary

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/optimize: Fold eqv with immediate to xor
Richard Henderson [Wed, 15 Nov 2023 19:51:28 +0000 (11:51 -0800)] 
tcg/optimize: Fold eqv with immediate to xor

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_xor_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 23:18:35 +0000 (15:18 -0800)] 
tcg: Merge INDEX_op_xor_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert xor to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 23:11:22 +0000 (15:11 -0800)] 
tcg: Convert xor to TCGOutOpBinary

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_orc_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 22:46:26 +0000 (14:46 -0800)] 
tcg: Merge INDEX_op_orc_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert orc to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 22:30:50 +0000 (14:30 -0800)] 
tcg: Convert orc to TCGOutOpBinary

At the same time, drop all backend support for immediate
operands, as we now transform orc to or during optimize.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/optimize: Fold orc with immediate to or
Richard Henderson [Tue, 10 Dec 2024 14:13:10 +0000 (08:13 -0600)] 
tcg/optimize: Fold orc with immediate to or

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_or_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 22:00:40 +0000 (14:00 -0800)] 
tcg: Merge INDEX_op_or_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert or to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 21:54:22 +0000 (13:54 -0800)] 
tcg: Convert or to TCGOutOpBinary

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_andc_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 20:37:02 +0000 (12:37 -0800)] 
tcg: Merge INDEX_op_andc_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert andc to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 20:26:28 +0000 (12:26 -0800)] 
tcg: Convert andc to TCGOutOpBinary

At the same time, drop all backend support for immediate
operands, as we now transform andc to and during optimize.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/optimize: Emit add r,r,-1 in fold_setcond_tst_pow2
Richard Henderson [Tue, 7 Jan 2025 06:06:08 +0000 (22:06 -0800)] 
tcg/optimize: Emit add r,r,-1 in fold_setcond_tst_pow2

We canonicalize subtract with constant to add with constant.
Fix this missed instance.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/optimize: Fold andc with immediate to and
Richard Henderson [Wed, 15 Nov 2023 19:18:55 +0000 (11:18 -0800)] 
tcg/optimize: Fold andc with immediate to and

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_and_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 18:32:44 +0000 (10:32 -0800)] 
tcg: Merge INDEX_op_and_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert and to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 18:22:29 +0000 (10:22 -0800)] 
tcg: Convert and to TCGOutOpBinary

Drop all backend support for an immediate as the first operand.
This should never happen in any case, as we swap commutative
operands to place immediates as the second operand.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_add_{i32,i64}
Richard Henderson [Mon, 6 Jan 2025 17:11:39 +0000 (09:11 -0800)] 
tcg: Merge INDEX_op_add_{i32,i64}

Rely on TCGOP_TYPE instead of opcodes specific to each type.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Convert add to TCGOutOpBinary
Richard Henderson [Mon, 6 Jan 2025 17:00:07 +0000 (09:00 -0800)] 
tcg: Convert add to TCGOutOpBinary

Drop all backend support for an immediate as the first operand.
This should never happen in any case, as we swap commutative
operands to place immediates as the second operand.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Merge INDEX_op_mov_{i32,i64}
Richard Henderson [Sat, 28 Dec 2024 23:58:24 +0000 (15:58 -0800)] 
tcg: Merge INDEX_op_mov_{i32,i64}

Begin to rely on TCGOp.type to discriminate operations,
rather than two different opcodes.  Convert mov first.
Introduce TCG_OPF_INT in order to keep opcode dumps the same.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Remove INDEX_op_ext{8,16,32}*
Richard Henderson [Thu, 26 Dec 2024 20:01:57 +0000 (12:01 -0800)] 
tcg: Remove INDEX_op_ext{8,16,32}*

Use the fully general extract opcodes instead.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Use extract2 for cross-word 64-bit extract on 32-bit host
Richard Henderson [Sat, 22 Feb 2025 17:36:21 +0000 (09:36 -0800)] 
tcg: Use extract2 for cross-word 64-bit extract on 32-bit host

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Add all_outop[]
Richard Henderson [Fri, 3 Jan 2025 22:55:56 +0000 (14:55 -0800)] 
tcg: Add all_outop[]

Add infrastructure for more consolidated output of opcodes.
The base structure allows for constraints to be either static
or dynamic, and for the existence of those constraints to
replace TCG_TARGET_HAS_* and the bulk of tcg_op_supported.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg: Add TCGType to tcg_op_insert_{after,before}
Richard Henderson [Wed, 22 Jan 2025 04:34:41 +0000 (20:34 -0800)] 
tcg: Add TCGType to tcg_op_insert_{after,before}

We cannot rely on the value copied from TCGOP_TYPE(op), because
the relevant op could be typeless, such as INDEX_op_call.

Fixes: fb744ece3a78 ("tcg: Copy TCGOP_TYPE in tcg_op_insert_{after,before}")
Suggested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/optimize: Introduce opt_insert_{before,after}
Richard Henderson [Mon, 21 Apr 2025 18:05:29 +0000 (11:05 -0700)] 
tcg/optimize: Introduce opt_insert_{before,after}

Consolidate the places we call tcg_op_insert_{before,after}
within the optimization pass.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/loongarch64: Improve constraints for TCG_CT_CONST_VCMP
Richard Henderson [Thu, 24 Apr 2025 18:45:28 +0000 (18:45 +0000)] 
tcg/loongarch64: Improve constraints for TCG_CT_CONST_VCMP

Use the TCGCond given to tcg_target_const_match to exactly match
the supported constant.  Adjust the code generation to assume this
has been done -- recall that encode_*_insn contain assertions that
the constants are valid.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agotcg/loongarch64: Fix vec_val computation in tcg_target_const_match
Richard Henderson [Thu, 24 Apr 2025 18:23:36 +0000 (18:23 +0000)] 
tcg/loongarch64: Fix vec_val computation in tcg_target_const_match

Only use vece for a vector constant.  This avoids an assertion
failure in sextract64 when vece contains garbage.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7 weeks agoMerge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Stefan Hajnoczi [Sun, 27 Apr 2025 16:47:23 +0000 (12:47 -0400)] 
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging

Block layer patches

- Discard alignment fixes
- Remove unused callback .bdrv_aio_pdiscard()
- qemu-img bench: Input validation fix

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# gpg:                issuer "kwolf@redhat.com"
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* tag 'for-upstream' of https://repo.or.cz/qemu/kevin:
  qemu-img: improve queue depth validation in img_bench
  block: Remove unused callback function *bdrv_aio_pdiscard
  block/io: skip head/tail requests on EINVAL
  file-posix: probe discard alignment on Linux block devices

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
7 weeks agoMerge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Stefan Hajnoczi [Sun, 27 Apr 2025 16:47:15 +0000 (12:47 -0400)] 
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging

Various patches loosely related to single binary work:

- Replace cpu_list() definition by CPUClass::list_cpus() callback
- Remove few MO_TE definitions on Hexagon / X86 targets
- Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
- Remove DEVICE_HOST_ENDIAN definition
- Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
- Rename target_words_bigendian() as target_big_endian()
- Convert target_name() and target_cpu_type() to TargetInfo API
- Constify QOM TypeInfo class_data/interfaces fields
- Get default_cpu_type calling machine_class_default_cpu_type()
- Correct various uses of GLibCompareDataFunc prototype
- Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
- Move device tree files in their own pc-bios/dtb/ subdir
- Correctly check strchrnul() symbol availability on macOS SDK
- Move target-agnostic methods out of cpu-target.c and accel-target.c
- Unmap canceled USB XHCI packet
- Use deposit/extract API in designware model
- Fix MIPS16e translation
- Few missing header fixes

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# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits)
  qemu: Convert target_name() to TargetInfo API
  accel: Move target-agnostic code from accel-target.c -> accel-common.c
  accel: Make AccelCPUClass structure target-agnostic
  accel: Include missing 'qemu/accel.h' header in accel-internal.h
  accel: Implement accel_init_ops_interfaces() for both system/user mode
  cpus: Move target-agnostic methods out of cpu-target.c
  cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()
  qemu: Introduce target_cpu_type()
  qapi: Rename TargetInfo structure as QemuTargetInfo
  hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time
  hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time
  target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time
  target/mips: Check CPU endianness at runtime using env_is_bigendian()
  accel/kvm: Use target_needs_bswap()
  linux-user/elfload: Use target_needs_bswap()
  target/hexagon: Include missing 'accel/tcg/getpc.h'
  accel/tcg: Correct list of included headers in tcg-stub.c
  system/kvm: make functions accessible from common code
  meson: Use osdep_prefix for strchrnul()
  meson: Share common C source prefixes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
7 weeks agoMerge tag 'pull-vfio-20250425' of https://github.com/legoater/qemu into staging
Stefan Hajnoczi [Sun, 27 Apr 2025 16:47:02 +0000 (12:47 -0400)] 
Merge tag 'pull-vfio-20250425' of https://github.com/legoater/qemu into staging

vfio queue:

* Updated IGD passthrough documentation
* Fixed L2 crash on pseries machines
* Reorganized code and renamed services
* Moved HostIOMMUDevice realize after device attachement to help
  adding support for nested IOMMU
* Fixed CPR registration with IOMMUFD backend
* Refactored vfio-pci code to prepare ground for vfio-user

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# gpg: Signature made Fri 25 Apr 2025 04:46:10 EDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20250425' of https://github.com/legoater/qemu: (50 commits)
  vfio: refactor out vfio_pci_config_setup()
  vfio: refactor out vfio_interrupt_setup()
  vfio: Register/unregister container for CPR only once for each container
  vfio: Remove hiod_typename property
  vfio: Cleanup host IOMMU device creation
  vfio/container: Move realize() after attachment
  vfio/iommufd: Move realize() after attachment
  vfio/iommufd: Make a separate call to get IOMMU capabilities
  MAINTAINERS: Add a maintainer for util/vfio-helpers.c
  vfio: Rename VFIOContainer related services
  vfio: Rename VFIODevice related services
  vfio: Rename vfio-common.h to vfio-device.h
  vfio: Introduce vfio_listener_un/register() routines
  vfio: Rename RAM discard related services
  vfio: Introduce new files for VFIO MemoryListener
  vfio: Rename vfio_get_dirty_bitmap()
  vfio: Rename vfio_devices_all_device_dirty_tracking()
  vfio: Rename vfio_devices_all_dirty_tracking_started()
  vfio: Make vfio_container_query_dirty_bitmap() static
  vfio: Make vfio_devices_query_dirty_bitmap() static
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
7 weeks agoqemu-img: improve queue depth validation in img_bench
Denis Rastyogin [Thu, 27 Mar 2025 16:24:23 +0000 (19:24 +0300)] 
qemu-img: improve queue depth validation in img_bench

This error was discovered by fuzzing qemu-img.

Currently, running `qemu-img bench -d 0` in img_bench is allowed,
which is a pointless operation and causes qemu-img to hang.

Signed-off-by: Denis Rastyogin <gerben@altlinux.org>
Message-ID: <20250327162423.25154-5-gerben@altlinux.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 weeks agoqemu: Convert target_name() to TargetInfo API
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 11:47:37 +0000 (12:47 +0100)] 
qemu: Convert target_name() to TargetInfo API

Have target_name() be a target-agnostic method, dispatching
to a per-target TargetInfo singleton structure.
By default a stub singleton is used. No logical change
expected.

Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424222112.36194-3-philmd@linaro.org>

7 weeks agoaccel: Move target-agnostic code from accel-target.c -> accel-common.c
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 17:20:40 +0000 (18:20 +0100)] 
accel: Move target-agnostic code from accel-target.c -> accel-common.c

Various methods of accel-target.c don't use any target-specific
knowledge at all and can be built once in the target-agnostic
accel-common.c file.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250417165430.58213-8-philmd@linaro.org>

7 weeks agoaccel: Make AccelCPUClass structure target-agnostic
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 17:18:24 +0000 (18:18 +0100)] 
accel: Make AccelCPUClass structure target-agnostic

Move the target-agnostic parts of "accel/accel-cpu-target.h"
to "accel/accel-cpu.h".

Doing so we need to include missing "hw/core/cpu.h" header
in "accel/accel-cpu.h" otherwise we get:

  include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass'
     39 |     void (*cpu_class_init)(CPUClass *cc);
        |                            ^

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-7-philmd@linaro.org>

7 weeks agoaccel: Include missing 'qemu/accel.h' header in accel-internal.h
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 17:29:31 +0000 (18:29 +0100)] 
accel: Include missing 'qemu/accel.h' header in accel-internal.h

The "qemu/accel.h" header is implicitly pulled in. Include
it explicitly in order to avoid when refactoring unrelated
headers:

  accel/accel-internal.h:13:32: error: unknown type name 'AccelClass'
     13 | void accel_init_ops_interfaces(AccelClass *ac);
        |                                ^

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-6-philmd@linaro.org>

7 weeks agoaccel: Implement accel_init_ops_interfaces() for both system/user mode
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 17:17:15 +0000 (18:17 +0100)] 
accel: Implement accel_init_ops_interfaces() for both system/user mode

We want to build more common code, moving objects from meson's
specific_ss[] set to common_ss[]. Since the CONFIG_USER_ONLY
definitions isn't applied on the common_ss[] set, it is simpler
to add an empty accel_init_ops_interfaces() stub on user emulation,
removing any CONFIG_USER_ONLY use in accel-target.c.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-5-philmd@linaro.org>

7 weeks agocpus: Move target-agnostic methods out of cpu-target.c
Philippe Mathieu-Daudé [Wed, 2 Apr 2025 03:32:03 +0000 (05:32 +0200)] 
cpus: Move target-agnostic methods out of cpu-target.c

Various methods of cpu-target.c don't use any target-specific
knowledge at all and can be built once in the target-agnostic
cpu-common.c file.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-4-philmd@linaro.org>

7 weeks agocpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 16:42:37 +0000 (17:42 +0100)] 
cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()

Replace the target-specific CPU_RESOLVING_TYPE definition
by a call to the target-agnostic target_cpu_type() runtime
helper.

Since the big "cpu.h" is not required anymore in tcg-all.c,
remove it, using the tinier "cpu-param.h" header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250417165430.58213-3-philmd@linaro.org>

7 weeks agoqemu: Introduce target_cpu_type()
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 15:59:35 +0000 (17:59 +0200)] 
qemu: Introduce target_cpu_type()

Introduce the target_cpu_type() helper to access the
CPU_RESOLVING_TYPE target-specific definition from
target-agnostic code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-2-philmd@linaro.org>

7 weeks agoqapi: Rename TargetInfo structure as QemuTargetInfo
Philippe Mathieu-Daudé [Wed, 16 Apr 2025 11:25:23 +0000 (13:25 +0200)] 
qapi: Rename TargetInfo structure as QemuTargetInfo

The QAPI-generated 'TargetInfo' structure name is only used
in a single file. We want to heavily use another structure
similarly named. Rename the QAPI one, since structure names
are not part of the public API.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20250422145502.70770-2-philmd@linaro.org>

7 weeks agohw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 08:18:35 +0000 (10:18 +0200)] 
hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time

Rather than evaluating TARGET_BIG_ENDIAN at preprocessing
time via #ifdef'ry, do it in C at compile time

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-8-philmd@linaro.org>

7 weeks agohw/mips: Evaluate TARGET_BIG_ENDIAN at compile time
Philippe Mathieu-Daudé [Wed, 16 Apr 2025 12:33:06 +0000 (14:33 +0200)] 
hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time

Rather than evaluating TARGET_BIG_ENDIAN at preprocessing
time via #ifdef'ry, do it in C at compile time

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-7-philmd@linaro.org>

7 weeks agotarget/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 08:40:29 +0000 (10:40 +0200)] 
target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time

Rather than evaluating TARGET_BIG_ENDIAN at preprocessing
time via #ifdef'ry, do it in C at compile time

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-6-philmd@linaro.org>

7 weeks agotarget/mips: Check CPU endianness at runtime using env_is_bigendian()
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 08:47:00 +0000 (10:47 +0200)] 
target/mips: Check CPU endianness at runtime using env_is_bigendian()

Since CPU endianness can be toggled at runtime before resetting,
checking the endianness at build time preprocessing the
TARGET_BIG_ENDIAN definition isn't correct. We have to call
mips_env_is_bigendian() to get the CPU endianness at runtime.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-4-philmd@linaro.org>

7 weeks agoaccel/kvm: Use target_needs_bswap()
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 08:37:53 +0000 (10:37 +0200)] 
accel/kvm: Use target_needs_bswap()

Check whether we need to swap at runtime using
target_needs_bswap().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-3-philmd@linaro.org>

7 weeks agolinux-user/elfload: Use target_needs_bswap()
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 08:38:10 +0000 (10:38 +0200)] 
linux-user/elfload: Use target_needs_bswap()

Check whether we need to swap at runtime using
target_needs_bswap().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-2-philmd@linaro.org>

7 weeks agotarget/hexagon: Include missing 'accel/tcg/getpc.h'
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 08:18:58 +0000 (10:18 +0200)] 
target/hexagon: Include missing 'accel/tcg/getpc.h'

Since the macros.h headers call GETPC(), they need to
include "accel/tcg/getpc.h", which defines it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Message-Id: <20250424094653.35932-9-philmd@linaro.org>

7 weeks agoaccel/tcg: Correct list of included headers in tcg-stub.c
Philippe Mathieu-Daudé [Thu, 24 Apr 2025 07:48:42 +0000 (09:48 +0200)] 
accel/tcg: Correct list of included headers in tcg-stub.c

In commit 3549118b498 we moved cpu_loop_exit*() declarations to
"exec/cpu-common.h" but neglected to update tcg-stub.c. We missed
it because "exec/cpu-common.h" is indirectly pulled in via
"exec/exec-all.h" -> "exec/translation-block.h". Include it
directly instead of the not necessary "exec/exec-all.h".

Commit bb6cf6f0168 ("accel/tcg: Factor tcg_cpu_reset_hold() out")
removed the need for "exec/tb-flush.h", so remote it too.

Fixes: 3549118b498 ("exec: Move cpu_loop_foo() functions to 'cpu-common.h'")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Message-Id: <20250424094653.35932-4-philmd@linaro.org>

7 weeks agosystem/kvm: make functions accessible from common code
Pierrick Bouvier [Thu, 24 Apr 2025 23:28:28 +0000 (16:28 -0700)] 
system/kvm: make functions accessible from common code

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250424232829.141163-8-pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agomeson: Use osdep_prefix for strchrnul()
Akihiko Odaki [Thu, 24 Apr 2025 04:50:14 +0000 (13:50 +0900)] 
meson: Use osdep_prefix for strchrnul()

macOS SDK may have the symbol of strchrnul(), but it is actually
available only on macOS 15.4 or later and that fact is codified in
string.h. Include the header file using osdep_prefix to check if the
function is available on the deployment target.

Cc: qemu-stable@nongnu.org
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250424-buildsys-v1-4-97655e3b25d7@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agomeson: Share common C source prefixes
Akihiko Odaki [Thu, 24 Apr 2025 04:50:13 +0000 (13:50 +0900)] 
meson: Share common C source prefixes

gnu_source_prefix defines _GNU_SOURCE for compiler object functions.
The definition is universally available in the code base.

docs/devel/style.rst also says that the "qemu/osdep.h" header is
always included, so files included in the file is also universally
available in the code base.

Rename gnu_source_prefix to osdep_prefix, and add #include directives
that are referred by the users of gnu_source_prefix and contained in
qemu/osdep.h to safely de-duplicate #include directives.

Cc: qemu-stable@nongnu.org
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250424-buildsys-v1-3-97655e3b25d7@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agomeson: Remove CONFIG_STATX and CONFIG_STATX_MNT_ID
Akihiko Odaki [Thu, 24 Apr 2025 04:50:12 +0000 (13:50 +0900)] 
meson: Remove CONFIG_STATX and CONFIG_STATX_MNT_ID

CONFIG_STATX and CONFIG_STATX_MNT_ID are not used since commit
e0dc2631ec4 ("virtiofsd: Remove source").

Cc: qemu-stable@nongnu.org
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250424-buildsys-v1-2-97655e3b25d7@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agomeson: Use has_header_symbol() to check getcpu()
Akihiko Odaki [Thu, 24 Apr 2025 04:50:11 +0000 (13:50 +0900)] 
meson: Use has_header_symbol() to check getcpu()

The use of gnu_source_prefix in the detection of getcpu() was
ineffective because the header file that declares getcpu() when
_GNU_SOURCE is defined was not included. Pass sched.h to
has_header_symbol() so that the existence of the declaration will be
properly checked.

Cc: qemu-stable@nongnu.org
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250424-buildsys-v1-1-97655e3b25d7@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agopc-bios: Move device tree files in their own subdir
BALATON Zoltan [Wed, 23 Apr 2025 10:02:21 +0000 (12:02 +0200)] 
pc-bios: Move device tree files in their own subdir

We have several device tree files already and may have more in the
future so add a new dtb subdirectory and move device tree files there
so they are not mixed with ROM binaries.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <57f179bd3904c1f2ca062ca4d4ff9592bb4f4daa.1745402140.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agosystem/datadir: Add new type constant for DTB files
BALATON Zoltan [Wed, 23 Apr 2025 10:02:20 +0000 (12:02 +0200)] 
system/datadir: Add new type constant for DTB files

Currently DTB files are mixed with ROMs under BIOS type. Separate them
under a new type constant and turn defines into an enum while at it.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <ae793d1f81e3577605759c43871722324a1ef2cb.1745402140.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agosystem/memory: Remove DEVICE_HOST_ENDIAN definition
Philippe Mathieu-Daudé [Wed, 23 Apr 2025 11:11:31 +0000 (13:11 +0200)] 
system/memory: Remove DEVICE_HOST_ENDIAN definition

Since the previous commit ("exec/memory.h: make devend_memop
"target defines" agnostic") there is a single use of the
DEVICE_HOST_ENDIAN definition in ram_device_mem_ops: inline
it and remove its definition altogether.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250423111625.10424-1-philmd@linaro.org>

7 weeks agosystem/vl: Fix type conflict of GLib function pointers
Kohei Tokunaga [Tue, 22 Apr 2025 05:27:07 +0000 (14:27 +0900)] 
system/vl: Fix type conflict of GLib function pointers

On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.

Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <e9a50b76c54cc64fc9985186f0aef3fcc2024da6.1745295397.git.ktokunaga.mail@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agocontrib/plugins: Fix type conflict of GLib function pointers
Kohei Tokunaga [Tue, 22 Apr 2025 05:27:10 +0000 (14:27 +0900)] 
contrib/plugins: Fix type conflict of GLib function pointers

On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.

Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <0fcddfca16ca8da2bdaa7b2c114476f5b73d032b.1745295397.git.ktokunaga.mail@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agohw/net/can: Fix type conflict of GLib function pointers
Kohei Tokunaga [Tue, 22 Apr 2025 05:27:11 +0000 (14:27 +0900)] 
hw/net/can: Fix type conflict of GLib function pointers

On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.

Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-ID: <4d47a75c5768c9a6dc5d8b3504e78837577ad70d.1745295397.git.ktokunaga.mail@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agoblock: Remove unused callback function *bdrv_aio_pdiscard
Sunny Zhu [Mon, 21 Apr 2025 18:21:26 +0000 (02:21 +0800)] 
block: Remove unused callback function *bdrv_aio_pdiscard

The bytes type in *bdrv_aio_pdiscard should be int64_t rather than int.

There are no drivers implementing the *bdrv_aio_pdiscard() callback,
it appears to be an unused function. Therefore, we'll simply remove it
instead of fixing it.

Additionally, coroutine-based callbacks are preferred. If someone needs
to implement bdrv_aio_pdiscard, a coroutine-based version would be
straightforward to implement.

Signed-off-by: Sunny Zhu <sunnyzhyy@qq.com>
Message-ID: <tencent_7140D2E54157D98CF3D9E64B1A007A1A7906@qq.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 weeks agohw/core/loader: Fix type conflict of GLib function pointers
Kohei Tokunaga [Tue, 22 Apr 2025 05:27:05 +0000 (14:27 +0900)] 
hw/core/loader: Fix type conflict of GLib function pointers

On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.

Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <26dfe9191154ca65dca6ef51ce768ad2a0c30d5f.1745295397.git.ktokunaga.mail@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agohw/intc/i8259: Remove unused DEBUG_PIC define
BALATON Zoltan [Wed, 23 Apr 2025 10:11:25 +0000 (12:11 +0200)] 
hw/intc/i8259: Remove unused DEBUG_PIC define

The debug printfs were converted to traces so this define is now unused.

Fixes: 0880a87300 (i8259: convert DPRINTFs into trace)
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Message-ID: <20250423101125.B243A55C592@zero.eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agohw/usb/hcd-xhci: Unmap canceled packet
Akihiko Odaki [Fri, 18 Apr 2025 05:51:48 +0000 (14:51 +0900)] 
hw/usb/hcd-xhci: Unmap canceled packet

When the Stop Endpoint Command is received, packets running
asynchronously are canceled and then all packets are cleaned up. Packets
running asynchronously hold the DMA mapping so cleaning the packets leak
the mapping. Remove the mapping after canceling packets to fix the leak.

Fixes: 62c6ae04cf43 ("xhci: Initial xHCI implementation")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250418-xhc-v1-1-bb32dab6a67e@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agoexec: Rename target_words_bigendian() -> target_big_endian()
Philippe Mathieu-Daudé [Thu, 17 Apr 2025 07:31:24 +0000 (09:31 +0200)] 
exec: Rename target_words_bigendian() -> target_big_endian()

In commit 98ed8ecfc9d ("exec: introduce target_words_bigendian()
helper") target_words_bigendian() was matching the definition it
was depending on (TARGET_WORDS_BIGENDIAN). Later in commit
ee3eb3a7ce7 ("Replace TARGET_WORDS_BIGENDIAN") the definition was
renamed as TARGET_BIG_ENDIAN but we didn't update the helper.
Do it now mechanically using:

  $ sed -i -e s/target_words_bigendian/target_big_endian/g \
        $(git grep -wl target_words_bigendian)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250417210025.68322-1-philmd@linaro.org>

7 weeks agotarget/mips: Fix MIPS16e translation
Hauke Mehrtens [Sat, 12 Apr 2025 19:40:03 +0000 (21:40 +0200)] 
target/mips: Fix MIPS16e translation

Fix a wrong conversion to gen_op_addr_addi(). The framesize should be
added like it was done before.

This bug broke booting OpenWrt MIPS32 BE malta Linux system images
generated by OpenWrt.

Cc: qemu-stable@nongnu.org
Fixes: d0b24b7f50e1 ("target/mips: Use gen_op_addr_addi() when possible")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250412194003.181411-1-hauke@hauke-m.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agotarget/arm: Replace target_ulong -> vaddr for CPUWatchpoint
Philippe Mathieu-Daudé [Thu, 3 Apr 2025 22:25:06 +0000 (00:25 +0200)] 
target/arm: Replace target_ulong -> vaddr for CPUWatchpoint

CPUWatchpoint::vaddr/len are of type vaddr.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250415172246.79470-4-philmd@linaro.org>

7 weeks agotarget/arm: Replace target_ulong -> hwaddr in ARMMMUFaultInfo
Philippe Mathieu-Daudé [Thu, 3 Apr 2025 22:19:59 +0000 (00:19 +0200)] 
target/arm: Replace target_ulong -> hwaddr in ARMMMUFaultInfo

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250415172246.79470-2-philmd@linaro.org>

7 weeks agotarget/arm: Handle AArch64 gdb read/write regs in TYPE_ARM_CPU
Peter Maydell [Mon, 17 Mar 2025 14:28:15 +0000 (14:28 +0000)] 
target/arm: Handle AArch64 gdb read/write regs in TYPE_ARM_CPU

Instead of having the TYPE_AARCH64_CPU subclass set
CPUClass::gdb_read_register and ::gdb_write_register to different
methods from those of the TYPE_ARM_CPU parent class, have the
TYPE_ARM_CPU methods handle either AArch32 or AArch64 at runtime.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-6-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agotarget/arm: Handle gdb_core_xml_file in TYPE_ARM_CPU
Peter Maydell [Mon, 17 Mar 2025 14:28:14 +0000 (14:28 +0000)] 
target/arm: Handle gdb_core_xml_file in TYPE_ARM_CPU

Instead of having the TYPE_AARCH64_CPU subclass set
CPUClass:gdb_core_xml_file to a different value from that that
TYPE_ARM_CPU uses, implement the gdb_get_core_xml_file method in the
TYPE_ARM_CPU class to return either the AArch64 or AArch32 XML file
name.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-5-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agotarget/arm: Handle AArch64 in TYPE_ARM_CPU gdb_arch_name
Peter Maydell [Mon, 17 Mar 2025 14:28:13 +0000 (14:28 +0000)] 
target/arm: Handle AArch64 in TYPE_ARM_CPU gdb_arch_name

Instead of having the TYPE_AARCH64_CPU subclass set
CPUClass::gdb_arch_name to a different function, make the
TYPE_ARM_CPU implementation of the method handle AArch64.

For the moment we make the "is this AArch64?" function test "is the
CPU of TYPE_AARCH64_CPU?", so that this produces no behavioural
change.  When we've moved all the gdbstub related methods across to
the base class, we will be able to change this to be "does the CPU
have the ARM_FEATURE_AARCH64 feature?".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-4-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agogdbstub: Allow gdb_core_xml_file to be set at runtime
Peter Maydell [Mon, 17 Mar 2025 14:28:12 +0000 (14:28 +0000)] 
gdbstub: Allow gdb_core_xml_file to be set at runtime

Currently the CPUClass:gdb_core_xml_file setting is a simple 'const
char *' which the CPU class must set to a fixed string.  Allow the
CPU class to instead set a new method gdb_get_core_xml_file() which
returns this string.

This will allow Arm CPUs to use different XML files for AArch32 vs
AArch64 without having to have an extra AArch64-specific class type
purely to give somewhere to set cc->gdb_core_xml_file differently.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-3-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agohw/core/cpu: gdb_arch_name string should not be freed
Peter Maydell [Mon, 17 Mar 2025 14:28:11 +0000 (14:28 +0000)] 
hw/core/cpu: gdb_arch_name string should not be freed

The documentation for the CPUClass::gdb_arch_name method claims that
the returned string should be freed with g_free().  This is not
correct: in commit a650683871ba728 we changed this method to
instead return a simple constant string, but forgot to update
the documentation.

Make the documentation match the new semantics.

Fixes: a650683871ba728 ("hw/core/cpu: Return static value with gdb_arch_name()")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-2-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agohw/core: Get default_cpu_type calling machine_class_default_cpu_type()
Philippe Mathieu-Daudé [Tue, 22 Apr 2025 08:32:31 +0000 (10:32 +0200)] 
hw/core: Get default_cpu_type calling machine_class_default_cpu_type()

Since commit 62b4a227a33 the default cpu type can come from the
valid_cpu_types[] array. Call the machine_class_default_cpu_type()
instead of accessing MachineClass::default_cpu_type field.

Cc: qemu-stable@nongnu.org
Fixes: 62b4a227a33 ("hw/core: Add machine_class_default_cpu_type()")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250422084114.39499-1-philmd@linaro.org>

7 weeks agoqom/object: Fix type conflict of GLib function pointers
Kohei Tokunaga [Tue, 22 Apr 2025 05:27:06 +0000 (14:27 +0900)] 
qom/object: Fix type conflict of GLib function pointers

On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.

Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <8ca13f4e2b9eba9d1f6030b0afb442a24330e463.1745295397.git.ktokunaga.mail@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7 weeks agoqom: Make InterfaceInfo[] uses const
Philippe Mathieu-Daudé [Wed, 23 Apr 2025 16:46:19 +0000 (18:46 +0200)] 
qom: Make InterfaceInfo[] uses const

Mechanical change using:

  $ sed -i -E 's/\(InterfaceInfo.?\[/\(const InterfaceInfo\[/g' \
              $(git grep -lE '\(InterfaceInfo.?\[\]\)')

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250424194905.82506-7-philmd@linaro.org>

7 weeks agoqom: Constify TypeInfo::interfaces
Philippe Mathieu-Daudé [Wed, 23 Apr 2025 16:44:12 +0000 (18:44 +0200)] 
qom: Constify TypeInfo::interfaces

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250424194905.82506-6-philmd@linaro.org>

7 weeks agoqom: Constify TypeInfo::class_data
Philippe Mathieu-Daudé [Mon, 10 Feb 2025 08:56:56 +0000 (09:56 +0100)] 
qom: Constify TypeInfo::class_data

All callers now correctly expect a const class data.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-5-philmd@linaro.org>

7 weeks agoqom: Have class_init() take a const data argument
Philippe Mathieu-Daudé [Sun, 9 Feb 2025 22:47:35 +0000 (23:47 +0100)] 
qom: Have class_init() take a const data argument

Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>

7 weeks agoqom: Have class_base_init() take a const data argument
Philippe Mathieu-Daudé [Sun, 9 Feb 2025 21:15:54 +0000 (22:15 +0100)] 
qom: Have class_base_init() take a const data argument

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-3-philmd@linaro.org>

7 weeks agohw/misc/edu: Convert type_init() -> DEFINE_TYPES()
Philippe Mathieu-Daudé [Wed, 23 Apr 2025 17:00:39 +0000 (19:00 +0200)] 
hw/misc/edu: Convert type_init() -> DEFINE_TYPES()

Prefer DEFINE_TYPES() macro over type_init() to register
QOM types.

Initialize the .interfaces struct field as compound literal
casted to InterfaceInfo type like the rest of our code base.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-2-philmd@linaro.org>

7 weeks agohw/pci-host/designware: Use deposit/extract API
Philippe Mathieu-Daudé [Mon, 31 Mar 2025 15:15:47 +0000 (17:15 +0200)] 
hw/pci-host/designware: Use deposit/extract API

Prefer the safer (less bug-prone) deposit/extract API
to access lower/upper 32-bit of 64-bit registers.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-Id: <20250331152041.74533-3-philmd@linaro.org>

7 weeks agoblock/io: skip head/tail requests on EINVAL
Stefan Hajnoczi [Thu, 17 Apr 2025 15:05:28 +0000 (11:05 -0400)] 
block/io: skip head/tail requests on EINVAL

When guests send misaligned discard requests, the block layer breaks
them up into a misaligned head, an aligned main body, and a misaligned
tail.

The file-posix block driver on Linux returns -EINVAL on misaligned
discard requests. This causes bdrv_co_pdiscard() to fail and guests
configured with werror=stop will pause.

Add a special case for misaligned head/tail requests. Simply continue
when EINVAL is encountered so that the aligned main body of the request
can be completed and the guest is not paused. This is the best we can do
when guest discard limits do not match the host discard limits.

Fixes: https://issues.redhat.com/browse/RHEL-86032
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Hanna Czenczek <hreitz@redhat.com>
Message-ID: <20250417150528.76470-3-stefanha@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 weeks agofile-posix: probe discard alignment on Linux block devices
Stefan Hajnoczi [Thu, 17 Apr 2025 15:05:27 +0000 (11:05 -0400)] 
file-posix: probe discard alignment on Linux block devices

Populate the pdiscard_alignment block limit so the block layer is able
align discard requests correctly.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-ID: <20250417150528.76470-2-stefanha@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 weeks agocpus: Remove #ifdef check on cpu_list definition
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 15:24:29 +0000 (16:24 +0100)] 
cpus: Remove #ifdef check on cpu_list definition

Since we removed all definitions of cpu_list, the #ifdef
check is always true. Remove it, inlining cpu_list().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-7-philmd@linaro.org>

7 weeks agotarget/s390x: Register CPUClass:list_cpus
Philippe Mathieu-Daudé [Mon, 24 Mar 2025 18:29:03 +0000 (19:29 +0100)] 
target/s390x: Register CPUClass:list_cpus

Both s390_cpu_list() and s390_set_qemu_cpu_model() are
defined in cpu_models.c, move their declarations in the
related "cpu_models.h" header. Use full path to header
in s390-virtio-ccw.c file.

Register s390_cpu_list() as CPUClass:list_cpus callback
and remove the cpu_list definition.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250324185837.46506-6-philmd@linaro.org>

7 weeks agotarget/sparc: Register CPUClass:list_cpus
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 15:15:35 +0000 (16:15 +0100)] 
target/sparc: Register CPUClass:list_cpus

Register sparc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-5-philmd@linaro.org>

7 weeks agotarget/ppc: Register CPUClass:list_cpus
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 15:22:41 +0000 (16:22 +0100)] 
target/ppc: Register CPUClass:list_cpus

Register ppc_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-4-philmd@linaro.org>

7 weeks agotarget/i386: Register CPUClass:list_cpus
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 15:18:00 +0000 (16:18 +0100)] 
target/i386: Register CPUClass:list_cpus

Register x86_cpu_list() as CPUClass:list_cpus callback.
Reduce its scope and remove the cpu_list definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-3-philmd@linaro.org>

7 weeks agocpus: Introduce CPUClass::list_cpus() callback
Philippe Mathieu-Daudé [Sun, 23 Mar 2025 15:09:06 +0000 (16:09 +0100)] 
cpus: Introduce CPUClass::list_cpus() callback

Some targets define cpu_list to a method listing their
CPUs on stdout. In order to make list_cpus() generic,
introduce the CPUClass::list_cpus() callback.
When no callback is registered, list_cpus() defaults
to the cpu_list definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-2-philmd@linaro.org>

7 weeks agovfio: refactor out vfio_pci_config_setup()
John Levon [Wed, 9 Apr 2025 13:48:02 +0000 (15:48 +0200)] 
vfio: refactor out vfio_pci_config_setup()

Refactor the PCI config setup code out of vfio_realize() for
readability.

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: John Levon <john.levon@nutanix.com>
Link: https://lore.kernel.org/qemu-devel/20250409134814.478903-3-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
7 weeks agovfio: refactor out vfio_interrupt_setup()
John Levon [Wed, 9 Apr 2025 13:48:01 +0000 (15:48 +0200)] 
vfio: refactor out vfio_interrupt_setup()

Refactor the interrupt setup code out of vfio_realize() for readability.

Signed-off-by: John Levon <john.levon@nutanix.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250409134814.478903-2-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
7 weeks agovfio: Register/unregister container for CPR only once for each container
Zhenzhong Duan [Thu, 24 Apr 2025 06:33:55 +0000 (14:33 +0800)] 
vfio: Register/unregister container for CPR only once for each container

vfio_cpr_register_container and vfio_cpr_unregister_container are container
scoped function. Calling them for each device attaching/detaching would
corrupt CPR reboot notifier list, i.e., when two VFIO devices are attached
to same container and have same notifier registered twice.

Fixes: d9fa4223b30a ("vfio: register container for cpr")
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424063355.3855174-1-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
7 weeks agovfio: Remove hiod_typename property
Zhenzhong Duan [Wed, 23 Apr 2025 07:28:24 +0000 (15:28 +0800)] 
vfio: Remove hiod_typename property

Because we handle host IOMMU device creation in each container backend,
we know which type name to use, so hiod_typename property is useless
now, just remove it.

Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423072824.3647952-6-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>