jakub [Wed, 23 Oct 2013 06:32:23 +0000 (06:32 +0000)]
* gimple-pretty-print.c (dump_ssaname_info): Always print "# " before
the info, not after it.
(gump_gimple_phi): Add COMMENT argument, if true, print "# " after
dump_ssaname_info call.
(pp_gimple_stmt_1): Adjust caller.
(dump_phi_nodes): Likewise. Don't print "# " here.
hubicka [Tue, 22 Oct 2013 19:15:02 +0000 (19:15 +0000)]
* i386.h (TARGET_MISALIGNED_MOVE_STRING_PROLOGUES_EPILOGUES): New tuning flag.
* x86-tune.def (TARGET_MISALIGNED_MOVE_STRING_PROLOGUES): Define it.
* i386.c (expand_small_movmem_or_setmem): New function.
(expand_set_or_movmem_prologue_epilogue_by_misaligned_moves): New function
(alg_usable_p): Add support for value ranges; cleanup.
(ix86_expand_set_or_movmem): Add support for misaligned moves.
* doc/invoke.texi: Document -ggnu-pubnames.
* common.opt: Add new option -ggnu-pubnames and modify -gpubnames
logic.
* dwarf2out.c: Include gdb/gdb-index.h.
(DEBUG_PUBNAMES_SECTION, DEBUG_PUBTYPES_SECTION): Handle
debug_generate_pub_sections.
(is_java, output_pubtables, output_pubname): New functions.
(include_pubname_in_output): Handle debug_generate_pub_sections at
level 2.
(size_of_pubnames): Use new local space_for_flags based on
debug_generate_pub_sections.
(output_pubnames): Unify pubnames and pubtypes output logic.
Genericize comments. Call output_pubname.
(dwarf2out_finish): Move logic to output_pubnames and call it.
wschmidt [Tue, 22 Oct 2013 17:31:17 +0000 (17:31 +0000)]
gcc:
2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse
meaning of merge-high and merge-low masks for little endian; avoid
use of vector-pack masks for little endian for mismatched modes.
gcc/testsuite:
2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com>
* gcc.target/powerpc/altivec-perm-1.c: Move the two vector pack
tests into...
* gcc.target/powerpc/altivec-perm-3.c: ...this new test, which is
restricted to big-endian targets.
pault [Tue, 22 Oct 2013 04:40:57 +0000 (04:40 +0000)]
2013-10-22 Paul Thomas <pault@gcc.gnu.org>
PR fortran 57893
* class.c : Include target-memory.h.
(gfc_find_intrinsic_vtab) Build a minimal expression so that
gfc_element_size can be used to obtain the storage size, rather
that the kind value.
2013-10-22 Paul Thomas <pault@gcc.gnu.org>
PR fortran 57893
* gfortran.dg/unlimited_polymorphic_13.f90 : New test.
dnovillo [Mon, 21 Oct 2013 19:36:37 +0000 (19:36 +0000)]
Re-factor inclusion of tree.h.
This moves tree.h out of every header. This exposes dependencies of
tree.h in files that should probably not need it after tree and gimple
are separated.
After this change, no header should include tree.h directly. It should
only be included by a .c file. Unfortunately, I did not find an
automatic way of forcing this.
Tested on x86_64 with all languages enabled and using
contrib/config-list.mk.
Fix DECL_BIT_FIELD depencency on flag_strict_volatile_bitfields
and get_inner_reference returning different pmode for non-volatile
bit-field members dependent on flag_strict_volatile_bitfields.
* stor-layout.c (layout_decl): Remove special handling of
flag_strict_volatile_bitfields.
* expr.c (get_inner_reference): Don't use DECL_BIT_FIELD
if flag_strict_volatile_bitfields > 0 and TREE_THIS_VOLATILE.
law [Mon, 21 Oct 2013 15:25:09 +0000 (15:25 +0000)]
* tree-ssa-threadedge.c (thread_through_normal_block): New argument VISITED.
Remove VISISTED as a local variable. When we have a threadable jump, verify
the destination of the jump has not been visised.
(thread_across_edge): Allocate VISITED bitmap once at function scope and
use it throughout. Make sure to set appropriate bits in VISITED for E (start
of jump thread path).
* tree-ssa-threadupdate.c (mark_threaded_blocks): Reject threading through
a joiner if any edge on the path has a recorded jump thread.
hubicka [Sun, 20 Oct 2013 11:18:12 +0000 (11:18 +0000)]
* config/i386/x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM,
X86_TUNE_SLOW_IMUL_IMM8): Keep enabled only for K8 and AMDFAM10.
(X86_TUNE_USE_VECTOR_FP_CONVERTS): Disable for generic.
uros [Sat, 19 Oct 2013 12:58:20 +0000 (12:58 +0000)]
PR target/58792
* config/i386/i386.c (ix86_function_value_regno): Add DX_REG,
ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG
and SI_REG for 64bit SYSV ABI targets.
uros [Sat, 19 Oct 2013 12:32:25 +0000 (12:32 +0000)]
* mode-switching.c (create_pre_exit): Rename maybe_builtin_apply
to multi_reg_return. Clarify that we are skipping USEs of multiple
return registers. Use bool type where appropriate.
ebotcazou [Sat, 19 Oct 2013 11:11:03 +0000 (11:11 +0000)]
* gcc-interface/utils.c (scale_by_factor_of): New function.
(rest_of_record_type_compilation): Use scale_by_factor_of in order to
scale the original offset for both rounding cases; in the second case,
take into accout the addend to compute the alignment. Tidy up.
tejohnson [Fri, 18 Oct 2013 17:25:44 +0000 (17:25 +0000)]
2013-10-18 Teresa Johnson <tejohnson@google.com>
* predict.c (probably_never_executed): Compare frequency-based
count to number of training runs.
* params.def (UNLIKELY_BB_COUNT_FRACTION): New parameter.
timshen [Fri, 18 Oct 2013 16:13:07 +0000 (16:13 +0000)]
2013-10-18 Tim Shen <timshen91@gmail.com>
* include/bits/regex_scanner.tcc: (_Scanner<>::_M_scan_normal,
_Scanner<>::_M_eat_escape_ecma, _Scanner<>::_M_eat_escape_posix,
_Scanner<>::_M_eat_escape_awk): Narrow character before finding in maps.
* testsuite/28_regex/algorithms/regex_match/ecma/wchar_t/cjk_match.cc:
New.
rguenth [Fri, 18 Oct 2013 08:36:28 +0000 (08:36 +0000)]
2013-10-18 Richard Biener <rguenther@suse.de>
* stor-layout.c (layout_type): Do not change TYPE_PRECISION
or TYPE_UNSIGNED of integral types.
(set_min_and_max_values_for_integral_type): Leave TYPE_MIN/MAX_VALUE
NULL_TREE for zero-precision integral types.
meissner [Thu, 17 Oct 2013 21:20:46 +0000 (21:20 +0000)]
2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-fp.c: New test for floating point
scalar operations when using -mupper-regs-sf and -mupper-regs-df.
* gcc.target/powerpc/ppc-target-1.c: Update tests to allow either
VSX scalar operations or the traditional floating point form of
the instruction.
* gcc.target/powerpc/ppc-target-2.c: Likewise.
* gcc.target/powerpc/recip-3.c: Likewise.
* gcc.target/powerpc/recip-5.c: Likewise.
* gcc.target/powerpc/pr72747.c: Likewise.
* gcc.target/powerpc/vsx-builtin-3.c: Likewise.
clyon [Thu, 17 Oct 2013 20:57:21 +0000 (20:57 +0000)]
2013-10-17 Charles Bayis <charles.baylis@linaro.org>
* gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets.
* gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets.
* gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require
effective target arm_thumb1_ok.
* lib/target-supports.exp
(check_effective_target_arm_fp16_ok_nocache): Don't force
-mfloat-abi=soft when building for hardfloat target.
meissner [Thu, 17 Oct 2013 19:12:57 +0000 (19:12 +0000)]
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
fields to the reg_addr array that describes the valid addressing
mode for any register, general purpose registers, floating point
registers, and Altivec registers.
(FIRST_RELOAD_REG_CLASS): Likewise.
(LAST_RELOAD_REG_CLASS): Likewise.
(struct reload_reg_map_type): Likewise.
(reload_reg_map_type): Likewise.
(RELOAD_REG_VALID): Likewise.
(RELOAD_REG_MULTIPLE): Likewise.
(RELOAD_REG_INDEXED): Likewise.
(RELOAD_REG_OFFSET): Likewise.
(RELOAD_REG_PRE_INCDEC): Likewise.
(RELOAD_REG_PRE_MODIFY): Likewise.
(reg_addr): Likewise.
(mode_supports_pre_incdec_p): New helper functions to say whether
a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
(mode_supports_pre_modify_p): Likewise.
(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
print the valid address mode bits for each mode.
(rs6000_debug_print_mode): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): New function to set up the address
mask bits for each type.
(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
Call rs6000_setup_reg_addr_masks to set up the address mask bits.
(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
PRE_MODIFY are supported.
(rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec
registers, instead of {src,dest}_av_p.
(rs6000_print_options_internal): Tweak the debug output slightly.
meissner [Thu, 17 Oct 2013 19:04:37 +0000 (19:04 +0000)]
2013-10-07 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
fields to the reg_addr array that describes the valid addressing
mode for any register, general purpose registers, floating point
registers, and Altivec registers.
(FIRST_RELOAD_REG_CLASS): Likewise.
(LAST_RELOAD_REG_CLASS): Likewise.
(struct reload_reg_map_type): Likewise.
(reload_reg_map_type): Likewise.
(RELOAD_REG_VALID): Likewise.
(RELOAD_REG_MULTIPLE): Likewise.
(RELOAD_REG_INDEXED): Likewise.
(RELOAD_REG_OFFSET): Likewise.
(RELOAD_REG_PRE_INCDEC): Likewise.
(RELOAD_REG_PRE_MODIFY): Likewise.
(reg_addr): Likewise.
(mode_supports_pre_incdec_p): New helper functions to say whether
a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
(mode_supports_pre_modify_p): Likewise.
(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
print the valid address mode bits for each mode.
(rs6000_debug_print_mode): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): New function to set up the address
mask bits for each type.
(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
Call rs6000_setup_reg_addr_masks to set up the address mask bits.
(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
PRE_MODIFY are supported.
(rs6000_print_options_internal): Tweak the debug output slightly.
amacleod [Thu, 17 Oct 2013 17:41:07 +0000 (17:41 +0000)]
* tree-flow.h (struct omp_region): Move to omp-low.c.
Remove omp_ prototypes and variables.
* gimple.h (omp_reduction_init): Move prototype to omp-low.h.
(copy_var_decl): Relocate prototype from tree-flow.h.
* gimple.c (copy_var_decl): Relocate from omp-low.c.
* tree.h: Move prototype to omp-low.h.
* omp-low.h: New File. Relocate prototypes here.
* omp-low.c (struct omp_region): Make local here.
(root_omp_region): Make static.
(copy_var_decl) Move to gimple.c.
(new_omp_region): Make static.
(make_gimple_omp_edges): New. Refactored from tree-cfg.c make_edges.
* tree-cfg.c: Include omp-low.h.
(make_edges): Factor out OMP specific bits to make_gimple_omp_edges.
* gimplify.c: Include omp-low.h.
* tree-parloops.c: Likewise.
c
* c-parser.c: Include omp-low.h.
* c-typeck.c: Likewise.
cp
* parser.c: Include omp-low.h.
* semantics.c: Likewise.
meissner [Thu, 17 Oct 2013 17:07:49 +0000 (17:07 +0000)]
[gcc]
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/58673
* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
restrict TImode addresses to single indirect registers if both
-mquad-memory and -mvsx-timode are used.
(rs6000_output_move_128bit): Use quad_load_store_p to determine if
we should emit load/store quad. Remove using %y for quad memory
addresses.
* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
constraints to allow load/store quad on machines where TImode is
not allowed in VSX registers. Use 'n' instead of 'F' constraint
for TImode to load integer constants.
[gcc/testsuite]
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/58673
* gcc.target/powerpc/pr58673-1.c: New file to test whether
-mquad-word + -mno-vsx-timode causes errors.
* gcc.target/powerpc/pr58673-2.c: Likewise.
meissner [Thu, 17 Oct 2013 17:06:24 +0000 (17:06 +0000)]
[gcc]
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/58673
* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
restrict TImode addresses to single indirect registers if both
-mquad-memory and -mvsx-timode are used.
(rs6000_output_move_128bit): Use quad_load_store_p to determine if
we should emit load/store quad. Remove using %y for quad memory
addresses.
* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
constraints to allow load/store quad on machines where TImode is
not allowed in VSX registers. Use 'n' instead of 'F' constraint
for TImode to load integer constants.
[gcc/testsuite]
2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/58673
* gcc.target/powerpc/pr58673-1.c: New file to test whether
-mquad-word + -mno-vsx-timode causes errors.
* gcc.target/powerpc/pr58673-2.c: Likewise.
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