* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
Andrew Cagney [Sun, 22 Jun 2003 16:48:12 +0000 (16:48 +0000)]
2003-06-22 Andrew Cagney <cagney@redhat.com>
Written by matthew green <mrg@redhat.com>, with fixes from Aldy
Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
Nick Clifton <nickc@redhat.com>.
* ppc-instructions: Include altivec.igen and e500.igen.
(model_busy, model_data): Add vr_busy and vscr_busy.
(model_trace_release): Trace vr_busy and vscr_busy.
(model_new_cycle): Update vr_busy and vscr_busy.
(model_make_busy): Update vr_busy and vscr_busy.
* registers.c (register_description): Add Altivec and e500
registers.
* psim.c (psim_read_register, psim_read_register): Handle Altivec
and e500 registers.
* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
* configure.in (sim_filter): When *altivec* add "av". When *spe*
or *simd* add e500.
(sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add
WITH_E500.
* configure: Re-generate.
* e500.igen, altivec.igen: New files.
* e500_expression.h, altivec_expression.h: New files.
* idecode_expression.h: Update copyright. Include
"e500_expression.h" and "altivec_expression.h".
* e500_registers.h, altivec_registers.h: New files.
* registers.h: Update copyright. Include "e500_registers.h" and
"altivec_registers.h".
(registers): Add Altivec and e500 specific registers.
* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
"idecode_altivec.h".
(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
(tmp-igen): Add dependencies on altivec.igen and e500.igen .
Andrew Cagney [Sun, 22 Jun 2003 13:36:26 +0000 (13:36 +0000)]
2003-06-22 Andrew Cagney <cagney@redhat.com>
From matthew green <mrg@redhat.com>:
* sim-fpu.h: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New prototypes.
* sim-fpu.c: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New inline functions.
* Makefile.in (SFILES_INCLUDED): Add agentexpr.texi.
* agentexpr.texi: Retitle section, and change it to an appendix.
Comment out texinfo initialization. Factor a @var{} into two
pieces to prevent makeinfo warnings.
* gdb.texinfo: Add Agent Expressions appendix.
* c-valprint.c (c_value_print): Add VALUE_OFFSET to the address
argument of val_print.
* cp-valprint.c (cp_print_value): Don't add the offset parameter
to the address argument of baseclass_offset or target_read_memory.
Do add it to the argument of cp_print_value_fields.
Andrew Cagney [Sat, 21 Jun 2003 23:14:44 +0000 (23:14 +0000)]
2003-06-21 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c: Include "reggroups.h" and "sim-regno.h".
(mips_register_name): Return names for NUM_REGS..2*NUM_REGS
instead of 0..NUM_REGS.
(mips_register_reggroup_p): New function.
(mips_pseudo_register_write): New function.
(mips_pseudo_register_read): New function.
(mips_register_raw_size): For NUM_REGS..2*NUM_REGS return the size
based on the register's type.
(read_next_frame_reg): Simplify. Assert that REGNO is a pseudo /
cooked.
(mips_get_saved_register): Simplify. Assert that REGNO is a
pseudo / cooked.
(mips_register_byte): New function. Use MIPS_REGISTER_BYTE.
(mips_register_type): Replace mips_register_virtual_type. Map
NUM_REGS..2*NUM_REGS onto 0..NUM_REGS. Use MIPS_REGISTER_TYPE
when available.
(read_next_frame_reg): Simplify, but handle SP_REGNUM. Assert
that the register is cooked / virtual.
(mips_frame_saved_pc): Fetch the cooked PC, and not the raw PC.
Only get the extra info when needed.
(set_reg_offset): Save the offset in NUM_REGS..2*NUM_REGS as well.
(mips32_heuristic_proc_desc): Fetch the cooked register.
(heuristic_proc_desc, mips_pop_frame, get_frame_pointer): Ditto.
(mips_init_extra_frame_info, get_frame_pointer): Ditto.
(mips_print_register): Use gdbarch_register_type, instead of
REGISTER_VIRTUAL_TYPE.
(print_gp_register_row): Use gdbarch_register_type, instead of
REGISTER_VIRTUAL_TYPE. Allow for a pseudo / cooked REGNUM.
(mips_print_registers_info): Assert REGNO is pseodo / cooked.
Print the pseudo / cooked registers.
(mips_print_registers_info): Assert REGNO is pseodo / cooked.
Print the pseudo / cooked registers.
(mips_xfer_register): Use regcache_cooked_read_part. Assert that
REG_NUM is pseudo / cooked.
(mips_o32_xfer_return_value): Xfer the pseudo / cooked register.
(mips_n32n64_xfer_return_value): Ditto.
(mips_stab_reg_to_regnum): Map onto NUM_REGS..2*NUM_REGS.
(mips_dwarf_dwarf2_ecoff_reg_to_regnum): Ditto.
(mips_register_sim_regno): New function.
(mips_gdbarch_init): Set deprecated_register_byte,
register_group_p, pseudo_register_write, pseudo_register_read,
register_sim_regno, and num_pseudo_regs. Set register_type,
instead of register_virtual_type.
* Makefile.in (mips-tdep.o): Update dependencies.
* config/mips/tm-mips64.h (MIPS_REGISTER_TYPE): Rename
REGISTER_VIRTUAL_TYPE.
* config/mips/tm-mips.h (MIPS_REGISTER_TYPE): Ditto.
* config/mips/tm-irix5.h (MIPS_REGISTER_TYPE): Ditto.
* config/mips/tm-mips.h (MIPS_REGISTER_BYTE): Rename REGISTER_BYTE.
* config/mips/tm-irix6.h (MIPS_REGISTER_BYTE): Ditto.
* config/mips/tm-irix5.h (MIPS_REGISTER_BYTE): Ditto.
Thiemo Seufer [Sat, 21 Jun 2003 21:38:04 +0000 (21:38 +0000)]
* config/tc-mips.c (ADDRESS_ADD_INSN,ADDRESS_ADDI_INSN): Remove
special handling for n32 ABI.
(macro): Likewise.
* gas/mips/elf-rel-got-n32.d: Remove special handling for n32 ABI.
* gas/mips/elf-rel-xgot-n32.d: Likewise.
* gas/mips/jal-newabi.d: Likewise.
* ld-mips-elf/elf-rel-got-n32.d: Remove special handling for n32 ABI.
* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
* gas/z8k: New directory.
* gas/z8k/dec.s: New file.
* gas/z8k/decbf.s: New file.
* gas/z8k/decf.s: New file.
* gas/z8k/eidi.s: New file.
* gas/z8k/eidif.s: New file.
* gas/z8k/inc.s: New file.
* gas/z8k/incbf.s: New file.
* gas/z8k/incf.s: New file.
* gas/z8k/inout.d: New file.
* gas/z8k/inout.s: New file.
* gas/z8k/jr-back.s: New file.
* gas/z8k/jr-backf.s: New file.
* gas/z8k/jr-forw.s: New file.
* gas/z8k/jr-forwf.s: New file.
* gas/z8k/ldk.s: New file.
* gas/z8k/ldkf.s: New file.
* gas/z8k/z8k.exp: New file.
Frank Ch. Eigler [Fri, 20 Jun 2003 17:27:10 +0000 (17:27 +0000)]
2003-06-17 Doug Evans <dje@sebabeach.org>
* cgen-trace.h (sim_disasm_read_memory): Update args to be compatible
with disassemble_info:read_memory_func.
* cgen-trace.c (sim_disasm_read_memory): Ditto.
Alan Modra [Fri, 20 Jun 2003 12:35:30 +0000 (12:35 +0000)]
* elf64-ppc.c (struct ppc_link_hash_table): Add top_id.
(ppc64_elf_setup_section_lists): Set it.
(ppc64_elf_relocate_section): Check sym section id against top_id.
(ppc_build_one_stub): Comment on top_id.
Michael Snyder [Thu, 19 Jun 2003 22:52:04 +0000 (22:52 +0000)]
2003-06-19 Michael Snyder <msnyder@redhat.com>
* linux-nat.h: New file.
* linux-nat.c: Include linux-nat.h.
* lin-lwp.c: Include linux-nat.h.
Move struct lwp_info def to linux-nat.h.
* linux-proc.c: Include linux-nat.h.
(linux_make_note_section): Iterate over lwps instead of threads.
(linux_do_thread_registers): Use lwp instead of merged pid.
* config/nm-linux.h: Move miscelaneous def'ns to linux-nat.h.
* Makefile.in (lin-lwp.o, linux-proc.o, linux-nat.o):
Add dependency on linux_nat_h.
* z8k-dis.c (instr_data_s): Change tabl_index from long to int.
(print_insn_z8k): Correctly check return value from
z8k_lookup_instr call.
(unparse_instr): Handle CLASS_IRO case.
* z8kgen.c: Fix function definitions. Fix formatting.
(opt): Add brk opcode alias for non-simulator breakpoint. Add
missing and fix existing in/out and sin/sout opcode definitions.
(args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
opcodes.
(internal): Check p->flags for non-zero before dereferencing it.
(gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added
opcodes and renumber the remaining lines repectively.
(main): Remove "-d" command line switch.
* z8k-opc.h: Regenerate with new z8kgen.c.
* config/tc-z8k.c (parse_reg): Invalid registers generate an error
now, not only a warning. Add some more checks to detect invalid
registers.
(get_operand): For CLASS_IR remember register size in mode struct.
(get_specific): Handle new CLASS_IRO type. Add register size
checks for CLASS_IR and CLASS_IRO.
(md_apply_fix3): Fix undefined usage of buf.
Alan Modra [Thu, 19 Jun 2003 11:49:02 +0000 (11:49 +0000)]
* elf64-ppc.c (toc_adjusting_stub_needed): New function.
(ppc64_elf_next_input_section): Use it here to set has_gp_reloc.
Return error condition.
(ppc64_elf_size_stubs): Restrict toc adjusting stubs to sections
that have has_gp_reloc set.
(struct ppc_link_hash_table): Add stub_count.
(ppc_build_one_stub): Increment it.
(ppc64_elf_link_hash_table_create): zmalloc rather than clearing
individual fields.
* elf64-ppc.h (ppc64_elf_next_input_section): Update prototype.
Michael Snyder [Thu, 19 Jun 2003 02:14:14 +0000 (02:14 +0000)]
2003-06-18 Michael Snyder <msnyder@redhat.com>
* compile.c: Replace "Hitachi" with "Renesas".
(decode): Distinguish AV_H8S from AV_H8H.
(sim_resume): H8SX can use any register for TAS.
(decode): Add support for VECIND.
(sim_resume): Implement rte/l and rts/l.
(GETSR): New macro (actually old macro reincarnated).
(decode): Add handling for IMM2.
(sim_resume): Drop extra block around jmp, jsr, rts.
Add handling for trapa and rte.
For divxu.b, change 0xffff mask to 0xff.
(set_h8300h): Add bfd_mach_h8300sxn machine.