dwc3: versal: Correct the logic for GFLADJ adjustment
This patch corrects the logic used for adjusting GFLADJ register.
Currently during phy initialization, USB core reset is happening.
Because of reset USB GFLADJ register is getting restored to default
values. This patch updates the GFADJ[21:8] & GFLADJ[5:0] bits if
they are not equal to the requested value from dts.
Michal Simek [Tue, 5 May 2020 08:53:12 +0000 (10:53 +0200)]
py: tests: Mark mdio/mmc tests as xfail
Mdio/mmc tests depend on platform setup. That's why it can fail on qemu
target checked by travis. Similar change was done by commit 4e8d5fdbbe92
("py: tests: Mark mii tests as xfail").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: pending
Michal Simek [Thu, 5 Mar 2020 07:29:37 +0000 (08:29 +0100)]
py/test: Fix xilinx i2c eeprom test
By converting Zynq boards to generic configuration there is no longer
option to use marking like "@pytest.mark.boardspec("zynq_zc706")" to run
certain tests.
That's why change this code to look for device specification what to test.
This patch adds pytest case for zynqrsa command
This test runs only in bootmodes other than jtag
It tests authentication of images with valid keys
and invalid keys as well.
This patch adds pytest for zynqaes commands. It tests
loading encrypted image back to DDR and tests loading
encrypted bitstream to PL using "zynqaes load" command.
This test needs to be executed only in bootmode, if not it
wil be skipped.
Michal Simek [Wed, 16 Mar 2016 22:05:39 +0000 (23:05 +0100)]
test/py: Add basic QSPI testing
This is the first attempt how to test qspi.
Detect SPI size. Read it all, random size, erase every block,
write random data with random size and read it back,
erase the whole qspi and at the end load kernel image via tftp
and save it to memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: pending
Michal Simek [Mon, 9 May 2016 12:45:54 +0000 (14:45 +0200)]
test/py: Add code for mmc testing
More partitions are handled.
Save information about saved file to structure.
Also use fs_generic commands to handle files.
Support fat, ext2 and ext4 filesystems.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: pending
Michal Simek [Fri, 11 Oct 2019 09:07:57 +0000 (11:07 +0200)]
xilinx: Update github pull request template
People are trying to use pull request via github which is not the way how
u-boot patches should be handled. That's why update template with guidance
how to contribute to Xilinx repository.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: not-upstreamable
Michal Simek [Tue, 1 Dec 2020 13:19:44 +0000 (14:19 +0100)]
mmc: zynq_sdhci: Make variables/structure static
All these variables/structure are local and should be static.
Issues are reported by sparse:
drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: pending
Michal Simek [Tue, 1 Dec 2020 12:46:28 +0000 (13:46 +0100)]
mmc: zynq_sdhci: Fix kernel doc warnings
Fix these kernel doc warnings:
drivers/mmc/zynq_sdhci.c:181: warning: contents before sections
drivers/mmc/zynq_sdhci.c:187: warning: Function parameter or member 'degrees' not described in 'sdhci_zynqmp_sdcardclk_set_phase'
drivers/mmc/zynq_sdhci.c:236: warning: contents before sections
drivers/mmc/zynq_sdhci.c:242: warning: Function parameter or member 'degrees' not described in 'sdhci_zynqmp_sampleclk_set_phase'
drivers/mmc/zynq_sdhci.c:291: warning: contents before sections
drivers/mmc/zynq_sdhci.c:297: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sdcardclk_set_phase'
drivers/mmc/zynq_sdhci.c:354: warning: contents before sections
drivers/mmc/zynq_sdhci.c:360: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sampleclk_set_phase'
drivers/mmc/zynq_sdhci.c:467: warning: contents before sections
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: pending
mmc: zynq_sdhci: Split set_tapdelay function to in and out
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays
separately. This is required to handle zero values for ITAP and OTAP
values. If we dont split, we will have to remove the if() in the
function, which makes ITAP values to be overwritten when OTAP values are
called to set and vice-versa.
Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6
bits for OTAP for ZynqMP.
mmc: zynq_sdhci: Allow configuring zero Tap values
Allow configuring ITAP and OTAP values with zero to avoid failures in
some cases (one of them is SD boot mode). Legacy, SDR12 modes require
to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104
modes ITAP value is zero.
In SD boot mode firmware configures the SD ITAP and OTAP values and
in this case u-boot has to re-configure required tap values(including zero)
based on the operating mode.
Michal Simek [Wed, 13 Jan 2021 09:25:50 +0000 (10:25 +0100)]
env: Remove all dependencies for SYS_REDUNDAND_ENVIRONMENT
CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot
works with variables. struct environment_s has one byte flags property
which also affects ENV_SIZE macro.
I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup
but custom scripts can be designed in a way that u-boot is asked to
import/export variables from/to file which can be in certain format.
That's why also for this configuration make sense to enable
CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file
format.
The patch is removing dependency on this configuration to support selecting
environment file format without any specific dependency where variables are
stored.
Michal Simek [Tue, 2 Feb 2021 12:33:22 +0000 (13:33 +0100)]
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP
Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b57 ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").
Michal Simek [Mon, 4 Jan 2021 10:07:28 +0000 (11:07 +0100)]
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.
Michal Simek [Mon, 11 Jan 2021 12:46:58 +0000 (13:46 +0100)]
xilinx: zynqmp: Save bootseq number for SD/EMMC boot modes
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.
Michal Simek [Thu, 3 Dec 2020 08:31:35 +0000 (09:31 +0100)]
video: seps525: Add seps525 SPI driver
Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display
using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB
160x128 display. This driver has been tested through zynq-spi driver.
ZynqMP> load mmc 1 100000 rainbow.bmp
61562 bytes read in 20 ms (2.9 MiB/s)
ZynqMP> bmp info 100000
Image size : 160 x 128
Bits per pixel: 24
Compression : 0
ZynqMP> bmp display 100000
ZynqMP> setenv stdout vidconsole
Michal Simek [Thu, 3 Dec 2020 08:30:00 +0000 (09:30 +0100)]
video: Introduce video_sync operation
Some drivers like LCD connected via SPI requires explicit sync function
which copy framebuffer content over SPI to controller to display.
This hook doesn't exist yet that's why introduce it via video operations.
Michal Simek [Mon, 14 Dec 2020 07:47:52 +0000 (08:47 +0100)]
video: Let video_sync to return error value
This patch is preparation for follow up one to support cases where
synchronization can fail.
Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
State: upstream (9de731f295c5f1aa0f55f30b076b94f9cb72428e
Michal Simek [Mon, 14 Dec 2020 08:14:03 +0000 (09:14 +0100)]
video: Fix video sync kernel-doc format
Place description below function parameters to make kernel-doc stript
happy. Also rename dev to vid to be aligned with function parameters.
Fixes: 1acafc73bfc7 ("dm: video: Add a video uclass") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
State: upstream (17da310ac41424f056af3a88a0ff081925a027ff)
Harini Katakam [Tue, 18 Feb 2020 08:50:18 +0000 (14:20 +0530)]
arm64: zynqmp: Add Ethernet node for zcu1285 revA
This patch add ethernet node gem1 to zcu1285 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy
This patch add ethernet node gem1 to zcu1275 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy.
serial: uartlite: Fix uninitialized ret in debug uartlite
Endianness detection is checked against uninitialized ret variable.
Assign ret with read value from status register to fix this.
Fixes: 31a359f87eaa ("serial: uartlite: Add support to work with any endianness") Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
State: upstream (e5e8bbd25a499e65e7403b0b054fe35abe5187b3)
Lukasz Majewski [Sat, 26 Dec 2020 00:09:02 +0000 (01:09 +0100)]
xea: config: Disable CONFIG_SPL_OF_PLATDATA_PARENT on XEA (imx28)
On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.
In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.
With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.
When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.
As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffda7da55f6.
Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Sat, 26 Dec 2020 00:09:01 +0000 (01:09 +0100)]
xea: config: Use CONFIG_PREBOOT from Kconfig
The usage of the preboot feature is now controlled via a separate Kconfig
option - namely CONFIG_USE_PREBOOT.
It must be enabled for preboot code executing commands now defined in
CONFIG_PREBOOT (also moved to the Kconfig).
After defining both CONFIG_USE_PREBOOT and CONFIG_PREBOOT in
imx28_xea_defconfig the define of CONFIG_PREBOOT shall be removed from
xea.h as it is redundant.
Hugh Cole-Baker [Sun, 22 Nov 2020 13:03:44 +0000 (13:03 +0000)]
rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Suggested-by: Simon Glass <sjg@chromium.org> Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Marek Vasut [Sat, 2 Jan 2021 16:44:47 +0000 (17:44 +0100)]
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the
correctness of the DT.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 2 Jan 2021 16:44:46 +0000 (17:44 +0100)]
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Pali Rohár [Sat, 21 Nov 2020 22:30:11 +0000 (23:30 +0100)]
Nokia RX-51: Decrease i2c speed to 100000
It looks like that i2c bus lot of times timeout on some units. Prior
migration to CONFIG_DM_I2C i2c speed was set to CONFIG_SYS_OMAP24_I2C_SPEED
value which was 100000. Lower speed fixes timeout problems, so change speed
back to its previous value.
Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 8d8c18170325 ("Nokia RX-51: Convert to CONFIG_DM_I2C") Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Philippe Reynes [Wed, 23 Dec 2020 14:33:07 +0000 (15:33 +0100)]
cmd: ubi: don't allow to rename a volume to a name that already exist
This commits add a check on the command ubi rename. This check avoids
to rename a volume to with a name that is already used on another ubi
volume. If two volumes has the same name, then the ubi device can't be
mounted anymore.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Stefan Agner [Wed, 30 Dec 2020 12:16:36 +0000 (13:16 +0100)]
nvme: Use only 32-bit accesses in nvme_writeq/nvme_readq
There might be hardware configurations where 64-bit data accesses
to NVMe registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit NVMe registers, similarly as it is done in Linux kernel.
This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC
based board, where the PCIe Root Complex, which is attached to the
system through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
nvme_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail
probing.
This fix is analogous to commit 8e2ab05000ab ("usb: xhci: Use only
32-bit accesses in xhci_writeq/xhci_readq").
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Cc: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
This change revers code which asserting PERST# signal when unloading
driver. Driver's remove callback is still there as it is used for other
functionality.
Asserting PERST# signal prior booting kernel is causing that A3720 boards
(Turris MOX and Espressobin) with stable Linux kernel versions 4.14 and
4.19 are not able to detect some PCIe cards (e.g. Compex WLE200 and WLE900)
and anymore. When PERST# signal is not asserted these cards are detected
correctly. As this is regression for existing stable Linux kernel versions
revert this problematic change in U-Boot.
To make cards working with OpenWRT 4.14 kernel it is needed to disable link
training prior booting kernel, which is already done in driver's remove
callback.
Described issue is in Linux kernel pci aardvark driver which is (hopefully)
fixed in latest upstream versions. Latest upstream versions should be able
to initialize PCIe bus and detects cards independently of the link training
and PERST# signal state.
So with this change, U-Boot on A3720 boards should be able to boot OpenWRT
4.14 kernel, stable 4.14 and 4.19 kernels and also latest mainline kernels.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 10 Dec 2020 05:40:10 +0000 (06:40 +0100)]
arm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot properties
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dennis Gilmore <dgilmore@redhat.com> Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Marc Ferland [Tue, 22 Dec 2020 19:24:12 +0000 (14:24 -0500)]
arm: dart6ul: read and print SoM info from eeprom on startup
The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.
Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.
This code was inspired from the supported u-boot code from Variscite
which can be found here:
Igor Opaniuk [Tue, 22 Dec 2020 15:56:46 +0000 (17:56 +0200)]
toradex: hand over maintainership
Hand over maintainership of Toradex SoMs (that I was responsible of) to
Oleksandr because of my resignation from Toradex, as such I will
have no immediate involvement with these modules and as a result not
able to continue maintaining these boards.
1. Configure 125MHz clock
2. Setup the TX clock delay (RX is enabled by default),
3. Setup reserved bits to avoid voltage peak
The clock delays are nowadays already configured by the
PHY driver (in ar803x_delay_config). The code for that
can simply be dropped. The clock speed can also be
configured by the PHY driver by adding the device tree
property "qca,clk-out-frequency".
What is left is setting up the undocumented reserved bits
to avoid the voltage peak problem. I slightly improved its
documentation while updating the board's PHY rework code.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Instead of hardcoding index magic numbers in the board code,
also rely on board_fit_config_name_match choosing the right
config for the fitImage containing the kernel.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Ilias Apalodimas [Wed, 23 Dec 2020 11:25:00 +0000 (13:25 +0200)]
efi_loader: Extra checks while opening an OPTEE session
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.
Fixes: f042e47e8fb43 ("efi_loader: Implement EFI variable handling via OP-TEE") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a host_build() function, so that it's possible to
check for software being build with USE_HOSTCC without
relying on preprocessor conditions. In other words
#ifdef USE_HOSTCC
host_only_code();
#endif
can be written like this instead:
if (host_build())
host_only_code();
This improves code readability and test coverage and
compiler will eleminate this unreachable code.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
configs: imx8m: enable eMMC HS400ES and SD UHS mode on EVK
i.MX8M series includes support for high speed modes in uSDHC controllers.
Turn on corresponding configuration options for EVK boards, which would
enable high speed modes to be included in U-Boot.
ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator
Some SD Card controller and power circuitry has increased capacitance,
which keeps the internal logic remains powered after regulator is switch
off. This is generally the case when card is switched to SD104 mode,
where a power cycle should be performed. In case if the card internal
logic remains powered, it causes a subsequent failure of mode
transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for
internal card circuitry to drain voltages and perform a power cycle
correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase
off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Adam Ford [Fri, 4 Dec 2020 23:27:46 +0000 (17:27 -0600)]
arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6
There have been some updates to the device tree since 5.6.
This also includes some clocks, and makes it easier to keep
board device tree files in sync with Linux
Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>