David Collins [Mon, 12 Sep 2022 21:06:23 +0000 (14:06 -0700)]
pinctrl: qcom: spmi-gpio: add support for LV_VIN2 and MV_VIN3 subtypes
Add support for SPMI PMIC GPIO subtypes GPIO_LV_VIN2 and
GPIO_MV_VIN3.
GPIO_LV_VIN2 GPIOs support two input reference voltages: VIN0 and
VIN1. These are typically connected to 1.8 V and 1.2 V supplies
respectively.
GPIO_MV_VIN3 GPIOs support three input reference voltages: VIN0,
VIN1, and VIN2. These are typically connected to Vph, 1.8 V, and
1.2 V supplies respectively.
pinctrl: nomadik: remove dead code after DB8540 pinctrl removal
Commit b6d09f780761 ("pinctrl: nomadik: Drop U8540/9540 support") removes
the DB8540 pin controller driver and its config PINCTRL_DB8540.
There is some code left-over in the generic nomadik pinctrl driver, i.e.,
drivers/pinctrl/nomadik/pinctrl-nomadik.{ch}, that is still around for the
removed DB8540 pin controller driver.
Remove this remaining dead code.
This issue was discovered with ./scripts/checkkconfigsymbols.py.
The irq data passed to irc_chip handlers i the struct gpio_chip
and nothing else. We are just lucky that the nomadik chip
pointer is first in the struct. Use the proper dereferencing
and helpers.
Merge tag 'samsung-pinctrl-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v6.1
1. Minor fix in order of initializing pinctrl driver - GPIOs should be
configured before registering gpiolib.
2. Final steps to deprecated bindings headers with register constants.
The constants were moved to include files in DTS directories, because
these are not suitable for bindings. Remove final references and
mark binding header as deprecated to warn any users.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
qcom/sm4250-oneplus-billie2.dtb: pinctrl@500000: sdc1-on-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'clk', 'cmd', 'data', 'rclk' do not match any of the regexes: 'pinctrl-[0-9]+'
[[26]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
sm8350-hdk.dtb: pinctrl@f100000: qup-uart3-default-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'
Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.
The irqchip implementation used inside the gpiochips are not supposed to
be changed during runtime. So let's make the one inside the spmi-gpio
gpiochip immutable.
This fixes the below warning during boot:
gpio gpiochip0: (c440000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!
Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830092232.168561-1-manivannan.sadhasivam@linaro.org
[switched two lines as indicated by Johan] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: imx8m: kconfig: Fix build error on test compile
PINCTRL_IMX depends on OF, however the dependency is missed when selected
by PINCTRL_IMX8M* (it does not follow the indirect 'select' statements),
select it explicitly.
Andy Shevchenko [Fri, 2 Sep 2022 18:26:48 +0000 (21:26 +0300)]
pinctrl: cy8c95x0: Override IRQ for one of the expanders on Galileo Gen 1
ACPI table on Intel Galileo Gen 1 has wrong pin number for IRQ resource
of the I²C GPIO expander. Since we know what that number is and luckily
have GPIO bases fixed for SoC's controllers, we may use a simple DMI quirk
to match the platform and retrieve GpioInt() pin on it for the expander in
question.
Andy Shevchenko [Fri, 2 Sep 2022 18:26:43 +0000 (21:26 +0300)]
pinctrl: cy8c95x0: Remove custom ->set_config()
Since we have pin configuration getter and setter provided,
there is no need to duplicate that in the custom ->set_config().
Instead, switch to gpiochip_generic_config().
Andy Shevchenko [Fri, 2 Sep 2022 18:26:42 +0000 (21:26 +0300)]
pinctrl: cy8c95x0: Remove useless conditionals
The pin control framework checks pin boundaries before calling
the respective driver's callbacks. Hence no need to check for
pin boundaries, the respective conditionals won't be ever true.
Andy Shevchenko [Fri, 2 Sep 2022 18:26:41 +0000 (21:26 +0300)]
pinctrl: cy8c95x0: Remove device initialization
The Cypress CY8C95x0 chips have an internal EEPROM that defines
initial configuration. It might be that bootloader or other
entity wrote the platform related setup into it. Don't override
it in the driver.
Andy Shevchenko [Fri, 2 Sep 2022 18:26:40 +0000 (21:26 +0300)]
pinctrl: cy8c95x0: Enable GPIO range
Since it's a pin control, GPIO counterpart needs to know the mapping
between pin numbering and GPIO numbering. Enable this by calling
gpiochip_add_pin_range() at the chip addition time.
Andy Shevchenko [Fri, 2 Sep 2022 18:26:38 +0000 (21:26 +0300)]
pinctrl: cy8c95x0: Fix pin control name to enable more than one
The Cypress GPIO expander is an I²C discrete component. Hence
the platform may contain more than one of a such. Currently
this has limitations in the driver due to same name used for
all chips of a type. Replace this with device instance specific
name.
Claudiu Beznea [Wed, 31 Aug 2022 13:56:36 +0000 (16:56 +0300)]
pinctrl: at91: use dev_dbg() instead of printk()
Use dev_dbg() instead of printk(KERN_DEBUG) to avoid the following
checkpatch.pl warning:
"Prefer [subsystem eg: netdev]_dbg([subsystem]dev, ... then
dev_dbg(dev, ... then pr_debug(... to printk(KERN_DEBUG ...".
Claudiu Beznea [Wed, 31 Aug 2022 13:56:35 +0000 (16:56 +0300)]
pinctrl: at91: move gpio suspend/resume calls to driver's context
Move gpio suspend/resume execution local to driver and let it execute as
close as possible to the moment the machine specific PM code is executed
(by setting it to .noirq member of dev_pm_ops). With this the
at91_pinctrl_gpio_suspend()/at91_pinctrl_gpio_resume() calls were removed
from arch/arm/mach-at91/pm.c and also a header has been removed.
The patch has been checked on sama5d3_xplained, sam9x60ek,
sama5d2_xplained, sama7g5ek boards.
Change PINCTRL_IMX8M* dependency from just ARCH_MXC to SOC_IMX8M,
likewise is done for other PINCTRL_IMX* kconfig. This avoid polluting
the config when SOC_IMX8M is not enabled.
Billy Tsai [Thu, 18 Aug 2022 10:18:39 +0000 (18:18 +0800)]
pinctrl: aspeed: Force to disable the function's signal
When the driver want to disable the signal of the function, it doesn't
need to query the state of the mux function's signal on a pin. The
condition below will miss the disable of the signal:
Ball | Default | P0 Signal | P0 Expression | Other
-----+---------+-----------+-----------------------------+----------
E21 GPIOG0 SD2CLK SCU4B4[16]=1 & SCU450[1]=1 GPIOG0
-----+---------+-----------+-----------------------------+----------
B22 GPIOG1 SD2CMD SCU4B4[17]=1 & SCU450[1]=1 GPIOG1
-----+---------+-----------+-----------------------------+----------
Assume the register status like below:
SCU4B4[16] == 1 & SCU4B4[17] == 1 & SCU450[1]==1
After the driver set the Ball E21 to the GPIOG0:
SCU4B4[16] == 0 & SCU4B4[17] == 1 & SCU450[1]==0
When the driver want to set the Ball B22 to the GPIOG1, the condition of
the SD2CMD will be false causing SCU4B4[17] not to be cleared.
Rob Herring [Tue, 23 Aug 2022 14:56:37 +0000 (09:56 -0500)]
dt-bindings: pinctrl: Add missing (unevaluated|additional)Properties on child nodes
In order to ensure only documented properties are present, node schemas
must have unevaluatedProperties or additionalProperties set to false
(typically).
Allen-KH Cheng [Fri, 19 Aug 2022 12:06:49 +0000 (20:06 +0800)]
dt-bindings: pinctrl: mt8186: Fix 'reg-names' for pinctrl nodes
The mt8186 contains 8 GPIO physical address bases that correspond to
the 'reg-names' of the pinctrl driver. The 'reg-names' entries in
bindings are ordered incorrectly, though. The system crashes due of an
erroneous address when the regulator initializes.
We fix the 'reg-names' for the pinctrl nodes and the pinctrl-mt8186
example in bindings.
Fixes: 338e953f1bd1 ("dt-bindings: pinctrl: mt8186: add pinctrl file and binding document") Co-developed-by: Guodong Liu <guodong.liu@mediatek.com> Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220819120649.21523-1-allen-kh.cheng@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Hui.Liu [Thu, 18 Aug 2022 07:50:11 +0000 (15:50 +0800)]
dt-bindings: pinctrl: mediatek: add support for mt8188
Add the pinctrl header file on MediaTek mt8188.
Add the new binding document for pinctrl on MediaTek mt8188.
Signed-off-by: Hui.Liu <hui.liu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220818075012.20880-2-hui.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add pinctrl driver to support pin configuration for LPASS
(Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SC8280XP.
This IP is an additional pin control block for Audio Pins on top the
existing SoC Top level pin-controller.
Hardware setup looks like:
TLMM GPIO[189 - 207] --> LPASS LPI GPIO [0 - 18]
This pin controller has some similarities compared to Top level
msm SoC Pin controller like 'each pin belongs to a single group'
and so on. However this one is intended to control only audio
pins in particular, which can not be configured/touched by the
Top level SoC pin controller except setting them as gpios.
Apart from this, slew rate is also available in this block for
certain pins which are connected to SLIMbus or SoundWire Bus.
Add pinctrl driver to support pin configuration for LPASS
(Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SM8450.
This IP is an additional pin control block for Audio Pins on top the
existing SoC Top level pin-controller.
Hardware setup looks like:
TLMM GPIO[165 - 187] --> LPASS LPI GPIO [0 - 22]
This pin controller has some similarities compared to Top level
msm SoC Pin controller like 'each pin belongs to a single group'
and so on. However this one is intended to control only audio
pins in particular, which can not be configured/touched by the
Top level SoC pin controller except setting them as gpios.
Apart from this, slew rate is also available in this block for
certain pins which are connected to SLIMbus or SoundWire Bus.
Pali Rohár [Fri, 5 Aug 2022 12:22:01 +0000 (14:22 +0200)]
pinctrl: armada-37xx: Checks for errors in gpio_request_enable callback
Now when all MPP pins are properly defined and every MPP pin has GPIO
function, always checks for errors in armada_37xx_gpio_request_enable()
function when calling armada_37xx_pmx_set_by_name(). Function
armada_37xx_pmx_set_by_name() should not return "not supported" error
anymore for any GPIO pin when requesting GPIO mode.
Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20220805122202.23174-3-pali@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pali Rohár [Fri, 5 Aug 2022 12:22:00 +0000 (14:22 +0200)]
pinctrl: armada-37xx: Fix definitions for MPP pins 20-22
All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.
Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220805122202.23174-2-pali@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: samsung: deprecate header with register constants
For convenience (less code duplication, some meaning added to raw
number), the pin controller pin configuration register values
were defined in the bindings header. These are not some IDs or other
abstraction layer but raw numbers used in the registers
These constants do not fit the purpose of bindings. They do not provide
any abstraction, any hardware and driver independent ID. With minor
exceptions, the Linux drivers actually do not use the bindings header at
all.
All of the constants were moved already to headers local to DTS
(residing in DTS directory) and to Samsung pinctrl driver (where
applicable), so remove any references to the bindings header and add a
warning tha tit is deprecated.
projects / thirdparty / linux.git / log
