Nathan Sidwell [Mon, 11 Jan 2021 16:50:21 +0000 (08:50 -0800)]
libcody: Simplify configure [PR 98414, 98509]
Libcody's configurey was overly 'clever'. That didn't play well with
GCC's structure. This removes lots of that overengineering, using
libcpp as an example.
Christophe Lyon [Tue, 12 Jan 2021 16:47:27 +0000 (16:47 +0000)]
arm: Add movmisalign patterns for MVE (PR target/97875)
This patch adds new movmisalign<mode>_mve_load and store patterns for
MVE to help vectorization. They are very similar to their Neon
counterparts, but use different iterators and instructions.
Indeed MVE supports less vectors modes than Neon, so we use the
MVE_VLD_ST iterator where Neon uses VQX.
Since the supported modes are different from the ones valid for
arithmetic operators, we introduce two new sets of macros:
ARM_HAVE_NEON_<MODE>_LDST
true if Neon has vector load/store instructions for <MODE>
ARM_HAVE_<MODE>_LDST
true if any vector extension has vector load/store instructions for <MODE>
We move the movmisalign<mode> expander from neon.md to vec-commond.md, and
replace the TARGET_NEON enabler with ARM_HAVE_<MODE>_LDST.
The patch also updates the mve-vneg.c test to scan for the better code
generation when loading and storing the vectors involved: it checks
that no 'orr' instruction is generated to cope with misalignment at
runtime.
This test was chosen among the other mve tests, but any other should
be OK. Using a plain vector copy loop (dest[i] = a[i]) is not a good
test because the compiler chooses to use memcpy.
For instance we now generate:
test_vneg_s32x4:
vldrw.32 q3, [r1]
vneg.s32 q3, q3
vstrw.32 q3, [r0]
bx lr
LRA can loop infinitely on targets without `reg + imm` insns. Register elimination
on such targets can increase register pressure resulting in permanent
stack size increase and changing elimination offset. To avoid such situation, a simple
transformation can be done to avoid register pressure increase after
generating reload insns containing eliminated hard regs.
Patrick Palka [Tue, 12 Jan 2021 14:34:41 +0000 (09:34 -0500)]
c++: Fix ICE with CTAD in concept [PR98611]
This patch teaches cp_walk_subtrees to visit the template represented
by a CTAD placeholder, which would otherwise be not visited during
find_template_parameters. The template may be a template template
parameter (as in the first testcase), or it may implicitly use the
template parameters of an enclosing class template (as in the second
testcase), and in either case we need to visit this tree to record the
template parameters used therein for later satisfaction.
gcc/cp/ChangeLog:
PR c++/98611
* tree.c (cp_walk_subtrees) <case TEMPLATE_TYPE_PARM>: Visit
the template of a CTAD placeholder.
gcc/testsuite/ChangeLog:
PR c++/98611
* g++.dg/cpp2a/concepts-ctad1.C: New test.
* g++.dg/cpp2a/concepts-ctad2.C: New test.
This fixes the check that disqualifies BB vectorization because of
required unrolling to match up with the later exact_div we do. To
not disable the ability to split groups that do not match up
exactly with a choosen vector type this also introduces a soft-fail
mechanism to vect_build_slp_tree_1 which delays failing to after
the matches[] array is populated from other checks and only then
determines the split point according to the vector type.
2021-01-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/98550
* tree-vect-slp.c (vect_record_max_nunits): Check whether
the group size is a multiple of the vector element count.
(vect_build_slp_tree_1): When we need to fail because
the vector type choosen causes unrolling do so lazily
without affecting matches only at the end to guide group splitting.
Martin Liska [Tue, 12 Jan 2021 10:27:34 +0000 (11:27 +0100)]
gcov: add more debugging facility
gcc/ChangeLog:
* gcov.c (source_info::debug): New.
(print_usage): Add --debug (-D) option.
(process_args): Likewise.
(generate_results): Call src->debug after
accumulate_line_counts.
(read_graph_file): Properly assign id for EXIT_BLOCK.
* profile.c (branch_prob): Dump function body before it is
instrumented.
Jakub Jelinek [Tue, 12 Jan 2021 10:04:46 +0000 (11:04 +0100)]
widening_mul: Fix up ICE caused by my signed multiplication overflow pattern recognition changes [PR98629]
As the testcase shows, my latest changes caused ICE on that testcase.
The problem is that arith_overflow_check_p now can change the use_stmt
argument (has a reference), so that if it succeeds (returns non-zero),
it points it to the GIMPLE_COND or EQ/NE or COND_EXPR assignment from the
TRUNC_DIV_EXPR assignment.
The problem was that it would change use_stmt also if it returned 0 in some
cases, such as multiple imm uses of the division, and in one of the callers
if arith_overflow_check_p returns 0 it looks at use_stmt again and performs
other checks, which of course assumes that use_stmt is the one passed
to arith_overflow_check_p and not e.g. NULL instead or some other unrelated
stmt.
The following patch fixes that by only changing use_stmt when we are about
to return non-zero (for the MULT_EXPR case, which is the only one with the
need to use different use_stmt).
Jakub Jelinek [Tue, 12 Jan 2021 10:03:40 +0000 (11:03 +0100)]
reassoc: Optimize in reassoc x < 0 && y < 0 to (x | y) < 0 etc. [PR95731]
We already had x != 0 && y != 0 to (x | y) != 0 and
x != -1 && y != -1 to (x & y) != -1 and
x < 32U && y < 32U to (x | y) < 32U, this patch adds signed
x < 0 && y < 0 to (x | y) < 0. In that case, the low/high seem to be
always the same and just in_p indices whether it is >= 0 or < 0,
also, all types in the same bucket (same precision) should be type
compatible, but we can have some >= 0 and some < 0 comparison mixed,
so the patch handles that by using the right BIT_IOR_EXPR or BIT_AND_EXPR
and doing one set of < 0 or >= 0 first, then BIT_NOT_EXPR and then the other
one. I had to move optimize_range_tests_var_bound before this optimization
because that one deals with signed a >= 0 && a < b, and limited it to the
last reassoc pass as reassoc itself can't virtually undo this optimization
yet (and not sure if vrp would be able to).
2021-01-12 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95731
* tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
(optimize_range_tests): Call optimize_range_tests_cmp_bitwise
only after optimize_range_tests_var_bound.
* gcc.dg/tree-ssa/pr95731.c: New test.
* gcc.c-torture/execute/pr95731.c: New test.
Jakub Jelinek [Tue, 12 Jan 2021 10:02:16 +0000 (11:02 +0100)]
configure, make: Fix up --enable-link-serialization
As reported by Matthias, --enable-link-serialization=1 can currently start
two concurrent links first (e.g. gnat1 and cc1).
The problem is that make var = value values seem to work differently between
dependencies and actual rules (where it was tested).
As the language make fragments can be in different order, we can have:
ada.prev = ... magic that will become $(c.serial) under --enable-link-serialization=1
gnat1$(exe): ..... $(ada.prev)
...
c.serial = cc1$(exe)
and while if I add echo $(ada.prev) in the gnat1 rule's command, it prints
cc1, the dependencies are actually evaluated during reading of the goal or
when.
The configure creates (and puts into Makefile) some serialization order of
the languages and in that order c always comes first, and the rest is
actually sorted the way the all_lang_makefrags are already sorted,
so just by forcing c/Make-lang.in first we achieve that X.serial variable
is always defined before some other Y.prev will use it in its goal
dependencies.
2021-01-12 Jakub Jelinek <jakub@redhat.com>
* configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
* configure: Regenerated.
gcc/analyzer/ChangeLog:
PR analyzer/98628
* store.cc (binding_cluster::make_unknown_relative_to): Don't mark
dereferenced unknown pointers as having escaped.
gcc/testsuite/ChangeLog:
PR analyzer/98628
* gcc.dg/analyzer/pr98628.c: New test.
This patch adds support for both conditional and unconditional unpacked
ASRD. This meant adding a new define_insn for the unconditional form,
instead of reusing the conditional instructions. It also meant
extending the current conditional patterns to support merging with
any independent value, not just zero.
gcc/
* config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
SVE_FULL_I to SVE_I. Generate an UNSPEC_PRED_X.
(*sdiv_pow2<mode>3): New pattern.
(@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
Wrap the ASRD in an UNSPEC_PRED_X.
(*cond_<sve_int_op><mode>_2): Likewise. Replace the UNSPEC_PRED_X
predicate with a constant PTRUE, if it isn't already.
(*cond_<sve_int_op><mode>_z): Replace with...
(*cond_<sve_int_op><mode>_any): ...this new pattern.
aarch64: Add support for unpacked SVE conditional BIC
This patch adds support for unpacked conditional BIC. The type suffix
could be taken from the element size or the container size, so the
patch continues to use the element size. This is consistent with
the existing support for unconditional BIC.
gcc/
* config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
SVE_FULL_I to SVE_I.
(*cond_bic<mode>_any): Likewise.
This patch extends the SMULH and UMULH support to unpacked vectors.
The type suffix must be taken from the element size rather than the
container size.
The main use of these patterns is to support division and modulus
by a constant. The conditional forms would be hard to trigger from
non-ACLE code, and ACLE code needs fully-packed vectors only.
gcc/
* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
(@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
to SVE_I.
gcc/testsuite/
* gcc.target/aarch64/sve/mul_highpart_3.c: New test.
This patch adds support for unpacked SVE SABD and UABD.
It also rewrites the patterns so that they match as combine
patterns without the need for REG_EQUAL notes. Finally,
there was no pattern for merging with the second input,
which can be handled by reversing the operands.
The type suffix needs to be taken from the element size rather
than the container size.
gcc/
* config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
SVE_FULL_I to SVE_I.
(*aarch64_cond_<su>abd<mode>_2): Likewise.
(*aarch64_cond_<su>abd<mode>_any): Likewise.
(@aarch64_pred_<su>abd<mode>): Likewise. Use UNSPEC_PRED_X
for the max and min but not for the minus.
(*aarch64_cond_<su>abd<mode>_3): New pattern.
This patch extends the ADR patterns to handle unpacked vectors.
They would work with both elements and containers, but since
the instructions only support .s and .d, we get more coverage
by using containers.
gcc/
* config/aarch64/iterators.md (SVE_24I): New iterator.
* config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
SVE_FULL_SDI to SVE_24I. Use containers rather than elements.
gcc/testsuite/
* gcc.target/aarch64/sve/adr_6.c: New test.
aarch64: Add general unpacked SVE conditional binary arithmetic
This patch adds support for conditional binary ADD, SUB, MUL, SMAX,
UMAX, SMIN, UMIN, LSL, LSR, ASR, AND, ORR and EOR. It's not really
possible to split it up further given how the patterns are written.
Min, max and right-shift need the element size rather than the container
size. The others would work with both, although MUL should be more
efficient when applied to elements instead of containers.
gcc/
* config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
(*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
to SVE_I.
(*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
(*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
(*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
(*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.
aarch64: Add support for unpacked SVE mult, max and min
This patch makes the SVE_INT_BINARY_IMM patterns support
unpacked arithmetic, covering MUL, SMAX, SMIN, UMAX and UMIN.
For min and max, the type suffix must be taken from the element
size rather than the container size.
The XFAILs are due to PR98602.
gcc/
* config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
(@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
(*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
to SVE_I.
This patch adds support for unpacked SVE LSL, ASR and LSR.
For right shifts, the type suffix needs to be taken from the
element size rather than the container size.
gcc/
* config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
(v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
(*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.
gcc/testsuite/
* gcc.target/aarch64/sve/shift_2.c: New test.
In GCC10 cp_walk_subtrees has been changed to walk template arguments.
As the following testcase, that changed the mangling of some functions.
I believe the previous behavior that find_abi_tags_r doesn't recurse into
template args has been the correct one, but setting *walk_subtrees = 0
for the types and handling the types subtree walking manually in
find_abi_tags_r looks too hard, there are a lot of subtrees and details what
should and shouldn't be walked, both in tree.c (walk_type_fields there,
which is static) and in cp_walk_subtrees itself.
The following patch abuses the fact that *walk_subtrees is an int to
tell cp_walk_subtrees it shouldn't walk the template args.
Co-authored-by: Jason Merrill <jason@redhat.com>
gcc/cp/ChangeLog:
PR c++/98481
* class.c (find_abi_tags_r): Set *walk_subtrees to 2 instead of 1
for types.
(mark_abi_tags_r): Likewise.
* decl2.c (min_vis_r): Likewise.
* tree.c (cp_walk_subtrees): If *walk_subtrees_p is 2, look through
typedefs.
The vectorizer, for large permuted grouped loads, generates
inefficient intermediate code (cleaned up only later) that runs
into complexity issues in SCEV analysis and elsewhere. For the
non-single-element interleaving case we already put a hard limit
in place, this applies the same limit to the missing case.
2021-01-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/91403
* tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
single-element interleaving group size at 4096 elements.
Bernd Edlinger [Thu, 7 Jan 2021 08:37:32 +0000 (09:37 +0100)]
testsuite: Fix test failures from outputs.exp [PR98225]
The .ld1_args file is not created when HAVE_GNU_LD is false.
The ltrans0.ltrans_arg file is not created when the make jobserver
is available, so remove the MAKEFLAGS variable.
Add an exception for *.gcc_args files similar to the
exception for *.cdtor.* files.
Limit both exceptions to targets that define EH_FRAME_THROUGH_COLLECT2.
That means although the test case does not use C++ constructors
or destructors it is still using dwarf2 frame info.
This fixes a double-counting in the reduction cost when vectorizing
the reduction through the regular vectorizable_* functions.
2021-01-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/98526
* tree-vect-loop.c (vect_model_reduction_cost): Remove costing
of the actual reduction op for the regular case.
(vectorizable_reduction): Cost the stmts
vect_transform_reduction produces here.
Iain Buclaw [Mon, 11 Jan 2021 09:53:18 +0000 (10:53 +0100)]
d: Remove visibility and lookup deprecation
The deprecation phase for access checks is finished.
The `-ftransition=import` and `-ftransition=checkimports` switches no
longer have an effect and are now removed. Symbols that are not visible
in a particular scope will no longer be found by the compiler.
Tamar Christina [Mon, 11 Jan 2021 09:57:41 +0000 (09:57 +0000)]
slp: handle externals correctly in linear_loads_p
This fixes a bug with externals and linear_loads_p where I forgot to save the
value before returning.
It also fixes handling of nodes with multiple children on a non VEC_PERM node.
There the child iteration would already resolve the kind and the loads are All
expected to be the same if valid so just return one.
Jakub Jelinek [Mon, 11 Jan 2021 09:35:10 +0000 (10:35 +0100)]
reassoc: Reassociate integral multiplies [PR95867]
For floating point multiply, we have nice code in reassoc to reassociate
multiplications to almost optimal sequence of as few multiplications as
possible (or library call), but for integral types we just give up
because there is no __builtin_powi* for those types.
As there is no library routine we could use, instead of adding new internal
call just to hold it temporarily and then lower to multiplications again,
this patch for the integral types calls into the sincos pass routine that
expands it into multiplications right away.
2021-01-11 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95867
* tree-ssa-math-opts.h: New header.
* tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
(powi_as_mults): No longer static. Use build_one_cst instead of
build_real. Formatting fix.
* tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
(attempt_builtin_powi): Handle multiplication reassociation without
powi_fndecl using powi_as_mults.
(reassociate_bb): For integral types don't require
-funsafe-math-optimizations to call attempt_builtin_powi.
Jakub Jelinek [Mon, 11 Jan 2021 09:34:07 +0000 (10:34 +0100)]
widening_mul: Pattern recognize also signed multiplication with overflow check [PR95852]
On top of the previous widening_mul patch, this one recognizes also
(non-perfect) signed multiplication with overflow, like:
int
f5 (int x, int y, int *res)
{
*res = (unsigned) x * y;
return x && (*res / x) != y;
}
The problem with such checks is that they invoke UB if x is -1 and
y is INT_MIN during the division, but perhaps the code knows that
those values won't appear. As that case is UB, we can do for that
case whatever we want and handling that case as signed overflow
is the best option. If x is a constant not equal to -1, then the checks
are 100% correct though.
Haven't tried to pattern match bullet-proof checks, because I really don't
know if users would write it in real-world code like that,
perhaps
*res = (unsigned) x * y;
return x && (x == -1 ? (*res / y) != x : (*res / x) != y);
?
https://wiki.sei.cmu.edu/confluence/display/c/INT32-C.+Ensure+that+operations+on+signed+integers+do+not+result+in+overflow
suggests to use twice as wide multiplication (perhaps we should handle that
too, for both signed and unsigned), or some very large code
with 4 different divisions nested in many conditionals, no way one can
match all the possible variants thereof.
2021-01-11 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95852
* tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
mul_stmts parameter type to vec<gimple *> &. Before cond_stmt
allow in the bb any of the stmts in that vector, div_stmt and
up to 3 cast stmts.
(arith_cast_equal_p): New function.
(arith_overflow_check_p): Add cast_stmt argument, handle signed
multiply overflow checks.
(match_arith_overflow): Adjust caller. Handle signed multiply
overflow checks.
* gcc.target/i386/pr95852-3.c: New test.
* gcc.target/i386/pr95852-4.c: New test.
Jakub Jelinek [Mon, 11 Jan 2021 09:32:07 +0000 (10:32 +0100)]
widening_mul: Pattern recognize unsigned multiplication with overflow check [PR95852]
The following patch pattern recognizes some forms of multiplication followed
by overflow check through division by one of the operands compared to the
other one, with optional removal of guarding non-zero check for that operand
if possible. The patterns are replaced with effectively
__builtin_mul_overflow or __builtin_mul_overflow_p. The testcases cover 64
different forms of that.
2021-01-11 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95852
* tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
(uaddsub_overflow_check_p): Renamed to ...
(arith_overflow_check_p): ... this. Handle also multiplication
with overflow check.
(match_uaddsub_overflow): Renamed to ...
(match_arith_overflow): ... this. Add cfg_changed argument. Handle
also multiplication with overflow check. Adjust function comment.
(math_opts_dom_walker::after_dom_children): Adjust callers. Call
match_arith_overflow also for MULT_EXPR.
* gcc.target/i386/pr95852-1.c: New test.
* gcc.target/i386/pr95852-2.c: New test.
Martin Liska [Mon, 21 Dec 2020 08:14:28 +0000 (09:14 +0100)]
Add pytest for a GCOV test-case
gcc/testsuite/ChangeLog:
PR gcov-profile/98273
* lib/gcov.exp: Add run-gcov-pytest function which runs pytest.
* g++.dg/gcov/pr98273.C: New test.
* g++.dg/gcov/gcov.py: New test.
* g++.dg/gcov/test-pr98273.py: New test.
Martin Liska [Fri, 8 Jan 2021 13:28:29 +0000 (14:28 +0100)]
if-to-switch: remove memory leaks
gcc/ChangeLog:
* gimple-if-to-switch.cc (struct condition_info): Use auto_var.
(if_chain::is_beneficial): Delete clusters
(find_conditions): Make second argument of conditions_in_bbs a
pointer so that we control over it's lifetime.
(pass_if_to_switch::execute): Delete them.
Kewen Lin [Mon, 11 Jan 2021 02:33:23 +0000 (20:33 -0600)]
ira: Skip some pseudos in move_unallocated_pseudos
This patch is to make move_unallocated_pseudos consistent
to what we have in function find_moveable_pseudos, where we
record the original pseudo into pseudo_replaced_reg only if
validate_change succeeds with newreg. To ensure every
unallocated pseudo in move_unallocated_pseudos has expected
information, it's better to add a check and skip it if it's
unexpected. This avoids possible ICEs in future.
gcc/ChangeLog:
* ira.c (move_unallocated_pseudos): Check other_reg and skip if
it isn't set.
Iain Buclaw [Thu, 7 Jan 2021 17:30:30 +0000 (18:30 +0100)]
d: Implement expression-based contract syntax
Expression-based contract syntax has been added. Contracts that consist
of a single assertion can now be written more succinctly and multiple
`in` or `out` contracts can be specified for the same function.
Remove fallout from commit 0bd675183d94 ("match.pd: Add ~(X - Y) -> ~X
+ Y simplification [PR96685]") and paper over the regression caused as
it is not the matter of the test cases affected.
but update the test case too, for consistency with the other two.
gcc/testsuite/
* gcc.target/vax/cmpelim-eq-notsi.c: Use subtraction from a
constant then rather than addition.
* gcc.target/vax/cmpelim-le-notsi.c: Likewise.
* gcc.target/vax/cmpelim-lt-notsi.c: Likewise.
VAX: Use a mode with `const_double_zero' expressions
For predictable semantics propagate the mode from operands referred by
the FP substitution to the `const_double_zero' expressions used with the
associated condition code calculation. Use an iterator to make copies
of the FP substitution across the FP modes supported as the substitution
now has to match the mode of the operands.
gcc/
* config/vax/vax.md (subst_f<cc>): Add mode to operands and
`const_double_zero'.
PDP11: Use a mode with `const_double_zero' expressions
For predictable semantics propagate the mode from operands referred by
FP substitutions to the `const_double_zero' expressions used with the
associated condition code calculation, resulting in the following update
to insn-emit.c code produced for the `pdp11-aout' target (with machine
description line numbering change noise removed):
Provide a new iterator to provide copies of FP substitutions across the
FP modes supported as the substitutions now need to match the mode of
the operands.
gcc/
* config/pdp11/pdp11.md (PDPfp): New mode iterator.
(fcc_cc, fcc_ccnz): Use it. Add mode to `const_double_zero' and
operands.
RTL: Update `const_double_zero' handling for mode and callable insns
Handle machine mode specification with `const_double_zero' and handle
the rtx with callable code produced from named insns. Complementing
commit 20ab43b5cad6 ("RTL: Add `const_double_zero' syntactic rtx") and
removing a commit c60d0736dff7 ("PDP11: Use `const_double_zero' to
express double zero constant") build regression observed with the
`pdp11-aout' target:
genemit: Internal error: abort in gen_exp, at genemit.c:202
make[2]: *** [Makefile:2427: s-emit] Error 1
and ultimately `(const_double_zero)' referred in a named RTL insn cannot
be interpreted. Handle the rtx then by supplying the constant 0 double
operand requested, resulting in the following update to insn-emit.c code
produced for the `pdp11-aout' target, relative to before the triggering
commit:
Jakub Jelinek [Sat, 9 Jan 2021 09:49:38 +0000 (10:49 +0100)]
tree-cfg: Allow enum types as result of POINTER_DIFF_EXPR [PR98556]
As conversions between signed integers and signed enums with the same
precision are useless in GIMPLE, it seems strange that we require that
POINTER_DIFF_EXPR result must be INTEGER_TYPE.
If we really wanted to require that, we'd need to change the gimplifier
to ensure that, which it isn't the case on the following testcase.
What is going on during the gimplification is that when we have the
(enum T) (p - q) cast, it is stripped through
/* Strip away as many useless type conversions as possible
at the toplevel. */
STRIP_USELESS_TYPE_CONVERSION (*expr_p);
and when the MODIFY_EXPR is gimplified, the *to_p has enum T type,
while *from_p has intptr_t type and as there is no conversion in between,
we just create GIMPLE_ASSIGN from that.
2021-01-09 Jakub Jelinek <jakub@redhat.com>
PR c++/98556
* tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
POINTER_DIFF_EXPR to be any integral type.
Jakub Jelinek [Sat, 9 Jan 2021 09:48:20 +0000 (10:48 +0100)]
vregs: Fix up instantiate_virtual_regs_in_insn for asm goto with outputs [PR98603]
If an asm insn fails constraint checking during vregs, it is just deleted.
We don't delete asm goto though because of the edges to the labels, so
instantiate_virtual_regs_in_insn would just remove the inputs and their
constraints, the pattern etc.
This worked fine when asm goto couldn't have output operands, but causes
ICEs later on when it has more than one output (and furthermore doesn't
really remove the problematic outputs). The problem is that
for multiple outputs we have a PARALLEL with multiple ASM_OPERANDS, but
those must use the same ASM_OPERANDS_INPUT_VEC etc., but the code was
adjusting just one.
The following patch turns invalid asm goto into a bare
asm goto ("" : : : : lab, lab2, lab3);
i.e. no inputs/outputs/clobbers, just the labels.
2021-01-09 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/98603
* function.c (instantiate_virtual_regs_in_insn): For asm goto
with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
if any, set ASM_OPERANDS mode to VOIDmode and change
ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.
* gcc.target/i386/pr98603.c: New test.
* gcc.target/aarch64/pr98603.c: New test.
Alexandre Oliva [Fri, 1 Jan 2021 00:37:24 +0000 (21:37 -0300)]
final: accept markers at line 0
Back when I introduced debug markers, I seem to have been under the
impression that location line 0 would only ever occur for unknown and
builtin locations.
Though line 0 never comes up in normal processing of source files, and
debug info formats often cannot represent them, I suppose there's no
need to preemptively discard them during final.
for gcc/ChangeLog
PR debug/97714
* final.c (notice_source_line): Narrow down the condition to
skip a line-0 marker.
The destination register is only partially overwritten, so + should be
used instead of =.
gcc/ChangeLog:
2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/vector.md (*tf_to_fprx2_0): Rename from
"*mov_tf_to_fprx2_0" for consistency, fix constraint.
(*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
consistency, fix constraint.
Ilya Leoshkevich [Mon, 14 Dec 2020 13:05:28 +0000 (14:05 +0100)]
IBM Z: Introduce __LONG_DOUBLE_VX__ macro
Give end users the opportunity to find out whether long doubles are
stored in floating-point register pairs or in vector registers, so that
they could fine-tune their asm statements.
gcc/ChangeLog:
2020-12-14 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390-c.c (s390_def_or_undef_macro): Accept
callables instead of mask values.
(struct target_flag_set_p): New predicate.
(s390_cpu_cpp_builtins_internal): Define or undefine
__LONG_DOUBLE_VX__ macro.
2020-12-14 Ilya Leoshkevich <iii@linux.ibm.com>
gcc/testsuite/ChangeLog:
* gcc.target/s390/vector/long-double-vx-macro-off-on.c: New test.
* gcc.target/s390/vector/long-double-vx-macro-on-off.c: New test.
Patrick Palka [Fri, 8 Jan 2021 15:11:25 +0000 (10:11 -0500)]
c++: ICE with constexpr call that returns a PMF [PR98551]
We shouldn't do replace_result_decl after evaluating a call that returns
a PMF because PMF temporaries aren't wrapped in a TARGET_EXPR (and so we
can't trust ctx->object), and PMF initializers can't be self-referential
anyway, so replace_result_decl would always be a no-op.
To that end, this patch changes the relevant AGGREGATE_TYPE_P test to
CLASS_TYPE_P, which should rule out PMFs (as well as arrays, which we
can't return and therefore won't see here). This fixes an ICE from the
sanity check in replace_result_decl in the below testcase during
constexpr evaluation of the call f() in the initializer g(f()).
gcc/cp/ChangeLog:
PR c++/98551
* constexpr.c (cxx_eval_call_expression): Check CLASS_TYPE_P
instead of AGGREGATE_TYPE_P before calling replace_result_decl.
gcc/testsuite/ChangeLog:
PR c++/98551
* g++.dg/cpp0x/constexpr-pmf2.C: New test.
Patrick Palka [Fri, 8 Jan 2021 15:02:04 +0000 (10:02 -0500)]
c++: Fix access checking of scoped non-static member [PR98515]
In the first testcase below, we incorrectly reject the use of the
protected non-static member A::var0 from C<int>::g() because
check_accessibility_of_qualified_id, at template parse time, determines
that the access doesn't go through 'this'. (This happens because the
dependent base B<T> of C<T> doesn't have a binfo object, so it appears
to DERIVED_FROM_P that A is not an indirect base of C<T>.) From there
we create the corresponding deferred access check, which we then
perform at instantiation time and which (expectedly) fails.
The problem ultimately seems to be that we can't in general determine
whether a use of a scoped non-static member goes through 'this' until
instantiation time, as the second testcase below illustrates. So this
patch makes check_accessibility_of_qualified_id punt in such situations
to avoid creating a bogus deferred access check.
gcc/cp/ChangeLog:
PR c++/98515
* semantics.c (check_accessibility_of_qualified_id): Punt if
we're checking access of a scoped non-static member inside a
class template.
gcc/testsuite/ChangeLog:
PR c++/98515
* g++.dg/template/access32.C: New test.
* g++.dg/template/access33.C: New test.
Richard Biener [Fri, 8 Jan 2021 13:37:09 +0000 (14:37 +0100)]
reset the SCEV htab after FRE in loop pipeline
When running FRE in the loop pipeline (as part of the conditionally
scheduled scalar cleanups) we have to reset the SCEV hashtable as
otherwise we can end up with stale entries and all sorts of problems.
Catched by my out-of-tree verifier for this problem.
2021-01-08 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
Richard Biener [Fri, 8 Jan 2021 13:22:00 +0000 (14:22 +0100)]
fix vectorizer memleaks
This plugs two memleaks in the vectorizer.
2021-01-08 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
(vect_build_slp_tree): On cache hit release the matched
scalar stmts vector.
* tree-vect-stmts.c (vectorizable_store): Properly free
vec_oprnds before possibly gathering them again.
Richard Biener [Fri, 8 Jan 2021 12:17:18 +0000 (13:17 +0100)]
tree-optimization/98544 - more permute optimization fixes
Permute nodes are not transparent to the permute of their children.
Instead we have to materialize child permutes always and in future
may treat permute nodes as the source of arbitrary permutes as
we can permute the lane permutation vector at will (as the target
supports in the end).
2021-01-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/98544
* tree-vect-slp.c (vect_optimize_slp): Always materialize
permutes at a permute node.
H.J. Lu [Thu, 7 Jan 2021 22:27:49 +0000 (14:27 -0800)]
x86-64: Use R10 for profiling large model
R10 is caller-saved. Although it can be used as a static chain register,
it is preserved when calling mcount for nested functions. Use R10 as a
scratch register to call mcount in large model.
gcc/
PR target/98482
* config/i386/i386.c (x86_function_profiler): Use R10 to call
mcount in large model. Sorry for large model with PIC.
gcc/testsuite/
PR target/98482
* gcc.target/i386/pr98482-1.c: New test.
* gcc.target/i386/pr98482-1.c: Likewise.
Jakub Jelinek [Fri, 8 Jan 2021 11:28:25 +0000 (12:28 +0100)]
i386: Fix -mcmodel= vs. target attribute [PR98585]
My patch to save/restore opts_set rather than essentially treating
global_options_set as a logical or whether some option has ever been
explicitly set somewhere apparently broke -mcmodel= vs. target attribute
(and as the patch shows some other options too).
The thing is, at least for options for which we ever test opts_set->x_*
or global_options_set.x_*, we need to save/restore them next to the
saving/restoring of the actual option values.
If an option has Save keyword or in case of TargetVariable, it is the
generic code that handles the saving and restoring of both the option
and corresponding opts_set flag automatically, for other variables
(TargetSave, or Target without Save) the backend needs to do that in the
target hook manually and in that case should save/restore both the option
values (the hooks mostly did that) and opts_set (they didn't).
As it seems much easier to let the automatic saving/restoring do the work
for us unless the saving/restoring of the option needs some specific magic,
the following patch is a result of grepping through the backend for
opts_set->x_ and global_options_set.x_ and for all such referenced
variables, grepping whether it is saved/restored including opts_set properly
in the generated options-save.c or not.
2021-01-08 Jakub Jelinek <jakub@redhat.com>
PR target/98585
* config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
TargetSave and initialize for variables with enum types.
(mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
mstack-protector-guard-symbol=): Add Save.
* config/i386/i386-options.c (ix86_function_specific_save,
ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
x_ix86_veclibabi_type.
This patch adds unpacked support for unconditional and
conditional CNOT. The type suffix has to be taken from
the element size rather than the container size.
gcc/
* config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
SVE_FULL_I to SVE_I.
(*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
This patch extends the conditional UXT patterns from SVE_FULL_I
to SVE_I. It doesn't matter in this case whether the type suffix
is taken from the element size or the container size.
gcc/
* config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
SVE_FULL_I to SVE_I.
(*cond_uxt<mode>_any): Likewise.
Kyrylo Tkachov [Thu, 7 Jan 2021 16:03:08 +0000 (16:03 +0000)]
aarch64: Reimplement most vpadal intrinsics using builtins
This patch reimplements most of the vpadal intrinsics to use RTL
builtins in the normal way.
The ones that aren't converted are the int32x2_t -> int64x1_t ones as
the RTL pattern doesn't currently handle
these modes. We don't have a V1DI mode so it would need to return a
DImode value or a V2DI one with the first lane
being the result. It's not hard to do, but it would require a bit more
refactoring so we can do it separately later.
This patch hopefully improves the status quo.
The new Vwhalf mode attribute is created because the existing Vwtype
attribute maps V8QI wrongly (for this pattern) to "8h" as the
suffix rather than "4h" as needed.
gcc/
* config/aarch64/iterators.md (Vwhalf): New iterator.
* config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
Rename to...
(aarch64_<sur>adalp<mode>): ... This. Make more
builtin-friendly.
(<sur>sadv16qi): Adjust callsite of the above.
* config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
builtins.
* config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
builtins.
(vpadal_s16): Likewise.
(vpadal_u8): Likewise.
(vpadal_u16): Likewise.
(vpadalq_s8): Likewise.
(vpadalq_s16): Likewise.
(vpadalq_s32): Likewise.
(vpadalq_u8): Likewise.
(vpadalq_u16): Likewise.
(vpadalq_u32): Likewise.
Kyrylo Tkachov [Thu, 7 Jan 2021 14:49:08 +0000 (14:49 +0000)]
aarch64: Reimplement vaba* intrinsics using builtins
This patch reimplements the vaba* arm_neon.h intrinsics using RTL
builtins that expand to proper RTL patterns
rather than using inline asm.
The implementation is fairly straightforward by defining new builtins
and using them in the header.
Kyrylo Tkachov [Thu, 7 Jan 2021 14:02:02 +0000 (14:02 +0000)]
aarch64: Fix RTL patterns for UABA/SABA
Sometime ago we changed the RTL representation of the (SU)ABD
instructions in RTL to a (MINUS (MAX) (MIN)) rather than a (MINUS (ABS) (ABS))
as it is more correctly models the semantics.
We should do the same for the accumulation forms of these instructions:
UABA/SABA.
This patch does that and allows the new pattern to generate the unsigned
UABA form as well.
The new form also allows it to more easily be re-used to implement the
relevant arm_neon.h intrinsics in the future.
The testcase takes an -fno-tree-reassoc to work around a side-effect of
PR98581.
gcc/
* config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
(aarch64_<su>aba<mode>): ... This. Handle uaba as well.
Change RTL pattern to match.
gcc/testsuite/
* gcc.target/aarch64/usaba_1.c: New test.
gcc/fortran
PR fortran/93794
* trans-expr.c (gfc_conv_component_ref): Remove the condition
that deferred character length components only be allocatable.
gcc/testsuite/
PR fortran/93794
* gfortran.dg/deferred_character_35.f90 : New test.
Paul Thomas [Fri, 8 Jan 2021 10:11:00 +0000 (10:11 +0000)]
Fortran:Fix simplification of constructors with implied-do [PR98458]
2021-01-08 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/98458
* simplify.c (is_constant_array_expr): If an array constructor
expression has elements other than constants or structures, try
fixing the expression with gfc_reduce_init_expr. Also, if shape
is NULL, obtain the array size and set it.
gcc/testsuite/
PR fortran/98458
* gfortran.dg/implied_do_3.f90 : New test.
Kito Cheng [Fri, 11 Dec 2020 08:51:40 +0000 (16:51 +0800)]
RISC-V: Implement new style of architecture extension test macros.
- This patch introduce new set of architecture extension test macros
which is accept on riscv-c-api-doc recently.
- https://github.com/riscv/riscv-c-api-doc/blob/master/riscv-c-api.md#architecture-extension-test-macro
- We will also mark deprecated for legacy architecture extension test macros
in GCC 11, but still support that for 1 or 2 release cycles.
Kito Cheng [Tue, 29 Dec 2020 08:15:19 +0000 (16:15 +0800)]
RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h
Pre-work of new style of architecture extension test macros, we need the
list used in `config/riscv/riscv-c.c`, so those struct/class declaration
must move to header file rather than local C file.
Jakub Jelinek [Thu, 7 Jan 2021 22:00:28 +0000 (23:00 +0100)]
c++: Fix up tsubst of BIT_CAST_EXPR [PR98329]
As the testcase shows, calling cp_build_bit_cast in tsubst_copy doesn't seem
to be a good idea, because tsubst_copy might not really make the operand
non-dependent, but as processing_template_decl can be 0,
type_dependent_expression_p will return false and then cp_build_bit_cast
assumes the type is non-NULL and non-dependent.
So, this patch just follows what is done e.g. for NOP_EXPR etc. and just
builds some tree in tsubst_copy, and only calls the semantics.c function
from tsubst_copy_and_build.
2021-01-07 Jakub Jelinek <jakub@redhat.com>
PR c++/98329
* pt.c (tsubst_copy) <case BIT_CAST_EXPR>: Don't call
cp_build_bit_cast here, instead just build_min a BIT_CAST_EXPR and set
its location.
(tsubst_copy_and_build): Handle BIT_CAST_EXPR.
Martin Sebor [Thu, 7 Jan 2021 21:20:39 +0000 (14:20 -0700)]
PR middle-end/98578 - ICE warning on uninitialized VLA access
gcc/c-family/ChangeLog:
PR middle-end/98578
* c-pretty-print.c (print_mem_ref): Strip array from access type.
Avoid assuming acces type's size is constant. Correct condition
guarding the printing of a parenthesis.
Marek Polacek [Wed, 6 Jan 2021 00:17:10 +0000 (19:17 -0500)]
c++: Fix thinko in auto return type checking [PR98441]
This fixes a thinko in my r11-2085 patch: when I said "But only give the
!late_return_type errors when funcdecl_p, to accept e.g. auto (*fp)() = f;
in C++11" I should've done this, otherwise we give bogus errors mentioning
"function with trailing return type" when there is none.
gcc/cp/ChangeLog:
PR c++/98441
* decl.c (grokdeclarator): Move the !funcdecl_p check inside the
!late_return_type block.
Jason Merrill [Mon, 4 Jan 2021 21:11:08 +0000 (16:11 -0500)]
c++: Add TARGET_EXPR comments
Discussing the 98469 patch and class prvalues with Jakub led me to
double-check our handling of TARGET_EXPR in constexpr.c, and add a note
about why we don't strip them in parameter initialization. And another to
clarify that we're handling an INIT_EXPR in a place we do strip them.
Jason Merrill [Tue, 5 Jan 2021 21:56:44 +0000 (16:56 -0500)]
c++: Add some conversion sanity checking.
Another change I was working on revealed that for complex numbers we were
building a ck_identity with build_conv, leading to the wrong active member
in the union being set. Rather than add another enumeration of the
appropriate conversion codes, I factored that out.
gcc/cp/ChangeLog:
* call.c (has_next): Factor out from...
(next_conversion): ...here.
(strip_standard_conversion): And here.
(is_subseq): And here.
(build_conv): Check it.
(standard_conversion): Don't call build_conv
for ck_identity.
David Malcolm [Thu, 7 Jan 2021 20:45:29 +0000 (15:45 -0500)]
analyzer: fix ICE when DECL_INITIAL is error_mark_node [PR98580]
lto-streamer-out.c's get_symbol_initial_value can return error_mark_node
rather than DECL_INITIAL as an optimization to avoid extra sections for
simple scalar values.
Add a check to the analyzer to handle such cases gracefully.
gcc/analyzer/ChangeLog:
PR analyzer/98580
* region.cc (decl_region::get_svalue_for_initializer): Gracefully
handle when LTO writes out DECL_INITIAL as error_mark_node.
gcc/testsuite/ChangeLog:
PR analyzer/98580
* gcc.dg/analyzer/pr98580-a.c: New test.
* gcc.dg/analyzer/pr98580-b.c: New test.
Patrick Palka [Thu, 7 Jan 2021 17:41:14 +0000 (12:41 -0500)]
libstdc++: Fix long double to_chars testcase [PR98384]
The testcase was failing to compile on some targets due to its use of
the non-standard functions nextupl and nextdownl. This patch makes the
testcase instead use the C99 function nexttowardl in an equivalent way.
libstdc++-v3/ChangeLog:
PR libstdc++/98384
* testsuite/20_util/to_chars/long_double.cc: Use nexttowardl
instead of the non-standard nextupl and nextdownl.
Paul Thomas [Thu, 7 Jan 2021 17:34:49 +0000 (17:34 +0000)]
Fortran: Improve resolution of associate variables. [PR93701].
2021-01-07 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/93701
* resolve.c (find_array_spec): Put static prototype for
resolve_assoc_var before this function and call for associate
variables.
gcc/testsuite/
PR fortran/93701
* gfortran.dg/associate_54.f90: New test.
* gfortran.dg/associate_55.f90: New test.
* gfortran.dg/associate_56.f90: New test.
Adds support for using user-defined attributes on function arguments and
single-parameter alias declarations. These attributes behave analogous
to existing UDAs.