H.J. Lu [Tue, 9 Jul 2024 08:48:54 +0000 (01:48 -0700)]
elf: Add glibc version dependency only if needed
There is no need to add a needed glibc version if the glibc base version
includes the needed glibc version.
PR ld/31966
* elflink.c (elf_link_add_glibc_verneed): Add glibc_minor_base.
Skip if the glibc base version includes the needed glibc version.
(_bfd_elf_link_add_glibc_version_dependency): Initialize
glibc_minor_base to INT_MAX and pass it to
elf_link_add_glibc_verneed.
gprofng: add hardware counters for Intel Ice Lake processor
gprofng/ChangeLog
2024-07-07 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>.
* common/hwc_cpus.h: New constant for Intel Ice Lake processor.
* common/hwcdrv.c: Add a new argument to hwcfuncs_get_x86_eventsel.
Set config1 in perf_event_attr. Remove the use of memset.
* common/core_pcbe.c (core_pcbe_get_eventnum): Return 0.
* common/hwcentry.h: Add config1.
* src/collctrl.cc (Coll_Ctrl::build_data_desc):Set config1.
* common/hwcfuncs.c (process_data_descriptor): Set config1.
* common/hwctable.c: Add the hwc table for Intel Ice Lake processor.
* src/hwc_intel_icelake.h: New file.
Indu Bhagat [Wed, 26 Jun 2024 19:43:51 +0000 (12:43 -0700)]
doc: sframe: add appendix for generating stack traces
Add an appendix to provide a rough outline to show how to generate stack
traces using the SFrame format. Such content should hopefully aid the
reader assimmilate the information in the specification.
libsframe/
* doc/sframe-spec.texi: Add new appendix.
include: sframe: update code comments around SFrame FRE stack offsets
This also amends the incorrect comment:
offset3 (intrepreted as FP = CFA + offset2)
If RA tracking is enabled, the offset to recover FP is at the third
index. The SFrame format (V2) has assumption that if FP is saved on
stack, RA must have been saved as well. This is true for the currently
supported arch Aarch64. For AMD64, RA tracking per SFrame FRE is not
necessary.
In future, when extending support for more architectures, this will
likely need to be revisited.
include/
* sframe.h: Make the comments clearer by enumerating what
happens per-ABI.
Indu Bhagat [Thu, 23 May 2024 21:18:23 +0000 (14:18 -0700)]
doc: sframe: segregate the ABI/arch-specific components
The recipe to interpret the SFrame FRE stack offsets is
ABI/arch-specific.
Although, there is other information in the specification that is
ABI-specific (like pauth_key usage in AArch64), those pieces of
information are now assimmilated in the SFrame specification in a way
that it is fairly difficult to carve then out into a ABI/arch-specific
section without confusing the readers.
For future though, the specification must strive to keep the generic
parts and ABI/arch-specific parts clearly laid out in separate sections.
libsframe/
* doc/sframe-spec.texi: Reorder and adapt the contents.
H.J. Lu [Tue, 9 Jul 2024 08:30:19 +0000 (01:30 -0700)]
LTO: Properly check wrapper symbol
Add wrapper_symbol to bfd_link_hash_entry and set it to true for wrapper
symbol. Set wrap_status to wrapper if wrapper_symbol is true in LTO.
Note: Calling unwrap_hash_lookup to check for the wrapper symbol works
only when there is a definition for the wrapped symbol since references
to the wrapped symbol have been redirected to the wrapper symbol.
bfd/
PR ld/31956
* linker.c (bfd_wrapped_link_hash_lookup): Set wrapper_symbol
for wrapper symbol.
PR ld/31956
* plugin.c (get_symbols): Set wrap_status to wrapper if
wrapper_symbol is set.
* testsuite/ld-plugin/lto.exp: Run PR ld/31956 tests.
* testsuite/ld-plugin/pr31956a.c: New file.
* testsuite/ld-plugin/pr31956b.c: Likewise.
This patch adds support for followign SVE2p1 instruction, spec is available here [1].
1. PMOV (to vector)
2. PMOV (to predicate)
Both pmov (to vector) and pmov (to predicate) have destination scalable vector
register and source scalable vector register respectively as an operand with no
suffix and optional index. To handle this case we have added 8 new operands in
this patch.
This patch adds support for SVE2p1 "tbxq" instruction, spec is available here [1].
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions?lang=en
aarch64: Add support for sve2p1 zipq[1-2] instructions.
This patch adds support for SVE2p1 "zipq1" and "zipq2" instructions, spec is
available here [1].
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions?lang=en
aarch64: Add support for sve2p1 uzpq[1-2] instructions.
This patch adds support for SVE2p1 "uzpq1" and "uzpq2" instructions, spec is
available here [1]
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions?lang=en
This patch adds support for SVE2p1 "tblq" instruction, spec is available here [1].
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions?lang=en
This patch adds support for SVE2p1 "orqv" instruction, spec available here [1].
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SVE-Instructions?lang=en
Alan Modra [Fri, 5 Jul 2024 13:11:49 +0000 (22:41 +0930)]
objcopy bfd_map_over_sections and global status
This patch started life as a relatively simple change to fix some
unimportant objcopy memory leaks, but expanded into a larger patch
when I was annoyed by the awkwardness of passing data when using
bfd_map_over_sections. A simple loop over sections is much more
convenient, and we really don't need the abstraction layer. Sections
in a list isn't going to disappear any time soon.
The patch also removes use of the global "status" variable by all but
the top-level functions called from main.
* objcopy.c (filter_symbols): Return success as a bool. Pass
symcount as a pointer, updated on return.
(merge_gnu_build_notes): Similarly return a bool and add newsize
param with updated smaller section size.
(setup_bfd_headers): Return bool success rather than setting
"status" on failure.
(setup_section): Likewise.
(copy_relocations_in_section, copy_section): Likewise, and adjust
params.
(mark_symbols_used_in_relocations): Likewise, and free memory
on failure path. Don't call bfd_fatal.
(get_sections): Delete function.
(copy_object): Don't use bfd_map_over_sections, instead use a
loop allowing easy detection of failure status. Free memory on
error paths.
(copy_archive): Return bool success rather than setting "status"
on failure.
(copy_file): Set "status" here.
* testsuite/binutils-all/strip-13.d: Adjust to suit.
Jan Beulich [Fri, 5 Jul 2024 06:39:28 +0000 (08:39 +0200)]
RISC-V: avoid use of match_opcode() in riscv_insn_types[]
As of 27b33966b18e ("RISC-V: disallow x0 with certain macro-insns") the
.match_func field may be NULL for entries used for assembly only, which
is the case for the entire table. With .match and .mask both zero the
function would only ever succeed anyway. Save almost a hundred base
relocations in the final executable by using NULL instead.
Xi Ruoyao [Sun, 30 Jun 2024 07:18:25 +0000 (15:18 +0800)]
LoongArch: Add DT_RELR tests
Most tests are ported from AArch64.
The relr-addend test is added to make sure the addend (link-time address)
is correctly written into the relocated section. Doing so is not
strictly needed for RELA, but strictly needed for RELR).
Xi Ruoyao [Sun, 30 Jun 2024 07:18:24 +0000 (15:18 +0800)]
LoongArch: Add DT_RELR support
The logic is same as a71d87680110 ("aarch64: Add DT_RELR support").
As LoongArch does not have -z dynamic-undefined-weak, we don't need to
consider UNDEFWEAK_NO_DYNAMIC_RELOC.
The linker relaxation adds another layer of complexity. When we delete
bytes in a section during relaxation, we need to fix up the offset in
the to-be-packed relative relocations against this section.
Xi Ruoyao [Sun, 30 Jun 2024 07:18:23 +0000 (15:18 +0800)]
LoongArch: Make protected function symbols local for -shared
On LoongArch there is no reason to treat STV_PROTECTED STT_FUNC symbols
as preemptible. See the comment above LARCH_REF_LOCAL for detailed
explanation.
"ld -shared" produces a shared object with one R_LARCH_NONE (instead of
R_LARCH_JUMP_SLOT as we expect) to relocate the GOT entry of "ifunc".
It's because the indices in .plt and .rela.plt mismatches for
STV_DEFAULT STT_IFUNC symbols when another PLT entry exists for a
STV_HIDDEN STT_IFUNC symbol, and such a mismatch breaks the logic of
loongarch_elf_finish_dynamic_symbol. Fix the issue by reordering .plt
so the indices no longer mismatch.
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE 00000000000001a8 R_LARCH_RELATIVE *ABS*+0x00000000000001a8
But this is just wrong: at runtime the dynamic linker will run
*(uintptr *)&x += load_address, clobbering the next 4 bytes of data
("0xdeadbeef" in the example).
If we keep the R_LARCH_32 reloc as-is in ELFCLASS64, it'll be rejected
by the Glibc dynamic linker anyway. And it does not make too much sense
to modify Glibc to support it. So we can just reject it like x86_64:
relocation R_X86_64_32 against `.data' can not be used when making a
shared object; recompile with -fPIC
or RISC-V:
relocation R_RISCV_32 against non-absolute symbol `a local symbol'
can not be used in RV64 when making a shared object
In commit dff565fcca8137954d6ad571ef39f6aec5c0429c, the fixups
for PCREL_LO12_I and PCREL_LO12_S were mixed, so the "IMM"
field were applied to incorrect position, this caused incorrect
src registers to be encoded.
RISC-V: hash with segment id and pcrel_hi address while recording pcrel_hi
When the same address across different segments (sections) needs to be
recorded, it will overwrite the slot, leading to a memory leak. To ensure
uniqueness, the segment (section) ID needs to be included in the hash key
calculation.
gas/
* config/tc-riscv.c (riscv_pcrel_hi_fixup): New "const asection *sec".
(riscv_pcrel_fixup_hash): make sec->id and e->adrsess as the
hash key.
(riscv_pcrel_fixup_eq): Check sec->id at first.
(riscv_record_pcrel_fixup): New member "sec".
(md_apply_fix) <case BFD_RELOC_RISCV_PCREL_HI20>: Likewise.
(md_apply_fix) <case BFD_RELOC_RISCV_PCREL_LO12_I>: Likewise.
Andre Vieira [Thu, 4 Jul 2024 12:45:53 +0000 (13:45 +0100)]
mve: Fix encoding for vcvt[bt] single-half float conversion instructions
The encoding was previously not taking into account that the Quad vector
registers were being encoded using their Q-register numbers rather than their
D-register equivalent (multiply by 2).
gas/
* config/tc-arm.c (do_neon_cvttb_1): Use Q-register vector number
rather than their D-register equivalent.
gas/testsuite/
* gas/arm/mve-vcvt-3.d: Correct expected values in test.
gas: Validate SFrame RA tracking and fixed RA offset
Verify all architectures participating in SFrame generation do define
the mandatory SFrame return address (RA) tracking predicate function
sframe_ra_tracking_p. Do so by explicitly not testing for the macro
SFRAME_FRE_RA_TRACKING as otherwise required.
Verify that architectures not using SFrame RA tracking specify a valid
fixed RA offset.
gas/
* gen-sframe.c (output_sframe_internal): Validate SFrame
RA tracking and fixed RA offset.
gas: Test predicate whether SFrame RA tracking is used
The existence of the macro SFRAME_FRE_RA_TRACKING only ensures the
existence of the macro SFRAME_CFA_RA_REG and the predicate function
sframe_ra_tracking_p. It does not indicate whether SFrame RA tracking
is actually used.
Test the return value of the SFrame RA tracking predicate function
sframe_ra_tracking_p to determine whether RA tracking is used.
This aligns the logic in functions get_fre_num_offsets and
output_sframe_row_entry to the one used in all other places.
gas/
* gen-sframe.c (get_fre_num_offsets, output_sframe_row_entry):
Test predicate to determine whether SFrame RA tracking is used.
gas: Don't skip SFrame FDE if .cfi_register specifies SP register
Neither ".cfi_offset SP, <offset>", ".cfi_register SP, <regno>", nor
".cfi_val_offset SP, <offset>" alter the tracking information to recover
the stack pointer (SP). Doing so would need an explicit .cfi_def_cfa,
which SFrame tracks.
The stack pointer (SP) register contents on entry can be reconstructed
from the SFrame CFA tracking information using information from the
current and initial SFrame FREs of the SFrame FDE:
1. Compute CFA from the current CFA base register (SP or FP) and CFA
offset from the SFrame CFA tracking information from the SFrame FRE
for the current instruction address:
CFA = <current_base_reg> + <current_cfa_offset>
2. Compute SP from the current CFA and the CFA offset from the SFrame
CFA tracking information from the initial SFrame FRE of the FDE:
SP = CFA - <initial_cfa_offset>
While at it add comments to the processing of .cfi_offset and
.cfi_val_offset that the SP can be reconstructed from the CFA tracking
information.
gas/
* gen-sframe.c (sframe_xlate_do_register): Do not skip SFrame
FDE if .cfi_register specifies SP register.
(sframe_xlate_do_offset,sframe_xlate_do_val_offset): Add comment
that this is likewise.
gas: Don't skip SFrame FDE if .cfi_register specifies RA w/o tracking
Do not skip SFrame FDE if .cfi_register specifies RA register without
RA tracking being actually used. Without RA tracking the register
contents can always be restored from the stack using the fixed
RA offset from CFA.
gas/
* gen-sframe.c (sframe_xlate_do_register): Do not skip SFrame
FDE if .cfi_register specifies RA register without RA tracking
being used.
CFI opcode DW_CFA_AARCH64_negate_ra_state is multiplexed with
DW_CFA_GNU_window_save. Process DW_CFA_AARCH64_negate_ra_state on
AArch64. Skip generation of SFrame FDE otherwise with the following
warning message:
skipping SFrame FDE; .cfi_window_save
gas/
* gen-sframe.c: Skip SFrame FDE if .cfi_window_save.
The SFrame format cannot represent the frame pointer (FP) being saved
on the stack without the return address (RA) also being saved on the
stack, if RA tracking is used.
A SFrame FDE is followed by 1-3 offsets with the following information:
Without RA tracking:
1. Offset from base pointer (SP or FP) to locate the CFA
2. Optional: Offset to CFA to restore the frame pointer (FP)
With RA tracking:
1. Offset from base pointer (SP or FP) to locate the CFA
2. Optional: Offset to CFA to restore the return address (RA)
3. Optional: Offset to CFA to restore the frame pointer (FP)
When RA tracking is used and a FDE is followed by two offsets the
SFrame format does not provide any information to distinguish whether
the second offset is the RA or FP offset. SFrame assumes the offset to
be the RA offset, which may be wrong.
Therefore skip generation of SFrame FDE information and print the
following warning, if RA tracking is used and the FP is saved on the
stack without the RA being saved as well:
skipping SFrame FDE; FP without RA on stack
gas/
* gen-sframe.c (sframe_do_fde): Skip SFrame FDE if FP without RA
on stack, as the SFrame format cannot represent this case.
gas: User readable warnings if SFrame FDE is not generated
The following generic warning message, which is printed whenever the
assembler skips generation of SFrame FDE, is not very helpful for the
user:
skipping SFrame FDE; CFI insn <name> (0x<hexval>)
Whenever possible print meaningful warning messages, when the assembler
skips generation of SFrame FDE:
- skipping SFrame FDE; non-SP/FP register <regno> in .cfi_def_cfa
- skipping SFrame FDE; non-SP/FP register <regno> in
.cfi_def_cfa_register
- skipping SFrame FDE; .cfi_def_cfa_offset without CFA base register
in effect
- skipping SFrame FDE; {FP|RA} register <regno> in .cfi_val_offset
- skipping SFrame FDE; {SP|FP|RA} register <regno> in in .cfi_register
- skipping SFrame FDE; .cfi_remember_state without prior SFrame FRE
state
- skipping SFrame FDE; non-default RA register <regno>
gas/
* gen-sframe.h (SFRAME_FRE_BASE_REG_INVAL): New macro for
invalid SFrame FRE CFA base register value of -1.
* gen-sframe.c: User readable warnings if SFrame FDE is not
generated.
gas/testsuite/
* gas/cfi-sframe/common-empty-1.d: Update generic SFrame test
case to updated warning message texts.
* gas/cfi-sframe/common-empty-2.d: Likewise.
* gas/cfi-sframe/common-empty-3.d: Likewise.
gas: Warn if SFrame FDE is skipped due to non-default return column
Print a warning message if SFrame FDE is skipped due to a non-default
DWARF return column (i.e. return address (RA) register number). This
may be caused by the use of CFI directive .cfi_return_column with a
non-default return address (RA) register number in the processed
assembler source code.
Warning: skipping SFrame FDE due to non-default DWARF return column
gas/
* gen-sframe.c: Warn if SFrame FDE is skipped due to non-default
DWARF return column.
gas/testsuite/
* gas/cfi-sframe/common-empty-3.d: Update test case to expect
for new warning message when SFrame FDE is skipped due to
a non-default DWARF return column.
gas: Skip SFrame FDE if CFI specifies non-FP/SP base register
Do not generate SFrame FDE if DWARF CFI directives .cfi_def_cfa or
.cfi_def_cfa_register specify a CFA base register number other than
the architecture-specific stack-pointer (SP) or frame-pointer (FP)
register numbers.
This also causes the assembler to print a warning message, so that
skipping of the SFrame FDE does not occur silently.
Update the generic ld SFrame test case to be architecture independent.
Do not use CFI directive .cfi_def_cfa, as the specified CFA base
register number is not a valid SP/FP register number on all
architectures. An invalid SP/FP register number will now cause the
assembler to print a warning message and skip SFrame FDE generation.
Remove the offending CFI directive, that cannot be coded architecture-
independent, as the test case requires SFrame information to be
generated. This was reported by the Linaro-TCWG-CI for AArch64.
gas/
* gen-sframe.c: Skip SFrame generation if CFI specifies
non-FP/SP base register.
ld/testsuite/
* ld-sframe/discard.s: Update generic SFrame test case to be
architecture independent.
gas: Print DWARF call frame insn name in SFrame warning message
SFrame generation prints the DWARF call frame instruction opcode in
hexadecimal. Leverage get_DW_CFA_name to additionally print the
DWARF call frame instruction name in human readable form, while also
respecting fake CFI types. Use "(unknown)", if the DWARF call frame
instruction name is not known.
While at it use the terminology "instruction" for these DW_CFA_*, as
suggested by Indu.
This changes the following assembler SFrame generation warning message
as follows:
Old:
Warning: skipping SFrame FDE due to DWARF CFI op 0x<hexval>
gas/
* gen-sframe.c (sframe_get_cfi_name): New function to get the
DWARF call frame instruction name for a DWARF call frame
instruction opcode.
(sframe_do_cfi_insn): Use sframe_get_cfi_name to print the
DWARF call frame instruction name for the DWARF call frame
instruction opcode in the warning message.
gas/testsuite/
* gas/cfi-sframe/common-empty-1.d: Update expected SFrame
warning message text for DWARF call frame insn name.
* gas/cfi-sframe/common-empty-2.d: Likewise.
readelf/objdump: Display SFrame fixed RA offset as 'f' in dump
For the SFrame FRE frame-pointer (FP) offset from CFA a 'u' is displayed
if it is unavailable.
For the SFrame FRE return-address (RA) offset from CFA a 'u' was
displayed if the ABI uses a fixed RA offset from CFA. By chance a
'u' was also displayed if the RA offset is unavailable, as the string
buffer was not initialized after formatting the FP offset. Note that it
could not occur that the FP offset was erroneously displayed as RA
offset, as the SFrame format cannot have a FRE with FP offset without
RA offset.
For the FRE RA offset display 'f' if the ABI uses a fixed RA offset
from CFA. Display a 'u' if it is unavailable.
libsframe/
* sframe-dump.c: Display SFrame fixed RA offset as 'f' in dump.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe-common-4.d: Test for RA displayed
either as 'u' (if RA tracking) or as 'f' (fixed RA offset if no
RA tracking).
* gas/cfi-sframe/cfi-sframe-common-5.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-6.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-7.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-8.d: Likewise.
* gas/cfi-sframe/cfi-sframe-x86_64-1.d: Test for RA displayed
as 'f' (fixed RA offset), as x86-64 does not use RA tracking.
* gas/scfi/x86_64/scfi-cfi-sections-1.d: Likewise.
* gas/scfi/x86_64/scfi-dyn-stack-1.d: Likewise.
ld/testsuite/
* ld-x86-64/sframe-plt-1.d: Test for RA displayed as 'f' (fixed
RA offset), as x86-64 does not use RA tracking.
* ld-x86-64/sframe-simple-1.d: Likewise.
readelf/objdump: Dump SFrame CFA fixed FP and RA offsets
The SFrame format allows architectures to specify fixed offsets from the
CFA, if any, from which the frame pointer (FP) and/or return address
(RA) may be recovered. These offsets are stored in the SFrame header.
For instance the SFrame generation in the assembler for x86 AMD64
specifies a fixed offset from the CFA, from which the return address
(RA) may be recovered.
When dumping the SFrame header, for instance in readelf/objdump with
option --sframe, do also dump the specified fixed offsets from the CFA,
if any, from which the frame pointer (FP) and return address (RA) may
be recovered.
Update the common SFrame test case verification patterns to allow for
the optional dumping of the CFA fixed FP/RA offsets. Update the x86-
specific SFrame and SCFI test case verification patterns to require a
CFA fixed RA offset of -8.
libsframe/
* sframe-dump.c: Dump CFA fixed FP and RA offsets.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe-common-1.d: Test for optional fixed
FP and RA offsets.
* gas/cfi-sframe/cfi-sframe-common-2.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-3.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-4.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-5.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-6.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-7.d: Likewise.
* gas/cfi-sframe/cfi-sframe-common-8.d: Likewise.
* gas/cfi-sframe/cfi-sframe-x86_64-1.d: Test for fixed
RA offset.
* gas/cfi-sframe/common-empty-1.d: Test for optional fixed
FP and RA offsets.
* gas/cfi-sframe/common-empty-2.d: Likewise.
* gas/cfi-sframe/common-empty-3.d: Likewise.
* gas/scfi/x86_64/scfi-cfi-sections-1.d: Test for SFrame fixed
RA offset.
* gas/scfi/x86_64/scfi-dyn-stack-1.d: Likewise.
ld/testsuite/
* ld-x86-64/sframe-plt-1.d: Test for SFrame fixed RA offset.
* ld-x86-64/sframe-simple-1.d: Likewise.
Explicitly mention "SFrame" in the descriptions for the architecture-
specific SFrame configuration macros, variables, and functions.
Use the term "frame pointer" (FP) instead of "base pointer". This aligns
with the terminology used in the SFrame specification. Additionally it
helps not to confuse "base-pointer register" with the term "BASE_REG"
used in the specification to denote either the SP or FP register.
Specify what the SFRAME_CFA_*_REG register numbers are used for:
- SP (stack pointer): CFA tracking
- FP (frame pointer): CFA and FP tracking
- RA (return address): RA tracking
Align the descriptions for definitions in the source files to the
declarations in the header files.
Tom Tromey [Tue, 2 Jul 2024 14:32:36 +0000 (08:32 -0600)]
Accept unnamed array in gdb.ada/limited-length.exp
Some compiler changes I'm working on cause a regression in
gdb.ada/limited-length.exp -- with the changes, the array type is
nameless and so is not mentioned in the max-value-size error message.
Because the array type is nameless in the source code, this seems like
an improvement to me, and so this patch changes the test to accept
either form.
Alan Modra [Sun, 30 Jun 2024 23:32:10 +0000 (09:02 +0930)]
PR31941 objcopy --globalize-symbol
I think FILE symbols are special, and I can't see why anyone would
want them to be made global. The fact that no one has reported this
bug since commit 7b4a0685e80a in 2005 supports that claim.
PR 31941
* objcopy.c (filter_symbols): Don't allow BSF_FILE symbols to
be made global.
Avoid folding new and delete pairs by adding a function call between new
and delete.
* testsuite/ld-elf/dl5.cc: Include "dl5.h".
(A): Removed.
Call foo between new and delete.
* testsuite/ld-elf/dl5.h: New file.
* testsuite/ld-elf/new.cc: Include "dl5.h".
(foo): New function.
Marcus Nilsson [Sat, 29 Jun 2024 21:01:56 +0000 (23:01 +0200)]
objcopy: Allow making symbol global and weak on same invocation
Previously objcopy had to be run twice in order to make a local symbol
weak, first once to globalize it, and once again to mark it as weak.
* objcopy.c (filter_symbols): Weaken symbols after making
local/global changes.
* testsuite/binutils-all/symbols-5.d,
* testsuite/binutils-all/symbols-5.s: New test.
The new -march=armv9.5-a flag enables access to the
mandatory cpa, lut and faminmax extensions.
Existing test cases for features are extended to verify they
work without additional flags.
Lulu Cai [Wed, 19 Jun 2024 03:00:36 +0000 (11:00 +0800)]
LoongArch: Do not check R_LARCH_SOP_PUSH_ABSOLUTE to avoid broken links to old object files
R_LARCH_SOP_PUSH_ABSOLUTE with -fPIC was heavily used in the era of gas-2.38.
We do not check this relocation to prevent broken links with old object
files.
Jan Beulich [Fri, 28 Jun 2024 06:22:39 +0000 (08:22 +0200)]
x86/APX: optimize {nf}-form IMUL-by-power-of-2 to SHL
..., for differing only in the resulting EFLAGS, which are left
untouched anyway. That's a shorter encoding, available as long as
certain constraints on operands are met; see code comments. (SHL-by-1
forms may then be subject to further optimization that was introduced
earlier.)
Note that kind of as a side effect this also converts multiplication by
1 to shift by 0, which is a plain move or even no-op anyway. That could
be further shrunk (as could be presence of shifts/rotates by 0 in the
original code as well as a fair set of other {nf}-form insns), yet the
expectation (for now) is that people won't write such code in the first
place.
Jan Beulich [Fri, 28 Jun 2024 06:21:48 +0000 (08:21 +0200)]
x86-64: restrict by-imm31 optimization
Avoid changing the encoding when there's no size gain: If there's a REX
or REX2 prefix anyway and the base opcode wouldn't be changed, dropping
just REX.W / REX2.W has no (size) effect. (Same for the AND-by-imm7 case
in the same big conditional.)
While there also pull out the .qword check: For the 2-register-operands
case whether that's done on the 1st or 2nd operand doesn't matter. Due
to reduction in necessary parentheses this improves readability a tiny
bit.
Jan Beulich [Fri, 28 Jun 2024 06:19:59 +0000 (08:19 +0200)]
x86/APX: optimize certain {nf}-form insns to LEA
..., as that leaves EFLAGS untouched anyway. That's a shorter encoding,
available as long as certain constraints on operand size and registers
are met; see code comments.
Note that this requires deferring to derive encoding_evex from {nf}
presence, as in optimize_encoding() we want to avoid touching the insns
when {evex} was also used.
Note further that this requires want_disp32() to now also consider the
opcode: We don't want to replace i.tm.mnem_off, for diagnostics to still
report the original mnemonic (or else things can get confusing). While
there, correct adjacent mis-indentation.
Unlike for the legacy forms, where there's a difference in the resulting
EFLAGS.CF, for the NF variants the immediate can be got rid of in that
case by switching to a 1-bit rotate in the opposite direction.
Jan Beulich [Fri, 28 Jun 2024 06:18:40 +0000 (08:18 +0200)]
x86/APX: optimize {nf} forms of ADD/SUB with specific immediates
Unlike for the legacy forms, where there's a difference in the resulting
EFLAGS, for the NF variants we can safely replace ones using 0x80 by the
respectively other insn while negating the immediate, saving 3 immediate
bytes (just 1 though for 16-bit operand size). Similarly we can replace
ones using 1 / -1 by INC/DEC (eliminating the immediate).
Jan Beulich [Fri, 28 Jun 2024 06:17:41 +0000 (08:17 +0200)]
gas: .irp/.irpc are macro-like
... for the purposes of get_line_sb() and _find_end_of_line(): They
support \@ just like macros do, and hence the special casing there also
needs applying.
Nelson Chu [Thu, 27 Jun 2024 04:27:33 +0000 (12:27 +0800)]
RISC-V: Shrink the riscv_implicit_subsets table.
Allow to add implicit extensions by using the syntax of `.option arch, +-', so
that the table is shrinked and more readable.
bfd/
* elfxx-riscv.c (check_implicit_always): Removed the unused IMPLICIT
parameter.
(check_implicit_for_i): Likewise.
(riscv_implicit_subsets): Shrink the table by allowing the syntax of
`.option arch, +-' for implicit extensions.
(riscv_update_subset1): New function, called from riscv_update_subset
or riscv_parse_add_implicit_subsets. It basically does the same thing
as riscv_update_subset function before.
(riscv_parse_add_implicit_subsets): Updated.
(riscv_update_subset): Updated.
Nelson Chu [Tue, 11 Jun 2024 08:35:58 +0000 (16:35 +0800)]
RISC-V: PR27180, Update relocation for riscv_zero_pcrel_hi_reloc.
When pcrel access overflow, the riscv_zero_pcrel_hi_reloc may convert pcrel
relocation to absolutly access if possible at the relocate stage. We used to
encode the target address into r_sym of R_RISCV_HI20 if it is converted from
R_RISCV_PCREL_HI20. But that may cause segfault if --emit-relocs is set,
since r_sym becomes an address rather than a symbol index. Although the
relocate result is correct, it does not meet the definition, so may cause
unexpected behaviors.
This patch encodes the target address into r_addend, rather than r_sym, if
riscv_zero_pcrel_hi_reloc converts the relocation. Besdies, since the
corresponding pcrel_lo relocation are also changed to absolutly access,
we should also update them to R_RISCV_LO12_I/S.
bfd/
PR 27180
* elfnn-riscv.c (riscv_pcrel_hi_reloc): New boolean `absolute', to
inform corresponding pcrel_lo that the pcrel_hi relocation was already
converted to hi20 relocation.
(riscv_record_pcrel_hi_reloc): Likewise, record `absolute'.
(riscv_pcrel_lo_reloc): Removed `const' for Elf_Internal_Rela *reloc,
since we may need to convert it from pcrel_lo to lo relocation.
(riscv_record_pcrel_lo_reloc): Likewise. Convert pcrel_lo to lo
relocation if corresponding pcrel_hi was converted to hi relocation.
(riscv_zero_pcrel_hi_reloc): Encode target absolute address into
r_addend rather than r_sym. Clear the `addr' to avoid duplicate
relocate in the perform_relocation.
(riscv_elf_relocate_section): Updated.
ld/
PR 27180
* testsuite/ld-riscv-elf/pcrel-lo-addend-3a-emit-relocs.d: New testcase.
Segfault without applying this patch.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
H.J. Lu [Tue, 25 Jun 2024 07:45:22 +0000 (00:45 -0700)]
Set BFD_DECOMPRESS when reading build-id debuglink
We should set BFD_DECOMPRESS to decompress sections unless dumping the
section contents when reading build-id debuglink.
PR binutils/31925
* objdump.c (open_debug_file): Set BFD_DECOMPRESS to decompress
sections unless dumping the section contents.
* testsuite/binutils-all/objdump.exp (test_build_id_debuglink):
Add a compress option.
Run test_build_id_debuglink with none and zlib.
Andrew Burgess [Wed, 19 Jun 2024 10:13:14 +0000 (11:13 +0100)]
gdb: add overloads of gdb_tilde_expand
Like the previous commit, add two overloads of gdb_tilde_expand, one
takes std::string and other takes gdb::unique_xmalloc_ptr<char>. Make
use of these overloads throughout GDB and gdbserver.
There should be no user visible changes after this commit.
Andrew Burgess [Wed, 19 Jun 2024 10:12:28 +0000 (11:12 +0100)]
gdb: add overloads of gdb_abspath
Add two overloads of gdb_abspath, one which takes std::string and one
which takes gdb::unique_xmalloc_ptr<char>, then make use of these
overloads throughout GDB and gdbserver.
There should be no user visible changes after this commit.
Alan Modra [Thu, 27 Jun 2024 03:01:46 +0000 (12:31 +0930)]
Re: Rewrite SHT_GROUP handling
There is no need to loop over the headers twice. Remove that leftover
from the previous scheme. Also, the previous scheme silently ignored
a section being mentioned in two or more SHT_GROUP sections.
* elf.c (process_sht_group_entries): Prevent sections from
belonging to two groups.
(_bfd_elf_setup_sections): Process groups in a single loop
over headers.
Alan Modra [Wed, 26 Jun 2024 08:17:21 +0000 (17:47 +0930)]
Rewrite SHT_GROUP handling
This patch delays setting up elf_next_in_group, elf_sec_group and
elf_group_name when reading ELF object files until after all ELF
sections have been processed by bfd_section_from_shdr. This is simpler
and more robust than the current scheme of driving the whole process
on detecting a section with SHF_GROUP set.
* elf-bfd.h (struct elf_obj_tdata): Delete group_sect_ptr,
num_group and group_search_offset.
* elf.c (Elf_Internal_Group): Delete.
(setup_group): Delete function.
(IS_VALID_GROUP_SECTION_HEADER): Delete macro.
(is_valid_group_section_header),
(process_sht_group_entries): New functions.
(_bfd_elf_setup_sections): Handle group sections here..
(_bfd_elf_make_section_from_shdr): ..rather than here.
(bfd_section_from_shdr): Don't check SHT_GROUP validity here.