This patch brings back Jan's idea [1] of BQL-free IO access
This will let us make access to ACPI PM/HPET timers cheaper,
and prevent BQL contention in case of workload that heavily
uses the timers with a lot of vCPUs.
1) 196ea13104f (memory: Add global-locking property to memory regions)
... de7ea885c539 (kvm: Switch to unlocked MMIO)
Igor Mammedov [Thu, 21 Aug 2025 15:56:03 +0000 (17:56 +0200)]
add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide
The helpers form load-acquire/store-release pair and ensure
that appropriate barriers are in place in case checks happen
outside of BQL.
Use them to replace open-coded checkers/setters across the code,
to make sure that barriers are not missed. Helpers also make code a
bit more readable.
Paolo Bonzini [Fri, 29 Aug 2025 08:46:48 +0000 (10:46 +0200)]
user-exec: ensure interrupt_request is not used
cpu_interrupt() is not called anymore except by ARM but even there
it is dead code; disentangling the various cpregs accessors from user-mode
emulation is a work in progress.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Mark Cave-Ayland [Thu, 28 Aug 2025 11:10:02 +0000 (12:10 +0100)]
hw/i386/isapc.c: replace rom_memory with system_memory
Now that we can guarantee the isapc machine will never have a PCI bus, any
instances of rom_memory can be replaced by system_memory and rom_memory
removed completely.
Mark Cave-Ayland [Thu, 28 Aug 2025 11:10:01 +0000 (12:10 +0100)]
hw/i386/pc_piix.c: replace rom_memory with pci_memory
Now that we can guarantee the i440fx-pc machine will always have a PCI bus, any
instances of rom_memory can be replaced by pci_memory and rom_memory removed
completely.
Mark Cave-Ayland [Thu, 28 Aug 2025 11:09:59 +0000 (12:09 +0100)]
hw/i386: move isapc machine to separate isapc.c file
Now that pc_init_isa() is independent of any PCI initialisation, move it into a
separate isapc.c file including the ISA IDE variables which are now no longer
needed for the pc-i440fx machine. This enables us to finally fix the dependency
of ISAPC on I440FX in hw/i386/Kconfig.
Note that as part of the move to a separate file we can see that the licence text
is a verbatim copy of the MIT licence. The text originates from commit 1df912cf9e
("VL license of the day is MIT/BSD") so we can be sure that this was the original
intent. As a consequence we can update the file header to use a SPDX tag as per
the current project contribution guidelines.
Mark Cave-Ayland [Thu, 28 Aug 2025 11:09:58 +0000 (12:09 +0100)]
hw/i386/pc_piix.c: assume pcmc->pci_enabled is always true in pc_init1()
PCI is always enabled on the pc-i440fx machine so hardcode the relevant logic
in pc_init1(). Add an assert() to ensure that this is always the case at
runtime as already done in pc_q35_init().
Mark Cave-Ayland [Thu, 28 Aug 2025 11:09:57 +0000 (12:09 +0100)]
hw/i386/pc_piix.c: always initialise ISA IDE drives in pc_init_isa()
By definition an isapc machine must always use ISA IDE drives so ensure that they
are always enabled. At the same time also remove the surrounding CONFIG_IDE_ISA
define since it will be enabled via the ISAPC Kconfig.
Mark Cave-Ayland [Thu, 28 Aug 2025 11:09:56 +0000 (12:09 +0100)]
hw/i386/pc_piix.c: remove pc_system_flash_cleanup_unused() from pc_init_isa()
This function contains 'assert(PC_MACHINE_GET_CLASS(pcms)->pci_enabled)' and so we can
safely assume that it should never be used for the isapc machine.
Mark Cave-Ayland [Thu, 28 Aug 2025 11:09:45 +0000 (12:09 +0100)]
hw/i386/pc_piix.c: restrict isapc machine to 3.5G memory
Since the isapc machine is now limited to using 32-bit CPUs, add a hard restriction
so that the machine cannot be started with more than 3.5G memory. This matches the
default value for max_ram_below_4g if not specified and provides consistent
behaviour betweem TCG and KVM accelerators.
Mark Cave-Ayland [Thu, 28 Aug 2025 11:09:44 +0000 (12:09 +0100)]
hw/i386/pc_piix.c: restrict isapc machine to 32-bit CPUs
The isapc machine represents a legacy ISA PC with a 486 CPU. Whilst it is
possible to specify any CPU via -cpu on the command line, it makes no
sense to allow modern 64-bit CPUs to be used.
Restrict the isapc machine to the available 32-bit CPUs, taking care to
handle the case where if a user inadvertently uses either -cpu max or
-cpu host then the "best" 32-bit CPU is used (in this case the pentium3).
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# gpg: Signature made Thu 28 Aug 2025 10:19:55 PM AEST
# gpg: using RSA key CA473C44D6A09C189A193FCD452B96852B268216
# gpg: Good signature from "Song Gao <gaosong@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CA47 3C44 D6A0 9C18 9A19 3FCD 452B 9685 2B26 8216
* tag 'pull-loongarch-20250828' of https://github.com/gaosong715/qemu:
hw/intc/loongarch_pch_pic: Fix ubsan warning and endianness issue
target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Thomas Huth [Fri, 1 Aug 2025 06:01:52 +0000 (08:01 +0200)]
hw/intc/loongarch_pch_pic: Fix ubsan warning and endianness issue
When booting the Linux kernel from tests/functional/test_loongarch64_virt.py
with a QEMU that has been compiled with --enable-ubsan, there is
a warning like this:
.../hw/intc/loongarch_pch_pic.c:171:46: runtime error: index 512 out of
bounds for type 'uint8_t[64]' (aka 'unsigned char[64]')
SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior
.../hw/intc/loongarch_pch_pic.c:171:46
.../hw/intc/loongarch_pch_pic.c:175:45: runtime error: index 256 out of
bounds for type 'uint8_t[64]' (aka 'unsigned char[64]')
SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior
.../hw/intc/loongarch_pch_pic.c:175:45
It happens because "addr" is added first before substracting the base
(PCH_PIC_HTMSI_VEC or PCH_PIC_ROUTE_ENTRY).
Additionally, this code looks like it is not endianness safe, since
it uses a 64-bit pointer to write values into an array of 8-bit values.
Thus rework the code to use the stq_le_p / ldq_le_p helpers here
and make sure that we do not create pointers with undefined behavior
by accident.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
WANG Rui [Fri, 25 Jul 2025 03:12:32 +0000 (11:12 +0800)]
target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro
This patch replaces uses of the generic TRANS macro with TRANS64 for
instructions that are only valid when 64-bit support is available.
This improves correctness and avoids potential assertion failures or
undefined behavior during translation on 32-bit-only configurations.
Signed-off-by: WANG Rui <wangrui@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Merge tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu into staging
linux-user: do not print IP socket options by default
linux-user: Add strace for rseq
linux-user: Move get_elf_cpu_model to target/elfload.c
linux-user: Move get_elf_hwcap to target/elfload.c
linux-user: Move get_elf_hwcap2 to target/elfload.c
linux-user: Move get_elf_platform to target/elfload.c
linux-user: Move get_elf_base_platform to target/elfload.c
linux-user: Create init_main_thread in target/cpu_loop.c
semihosting: Retrieve stack top from image_info
semihosting: Initialize heap once per process
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# gpg: Signature made Thu 28 Aug 2025 07:42:07 AM AEST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
Łukasz Stelmach [Wed, 27 Aug 2025 09:54:12 +0000 (11:54 +0200)]
linux-user: do not print IP socket options by default
IP protocols should not be printed unless the socket is an IPv4 or
IPv6 one. Current arrangement erroneously prints IPPROTO_IP for Unix
domain sockets.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250827095412.2348821-1-l.stelmach@samsung.com>
Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250826060341.1118670-1-joel@jms.id.au>
Merge init_thread and target_cpu_copy_regs.
There's no point going through a target_pt_regs intermediate.
Note that init_thread had set ps in target_pt_regs, but
target_cpu_copy_regs did not copy to env. This turns out to be
ok because alpha_cpu_initfn initializes flags properly.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Merge init_thread and target_cpu_copy_regs.
There's no point going through a target_pt_regs intermediate.
Note that init_thread had set cp0_status in target_pt_regs, but
target_cpu_copy_regs did not copy to env. This turns out to be
ok because mips_cpu_reset_hold initializes CP0_Status properly.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Merge init_thread and target_cpu_copy_regs.
There's no point going through a target_pt_regs intermediate.
Note that init_thread had set crmd in target_pt_regs, but
target_cpu_copy_regs did not copy to env. This turns out to be
ok because loongarch_cpu_reset_hold initializes CRMD properly.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
The setting of r1/r2 was removed in kernel commit acfdd4b1f7590d0
("ARM: 7791/1: a.out: remove partial a.out support"), and the
kernel commit message explains the history.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Merge init_thread and target_cpu_copy_regs.
There's no point going through a target_pt_regs intermediate.
Temporarily introduce HAVE_INIT_MAIN_THREAD during conversion.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
linux-user: Move get_elf_base_platform to mips/elfload.c
Pass in CPUState; define HAVE_ELF_BASE_PLATFORM.
Since this was the only instance of ELF_BASE_PLATFORM, go ahead and
provide the stub definition for other platforms.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
All real definitions of ELF_PLATFORM are now identical, and the stub
definitions are NULL. Use HAVE_ELF_PLATFORM and provide a stub as a
fallback definition of get_elf_platform.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
linux-user: Move get_elf_platform to arm/elfload.c
Move the aarch32 get_elf_platform to arm/elfload.c; pass in CPUState.
Create a simple version in aarch64/elfload.c, which we must do at the
same time because of the ifdef dependency between TARGET_AARCH64
and TARGET_ARM.
Since all versions of get_elf_platform now have the same
signature, remove the ifdef from the declaration in loader.h.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Change the return type to abi_ulong, and pass in the cpu.
As this is the last instance of get_elf_hwcap to be converted,
remove the ifdef around the declaration in loader.h.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
linux-user: Move hwcap functions to {arm,aarch64}/elfload.c
For get_elf_hwcap and get_elf_hwcap2, change the return type to
abi_ulong, and pass in the cpu. We must do these targets at the
same time because of the ifdef dependency between TARGET_AARCH64
and TARGET_ARM.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
linux-user: Move get_elf_hwcap to {i386,x86_64}/elfload.c
Change the return type to abi_ulong, and pass in the cpu.
Duplicate the one line function between i386 and x86_64,
as most other additions to elfload.c won't be common.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
linux-user: Move ppc uabi/asm/elf.h workaround to osdep.h
Move the workaround out of linux-user/elfload.c, so that
we don't have to replicate it in many places. Place it
immediately after the include of <signal.h>, which draws
in the relevant symbols.
Note that ARCH_DLINFO is not defined by the kernel header,
and so there's no need to undef it either.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* rust: declare self as qemu_api for proc-macros
* rust/qemu-api-macros: make derive(Object) friendly when missing parent
* x86/loader: Don't update kernel header for CoCo VMs
* target/i386: Add support for save/load of exception error code
* i386/tcg/svm: fix incorrect canonicalization
* scripts/minikconf.py: small fixes
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# gpg: Signature made Thu 28 Aug 2025 03:16:06 AM AEST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
rust: move dependencies to rust/Cargo.toml
rust: declare self as qemu_api for proc-macros
rust/qemu-api-macros: make derive(Object) friendly when missing parent
subprojects: update proc-macro2 and syn
rust: qemu-api-macros: support matching more than one error
rust: disable borrow_as_ptr warning
kvm/kvm-all: make kvm_park/unpark_vcpu local to kvm-all.c
i386/tcg/svm: fix incorrect canonicalization
x86/loader: Don't update kernel header for CoCo VMs
MAINTAINERS: add a few more files to "Top Level Makefile and configure"
python: mkvenv: fix messages printed by mkvenv
scripts/minikconf.py: s/Error/KconfigParserError
scripts/minikconf.py: fix invalid attribute access
target/i386: Add support for save/load of exception error code
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Merge tag 'pull-request-2025-08-27' of https://gitlab.com/thuth/qemu into staging
* Add v10.2 compat machines
* Move functional tests to target specific subfolders
* Fix some issues in functional tests
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# gpg: Signature made Wed 27 Aug 2025 05:51:25 PM AEST
# gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [unknown]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [unknown]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2025-08-27' of https://gitlab.com/thuth/qemu: (31 commits)
tests/functional: Mark main in QemuBaseTest class as a static method
MAINTAINERS: Adjust wildcards for the migration, multiprocess and replay tests
tests/functional: Move the generic tests to a subfolder
tests/functional: Move xtensa tests into target-specific folder
tests/functional: Move x86_64 tests into target-specific folder
tests/functional: Move sparc/sparc64 tests into target-specific folders
tests/functional: Move sh4/sh4eb tests into target-specific folders
tests/functional: Move s390x tests into target-specific folders
tests/functional: Move rx test into target-specific folders
tests/functional: Move riscv32/riscv64 tests into target-specific folders
tests/functional: Move ppc/ppc64 tests into target-specific folders
tests/functional: Move or1k tests into target-specific folders
tests/functional: Move mips tests into target-specific folders
tests/functional: Move microblaze tests into architecture specific folder
tests/functional: Move m68k tests into architecture specific folder
tests/functional: Move loongarch64 tests into architecture specific folder
tests/functional: Move i386 tests into architecture specific folder
tests/functional: Move hppa tests into architecture specific folder
tests/functional: Move avr tests into architecture specific folder
tests/functional: Move arm tests into architecture specific folder
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Declaring `extern crate self as qemu_api` allows use of `qemu_api`
within the qemu_api crate; this allows the Wrapper derive macro and
future proc macros to be used interchangeably in the qemu_api crate and
other crates. This is not required currently and is only for
future-proofing.
Zero Tang [Mon, 18 Aug 2025 10:16:47 +0000 (12:16 +0200)]
i386/tcg/svm: fix incorrect canonicalization
For all 32-bit systems and 64-bit Windows systems, "long" is 4 bytes long.
Due to using "long" for a linear address, svm_canonicalization would
set all high bits to 1 when (assuming 48-bit linear address) the segment
base is bigger than 0x7FFF.
This fixes booting guests under TCG when the guest IDT and GDT bases are
above 0x7FFF, thereby resulting in incorrect bases. When an interrupt
arrives, it would trigger a #PF exception; the #PF would trigger again,
resulting in a #DF exception; the #PF would trigger for the third time,
resulting in triple-fault, and eventually causes a shutdown VM-Exit to
the hypervisor right after guest boot.
Cc: qemu-stable@nongnu.org Signed-off-by: Zero Tang <zero.tangptr@gmail.com>
Xiaoyao Li [Thu, 14 Aug 2025 09:21:11 +0000 (17:21 +0800)]
x86/loader: Don't update kernel header for CoCo VMs
Update the header makes it different from the original kernel that user
provides via "-kernel", which leads to a different hash and breaks the
attestation, e.g., for TDX.
We already skip it for SEV VMs. Instead of adding another check of
is_tdx_vm() to cover the TDX case, check machine->cgs to cover all the
confidential computing case for x86.
Gustavo Romero [Tue, 19 Aug 2025 14:39:15 +0000 (14:39 +0000)]
tests/functional: Mark main in QemuBaseTest class as a static method
The main() method in the QemuBaseTest class has no parameters but is
defined as a regular method. Currently, this does not cause any issues
because in the functional tests main() is always called directly from
QemuBaseTest (never from instances), but the way this method is defined
makes its signature wrong, implying a 'self'. Hence, it's best practice
to define such a method as a static method, so decorate it with
@staticmethod.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-ID: <20250819143916.4138035-4-gustavo.romero@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 19 Aug 2025 11:24:01 +0000 (13:24 +0200)]
tests/functional: Move the generic tests to a subfolder
This also removes the line for using tests from the main folder
since we do not have any tests left here. And while we're at it,
also mark the vnc test as generic now since it is not specific to x86.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250819112403.432587-25-thuth@redhat.com>
Thomas Huth [Tue, 19 Aug 2025 11:23:54 +0000 (13:23 +0200)]
tests/functional: Move riscv32/riscv64 tests into target-specific folders
The opensbi test is used for both, riscv32 and riscv64. Copy the main
test to the riscv64 folder and add a simple wrapper to the riscv32
folder to be able to run it for that target, too.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250819112403.432587-18-thuth@redhat.com>
projects / thirdparty / qemu.git / log
