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git.ipfire.org Git - thirdparty/valgrind.git/log
Julian Seward [Fri, 25 Feb 2005 18:36:07 +0000 (18:36 +0000)]
Add toUInt.
git-svn-id: svn://svn.valgrind.org/vex/trunk@973
Julian Seward [Fri, 25 Feb 2005 18:31:27 +0000 (18:31 +0000)]
Icc typechecker fixes.
git-svn-id: svn://svn.valgrind.org/vex/trunk@972
Julian Seward [Fri, 25 Feb 2005 17:40:26 +0000 (17:40 +0000)]
Another round of placating icc's typechecker.
git-svn-id: svn://svn.valgrind.org/vex/trunk@971
Cerion Armour-Brown [Fri, 25 Feb 2005 16:43:08 +0000 (16:43 +0000)]
Simplified front-end IR encoding for some subtracts
git-svn-id: svn://svn.valgrind.org/vex/trunk@970
Cerion Armour-Brown [Fri, 25 Feb 2005 16:39:58 +0000 (16:39 +0000)]
Alu32::SUB was broken in the backend.
Moved Alu32::SUB to it's own instruction: Sub32
---
PPC32 only implements subf (= sub from), which takes form
subf(ic) regD, regA, regB|immB => rD = rB|immB - rA
Hence Iop_Sub32 is given an RI as the left arg...
---
git-svn-id: svn://svn.valgrind.org/vex/trunk@969
Julian Seward [Fri, 25 Feb 2005 14:22:12 +0000 (14:22 +0000)]
Even more amd64 floating point bits and pieces.
git-svn-id: svn://svn.valgrind.org/vex/trunk@968
Cerion Armour-Brown [Fri, 25 Feb 2005 13:40:31 +0000 (13:40 +0000)]
Fix flags define & printout last run translation after all...
git-svn-id: svn://svn.valgrind.org/vex/trunk@967
Cerion Armour-Brown [Fri, 25 Feb 2005 13:39:10 +0000 (13:39 +0000)]
Fixes to getReg_field, putReg_field
git-svn-id: svn://svn.valgrind.org/vex/trunk@966
Julian Seward [Fri, 25 Feb 2005 13:03:03 +0000 (13:03 +0000)]
Fill in a bunch more amd64 floating point cases. Some non-trivial
FP programs are beginning to work now.
git-svn-id: svn://svn.valgrind.org/vex/trunk@965
Cerion Armour-Brown [Fri, 25 Feb 2005 12:33:12 +0000 (12:33 +0000)]
Re-arranged switchback::run_simulator a little, so can print translation of current bb (so if test breaks @ N, we can switchback @ N and N gets printed)
git-svn-id: svn://svn.valgrind.org/vex/trunk@964
Cerion Armour-Brown [Fri, 25 Feb 2005 12:08:02 +0000 (12:08 +0000)]
Correction to iselCC::IexTmp
git-svn-id: svn://svn.valgrind.org/vex/trunk@963
Cerion Armour-Brown [Fri, 25 Feb 2005 11:16:58 +0000 (11:16 +0000)]
Added a couple of unhandled isel instrs:
IselStmt::Ist_Tmp::Ity_I1
iselCondCode::Iex_Tmp
git-svn-id: svn://svn.valgrind.org/vex/trunk@962
Cerion Armour-Brown [Fri, 25 Feb 2005 10:23:46 +0000 (10:23 +0000)]
Fix to guest-ppc32 subfic
git-svn-id: svn://svn.valgrind.org/vex/trunk@961
Julian Seward [Fri, 25 Feb 2005 02:48:47 +0000 (02:48 +0000)]
Fill in a huge number of amd64 floating point cases, and start to
reinstate the old x87 instruction decoder.
git-svn-id: svn://svn.valgrind.org/vex/trunk@960
Cerion Armour-Brown [Thu, 24 Feb 2005 20:01:02 +0000 (20:01 +0000)]
Fixed a backend shift bug: src/dst were swapped in emitted code.
Also fixed an assembly printf for Set32.
git-svn-id: svn://svn.valgrind.org/vex/trunk@959
Cerion Armour-Brown [Thu, 24 Feb 2005 16:59:17 +0000 (16:59 +0000)]
Another go at fixing the rotate mask
git-svn-id: svn://svn.valgrind.org/vex/trunk@958
Cerion Armour-Brown [Thu, 24 Feb 2005 14:57:12 +0000 (14:57 +0000)]
Fixed a rotate bug: IBM bit labelling got me again
git-svn-id: svn://svn.valgrind.org/vex/trunk@957
Cerion Armour-Brown [Thu, 24 Feb 2005 11:19:51 +0000 (11:19 +0000)]
Some simplifying of guest register access in toIR.c
getReg_masked no longer calls getReg_bit for XER
git-svn-id: svn://svn.valgrind.org/vex/trunk@956
Cerion Armour-Brown [Wed, 23 Feb 2005 23:13:29 +0000 (23:13 +0000)]
Added front-end code for conditional register logic instrs
Cleaned up the register access interface a little.
git-svn-id: svn://svn.valgrind.org/vex/trunk@955
Cerion Armour-Brown [Wed, 23 Feb 2005 18:21:31 +0000 (18:21 +0000)]
Just some assembly printout changes
git-svn-id: svn://svn.valgrind.org/vex/trunk@954
Julian Seward [Wed, 23 Feb 2005 13:31:25 +0000 (13:31 +0000)]
Cleaning up the x86 back end: get rid of instruction variants which
the instruction selector will never generate. I guess this
demonstrates that the majority of operations are sufficiently rare
that it is not worth going to much effort to generate good code for
them.
git-svn-id: svn://svn.valgrind.org/vex/trunk@953
Julian Seward [Wed, 23 Feb 2005 13:28:27 +0000 (13:28 +0000)]
Fix wrong comments (comment-only change)
git-svn-id: svn://svn.valgrind.org/vex/trunk@952
Julian Seward [Wed, 23 Feb 2005 11:39:21 +0000 (11:39 +0000)]
Many amd64 FP cases, including conversion to/from int (tedious stuff).
git-svn-id: svn://svn.valgrind.org/vex/trunk@951
Cerion Armour-Brown [Wed, 23 Feb 2005 11:20:53 +0000 (11:20 +0000)]
Fix to run_translation: need to save LR on _caller's_ stack, and leave a hole for a callee to do the same on our stack.
git-svn-id: svn://svn.valgrind.org/vex/trunk@950
Cerion Armour-Brown [Tue, 22 Feb 2005 20:36:49 +0000 (20:36 +0000)]
Added new instruction RdWrLR to read/write link register.
The LR is saved in ISelEnv at the start of every bb
The LR is restored before any Goto.
This is needed because LR is a caller-saved register on PPC32, so helper functions may kill it.
(Could save/restore around each helper call, but not efficient)
git-svn-id: svn://svn.valgrind.org/vex/trunk@949
Cerion Armour-Brown [Tue, 22 Feb 2005 18:39:18 +0000 (18:39 +0000)]
Coupl'a front-end load / save bugs
git-svn-id: svn://svn.valgrind.org/vex/trunk@948
Julian Seward [Tue, 22 Feb 2005 15:12:00 +0000 (15:12 +0000)]
Make the switchbacker work on ppc32.
git-svn-id: svn://svn.valgrind.org/vex/trunk@947
Cerion Armour-Brown [Tue, 22 Feb 2005 11:16:54 +0000 (11:16 +0000)]
Better assembly printouts, and added iselCondCode 1:Bit Const
git-svn-id: svn://svn.valgrind.org/vex/trunk@946
Cerion Armour-Brown [Tue, 22 Feb 2005 11:07:35 +0000 (11:07 +0000)]
Gotcha!
git-svn-id: svn://svn.valgrind.org/vex/trunk@945
Cerion Armour-Brown [Mon, 21 Feb 2005 16:44:03 +0000 (16:44 +0000)]
just turned off some debug printfs
git-svn-id: svn://svn.valgrind.org/vex/trunk@944
Cerion Armour-Brown [Mon, 21 Feb 2005 16:30:45 +0000 (16:30 +0000)]
coupl'a small fixes for ppc32
git-svn-id: svn://svn.valgrind.org/vex/trunk@943
Cerion Armour-Brown [Mon, 21 Feb 2005 15:09:19 +0000 (15:09 +0000)]
Fixes to host_ppc32:
- correct assembly printouts for goto, load
- emit_instrn
- cmp: 7-crfD (f'ing ibm)
- added mkLoadImm(), mkMoveReg()
- call: 'target >> 2'
- call,goto,cmov: fixed conditional jumps
- goto: return correctly
- set32: fix src,dst regs for flag rotate
- isel:
mk_iMOVds_RRI(): ORi, not ANDi
git-svn-id: svn://svn.valgrind.org/vex/trunk@942
Cerion Armour-Brown [Mon, 21 Feb 2005 14:07:48 +0000 (14:07 +0000)]
Corrected some mistakes in guest_ppc32
- getReg(): bad mask
- incorrect instr decode for addi, addic, addic.
- compares: set bad compare flags: 8,4
- andi: 'And', not 'Add' !
- branches: deal properly with negative offsets/addresses
git-svn-id: svn://svn.valgrind.org/vex/trunk@941
Cerion Armour-Brown [Mon, 21 Feb 2005 13:58:38 +0000 (13:58 +0000)]
finished off switchback code for ppc32
git-svn-id: svn://svn.valgrind.org/vex/trunk@940
Julian Seward [Mon, 21 Feb 2005 13:58:26 +0000 (13:58 +0000)]
More amd64 SSE/FP bits and pieces.
git-svn-id: svn://svn.valgrind.org/vex/trunk@939
Julian Seward [Mon, 21 Feb 2005 12:36:54 +0000 (12:36 +0000)]
amd64 guest/host floating point square root (easy) and comparisons
(difficult)
git-svn-id: svn://svn.valgrind.org/vex/trunk@938
Julian Seward [Mon, 21 Feb 2005 08:28:46 +0000 (08:28 +0000)]
Make a start on floating point for AMD64 (really part of rev 936 but I
missed it for some reason).
git-svn-id: svn://svn.valgrind.org/vex/trunk@937
Julian Seward [Mon, 21 Feb 2005 08:25:55 +0000 (08:25 +0000)]
Make a start on floating point for AMD64.
git-svn-id: svn://svn.valgrind.org/vex/trunk@936
Julian Seward [Mon, 21 Feb 2005 08:23:39 +0000 (08:23 +0000)]
Add %xmm0 .. %xmm15 to the amd64 guest state.
git-svn-id: svn://svn.valgrind.org/vex/trunk@935
Julian Seward [Mon, 21 Feb 2005 08:22:44 +0000 (08:22 +0000)]
Add to-do note (comment-only change)
git-svn-id: svn://svn.valgrind.org/vex/trunk@934
Julian Seward [Mon, 21 Feb 2005 08:20:22 +0000 (08:20 +0000)]
Folding rule for Shr64.
git-svn-id: svn://svn.valgrind.org/vex/trunk@933
Julian Seward [Sat, 19 Feb 2005 22:47:41 +0000 (22:47 +0000)]
Fix various front-end anomalies found by the amd64 test program.
git-svn-id: svn://svn.valgrind.org/vex/trunk@932
Julian Seward [Sat, 19 Feb 2005 22:46:11 +0000 (22:46 +0000)]
Test a few more bits and pieces.
git-svn-id: svn://svn.valgrind.org/vex/trunk@931
Julian Seward [Sat, 19 Feb 2005 18:12:45 +0000 (18:12 +0000)]
Deal correctly with out-of-range shifts/rotates.
git-svn-id: svn://svn.valgrind.org/vex/trunk@930
Julian Seward [Sat, 19 Feb 2005 15:22:38 +0000 (15:22 +0000)]
Fix many amd64 guest/host cases required to run test/test-amd64.c.
git-svn-id: svn://svn.valgrind.org/vex/trunk@929
Julian Seward [Sat, 19 Feb 2005 15:20:43 +0000 (15:20 +0000)]
This is the same as the test-x86*.[ch] but modified for AMD64.
git-svn-id: svn://svn.valgrind.org/vex/trunk@928
Julian Seward [Thu, 17 Feb 2005 18:07:56 +0000 (18:07 +0000)]
Advance ppc32 to the point where we can hope to start the program.
git-svn-id: svn://svn.valgrind.org/vex/trunk@927
Julian Seward [Thu, 17 Feb 2005 17:42:30 +0000 (17:42 +0000)]
Handle some ppc32 relocation types.
git-svn-id: svn://svn.valgrind.org/vex/trunk@926
Cerion Armour-Brown [Thu, 17 Feb 2005 16:14:16 +0000 (16:14 +0000)]
correction to branch instr for ppc hack
git-svn-id: svn://svn.valgrind.org/vex/trunk@925
Cerion Armour-Brown [Thu, 17 Feb 2005 15:54:44 +0000 (15:54 +0000)]
surely it couldn't be still more ppc hacks...
git-svn-id: svn://svn.valgrind.org/vex/trunk@924
Julian Seward [Thu, 17 Feb 2005 15:16:08 +0000 (15:16 +0000)]
Even more ppc32 hacks
git-svn-id: svn://svn.valgrind.org/vex/trunk@923
Julian Seward [Thu, 17 Feb 2005 15:02:10 +0000 (15:02 +0000)]
More ppc hacks
git-svn-id: svn://svn.valgrind.org/vex/trunk@922
Julian Seward [Thu, 17 Feb 2005 14:35:24 +0000 (14:35 +0000)]
ppc32 hacks
git-svn-id: svn://svn.valgrind.org/vex/trunk@921
Cerion Armour-Brown [Thu, 17 Feb 2005 14:17:12 +0000 (14:17 +0000)]
first ppc32 assembly attempts...
git-svn-id: svn://svn.valgrind.org/vex/trunk@920
Julian Seward [Thu, 17 Feb 2005 09:28:28 +0000 (09:28 +0000)]
Fix enough stuff to get through 'hello world' on amd64.
git-svn-id: svn://svn.valgrind.org/vex/trunk@919
Julian Seward [Thu, 17 Feb 2005 09:26:05 +0000 (09:26 +0000)]
Tidy up the constant folder and add some more rules.
git-svn-id: svn://svn.valgrind.org/vex/trunk@918
Cerion Armour-Brown [Wed, 16 Feb 2005 18:08:25 +0000 (18:08 +0000)]
Cleaned up a little more
Set Pin_Goto to use GPR3 for the return register (holding next address for dispacher)
git-svn-id: svn://svn.valgrind.org/vex/trunk@917
Cerion Armour-Brown [Wed, 16 Feb 2005 18:05:16 +0000 (18:05 +0000)]
Fixed silly bug (and->add ahem.)
Fixed up some DIPs
Took out bypasses for floating point and a bad instr.
git-svn-id: svn://svn.valgrind.org/vex/trunk@916
Cerion Armour-Brown [Wed, 16 Feb 2005 16:08:17 +0000 (16:08 +0000)]
Fixed emit_PPC32Instr::Pin_Goto
All other changes are cleanup only.
git-svn-id: svn://svn.valgrind.org/vex/trunk@915
Cerion Armour-Brown [Wed, 16 Feb 2005 14:43:14 +0000 (14:43 +0000)]
Emitted Div, fixed mul... that's the lot for return0.orig\!
git-svn-id: svn://svn.valgrind.org/vex/trunk@914
Cerion Armour-Brown [Wed, 16 Feb 2005 14:14:49 +0000 (14:14 +0000)]
hdefs
-----
Sorted out Mul
- removed from Alu32
- replaced with proper Pin_MulL
More instr emitting
- cmp32, unary32, mulL, cmov, set32, mfence
isel
----
Added a couple of handy funcs:
- mk_FitRI16, mk_RItoR
Reworked div, mul, mfence
git-svn-id: svn://svn.valgrind.org/vex/trunk@913
Cerion Armour-Brown [Wed, 16 Feb 2005 10:25:26 +0000 (10:25 +0000)]
More instr emitting:
- most 'forms' done
- had a go at Pin_Call, Pin_Goto
Changed CondTest & added invertCondTest()
Fixed Div - only takes reg operands
Fixed iselIntExpr_R_wrk: alu32, div, shft - dtrt with large immediates
git-svn-id: svn://svn.valgrind.org/vex/trunk@912
Cerion Armour-Brown [Wed, 16 Feb 2005 09:09:46 +0000 (09:09 +0000)]
... and forgetful :-)
git-svn-id: svn://svn.valgrind.org/vex/trunk@911
Cerion Armour-Brown [Wed, 16 Feb 2005 09:08:23 +0000 (09:08 +0000)]
I admit it, I'm lazy.
git-svn-id: svn://svn.valgrind.org/vex/trunk@910
Cerion Armour-Brown [Wed, 16 Feb 2005 08:54:33 +0000 (08:54 +0000)]
spacing/comment cleanup only
git-svn-id: svn://svn.valgrind.org/vex/trunk@909
Cerion Armour-Brown [Tue, 15 Feb 2005 15:46:59 +0000 (15:46 +0000)]
Sorted out the condcode stuff - hopefully correctly...
- (for Call, Goto, Mux0X)
Gave compares their own instr struct (was in alu32)
Took out Pin_Test32 - no such op for ppc32
- replaced with Pin_Cmp32
Sorted out shifts
- shift l|r only take reg args, but sar takes imm (groan)
Done isMove_PPC32Instr()
Some work on instr emitting.
- Pin_Alu32, Pin_Sh32,...
git-svn-id: svn://svn.valgrind.org/vex/trunk@908
Julian Seward [Mon, 14 Feb 2005 00:22:30 +0000 (00:22 +0000)]
un-break compilation on x86
git-svn-id: svn://svn.valgrind.org/vex/trunk@907
Julian Seward [Mon, 14 Feb 2005 00:17:49 +0000 (00:17 +0000)]
Print stats at exit, and minor changes
git-svn-id: svn://svn.valgrind.org/vex/trunk@906
Julian Seward [Mon, 14 Feb 2005 00:16:50 +0000 (00:16 +0000)]
Make this test a bit more demanding.
git-svn-id: svn://svn.valgrind.org/vex/trunk@905
Julian Seward [Sun, 13 Feb 2005 14:13:04 +0000 (14:13 +0000)]
Fill in enough cases to run switchback/test_bzip2.c on amd64.
git-svn-id: svn://svn.valgrind.org/vex/trunk@904
Julian Seward [Sun, 13 Feb 2005 13:43:57 +0000 (13:43 +0000)]
sigh; on amd64 do not place common symbols high in the address space
as they cannot be referenced in 32-bit relocations. This is really
a hack needed to run test_bzip2.o on the switchback simulator.
git-svn-id: svn://svn.valgrind.org/vex/trunk@903
Julian Seward [Sun, 13 Feb 2005 12:47:56 +0000 (12:47 +0000)]
Allow the service function to handle free() as well as malloc().
git-svn-id: svn://svn.valgrind.org/vex/trunk@902
Julian Seward [Sun, 13 Feb 2005 12:47:03 +0000 (12:47 +0000)]
A self-contained, hacked version of bzip2 which can run on the
switchback simulator.
git-svn-id: svn://svn.valgrind.org/vex/trunk@901
Julian Seward [Sun, 13 Feb 2005 10:43:41 +0000 (10:43 +0000)]
Fix printf format string.
git-svn-id: svn://svn.valgrind.org/vex/trunk@900
Julian Seward [Sun, 13 Feb 2005 10:43:16 +0000 (10:43 +0000)]
Make it easy to print the symbol table.
git-svn-id: svn://svn.valgrind.org/vex/trunk@899
Julian Seward [Sun, 13 Feb 2005 02:26:41 +0000 (02:26 +0000)]
Fill in many amd64 integer cases.
git-svn-id: svn://svn.valgrind.org/vex/trunk@898
Julian Seward [Sun, 13 Feb 2005 02:24:26 +0000 (02:24 +0000)]
Fold Iop_Sub64.
git-svn-id: svn://svn.valgrind.org/vex/trunk@897
Julian Seward [Sun, 13 Feb 2005 02:22:41 +0000 (02:22 +0000)]
Don't redefine offsetof if it is already defined.
git-svn-id: svn://svn.valgrind.org/vex/trunk@896
Julian Seward [Sun, 13 Feb 2005 00:56:35 +0000 (00:56 +0000)]
minor changes
git-svn-id: svn://svn.valgrind.org/vex/trunk@895
Julian Seward [Sun, 13 Feb 2005 00:54:52 +0000 (00:54 +0000)]
Deal with amd64-specific relocations.
git-svn-id: svn://svn.valgrind.org/vex/trunk@894
Julian Seward [Sat, 12 Feb 2005 19:01:03 +0000 (19:01 +0000)]
Heavily modified emfloat benchmark from bytemark, changed to be
self-contained so that switchback can run it.
git-svn-id: svn://svn.valgrind.org/vex/trunk@893
Julian Seward [Sat, 12 Feb 2005 18:59:31 +0000 (18:59 +0000)]
Resuscitate a linker that knows how to do relocations, so we can
actually run real programs.
git-svn-id: svn://svn.valgrind.org/vex/trunk@892
Julian Seward [Sat, 12 Feb 2005 13:32:12 +0000 (13:32 +0000)]
Add amd64 support.
git-svn-id: svn://svn.valgrind.org/vex/trunk@891
Julian Seward [Sat, 12 Feb 2005 13:03:50 +0000 (13:03 +0000)]
Remove file which shouldn't have been added in the first place.
git-svn-id: svn://svn.valgrind.org/vex/trunk@890
Julian Seward [Sat, 12 Feb 2005 13:02:24 +0000 (13:02 +0000)]
A very simple dynamic translator built on Vex, for the purpose of
debugging Vex using the binary-search-switchback technique
git-svn-id: svn://svn.valgrind.org/vex/trunk@889
Cerion Armour-Brown [Fri, 11 Feb 2005 14:46:42 +0000 (14:46 +0000)]
cleaned up guest-ppc32 assembly printouts
git-svn-id: svn://svn.valgrind.org/vex/trunk@888
Cerion Armour-Brown [Fri, 11 Feb 2005 13:55:41 +0000 (13:55 +0000)]
and now emit instrs big-endianly... :-)
git-svn-id: svn://svn.valgrind.org/vex/trunk@887
Cerion Armour-Brown [Fri, 11 Feb 2005 13:46:13 +0000 (13:46 +0000)]
increased N_HREG_USAGE for host-ppc32
git-svn-id: svn://svn.valgrind.org/vex/trunk@886
Cerion Armour-Brown [Fri, 11 Feb 2005 13:38:15 +0000 (13:38 +0000)]
Added the first instrs (load,store) to emit_PPC32Instr()
Corrected some assembly printouts
git-svn-id: svn://svn.valgrind.org/vex/trunk@885
Cerion Armour-Brown [Thu, 10 Feb 2005 22:35:34 +0000 (22:35 +0000)]
Added Div32 - that's the last for this .orig file!
git-svn-id: svn://svn.valgrind.org/vex/trunk@884
Cerion Armour-Brown [Thu, 10 Feb 2005 19:51:03 +0000 (19:51 +0000)]
Added CLZ
Fixed Unary32
Added genSpill_PPC32, genReload_PPC32
git-svn-id: svn://svn.valgrind.org/vex/trunk@883
Cerion Armour-Brown [Thu, 10 Feb 2005 16:11:35 +0000 (16:11 +0000)]
hdefs: MulL, MFence
isel:
Iop_64HIto32
Iop_64to32
iselInt64Expr:
Iop_MullU32
Iop_MullS32
Ist_MFence
Had a go at implementing long multiplies (last shortcut was wrong)
git-svn-id: svn://svn.valgrind.org/vex/trunk@882
Cerion Armour-Brown [Thu, 10 Feb 2005 15:03:19 +0000 (15:03 +0000)]
hdefs: CMov32, Set32
isel:
Iex_LDle
match for 64HIto32(MullU32(expr,expr))
1Uto32, 1Uto8
Iex_Mux0X
Iop_Cmp*
Ist_Exit
Changed Unary32 to use hreg only (no imm for this on ppc32)
Fixed a reg usage mistake with call/goto
git-svn-id: svn://svn.valgrind.org/vex/trunk@881
Cerion Armour-Brown [Thu, 10 Feb 2005 11:39:43 +0000 (11:39 +0000)]
Dealt with some cases where imm > 0xFFFF
git-svn-id: svn://svn.valgrind.org/vex/trunk@880
Julian Seward [Thu, 10 Feb 2005 02:07:43 +0000 (02:07 +0000)]
Fill in many amd64 front end and back end cases.
git-svn-id: svn://svn.valgrind.org/vex/trunk@879
Cerion Armour-Brown [Wed, 9 Feb 2005 21:01:22 +0000 (21:01 +0000)]
Changed the register setup a little
git-svn-id: svn://svn.valgrind.org/vex/trunk@878
Julian Seward [Wed, 9 Feb 2005 19:13:29 +0000 (19:13 +0000)]
Print useful diagnostics if reg-alloc bombs due to bogus live ranges
in the input code.
git-svn-id: svn://svn.valgrind.org/vex/trunk@877
Cerion Armour-Brown [Wed, 9 Feb 2005 17:29:49 +0000 (17:29 +0000)]
A whole bunch more ppc32 backend code
- just the isel stuff so far, no assembly
git-svn-id: svn://svn.valgrind.org/vex/trunk@876
Cerion Armour-Brown [Wed, 9 Feb 2005 13:03:06 +0000 (13:03 +0000)]
keeping arm .orig files
git-svn-id: svn://svn.valgrind.org/vex/trunk@875
Julian Seward [Tue, 8 Feb 2005 20:10:04 +0000 (20:10 +0000)]
More amd64 back end bits and pieces.
git-svn-id: svn://svn.valgrind.org/vex/trunk@874