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4 years agocmd: add a panic command
Heiko Stuebner [Mon, 29 Jun 2020 23:05:45 +0000 (01:05 +0200)] 
cmd: add a panic command

Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.

So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agodebug_uart: Add CR before and after announce string
Stefan Roese [Fri, 15 May 2020 05:09:03 +0000 (07:09 +0200)] 
debug_uart: Add CR before and after announce string

Add linefeeds before and after the announce string. This makes the
output easier to read, especially if some text follows the announce
message without a specific additional CR.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agotpm: add #ifndef to fix redeclaration build errors
Johannes Holland [Mon, 11 May 2020 13:22:25 +0000 (15:22 +0200)] 
tpm: add #ifndef to fix redeclaration build errors

tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both
define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to
prevent redeclaration errors.

Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
4 years agotpm: add TPM2_GetRandom command support
Dhananjay Phadke [Thu, 4 Jun 2020 23:43:59 +0000 (16:43 -0700)] 
tpm: add TPM2_GetRandom command support

Add support for TPM2 GetRandom command

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotpm2: tis_spi: add linux compatible fallback string
Bruno Thomsen [Fri, 12 Jun 2020 15:17:33 +0000 (17:17 +0200)] 
tpm2: tis_spi: add linux compatible fallback string

This solves a compatibility issue with Linux device trees
that contain TPMv2.x hardware. So it's easier to import DTS
from upstream kernel when migrating board init from C code
to DTS.

The issue is that fallback binding is different between Linux
and u-Boot.

Linux: "tcg,tpm_tis-spi"
U-Boot: "tis,tpm2-spi"

As there are currently no in-tree users of the U-Boot binding,
it makes sense to use Linux fallback binding.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 8 Jul 2020 14:40:32 +0000 (10:40 -0400)] 
Merge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Add proper Odroid-N2 board support code
- Add support for Odroid-C4 single board computer

4 years agogpio: fix test.py for gpio label lookup
Heiko Schocher [Wed, 8 Jul 2020 08:24:00 +0000 (10:24 +0200)] 
gpio: fix test.py for gpio label lookup

commit 2bd261dd1712 ("gpio: search for gpio label if gpio is not found through bank name")

disabled DM_GPIO_LOOKUP_LABEL which is needed
in sandbox defconfigs, as we have tests for this
functionality.

Signed-off-by: Heiko Schocher <hs@denx.de>
4 years agoARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset
Neil Armstrong [Fri, 19 Jun 2020 09:31:28 +0000 (11:31 +0200)] 
ARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset

The PHY needs a reset in order to be functionnal for U-Boot, add the old
PHY reset bindings for dwmac until we support the new bindings in the PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoboards: amlogic: add Odroid C4 support
Christian Hewitt [Fri, 24 Apr 2020 03:09:12 +0000 (03:09 +0000)] 
boards: amlogic: add Odroid C4 support

Odroid C4 is an Amlogic SM1 device, the board config and board documentation
are adapted from the Odroid-N2 support from the same vendor.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: fix odroid-c4.rst typos and structure]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1
Christian Hewitt [Fri, 24 Apr 2020 02:58:30 +0000 (02:58 +0000)] 
ARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1

This imports the changes and the new Odroid-C4 board from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoboard: amlogic: Add Odroid-N2 board support
Pascal Vizeli [Thu, 18 Jun 2020 14:40:37 +0000 (16:40 +0200)] 
board: amlogic: Add Odroid-N2 board support

Add a proper Odroid-N2 board support to handle the Ethernet MAC
address stored in the in-SoC eFuses.

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoMerge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Wed, 8 Jul 2020 03:05:57 +0000 (23:05 -0400)] 
Merge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- dts sync from kernel for rk3399 boards;
- Add Radxa Rock Pi N8, N10;
- Some feature update for Pinebook Pro;

4 years agoMerge branch '2020-07-07-misc-new-features'
Tom Rini [Wed, 8 Jul 2020 02:58:18 +0000 (22:58 -0400)] 
Merge branch '2020-07-07-misc-new-features'

- Improve s700 SoC support
- Fix building with clang on ARM.
- Juno platform updates
- fs/dm cmd improvements
- Other assorted improvements / fixes

4 years agoarm: juno: Enable SATA controller
Andre Przywara [Thu, 11 Jun 2020 11:03:21 +0000 (12:03 +0100)] 
arm: juno: Enable SATA controller

The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
SATA controller soldered on the board, providing two SATA ports.

Enable the driver and the sata command in the defconfig, to be able to
load images from SATA disks.

Tested by loading kernels and Grub/EFI from an SSD and successfully
booting a Linux system (with and without using UEFI).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: juno: Enable PCI
Andre Przywara [Thu, 11 Jun 2020 11:03:20 +0000 (12:03 +0100)] 
arm: juno: Enable PCI

The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
controller, which we configure already in board specific code to be ECAM
compliant. Hence we can just enable the generic ECAM driver to let
U-Boot use PCIe devices.

Add the respective options to the Juno defconfig to enable the PCI
framework and the generic ECAM driver, and initialise the driver upon
loading U-Boot.

Make some functions in the Juno PCIe init code static on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agosata_sil: Enable DM_PCI operation
Andre Przywara [Thu, 11 Jun 2020 11:03:19 +0000 (12:03 +0100)] 
sata_sil: Enable DM_PCI operation

Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.

Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: juno: Enable DM_ETH
Andre Przywara [Thu, 11 Jun 2020 11:03:18 +0000 (12:03 +0100)] 
arm: juno: Enable DM_ETH

The smc911X driver is now DM enabled, so we can switch the Juno board
over to use DM_ETH for the on-board Fast Ethernet device.
Works out of the box by using the DT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agonet: smc911x: Properly handle EEPROM MAC address
Andre Przywara [Thu, 11 Jun 2020 11:03:17 +0000 (12:03 +0100)] 
net: smc911x: Properly handle EEPROM MAC address

When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.

Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.

This fixes MAC address issues when using the driver in DM_ETH "mode".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agonet: dm: Remove warning about EEPROM provided MAC address
Andre Przywara [Thu, 11 Jun 2020 11:03:16 +0000 (12:03 +0100)] 
net: dm: Remove warning about EEPROM provided MAC address

Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
provided MAC address") this removes the somewhat awkward "warning" on
boards using DM_ETH:
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.

If there is a properly provided MAC address (either from ROM or from DT),
remove the warning to not scare the user unnecessarily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: vexpress64: Fix counter frequency
Andre Przywara [Thu, 11 Jun 2020 11:03:15 +0000 (12:03 +0100)] 
arm: vexpress64: Fix counter frequency

The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
crystal oscillator, so the frequency is not 25165824 MHz, as the current
code suggests.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: use correct argument size of special registers
Heinrich Schuchardt [Wed, 27 May 2020 18:04:24 +0000 (20:04 +0200)] 
arm: use correct argument size of special registers

Compiling with clang on ARMv8 shows errors like:

./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
                asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
                                             ^~
                                             %w0

These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.

Mask off reserved bits when reading the exception level.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoarm: remove outdated comment concerning -ffixed-x18
Heinrich Schuchardt [Wed, 27 May 2020 18:04:23 +0000 (20:04 +0200)] 
arm: remove outdated comment concerning -ffixed-x18

Clang 9 supports -ffixed-x18.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotrace: clang compatible handling of gd register
Heinrich Schuchardt [Wed, 27 May 2020 18:04:22 +0000 (20:04 +0200)] 
trace: clang compatible handling of gd register

On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.

Use function set_gd() for setting the register on ARM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofs: fat_write: fix short name creation.
Heinrich Schuchardt [Tue, 26 May 2020 19:06:50 +0000 (21:06 +0200)] 
fs: fat_write: fix short name creation.

Truncate file names if the buffer size is exceeded to avoid a buffer
overflow.

Use Sphinx style function description.

Add a TODO comment.

Reported-by: CID 303779
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest_sleep.py: make sleep time and margin configurable
Heiko Schocher [Thu, 4 Jun 2020 15:24:00 +0000 (17:24 +0200)] 
test_sleep.py: make sleep time and margin configurable

make the sleep time and the margin configurable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
4 years agogpio: search for gpio label if gpio is not found through bank name
Heiko Schocher [Fri, 22 May 2020 09:08:59 +0000 (11:08 +0200)] 
gpio: search for gpio label if gpio is not found through bank name

dm_gpio_lookup_name() searches for a gpio through
the bank name. But we have also gpio labels, and it
makes sense to search for a gpio also in the labels
we have defined, if no gpio is found through the
bank name definition.

This is useful for example if you have a wp pin on
different gpios on different board versions.

If dm_gpio_lookup_name() searches also for the gpio labels,
you can give the gpio an unique label name and search
for this label, and do not need to differ between
board revisions.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Don't enable by default]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoconfigs: Enable mac and phy configs
Amit Singh Tomar [Sat, 9 May 2020 14:25:15 +0000 (19:55 +0530)] 
configs: Enable mac and phy configs

This patch adds MAC and PHY related configs (needed for proper
ethernet operations) for Action Semi S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoowl: Kconfig: Enable DM eth for OWL platform
Amit Singh Tomar [Sat, 9 May 2020 14:25:14 +0000 (19:55 +0530)] 
owl: Kconfig: Enable DM eth for OWL platform

This patch selects CONFIG_DM_ETH (ethernet driver is base on DM model)
for Action semi owl SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoarm: dts: s700: add node for ethernet controller
Amit Singh Tomar [Sat, 9 May 2020 14:25:13 +0000 (19:55 +0530)] 
arm: dts: s700: add node for ethernet controller

This patch adds node for ethernet controller found on Action Semi OWL
S700 SoC.

Since, there is no upstream Linux binding exist for S700 ethernet
controller, Changes are put in u-boot specific dtsi file.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: designware: s700: Add glue code for S700 mac
Amit Singh Tomar [Sat, 9 May 2020 14:25:12 +0000 (19:55 +0530)] 
net: designware: s700: Add glue code for S700 mac

This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.

Undocumented bit that programs the PHY interface select register
comes from vendor source.

It has been tested on Cubieboard7-lite based on S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings
Amit Singh Tomar [Sat, 9 May 2020 14:25:11 +0000 (19:55 +0530)] 
net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings

RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have
specific Rx/Tx interface timings requirement for proper PHY operations.
These timing values are not documented anywhere and picked from vendor
code.

This commits lets proper packets to be transmitted over the network.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: phy: realtek: Add support for RTL8201F PHY module.
Amit Singh Tomar [Sat, 9 May 2020 14:25:10 +0000 (19:55 +0530)] 
net: phy: realtek: Add support for RTL8201F PHY module.

This patch adds support for Realtek PHY RTL8201F 10/100Mbs
(with variants: RTL8201FN and RTL8201FL) PHYceiver. It is
present on Actions Semi Cubieboard7 board.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoclk: actions: Add Ethernet clocks
Amit Singh Tomar [Sat, 9 May 2020 14:25:09 +0000 (19:55 +0530)] 
clk: actions: Add Ethernet clocks

This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoarm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCs
Amit Singh Tomar [Sat, 9 May 2020 08:15:08 +0000 (13:45 +0530)] 
arm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCs

Now that, we calculate SDRAM size by reading DDR registers,
"CONFIG_SYS_SDRAM_SIZE" is no more needed.

This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
file.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
4 years agoActions: OWL: Calculate SDRAM size
Amit Singh Tomar [Sat, 9 May 2020 08:15:07 +0000 (13:45 +0530)] 
Actions: OWL: Calculate SDRAM size

Calculate the SDRAM size from DDR capacity register registers instead
of using hard-coded value. This is quite useful to get correct size
on differnt boards based on Actions OWL family of SoCs (S700 and S900).

There is no documentation available that talks about DDR registers, and
this is very much taken from vendor source.

This commit lets Linux boot on Cubieboard7-lite(based on S700).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
4 years agoimage: Add support for ZSTD decompression
Robert Marko [Sat, 25 Apr 2020 17:37:21 +0000 (19:37 +0200)] 
image: Add support for ZSTD decompression

This patch adds support for ZSTD decompression of FIT images.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
4 years agocmd: blkls: Add blkls command
Niel Fourie [Mon, 30 Mar 2020 15:22:58 +0000 (17:22 +0200)] 
cmd: blkls: Add blkls command

Add a command to print a list of available block device drivers,
and for each, the list of known block devices.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agocmd: dm: Fixed/Added DM driver listing subcommands
Niel Fourie [Tue, 24 Mar 2020 15:17:05 +0000 (16:17 +0100)] 
cmd: dm: Fixed/Added DM driver listing subcommands

Renamed dm "drivers" subcommand to "compat" (as it listed
compatibility strings) and prevent it from segfaulting when
drivers have no of_match populated.

Added a new "drivers" subcommand to dump a list of all known DM
drivers and for each, their uclass id, uclass driver and names of
attached devices.

Added a new "static" subcommand to dump a list of DM drivers with
statically defined platform data.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: fs: Add command to list supported fs types
Niel Fourie [Tue, 24 Mar 2020 15:17:04 +0000 (16:17 +0100)] 
cmd: fs: Add command to list supported fs types

Added command "fstypes" to list supported/included filesystems.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Limit to sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agocmd: part: Add subcommand to list supported partition tables
Niel Fourie [Tue, 24 Mar 2020 15:17:03 +0000 (16:17 +0100)] 
cmd: part: Add subcommand to list supported partition tables

Add a subcommand "types" to the part command, which lists the supported
partition table types.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Tue, 7 Jul 2020 18:00:44 +0000 (14:00 -0400)] 
Merge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- arch and board update for stm32mp15:
  - use OPP information in device tree for 800MHz/650MHz support
  - ram: inprovments of test command
  - solve boot on closed chip when access to DBGMCU_IDC is protected
  - stm32prog command: Add "device anme" during USB enumeration
  - update configs: activate WATCHDOG and 'env erase' command,
    increase teed partition, support SD card after NOR boot by default and
    use env info in env_check
  - some sboard cleanups: gpio hog in dh board, specific driver for
    type-c stusb1600 controller code in a driver move part of code in spl.c
    and in common directory
- fix STM32 compatible for dwc_eth_qos driver
- support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx
  drivers
- vrefbuf: fix a possible overshoot when re-enabling

4 years agoMerge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Tue, 7 Jul 2020 16:55:57 +0000 (12:55 -0400)] 
Merge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.10 cycle

4 years agoarm64: issue ISB after updating system registers
Volodymyr Babchuk [Wed, 24 Jun 2020 01:05:19 +0000 (01:05 +0000)] 
arm64: issue ISB after updating system registers

ARM Architecture reference manual clearly states that PE pipeline
should be flushed after changes to some system registers. Refer to
paragraph "B2.3.5 Memory Barriers" at page B2-92 of "Arm Architecture
Reference Manual ARMv8 for ARMv8-A Architecture Profile" (ARM DDI
0487B.a).

Failing to issue instruction synchronization barrier can lead to
spurious errors, like synchronous exception when accessing FPU
registers. This is very prominent on CPUs with long instruction
pipeline, like ARM Cortex A72.

This change fixes the following U-Boot panic:

 "Synchronous Abort" handler, esr 0x1fe00000
 elr: 00000000800948cc lr : 0000000080091e04
 x0 : 00000000801ffdc8 x1 : 00000000000000c8
 x2 : 00000000800979d4 x3 : 00000000801ffc60
 x4 : 00000000801ffd40 x5 : ffffff80ffffffd8
 x6 : 00000000801ffd70 x7 : 00000000801ffd70
 x8 : 000000000000000a x9 : 0000000000000000
 x10: 0000000000000044 x11: 0000000000000000
 x12: 0000000000000000 x13: 0000000000000000
 x14: 0000000000000000 x15: 0000000000000000
 x16: 000000008008b2e0 x17: 0000000000000000
 x18: 00000000801ffec0 x19: 00000000800957b0
 x20: 00000000000000c8 x21: 00000000801ffdc8
 x22: 000000008009909e x23: 0000000000000000
 x24: 0000000000000000 x25: 0000000000000000
 x26: 0000000000000000 x27: 0000000000000000
 x28: 0000000000000000 x29: 00000000801ffc50

 Code: a94417e4 a90217e4 a9051fe6 a90617e4 (3d801fe0)

While executing instruction

 str     q0, [sp, #112]

in vsnprintf() prologue. This panic was observed only on Cortex A72 so
far.

This patch places ISBs on other strategic places as well.

Also, this probably is the right fix for the issue workarounded in the
commit 45f41c134baf ("ARM: uniphier: add weird workaround code for LD20")

Reported-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Suggested-by: Julien Grall <julien.grall.oss@gmail.com>
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
CC: Tom Rini <trini@konsulko.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien@xen.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
4 years agoram: stm32mp1: add size and addr parameter to test all
Patrick Delaunay [Thu, 2 Jul 2020 17:56:37 +0000 (19:56 +0200)] 
ram: stm32mp1: add size and addr parameter to test all

Add size and addr parameter to test "All" to override the default
value (4kB and STM32_DDR_BASE) used in tests with these optional
parameters: [size] or [addr].

When other optional parameters are present before [addr],
they are replaced by default value:
- [loop] = "1"
- [pattern] = "-" (new: force default pattern)

Example to use:

DDR>test 0 1 0x20000

DDR>test 0 1 0x1000000 0xD0000000

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoram: stm32mp1: use the DDR size by default in the test addressBus
Patrick Delaunay [Thu, 2 Jul 2020 17:56:36 +0000 (19:56 +0200)] 
ram: stm32mp1: use the DDR size by default in the test addressBus

The test 4 = "AddressBus [size] [addr]" without parameter
detects alias for any address bit only when:
- size = real size of DDR
- addr = start of DDR = 0xC0000000

These value must be the default value when parameters are absent.

This patch sets bufsize to STM32_DDR_SIZE and get_bufsize() selects
the correct value for bufsize when this parameter is absent =
full size of the DDDR

On EV1 board :
DDR> test 4
running at 0xC0000000 length 0x40000000

On DK2 board
DDR> test 4
running at 0xC0000000 length 0x20000000

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoram: stm32mp1: add parameter addr in test FrequencySelectivePattern
Patrick Delaunay [Thu, 2 Jul 2020 17:56:35 +0000 (19:56 +0200)] 
ram: stm32mp1: add parameter addr in test FrequencySelectivePattern

Add a parameter addr in test FrequencySelectivePattern to select
the base address used to execute the tests.

Default value (when the parameter is absent) is STM32_DDR_BASE,
selected in get_addr() function.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoram: stm32mp1: protect minimum value in get_bufsize
Patrick Delaunay [Thu, 2 Jul 2020 17:56:34 +0000 (19:56 +0200)] 
ram: stm32mp1: protect minimum value in get_bufsize

Add protection on minimum value for result of get_bufsize
and check the alignment of buffer size: only multiple min_size
is allowed; only 4 bytes alignment was checked previously
(value & 0x3).

For example the "Random" test raises an issue when size is not 8 bytes
aligned because address for buffer = address + size / 2 is not word
aligned.

This patch avoid test error for unsupported size value.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agostm32mp1: use the command env info in env_check
Patrick Delaunay [Thu, 2 Jul 2020 15:43:45 +0000 (17:43 +0200)] 
stm32mp1: use the command env info in env_check

Activate CMD_NVEDIT_INFO and use the new command "env info -d -p -q"
to automatically save the environment on first boot.

This patch allows to remove the env_default variable.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agocmd: env: use ENV_IS_IN_DEVICE in env info
Patrick Delaunay [Thu, 2 Jul 2020 15:43:44 +0000 (17:43 +0200)] 
cmd: env: use ENV_IS_IN_DEVICE in env info

Use the define ENV_IS_IN_DEVICE to test if one the
CONFIG_ENV_IS_IN_...  is defined and correct the detection of
persistent storage support in the command "env info"
if CONFIG_ENV_IS_NOWHERE is activated.

Since commit 60d5ed2593c9 ("env: allow ENV_IS_NOWHERE with
other storage target") test CONFIG_ENV_IS_NOWHERE is not
enough; see also commit 953db29a1e9c6 ("env: enable saveenv
command when one CONFIG_ENV_IS_IN is activated").

This patch avoids issue for this command in stm32mp1 platform.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: dh_stm32mp1: update the gpio hog support
Patrick Delaunay [Thu, 2 Jul 2020 13:20:47 +0000 (15:20 +0200)] 
board: dh_stm32mp1: update the gpio hog support

This patch update the current gpio hog implementation with
the new API gpio_hog_probe_all() activated with CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: st: move type-c stusb1600 controller code in a driver
Patrick Delaunay [Mon, 29 Jun 2020 08:34:06 +0000 (10:34 +0200)] 
board: st: move type-c stusb1600 controller code in a driver

Migrate the ST Microelectronics STUSB160X Type-C controller code in
a generic I2C driver in st/common, based on Linux one in :
drivers/usb/typec/stusb160x.c

This patch simplifies the stm32mp1 board code and allows to reuse
this STUSB160X driver in other boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoconfigs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp
Patrick Delaunay [Tue, 16 Jun 2020 16:30:27 +0000 (18:30 +0200)] 
configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp

In the boot command used in ST boards, bootcmd_stm32mp, only support
the SD card as second stage, where is found the bootfs with DISTRO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoarm: stm32mp: protect DBGMCU_IDC access with BSEC
Patrick Delaunay [Tue, 16 Jun 2020 16:27:44 +0000 (18:27 +0200)] 
arm: stm32mp: protect DBGMCU_IDC access with BSEC

As debugger must be totally closed on Sec closed chip,
the DBGMCU_IDC register is no more accessible (self
hosted debug is disabled with OTP).

This patch adds a function bsec_dbgswenable() to check
if the DBGMCU registers are available before to access them:
BSEC_DENABLE.DBGSWENABLE = self hosted debug status.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoarm: stm32mp: stm32prog: add "Device Name" in iproduct during DFU USB enumeration
Patrick Delaunay [Tue, 16 Jun 2020 16:25:14 +0000 (18:25 +0200)] 
arm: stm32mp: stm32prog: add "Device Name" in iproduct during DFU USB enumeration

Add "Device Name" in iproduct during DFU USB enumeration
to have this information in STM32CubeProgrammer trace
(this tools is compatible with @Name since v2.3)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: st: stm32mp1: increase teed partition
Patrick Delaunay [Tue, 16 Jun 2020 16:19:28 +0000 (18:19 +0200)] 
board: st: stm32mp1: increase teed partition

With TEE 3.7.0, the partition teed (OP-TEE pageable
code and data) need to increase up to 512KB in NOR device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agostm32mp1: configs: activate CMD_ERASEENV
Patrick Delaunay [Mon, 15 Jun 2020 09:25:13 +0000 (11:25 +0200)] 
stm32mp1: configs: activate CMD_ERASEENV

Activate the command env erase to reset the environment with the command:
> env erase

it is simpler than:
> env default -a
> env save

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agopower: regulator: stm32: vrefbuf: fix a possible overshoot when re-enabling
Fabrice Gasnier [Fri, 12 Jun 2020 08:40:58 +0000 (10:40 +0200)] 
power: regulator: stm32: vrefbuf: fix a possible overshoot when re-enabling

There maybe an overshoot:
- when disabling, then re-enabling vrefbuf too quickly
- or upon platform reset as external capacitor maybe slow
  discharging (VREFBUF is HiZ at reset by default).
VREFBUF is used by ADC/DAC on some boards. An overshoot on the reference
voltage make the conversions inaccurate for a short period of time. So:
- Don't put the VREFBUF in HiZ when disabling, to force an active
  discharge.
- Enforce a 1ms OFF/ON delay, also upon reset

Penalty is a 1ms delay is applied (even for a cold boot), when enabling
VREFBUF.

Fixes: 93cf0ae7758d ("power: regulator: Add support for stm32-vrefbuf")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
4 years agoconfigs: stm32mp1: activate WATCHDOG
Patrick Delaunay [Thu, 11 Jun 2020 14:51:17 +0000 (16:51 +0200)] 
configs: stm32mp1: activate WATCHDOG

As kernel v5.6 have a solution since so we will be able to enable
the watchdog at boot time. It is reloaded by the watchdog
framework (if CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is set) and
until the userspace watchdog daemon takes over control.

Need presence of kernel patch 85fdc63fe256 ("drivers: watchdog:
stm32_iwdg: set WDOG_HW_RUNNING at probe") integrated in v5.6-rc1.

This patch revert the previous commit ca351e705a5c ("stm32mp1:
deactivate WATCHDOG in defconfig").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agopinctrl: stm32: add information on pin configuration
Patrick Delaunay [Thu, 4 Jun 2020 12:30:33 +0000 (14:30 +0200)] 
pinctrl: stm32: add information on pin configuration

Add information on pin configuration used for pinmux command:
- bias configuration for output (disable, pull up, pull down)
- otype for input (open drain or push pull)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agopinctrl: stmfx: add information on pin configuration
Patrick Delaunay [Thu, 4 Jun 2020 12:30:32 +0000 (14:30 +0200)] 
pinctrl: stmfx: add information on pin configuration

Add information on pin configuration used for pinmux command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stmfx: add ops get_dir_flags
Patrick Delaunay [Thu, 4 Jun 2020 12:30:31 +0000 (14:30 +0200)] 
gpio: stmfx: add ops get_dir_flags

Add support of ops get_dir_flags() to read dir flags from
STMFX registers.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stmfx: add ops set_dir_flag
Patrick Delaunay [Thu, 4 Jun 2020 12:30:30 +0000 (14:30 +0200)] 
gpio: stmfx: add ops set_dir_flag

Manage the flags for GPIO configuration:
- open_drain, push_pull
- pull_up, pull_down

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stmfx: add function stmfx_read_reg and stmfx_write_reg
Patrick Delaunay [Thu, 4 Jun 2020 12:30:29 +0000 (14:30 +0200)] 
gpio: stmfx: add function stmfx_read_reg and stmfx_write_reg

Add the helper functions stmfx_read_reg() and stmfx_write_reg() to avoid
duplicated code for access to stmfx's register with mask.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stmfx: rename function used to change pin configuration
Patrick Delaunay [Thu, 4 Jun 2020 12:30:28 +0000 (14:30 +0200)] 
gpio: stmfx: rename function used to change pin configuration

Rename the two function used to change the pin configuration
from stmfx_pinctrl_.. stmfx_conf_... to clarify the function usage.

No functional change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stmfx: move function to prepare new ops introduction
Patrick Delaunay [Thu, 4 Jun 2020 12:30:27 +0000 (14:30 +0200)] 
gpio: stmfx: move function to prepare new ops introduction

Move the functions stmfx_pinctrl_set_pupd and stmfx_pinctrl_set_type;
they can be used by the new ops get_dir_flags and set_dir_flags introduced
by next patch.

No functional change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stm32: add ops get_dir_flags
Patrick Delaunay [Thu, 4 Jun 2020 12:30:26 +0000 (14:30 +0200)] 
gpio: stm32: add ops get_dir_flags

Add ops get_dir_flags() to read dir flags from GPIO registers.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agogpio: stm32: add ops set_dir_flags
Patrick Delaunay [Thu, 4 Jun 2020 12:30:25 +0000 (14:30 +0200)] 
gpio: stm32: add ops set_dir_flags

Manage flags for GPIO configuration:
- open_drain, open_source, push_pull
- pull_up, pull_down

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: stm32mp1: update the gpio hog support
Patrick Delaunay [Thu, 4 Jun 2020 12:30:24 +0000 (14:30 +0200)] 
board: stm32mp1: update the gpio hog support

This patch updates the current gpio hog implementation and uses
the new API gpio_hog_probe_all(), activated with CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoconfigs: stm32mp1: activate CONFIG_GPIO_HOG
Patrick Delaunay [Thu, 4 Jun 2020 12:30:23 +0000 (14:30 +0200)] 
configs: stm32mp1: activate CONFIG_GPIO_HOG

This patch activates the new configuration CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: stm32mp1: move the function board_debug_uart_init in spl.c
Patrick Delaunay [Mon, 25 May 2020 10:19:49 +0000 (12:19 +0200)] 
board: stm32mp1: move the function board_debug_uart_init in spl.c

Move the debug function board_debug_uart_init in spl.c
as the debug_uart_init() function is called in arch_cpu_init()
only for SPL and remove the board.c file.

For TFABOOT, the UART TX pin configuration is done in TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoARM: dts: stm32mp1: use OPP information for PLL1 settings in SPL
Patrick Delaunay [Mon, 25 May 2020 10:19:48 +0000 (12:19 +0200)] 
ARM: dts: stm32mp1: use OPP information for PLL1 settings in SPL

This patch allows to switch the CPU frequency to 800MHz on the
ST Microelectronics board (DK1/DK2 and EV1) or dh electronics SOM
using the STM32MP15x SOC and when it is supported by the HW
(for STM32MP15xD and STM32MP15xF).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: stm32mp1: update vddcore in SPL
Patrick Delaunay [Mon, 25 May 2020 10:19:47 +0000 (12:19 +0200)] 
board: stm32mp1: update vddcore in SPL

For board using STPMIC1, the vddcore is provided by BUCK1 of STPMIC1
and need to be updated for 800MHz support and only after the clock
tree initialization.

The VDDCORE voltage value is provided by clock driver, saved in global
variable opp_voltage_mv and udpated in SPL board_early_init_f(),
just after clock tree initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: st: stpmic1: add function stpmic1_init
Patrick Delaunay [Mon, 25 May 2020 10:19:46 +0000 (12:19 +0200)] 
board: st: stpmic1: add function stpmic1_init

Add a function stmpic_init to early initialize the PMIC STPMIC1
- keep vdd on during the reset cycle (to avoid issue when backup battery
  is absent)
- Check if debug is enabled to program PMIC according to the bit

This patch allows to remove the compilation of spl.c file from stm32mp1
board in dh_stm32mp1.

CONFIG_SPL_BOARD_INIT is removed as the new function is called earlier
in SPL, in the function board_early_init_f.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoarm: stm32mp: add weak function to save vddcore
Patrick Delaunay [Mon, 25 May 2020 10:19:45 +0000 (12:19 +0200)] 
arm: stm32mp: add weak function to save vddcore

Add a weak functions to save the vddcore voltage value provided
in the OPP node when the clock tree is initialized.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agostm32mp1: clk: configure pll1 with OPP
Patrick Delaunay [Mon, 25 May 2020 10:19:44 +0000 (12:19 +0200)] 
stm32mp1: clk: configure pll1 with OPP

The PLL1 node (st,pll1) is optional in device tree, the max supported
frequency define in OPP node is used when the node is absent.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: st: create common file stpmic1.c
Patrick Delaunay [Mon, 25 May 2020 10:19:43 +0000 (12:19 +0200)] 
board: st: create common file stpmic1.c

Move function board_ddr_power_init() in a new file stpmic1 in
board/st/common to avoid duplicated code in each board using
stpmic1

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoARM: dts: stm32: add cpufreq support on stm32mp15x
Patrick Delaunay [Mon, 25 May 2020 10:19:42 +0000 (12:19 +0200)] 
ARM: dts: stm32: add cpufreq support on stm32mp15x

This commit adds cpufreq support on stm32mp15x SOC. STM32 cpufreq uses
operating points V2 bindings (no legacy). Nvmem cells have to be used to
know the chip version and then which OPPs are available. Note that STM32
cpufreq driver is mainly based on "cpufreq-dt" driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoarm: stm32mp: spl: add bsec driver in SPL
Patrick Delaunay [Mon, 25 May 2020 10:19:41 +0000 (12:19 +0200)] 
arm: stm32mp: spl: add bsec driver in SPL

Add the bsec driver in SPL, as it is needed by SOC part number detection
to found the supported OPP.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agonet: dwc_eth_qos: update the compatible supported for STM32
Patrick Delaunay [Thu, 14 May 2020 13:00:23 +0000 (15:00 +0200)] 
net: dwc_eth_qos: update the compatible supported for STM32

Update the compatible associated with the STM32 MPU glue
in the DWC ethernet driver.

The supported compatible is the specific "st,stm32mp1-dwmac"
as indicated in Linux binding
Documentation/devicetree/bindings/net/stm32-dwmac.txt
and not the "snps,dwmac-4.20a" only used to the select IP
version.

This glue is implemented in Linux kernel in:
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

For information in stm32mp151.dtsi, the 2 compatibles are
supported:

ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
...
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agofs: fat: fix fat iteration
Christian Gmeiner [Tue, 9 Jun 2020 07:09:07 +0000 (09:09 +0200)] 
fs: fat: fix fat iteration

According to the FAT specification it is valid to have files with an
attribute value of 0x0. This fixes a regression where different U-Boot
versions are showing different amount of files on the same storage
device. With this change U-Boot shows the same number of files and folders
as Linux and Windows.

Fixes: 39606d462c ("fs: fat: handle deleted directory entries correctly")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
4 years agocommon/board_f: Respect original FDT size while relocating
Oleksandr Andrushchenko [Fri, 19 Jun 2020 08:22:18 +0000 (11:22 +0300)] 
common/board_f: Respect original FDT size while relocating

While relocating FDT we reserve some memory for the new FDT and
set the size of the FDT with that respect. But FDT may be placed
at the end of the RAM leading to memory access beyond it.
Fix this by copying exact FDT size bytes, not the reserved size.

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Jagan Teki [Thu, 18 Jun 2020 16:12:20 +0000 (21:42 +0530)] 
ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support

Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.

VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.

So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Add VMARC RK3288 SOM initial support
Jagan Teki [Thu, 18 Jun 2020 16:12:19 +0000 (21:42 +0530)] 
ARM: dts: rockchip: Add VMARC RK3288 SOM initial support

VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.

Specification:
- Rockchip RK3288
- PMIC: RK808
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: radxa-dalang: Update sdmmc properties
Jagan Teki [Thu, 18 Jun 2020 16:12:18 +0000 (21:42 +0530)] 
ARM: dts: rockchip: radxa-dalang: Update sdmmc properties

Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.

Among these combinations, card detection gpio, max-frequency
properties are used with rk3399pro SoM but not required for
rk3288 SoM based on the hardware schematics.

So, let's move these sdmmc specific properties on associate
vmarc dtsi to make common use of dalang carrier device tree file.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAM
Hugh Cole-Baker [Mon, 15 Jun 2020 23:30:47 +0000 (00:30 +0100)] 
rockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAM

SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to
guard against issues when used with TF-A versions that perform
insufficient validation on the platform parameter. However, since commit
8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a
device tree as platform parameter no longer causes problems for upstream
TF-A for RK3399.

Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using
upstream TF-A, change the Kconfig option from select to imply. It'll
still default to being selected but can be deselected by a user if they
know they will be using a compatible version of TF-A.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Walter Lozano <walter.lozano@collabora.com>
4 years agoarm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
Jagan Teki [Wed, 10 Jun 2020 10:36:58 +0000 (16:06 +0530)] 
arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support

Rock Pi N10 is a Rockchip RK3399Pro based SBC, which has
- VMARC RK3399Pro SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.

VAMRC RK3399Pro SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N10 SBC.

So, add initial support for Rock Pi N10 by including rk3399,
rk3399pro vamrc-som and raxda dalang carrier board dtsi files.

rk3399pro-rock-pi-n10.dts was synced from linux-next v5.7-rc1.

Tested
- ROCK PI N10 Model B
- ROCK PI N10 Model C
- Boot from SD

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoARM: dts: rockchip: Sync v5.7-rc1 Radxa Dalang Carrier
Jagan Teki [Wed, 10 Jun 2020 10:36:57 +0000 (16:06 +0530)] 
ARM: dts: rockchip: Sync v5.7-rc1 Radxa Dalang Carrier

Carrier board often referred as baseboard. For making
complete SBC or any other industrial boards, these
carrier boards will be used with associated SOMs.

Radxa has Dalang carrier board which supports on-board
peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI,
eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc.

Right now Dalang carrier board is used with two SBC-variants:
Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board
Rock Pi N8  => VMARC RK3288 SOM + Dalang carrier board(+codec)

So add this carrier board dtsi as a separate file in
ARM directory, so-that the same can reuse it in both
rk3288, rk3399pro variants of Rockchip SOMs.

Sync this dtsi from linux-next v5.7-rc1.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Sync v5.7-rc1 VMARC RK3399Pro SOM
Jagan Teki [Wed, 10 Jun 2020 10:36:56 +0000 (16:06 +0530)] 
arm64: dts: rockchip: Sync v5.7-rc1 VMARC RK3399Pro SOM

VMARC RK3399Pro SOM is a standard SMARC SOM design with
Rockchip RK3399Pro SoC, which is designed by Vamrs.

Specification:
- Rockchip RK3399Pro
- PMIC: RK809-3
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3399Pro SOM, this would use
with associated carrier board.

Sync this dtsi from linux-next v5.7-rc1.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsi
Jagan Teki [Wed, 10 Jun 2020 10:36:55 +0000 (16:06 +0530)] 
arm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsi

Sync linux-next v5.7-rc1 rk3399pro.dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Pinebook Pro: Fix SPI flash and store env on it
Peter Robinson [Mon, 8 Jun 2020 22:50:30 +0000 (23:50 +0100)] 
rockchip: Pinebook Pro: Fix SPI flash and store env on it

Some minor fixes for SPI flash on the Pinebook Pro and also
default to saving environment to the SPI flash as it's
guaranteed to be on board.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(applied with make savedefconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Pinebook Pro: Fix USB and the USB attached keyboard
Peter Robinson [Mon, 8 Jun 2020 22:50:29 +0000 (23:50 +0100)] 
rockchip: Pinebook Pro: Fix USB and the USB attached keyboard

The built in keyboard on the Pinebook Pro is attached via USB so
fix this up to ensure USB works as expected.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Pinebook Pro: enable rng to provide an entropy source
Peter Robinson [Mon, 8 Jun 2020 22:50:28 +0000 (23:50 +0100)] 
rockchip: Pinebook Pro: enable rng to provide an entropy source

Enable the rng so UEFI can provide entropy for KASLR

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rockpro64: initialize USB in preboot
Marcin Juszkiewicz [Wed, 3 Jun 2020 15:44:20 +0000 (17:44 +0200)] 
rockchip: rockpro64: initialize USB in preboot

With video output enabled and USB keyboard supported there is no need
for serial console. So let initialize USB subsystem so keyboard connected to
board (either directly or via hub) can be used to interrupt autoboot.

U-Boot TPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200)
Trying to boot from SPI

U-Boot 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200)

SoC: Rockchip rk3399
Reset cause: RST
Model: Pine64 RockPro64 v2.1
DRAM:  3.9 GiB
PMIC:  RK808
MMC:   mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
OK
In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Pine64 RockPro64 v2.1
Net:   eth0: ethernet@fe300000
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: USB EHCI 1.00
Bus usb@fe3e0000: USB OHCI 1.0
Bus dwc3: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
Hit any key to stop autoboot:  0
=>

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoRevert "riscv: sifive: fu540: Add gpio-restart support"
Tom Rini [Mon, 6 Jul 2020 21:57:14 +0000 (17:57 -0400)] 
Revert "riscv: sifive: fu540: Add gpio-restart support"

As part of merging the next branch in to master, the sifive_fu540 will
fail to link:
riscv64-linux-ld.bfd: lib/built-in.o: in function `panic_finish':
lib/panic.c:28: undefined reference to `do_reset'
make[2]: *** [spl/u-boot-spl] Error 1
make[1]: *** [spl/u-boot-spl] Error 2
make: *** [sub-make] Error 2

And while the "fix the build" option of enabling CONFIG_SPL_SYSRESET may
solve the issue, it is unclear that it is the correct path exactly.  For
the moment, I am reverting this commit and take a "revert the revert"
and proper fix as soon as it's available.

This reverts commit cdae446461191714d692190da1ad4344398adc57.

Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agovideo: restore CONFIG_VIDCONSOLE_AS_LCD as boolean
Patrick Delaunay [Wed, 1 Jul 2020 12:56:10 +0000 (14:56 +0200)] 
video: restore CONFIG_VIDCONSOLE_AS_LCD as boolean

This patch restores CONFIG_VIDCONSOLE_AS_LCD as boolean
and introduce a separate sting as CONFIG_VIDCONSOLE_AS_NAME
to search this string in stdout used as videoconsole.

This patch avoid issue with board defconfig or code expecting
CONFIG_VIDCONSOLE_AS_LCD as boolean.

Fixes: 22b897a12323 ("video: extend stdout video console work-around for 'vga'")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoMerge branch 'next'
Tom Rini [Mon, 6 Jul 2020 19:46:38 +0000 (15:46 -0400)] 
Merge branch 'next'

Merge all outstanding changes from the current next branch in now that
we have released.

4 years agoPrepare v2020.07 v2020.07
Tom Rini [Mon, 6 Jul 2020 19:22:53 +0000 (15:22 -0400)] 
Prepare v2020.07

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 6 Jul 2020 17:54:25 +0000 (13:54 -0400)] 
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'efi-2020-10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi...
Tom Rini [Sun, 5 Jul 2020 22:13:12 +0000 (18:13 -0400)] 
Merge tag 'efi-2020-10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi into next

Pull request for UEFI sub-system for efi-2020-10-rc1

This series comprises error corrections for the UEFI subsystem:

* correct consideration of timestamps for variable authentication
* correct collection of data regions for code authentication
* correct unit tests to test loading dbx
* enable FAT_WRITE as required by the UEFI spec

The boot manager uses log functions instead of printf() and debug().

The UEFI intialization state is exported.

4 years agoMerge branch '2020-07-01-kconfig-etc-updates' into next
Tom Rini [Sun, 5 Jul 2020 22:03:32 +0000 (18:03 -0400)] 
Merge branch '2020-07-01-kconfig-etc-updates' into next

- Resync Kconfiglib with the v14.1.0 release.
- Re-sync our <linux/compiler*h> files with v5.7-rc5 from upstream.
- Fully resync checkpatch.pl with v5.7 release.

To safely to all of the above, we have a few bugfixes about functions
that need a 'static inline' but weren't.  We also stop setting
CROSS_COMPILE in arch/*/config.mk.  Finally, with the above changes
boards can now opt-in to optimizing inlining and we do this for the
socfpga stratix10 platform for space savings.