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# gpg: Signature made Wed 14 May 2025 04:00:03 EDT
# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20250514' of https://github.com/gaosong715/qemu:
hw/loongarch/boot: Adjust the loading position of the initrd
hw/intc/loongarch_pch: Merge three memory region into one
hw/intc/loongarch_pch: Set flexible memory access size with iomem region
hw/intc/loongarch_pch: Rename memory region iomem32_low with iomem
hw/intc/loongarch_pch: Use unified trace event for memory region ops
hw/intc/loongarch_pch: Use generic write callback for iomem8 region
hw/intc/loongarch_pch: Use generic write callback for iomem32_high region
hw/intc/loongarch_pch: Use generic write callback for iomem32_low region
hw/intc/loongarch_pch: Use generic read callback for iomem8 region
hw/intc/loongarch_pch: Use generic read callback for iomem32_high region
hw/intc/loongarch_pch: Use generic read callback for iomem32_low region
hw/intc/loongarch_pch: Discard write operation with ISR register
hw/intc/loongarch_pch: Use relative address in MemoryRegionOps
hw/intc/loongarch_pch: Set version information at initial stage
hw/intc/loongarch_pch: Remove some duplicate macro
hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with PCH_PIC_xxx
hw/intc/loongarch_pch: Modify name of some registers
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 14 May 2025 11:16:35 +0000 (07:16 -0400)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* meson: small old patches (one from 2022)
* rust: pl011: forward port some changes from C version
* target/i386: small improvements to TCG emulation
* target/i386: HVF emulation cleanups
* target/i386: add its_no feature
* cs4231a: fix assertion failure
* update Linux headers
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
target/i386: Make ITS_NO available to guests
hw/audio/cs4231a: fix assertion error in isa_bus_get_irq
linux-headers: update from 6.15 + kvm/next
target/i386: remove lflags
target/i386/emulate: mostly rewrite flags handling
target/i386/emulate: stop overloading decode->op[N].ptr
target/i386: implement TSS trap bit
target/i386: move push of error code to switch_tss_ra
target/i386: list TCG-supported features for CPUID[80000021h].EAX
target/i386: ignore misplaced REX prefixes
rust: pl011: Really use RX FIFO depth
rust: pl011: Rename RX FIFO methods
modinfo: lookup compile_commands.json by object
meson: remove unnecessary dependencies from specific_ss
meson: do not check supported TCG architecture if no emulators built
meson: drop --enable-avx* options
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 14 May 2025 11:16:01 +0000 (07:16 -0400)]
Merge tag 'pull-block-jobs-2025-04-29-v3' of https://gitlab.com/vsementsov/qemu into staging
block-job patches
- deprecate some old block-job- APIs
- on-cbw-error option for backup
- more efficient zero handling in block commit
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# gpg: Signature made Mon 12 May 2025 11:24:12 EDT
# gpg: using RSA key 8B9C26CDB2FD147C880E86A1561F24C1F19F79FB
# gpg: Good signature from "Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>" [unknown]
# gpg: aka "Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8B9C 26CD B2FD 147C 880E 86A1 561F 24C1 F19F 79FB
* tag 'pull-block-jobs-2025-04-29-v3' of https://gitlab.com/vsementsov/qemu:
blockdev-backup: Add error handling option for copy-before-write jobs
qapi/block-core: deprecate some block-job- APIs
qapi: synchronize jobs and block-jobs documentation
block: add test non-active commit with zeroed data
block: allow commit to unmap zero blocks
block: refactor error handling of commit_iteration
block: move commit_run loop to separate function
block: get type of block allocation in commit_run
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Xianglai Li [Tue, 6 May 2025 08:09:46 +0000 (16:09 +0800)]
hw/loongarch/boot: Adjust the loading position of the initrd
When only the -kernel parameter is used to load the elf kernel, the initrd
is loaded in the ram. If the initrd size is too large, the loading fails,
resulting in a VM startup failure. This patch first loads initrd near
the kernel.
When the nearby memory space of the kernel is insufficient, it tries to
load it to the starting position of high memory. If there is still not
enough, qemu will report an error and ask the user to increase the memory
space for the virtual machine to boot.
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Message-Id: <20250506080946.817092-1-lixianglai@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:37:54 +0000 (10:37 +0800)]
hw/intc/loongarch_pch: Merge three memory region into one
Since memory region iomem supports memory access size with 1/2/4/8,
it can be used for memory region iomem8 and iomem32_high. Now remove
memory region iomem8 and iomem32_high, merge them into iomem together.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023754.1877445-5-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:37:53 +0000 (10:37 +0800)]
hw/intc/loongarch_pch: Set flexible memory access size with iomem region
The original iomem region only supports 4 bytes access size, set it ok
with 1/2/4/8 bytes. Also unaligned memory access is not supported.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023754.1877445-4-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:37:52 +0000 (10:37 +0800)]
hw/intc/loongarch_pch: Rename memory region iomem32_low with iomem
Rename memory region iomem32_low with iomem, also change ops name
as follows:
loongarch_pch_pic_reg32_low_ops --> loongarch_pch_pic_ops
loongarch_pch_pic_low_readw --> loongarch_pch_pic_read
loongarch_pch_pic_low_writew --> loongarch_pch_pic_write
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023754.1877445-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:37:51 +0000 (10:37 +0800)]
hw/intc/loongarch_pch: Use unified trace event for memory region ops
Add trace event trace_loongarch_pch_pic_read(), replaces the following
three events:
trace_loongarch_pch_pic_low_readw()
trace_loongarch_pch_pic_high_readw()
trace_loongarch_pch_pic_readb()
The similiar with write trace event.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023754.1877445-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:37:50 +0000 (10:37 +0800)]
hw/intc/loongarch_pch: Use generic write callback for iomem8 region
Add iomem8 region register write operation emulation in generic write
function loongarch_pch_pic_write(), and use this function for iomem8
region.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023754.1877445-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:43 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Use generic write callback for iomem32_high region
Add iomem32_high region register write operation emulation in generic
write function loongarch_pch_pic_write(), and use this function for
iomem32_high region.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-12-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:42 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Use generic write callback for iomem32_low region
For memory region iomem32_low, generic write callback is used.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-11-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:41 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Use generic read callback for iomem8 region
Add iomem8 region register read operation emulation in generic read
function loongarch_pch_pic_read(), and use this function for iomem8
region.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-10-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:40 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Use generic read callback for iomem32_high region
Add register read operation emulation in generic read function
loongarch_pch_pic_read(), and use this function for iomem32_high region.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-9-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:39 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Use generic read callback for iomem32_low region
For memory region iomem32_low, generic read callback is used.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-8-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:38 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Discard write operation with ISR register
With the latest 7A1000 user manual, interrupt status register ISR is
read only. Here discard write operation with ISR register.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-7-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:37 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Use relative address in MemoryRegionOps
Parameter address for read and write callback in MemoryRegionOps is
relative offset with base address of this MemoryRegionOps. It can
be directly used as offset and offset calculation can be removed.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-6-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:36 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Set version information at initial stage
Register PCH_PIC_INT_ID constains version and supported irq number
information, and it is read only register. The detailed value can
be set at initial stage, rather than read callback.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-5-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:35 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Remove some duplicate macro
The meaning of macro definition STATUS_LO_START is simliar with
PCH_PIC_INT_STATUS, only that offset is different, the same for
macro POL_LO_START. Now remove these duplicated macro definitions.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-4-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:34 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with PCH_PIC_xxx
Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed
as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to
understand.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 7 May 2025 02:31:33 +0000 (10:31 +0800)]
hw/intc/loongarch_pch: Modify name of some registers
For some registers with width 8 bytes, its name is something like
PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual,
register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID
is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250507023148.1877287-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Pawan Gupta [Mon, 12 May 2025 17:26:04 +0000 (10:26 -0700)]
target/i386: Make ITS_NO available to guests
When a system is not affected by Indirect Target Selection (ITS)
vulnerability, VMMs set ITS_NO bit in MSR IA32_ARCH_CAPABILITIES to let the
guest know that it is not affected.
Zheng Huang [Fri, 9 May 2025 11:21:35 +0000 (19:21 +0800)]
hw/audio/cs4231a: fix assertion error in isa_bus_get_irq
This patch fixes an assertion error in isa_bus_get_irq() in
/hw/isa/isa-bus.c by adding a constraint to the irq property.
Patch v1 misused ISA_NUM_IRQS, pls ignore that.
While Bochs's algorithms are pretty solid, there are small opportunities
to improve them or to make their logic more similar to TCG's handling
of condition codes.
- use a single bit for the difference between bits 0..7 of result and PF.
This is useful because "set only ZF" is not a common case.
- place SD in the same place as SF
- move CF and PO at bits 62 and 63 when target_ulong is 64-bits wide,
so that 64-bit ALU operations need fewer shifts
- use rotates to move CF and AF from auxbits to their eflags position
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
decode->op[N].ptr can contain either a host pointer (!) in CPUState
or a guest virtual address. Pass the whole struct to read_val_ext
and write_val_ext, so that it can decide the contents based on the
operand type.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 8 May 2025 08:29:43 +0000 (10:29 +0200)]
rust: pl011: Really use RX FIFO depth
While we model a 16-elements RX FIFO since the PL011 model was
introduced in commit cdbdb648b7c ("ARM Versatile Platform Baseboard
emulation"), we only read 1 char at a time!
Have can_receive() return how many elements are available, and use that
in receive().
This is the Rust version of commit 3e0f118f825 ("hw/char/pl011: Really
use RX FIFO depth"); but it also adds back a comment that is present
in commit f576e0733cc ("hw/char/pl011: Add support for loopback") and
absent in the Rust code.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
blockdev-backup: Add error handling option for copy-before-write jobs
This patch extends the blockdev-backup QMP command to allow users to specify
how to behave when IO errors occur during copy-before-write operations.
Previously, the behavior was fixed and could not be controlled by the user.
The new 'on-cbw-error' option can be set to one of two values:
- 'break-guest-write': Forwards the IO error to the guest and triggers
the on-source-error policy. This preserves snapshot integrity at the
expense of guest IO operations.
- 'break-snapshot': Allows the guest OS to continue running normally,
but invalidates the snapshot and aborts related jobs. This prioritizes
guest operation over backup consistency.
This enhancement provides more flexibility for backup operations in different
environments where requirements for guest availability versus backup
consistency may vary.
The default behavior remains unchanged to maintain backward compatibility.
Signed-off-by: Raman Dzehtsiar <Raman.Dzehtsiar@gmail.com>
Message-ID: <20250414090025.828660-1-Raman.Dzehtsiar@gmail.com> Acked-by: Markus Armbruster <armbru@redhat.com>
[vsementsov: fix long lines] Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Tested-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Stefan Hajnoczi [Mon, 12 May 2025 15:11:37 +0000 (11:11 -0400)]
Merge tag 'qtest-20250509-pull-request' of https://gitlab.com/farosas/qemu into staging
Qtest pull request
- Fix migration-test invocation of qtest_init
- Simplify byte-swapping for virtio in libqos
- New cpu hotplug test for loongarch64
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# gpg: Signature made Fri 09 May 2025 17:16:40 EDT
# gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D
# gpg: issuer "farosas@suse.de"
# gpg: Good signature from "Fabiano Rosas <farosas@suse.de>" [unknown]
# gpg: aka "Fabiano Almeida Rosas <fabiano.rosas@suse.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D
* tag 'qtest-20250509-pull-request' of https://gitlab.com/farosas/qemu:
tests/qtest/cpu-plug-test: Add cpu hotplug support for LoongArch
tests/qtest/libqos: Avoid double swapping when using modern virtio
qtest: introduce qtest_init_ext
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 12 May 2025 15:11:27 +0000 (11:11 -0400)]
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2025-05-09
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# gpg: Signature made Fri 09 May 2025 16:52:20 EDT
# gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478
# gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown]
# gpg: aka "Michael Tokarev <mjt@corpit.ru>" [unknown]
# gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E
# Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478
* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (21 commits)
docs/devel/testing/functional: Fix typo
docs: replace `-hda` with `-drive` & update `root=` kernel parameter
qapi/machine-target.json: fix "in in" typo in comment
hw/display/apple-gfx.m: fix "in in" typo in comment
qapi/qom.json: fix "the the" typo in comment
include/hw/xen/interface/io/blkif.h: fix "the the" typo in comment
include/exec/cpu-common.h: fix "the the" typo in comment
hw/xen/xen-hvm-common.c: fix "the the" typo in comment
block.c: fix "the the" typo in comment
linux-user/mmap.c: fix "of of" typo in comment
hw/acpi/pcihp: Fix typo in function name
hw/pci-host/gpex-acpi: Fix typo in comment
hw/net/e1000: Remove stray empty comment in header
qom/object: Fix typo in comment
hw/core/machine: Fix indentation
hw/i386/acpi-build: Fix typo in function name
hw/acpi/ich9: Remove ICH9_DEBUG macro
hw/i386/acpi-build: Update document reference
hw/i386/acpi-build: Fix typo and grammar in comment
hw/isa/ich9: Remove stray empty comment
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Paolo Bonzini [Thu, 8 May 2025 08:29:42 +0000 (10:29 +0200)]
rust: pl011: Rename RX FIFO methods
In preparation of having a TX FIFO, rename the RX FIFO methods.
This is the Rust version of commit 40871ca758cf ("hw/char/pl011:
Rename RX FIFO methods").
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 24 May 2024 09:26:54 +0000 (11:26 +0200)]
modinfo: lookup compile_commands.json by object
Since modinfo support was added, Meson fixed several issues with
extract_objects and compile_commands.json lookups can be simplified.
If the lookup uses the object file as key, there is no need to use the
command line to distinguish among all entries for a given source.
Ninja 1.9 is required in order to produce the 'output' key in
compile_commands.json; it is available in CentOS Stream 9, Debian 11, SLES
15.2, Ubuntu 20.04 and in all recent BSD distros. Samurai also has it.
Paolo Bonzini [Thu, 8 May 2025 13:13:38 +0000 (15:13 +0200)]
meson: remove unnecessary dependencies from specific_ss
All dependencies that are in common_ss (which includes system_ss) automatically
have their include path added when building the target-specific files. So the
hack in ui/meson.build is not needed anymore since commit 727bb5b477e ("meson:
pick libfdt from common_ss when building target-specific files", 2024-05-10);
drop it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 9 May 2022 10:50:29 +0000 (12:50 +0200)]
meson: do not check supported TCG architecture if no emulators built
Errors about TCI are pointless if only tools are being built; suppress
them even if the user did not specify --disable-tcg.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 5 Jul 2024 07:12:20 +0000 (09:12 +0200)]
meson: drop --enable-avx* options
Just detect compiler support and always enable the optimizations if
it is avilable; warn if the user did request AVX2/AVX512 use via
-Dx86_version= but the intrinsics are not available.
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Integral [Sun, 6 Apr 2025 08:45:18 +0000 (16:45 +0800)]
docs: replace `-hda` with `-drive` & update `root=` kernel parameter
According to QEMU manual:
Older options like `-hda` are essentially macros which expand into
`-drive` options for various drive interfaces. The original forms
bake in a lot of assumptions from the days when QEMU was emulating a
legacy PC, they are not recommended for modern configurations.
Signed-off-by: Integral <integral@archlinuxcn.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Gustavo Romero [Sun, 4 May 2025 21:56:39 +0000 (21:56 +0000)]
hw/acpi/ich9: Remove ICH9_DEBUG macro
Remove the ICH9_DEBUG macro, which is only used to dump the value of the
pm_io_base parameter, passed to ich9_pm_iospace_update(). It provides
little to no value and is not worth converting to a trace event.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Bibo Mao [Fri, 14 Mar 2025 08:51:30 +0000 (16:51 +0800)]
tests/qtest/cpu-plug-test: Add cpu hotplug support for LoongArch
Add cpu hotplug testcase support for LoongArch system, it passes to
run with command "make check-qtest-loongarch64" as following:
qemu:qtest+qtest-loongarch64 / qtest-loongarch64/cpu-plug-test OK 0.38s 1 subtests passed
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250314085130.4184272-1-maobibo@loongson.cn> Signed-off-by: Fabiano Rosas <farosas@suse.de>
Thomas Huth [Wed, 30 Apr 2025 13:28:17 +0000 (15:28 +0200)]
tests/qtest/libqos: Avoid double swapping when using modern virtio
The logic in the qvirtio_read/write function is rather a headache,
involving byte-swapping when the target is big endian, just to
maybe involve another byte-swapping in the qtest_read/write
function immediately afterwards (on the QEMU side). Let's do it in
a more obvious way here: For virtio 1.0, we know that the values have
to be little endian, so let's read/write the bytes in that well known
order here.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20250430132817.610903-1-thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
Merge qtest_init_with_env_and_capabilities() and qtest_init_with_env()
into one qtest_init_ext().
Reasons:
1. qtest_init_with_env() is just wrong: it gets do_connect parameter
but always pass true to qtest_init_with_env_and_capabilities().
Happily, all qtest_init_with_env() callers pass true as well.
2. qtest_init_with_env() is not used outside of libqtest.c, so no
reason to keep it as public function
3. and in libqtest.c it's used not often, so no problem to use
more generic function instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250410162250.329941-1-vsementsov@yandex-team.ru> Signed-off-by: Fabiano Rosas <farosas@suse.de>
Stefan Hajnoczi [Fri, 9 May 2025 16:04:34 +0000 (12:04 -0400)]
Merge tag 'pull-vfio-20250509' of https://github.com/legoater/qemu into staging
vfio queue:
* Preparatory changes for the introduction of CPR support
* Automatic enablement of OpRegion for IGD device passthrough
* Linux headers update
* Preparatory changes for the introduction of vfio-user
Stefan Hajnoczi [Fri, 9 May 2025 16:04:27 +0000 (12:04 -0400)]
Merge tag 'docs-dep-pull-request' of https://gitlab.com/berrange/qemu into staging
Enable automated removal of deprecated versioned machine types
* Remove test relying on 4.1 machine type that is about to
be disabled
* Fix off-by-1 in deprecation/removal logic for versioned
machine types to cope with dev/rc versions
* Enable logic for disabling registration of versioned machine
types which have exceeded the 6 year lifetime policy.
* Add automated version information to documentation about which
versioned machine types are deprecated and removed
* tag 'docs-dep-pull-request' of https://gitlab.com/berrange/qemu:
include/hw/boards: add warning about changing deprecation logic
docs/about/removed-features: auto-generate a note for versioned machine types
docs/about/deprecated: auto-generate a note for versioned machine types
include/hw/boards: cope with dev/rc versions in deprecation checks
Revert "include/hw: temporarily disable deletion of versioned machine types"
tests/qtest/q35-test: Remove the obsolete test_without_smram_base test
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
block/nvme: Use host PCI MMIO API
include: Add a header to define host PCI MMIO functions
util: Add functions for s390x mmio read/write
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Fri, 9 May 2025 16:04:10 +0000 (12:04 -0400)]
Merge tag 'hw-misc-20250508' of https://github.com/philmd/qemu into staging
Misc HW patches
- Allow using plugins on BSD user-emulation
- Inline VMSTATE_CPU() macro
- Fix header includes for HVF x86
- Build hw/hyperv/ files once
- Various typo fixed
- Fix issue in i.MX I2C model
* tag 'hw-misc-20250508' of https://github.com/philmd/qemu:
hw/i2c/imx: Always set interrupt status bit if interrupt condition occurs
hw/i386/acpi-build: Fix typo and grammar in comment
hw/i386/acpi-build: Update document reference
hw/i386/acpi-build: Fix build_append_notfication_callback typo
hw/acpi/ged: Fix wrong identation
hw/pci/pcie_port: Fix pcie_slot_is_hotpluggbale_bus typo
hw/hyperv/hyperv: common compilation unit
hw/hyperv/hyperv_testdev: common compilation unit
hw/hyperv/balloon: common balloon compilation units
hw/hyperv/syndbg: common compilation unit
hw/hyperv/vmbus: common compilation unit
hw/hyperv/hyperv.h: header cleanup
hw/hyperv/hv-balloon-stub: common compilation unit
system/hvf: Expose hvf_enabled() to common code
system/hvf: Avoid including 'cpu.h'
accel/hvf: Include missing 'hw/core/cpu.h' header
target/migration: Inline VMSTATE_CPU()
qom: Factor qom_resolve_path() out
bsd-user: add option to enable plugins
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
ui/spice: support multi plane dmabuf scanout
ui/dbus: change dbus ScanoutDMABUF interface
ui/egl: support multi-plane dmabuf when egl export/import
ui/egl: use DRM_FORMAT_MOD_INVALID as default modifier
ui/egl: require EGL_EXT_image_dma_buf_import_modifiers
ui/dmabuf: extend QemuDmaBuf to support multi-plane
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Fri, 9 May 2025 14:20:40 +0000 (10:20 -0400)]
Merge tag 'edgar/xen-queue-2025-05-06.for-upstream' of https://gitlab.com/edgar.iglesias/qemu into staging
Edgars Xen queue
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# gpg: Signature made Tue 06 May 2025 13:23:55 EDT
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83
* tag 'edgar/xen-queue-2025-05-06.for-upstream' of https://gitlab.com/edgar.iglesias/qemu:
xen: mapcache: Split mapcache_grants by ro and rw
xen: mapcache: Fix finding matching entry
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
John Levon [Wed, 7 May 2025 15:20:18 +0000 (16:20 +0100)]
vfio: add vfio-pci-base class
Split out parts of TYPE_VFIO_PCI into a base TYPE_VFIO_PCI_BASE,
although we have not yet introduced another subclass, so all the
properties have remained in TYPE_VFIO_PCI.
Note that currently there is no need for additional data for
TYPE_VFIO_PCI, so it shares the same C struct type as
TYPE_VFIO_PCI_BASE, VFIOPCIDevice.
Originally-by: John Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-14-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
John Levon [Wed, 7 May 2025 15:20:16 +0000 (16:20 +0100)]
vfio: add region info cache
Instead of requesting region information on demand with
VFIO_DEVICE_GET_REGION_INFO, maintain a cache: this will become
necessary for performance for vfio-user, where this call becomes a
message over the control socket, so is of higher overhead than the
traditional path.
We will also need it to generalize region accesses, as that means we
can't use ->config_offset for configuration space accesses, but must
look up the region offset (if relevant) each time.
Originally-by: John Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-12-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
John Levon [Wed, 7 May 2025 15:20:15 +0000 (16:20 +0100)]
vfio: add device IO ops vector
For vfio-user, device operations such as IRQ handling and region
read/writes are implemented in userspace over the control socket, not
ioctl() to the vfio kernel driver; add an ops vector to generalize this,
and implement vfio_device_io_ops_ioctl for interacting with the kernel
vfio driver.
Originally-by: John Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-11-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
John Levon [Wed, 7 May 2025 15:20:10 +0000 (16:20 +0100)]
vfio: consistently handle return value for helpers
Various bits of code that call vfio device APIs should consistently use
the "return -errno" approach for passing errors back, rather than
presuming errno is (still) set correctly.
Tomita Moeko [Mon, 5 May 2025 17:03:05 +0000 (01:03 +0800)]
vfio/igd: Remove generation limitation for IGD passthrough
Starting from Intel Core Ultra Series (Meteor Lake), Data Stolen Memory
has became a part of LMEMBAR (MMIO BAR2) [1][2], meaning that BDSM and
GGC register quirks are no longer needed on these platforms.
To support Meteor/Arrow/Lunar Lake and future IGD devices, remove the
generation limitation in IGD passthrough, and apply BDSM and GGC quirks
only to known Gen6-12 devices.
Tomita Moeko [Mon, 5 May 2025 17:03:04 +0000 (01:03 +0800)]
vfio/igd: Only emulate GGC register when x-igd-gms is set
x-igd-gms is used for overriding DSM region size in GGC register in
both config space and MMIO BAR0, by default host value is used.
There is no need to emulate it in default case.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-9-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:03 +0000 (01:03 +0800)]
vfio/igd: Allow overriding GMS with 0xf0 to 0xfe on Gen9+
On Gen9 and later IGD devices, GMS 0xf0 to 0xfe represents 4MB to 60MB
pre-allocated memory size in 4MB increments. Allow users overriding
GMS with these values.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-8-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:02 +0000 (01:03 +0800)]
vfio/igd: Enable OpRegion by default
As the presence of OpRegion is used to detect IGD device now, and
guest driver usually depends on OpRegion to work. Enable OpRegion
on IGD devices by default for out-of-the-box passthrough experience
(except pre-boot display output), especially for libvirt users.
Example of IGD passthrough with libvirt:
<hostdev mode="subsystem" type="pci" managed="yes">
<source>
<address domain="0x0000" bus="0x00" slot="0x02" function="0x0"/>
</source>
<rom file="/path/to/igd/rom"/>
<address type="pci" domain="0x0000" bus="0x00" slot="0x02" function="0x0"/>
</hostdev>
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-7-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:01 +0000 (01:03 +0800)]
vfio/igd: Check OpRegion support on GVT-g mdev
The Intel GVT-g backend `kvmgt` always emulates OpRegion for vGPU,
make sure the OpRegion is present for enabling access to it
automatically later.
Also, hotplugging GVT-g vGPU is now always disallowed regardless of
OpRegion to prevent potential issues. Intel has never claimed support
for GVT-g hotplugging.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-6-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:00 +0000 (01:03 +0800)]
vfio/igd: Check vendor and device ID on GVT-g mdev
Check the vendor and device ID on GVT-g mdev to ensure it is a supported
device [1]. This extra check is required for automatically enabling
OpRegion access later.
Note that Cherryview and Gemini Lake are marked as supported here since
current code cannot distinguish them with other Gen8 and Gen9 devices.
Since mdev cannot be created on these devices, this has no functional
impact.
Tomita Moeko [Mon, 5 May 2025 17:02:59 +0000 (01:02 +0800)]
vfio/igd: Detect IGD device by OpRegion
There is currently no straightforward way to distinguish if a Intel
graphics device is IGD or discrete GPU. However, only IGD devices have
OpRegion. Use the presence of VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
to identify IGD devices. Still, OpRegion on hotplugged IGD device is
not supported.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-4-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:02:58 +0000 (01:02 +0800)]
vfio/igd: Always emulate ASLS (OpRegion) register
ASLS register represents the base address of OpRegion, and it is
programmed with HPA. In IGD passthrough scenario, it needs to be
reprogrammed with GPA by guest firmware. To prevent guest accessing
wrong memory range, ASLS should always be emulated and cleared.
In GVT-g scenario, emulating ASLS is unnecessary as access is handled
by kvmgt backend [1].
Tomita Moeko [Mon, 5 May 2025 17:02:57 +0000 (01:02 +0800)]
vfio/igd: Restrict legacy mode to Gen6-9 devices
Intel only provides legacy VBIOS for IGD up to Gen9, and there is no
CSM support on later devices. Additionally, Seabios can only handle
32-bit BDSM register used until Gen9. Since legacy mode requires VGA
capability, restrict it to Gen6 through Gen9 devices.
Steve Sistare [Fri, 2 May 2025 14:22:38 +0000 (07:22 -0700)]
vfio/container: ram discard disable helper
Define a helper to set ram discard disable, generate error messages,
and cleanup on failure. The second vfio_ram_block_discard_disable
call site now performs VFIO_GROUP_UNSET_CONTAINER immediately on failure,
instead of relying on the close of the container fd to do so in the kernel,
but this is equivalent.
Thomas Huth [Thu, 8 May 2025 18:09:18 +0000 (20:09 +0200)]
tests/functional: Use -no-shutdown in the hppa_seabios test
qemu-system-hppa shuts down automatically when the BIOS is
unable to boot from any device. So this test currently fails
occasionally when QEMU already quit, but the test still
expected it to be around (e.g. to shut it down cleanly).
Adding a "-no-shutdown" seems to make it reliable.
While we're at it, also remove the stray "self.machine" in
there that does not have any purpose.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id: 20250508180918.228757-1-thuth@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
include/hw/boards: add warning about changing deprecation logic
If we change the deprecation logic in include/hw/boards.h, we must make
a corresponding change to docs/conf.py and docs/about/deprecated.rst.
Add comments to these files as a warning to future maintainers to keep
these files in sync.
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
docs/about/removed-features: auto-generate a note for versioned machine types
We remove versioned machine types on a fixed schedule. This allows us
to auto-generate a paragraph in the removed-features.rst document that
always has accurate version info.
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
projects / thirdparty / qemu.git / log
