Srinivas Neeli [Mon, 8 Mar 2021 08:35:19 +0000 (14:05 +0530)]
arm64: dts: zynqmp: rtc: Update rtc calibration value
As per the design specification
"The 16-bit Seconds Calibration Value represents the number of
Oscillator Ticks that are required to measure the largest time
period that is less than or equal to 1 second.
For an oscillator that is 32.768 KHz, this value will be 0x7FFF."
Michal Simek [Tue, 26 Jan 2021 14:59:59 +0000 (15:59 +0100)]
arm64: versal: zynqmp: Add support for VPXA2785
VPXA2785(vp-x-a2785-00) is evaluation board which contains two PCIe-Edge
fingers, one for PCIe-B(gen5x8) and one for CPM(dual gen5x8, gen5x16).
Each of the ports can operate in endpoint or root port mode. This allows
the single card to be used for both root port, endpoint, and switch modes.
The board is designed in the similar manner as others Versal boards. It
means board also have ZynqMP Zu4 System Controller which is described in a
separate file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 19 Jan 2021 14:00:45 +0000 (15:00 +0100)]
arm64: versal: zynqmp: Add support for vpk120
Add support for Versal premium evaluation board vpk120.
Board contains two systems. The primary is Versal VP1202 ACAP device and
the secondary is ZynqMP zu4 which acts as system controller.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 26 Nov 2020 13:25:03 +0000 (14:25 +0100)]
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
The Linux commit f69629919942 ("dt-bindings: sram: Convert SRAM bindings to
json-schema") converted binding to yaml and some missing required
properties started to be reported. Align binding based on it.
The patch is fixing these warnings:
.../zynq-zc702.dt.yaml: sram@fffc0000: '#address-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: '#size-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: 'ranges' is a required property
>From schema: .../Documentation/devicetree/bindings/sram/sram.yaml
Michal Simek [Thu, 26 Nov 2020 13:25:04 +0000 (14:25 +0100)]
ARM: zynq: Convert at25 binding to new description on zc770-xm013
The Linux commit f8f79fa6bb25 ("dt-bindings: at25: convert the binding
document to yaml") converted binding to yaml and 3 deprecated properties
pop up.
The patch is fixing these warnings:
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'pagesize' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'size' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'address-width' is a required property
>From schema: .../Documentation/devicetree/bindings/eeprom/at25.yaml
T Karthik Reddy [Tue, 18 May 2021 14:28:02 +0000 (08:28 -0600)]
mmc: zynq_sdhci: wait till sd card detect state is stable
As per SD spec when SD host controller is reset, it takes 1000msec
to detect the card state. In case, if we enable the sd bus voltage &
card detect state is not stable, then host controller will disable
the sd bus voltage.
In case of warm/subsystem reboot, due to unstable card detect state
host controller is disabling the sd bus voltage to sd card causing
sd card timeout error. So we wait for a maximum of 1000msec to get
the card detect state stable before we enable the sd bus voltage.
This current fix is workaround for now, this needs to be analysed
further. Zynqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Michal Simek [Thu, 13 May 2021 11:58:58 +0000 (13:58 +0200)]
arm64: zynqmp: Enable EFI secure boot
Enabling EFI secure boot which is required for EBBR specification.
Enabling this will fix
"RT.SetVariable - Create one Time Base Auth Variable, the expect return
status should be EFI_SUCCESS"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The EFI_LOAD_FILE_PROTOCOL_GUID and EFI_LOAD_FILE2_PROTOCOL_GUID are needed
to complement the implementation of the LoadFile() boot service.
Remove a duplicate declaration of a variable for the
EFI_LOAD_FILE2_PROTOCOL_GUID.
Move the remaining declaration to efi_boottime.c.
Add a variable for the EFI_LOAD_FILE_PROTOCOL_GUID.
efi_loader: resequence functions in efi_boottime.c
For implementing support for the EFI_LOAD_FILE_PROTOCOL in the LoadImage()
service we will have to call the LocateDevicePath() service. To avoid a
forward declaration resequence the functions.
U-Boot expects to be linked to a specific hard-coded address and to
be loaded to and run from that address. CONFIG_POSITION_INDEPENDENT
config lifts that restriction & allowing the code to be loaded to
and executed from almost any address.
As we enabled CONFIG_POSITION_INDEPENDENT, CONFIG_INIT_SP_RELATIVE
is enabled by default, where it will set the early stack pointer at
runtime by adding an offset value to &_bss_start. The offset value
is taken from SYS_INIT_SP_BSS_OFFSET.
SYS_INIT_SP_BSS_OFFSET offset should be large enough so that the
early malloc region, global data (gd), and early stack should fit.
With commit d8fabcc424bd ("arm64: versal: Increase SYS_MALLOC_F_LEN")
SYS_MALLOC_F_LEN is increased from 32KB to 1MB, so we need to
accommodate this space with SYS_INIT_SP_BSS_OFFSET. Hence increasing
SYS_INIT_SP_BSS_OFFSET to 1.5MB.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
arm64: versal: Disable unnecessary configs from OSPI mini config
Disable ZYNQMP_FIRMWARE and GPIO from the OSPI mini config. Also there
are no OSPI parts from couple of manufacturers like SPANSION, SST and
WINBOND. Disable them to save some size of the mini u-boot.
spi: cadence_qspi: Enable linear mode in mini u-boot
OSPI writes are done using direct access(DAC) mode with AHB bus. This needs
linear mode to be enabled. In case of full U-Boot linear mode is enabled
using xilinx_pm_request() calls. But in mini u-boot it will not work
since ZYNQMP_FIRMWARE will not be enabled.
Tried enabling ZYNQMP_FIRMWARE, ZYNQMP_IPI and MAILBOX to make
xilinx_pm_request() working for mini U-Boot as well but it is getting
hung somewhere before it comes to the prompt. This needs to be debugged
later.
For now add condition to call xilinx_pm_request() only if ZYNQMP_FIRMWARE
is enabled in config.
Enable linear mode using register writes. Also remove ZYNQMP_FIRMWARE from
Kconfig as a dependency.
arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.
arm64: zynqmp: Uncomment iommus for zynqmp_dpdma and zynqmp_dpsub
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.
spi: cadence_qspi: Add support for ospi dual stacked
Add support for ospi dual stacked flash configuration.
Read "is-stacked" property from dt and export it to spi-nor framework
via slave->option. Based on the address/offset spi-nor framework will
populate CS through flags for read, write and erase functions.
configure chip select in cadence_qspi driver based on the flags
received from spi-nor framework.
mmc: zynq_sdhci: Use xilinx pm request instead of mmio_write call
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set
tapdelay values. Use xilinx_pm_request() using appropriate arguments
to set input/output tapdelays for zynqmp. Where tapdelay setting is
done by firmware. Host driver should explicitly request DLL reset
before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues
in some cases. Also handle error return where possible.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
set_delay() function is from sdhci host ops, which does not return
any error case due to void return type. Where
arasan_sdhci_set_tapdelay() from arasan sdhci driver returns error
when there is a failure. So set return type to set_delay().
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Simon Glass [Tue, 16 Feb 2021 00:08:11 +0000 (17:08 -0700)]
libfdt: Check for multiple/invalid root nodes
It is possible to construct a devicetree blob with multiple root nodes.
Update fdt_check_full() to check for this, along with a root node with an
invalid name.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Bruce Monroe <bruce.monroe@intel.com> Reported-by: Arie Haenel <arie.haenel@intel.com> Reported-by: Julien Lenoir <julien.lenoir@intel.com>
State: upstream (124c255731c76a2b09587378b2bcce561bcd3f2d)
Simon Glass [Tue, 16 Feb 2021 00:08:09 +0000 (17:08 -0700)]
image: Adjust the workings of fit_check_format()
At present this function does not accept a size for the FIT. This means
that it must be read from the FIT itself, introducing potential security
risk. Update the function to include a size parameter, which can be
invalid, in which case fit_check_format() calculates it.
For now no callers pass the size, but this can be updated later.
Also adjust the return value to an error code so that all the different
types of problems can be distinguished by the user.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Bruce Monroe <bruce.monroe@intel.com> Reported-by: Arie Haenel <arie.haenel@intel.com> Reported-by: Julien Lenoir <julien.lenoir@intel.com>
State: upstream (c5819701a3de61e2ba2ef7ad0b616565b32305e5)
Simon Glass [Tue, 16 Feb 2021 00:08:06 +0000 (17:08 -0700)]
fit: Don't allow verification of images with @ nodes
When searching for a node called 'fred', any unit address appended to the
name is ignored by libfdt, meaning that 'fred' can match 'fred@1'. This
means that we cannot be sure that the node originally intended is the one
that is used.
Disallow use of nodes with unit addresses.
Update the forge test also, since it uses @ addresses.
CVE-2021-27138
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Bruce Monroe <bruce.monroe@intel.com> Reported-by: Arie Haenel <arie.haenel@intel.com> Reported-by: Julien Lenoir <julien.lenoir@intel.com>
State: upstream (79af75f7776fc20b0d7eb6afe1e27c00fdb4b9b4)
Simon Glass [Tue, 16 Feb 2021 00:08:05 +0000 (17:08 -0700)]
fdt_region: Check for a single root node of the correct name
At present fdt_find_regions() assumes that the FIT is a valid devicetree.
If the FIT has two root nodes this is currently not detected in this
function, nor does libfdt's fdt_check_full() notice. Also it is possible
for the root node to have a name even though it should not.
Add checks for these and return -FDT_ERR_BADSTRUCTURE if a problem is
detected.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Bruce Monroe <bruce.monroe@intel.com> Reported-by: Arie Haenel <arie.haenel@intel.com> Reported-by: Julien Lenoir <julien.lenoir@intel.com>
State: upstream (8a7d4cf9820ea16fabd25a6379351b4dc291204b)
Some ARMv7 boards using PSCI require to be in secure-mode when booted via
'bootz' or 'bootm'. During distro-boot 'bootefi bootmgr' is called to check
if booting via UEFI is possible.
With the change we change the switch from secure mode to non-secure mode is
moved from the UEFI subsystem setup to just before calling StartImage().
Cc: Jernej Škrabec <jernej.skrabec@gmail.com>
Reported by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
State: upstream (82d01f04facef1276cede067efd02d2a731ffe83)
* apply U-Boot's fix-ups to the a device-tree
* let U-Boot make memory reservations according to the device-tree
* install the device-tree as a configuration table
Up to now the bootefi command used the last file loaded to determine the
boot partition. This has led to errors when the fdt had been loaded from
another partition after the EFI binary.
Before setting the boot device from a loaded file check if it is a PE-COFF
image or a FIT image.
For a PE-COFF image remember address and size, boot device and path.
For a FIT image remember boot device and path.
If the PE-COFF image is overwritten by loading another file, forget it.
Do not allow to start an image via bootefi which is not the last loaded
PE-COFF image.
Currently when executing 'bootefi hello' we copy helloworld.efi to the
address identified by environment variable loadaddr. This is unexected
behavior for a user. There is no need to copy helloworld.efi before
executing it after relocation.
arm64: zynqmp: Fix application loading on R5 core1
From U-Boot, loading application on RPU core 0 is fine but loading on
core 1 is not handled properly. Lock-step mode needs both the R5 cores
to be initialized and it is working fine. Whereas in SPLIT mode individual
R5 cores needs to be initialized as they need to execute differenet
applications. Handle both these lock-step and split modes by propagating
mode and RPU core number(4 for RPU0 and 5 for RPU1) for various functions
and by adding conditions in those functions.
With the updates in framework, 'regulator-boot-on' property is not enough
to keep the regulator on, when no one is registered through the regulator
framework. We need to keep the outputs on, regardless of the consumers
as these ouptuts are controlled through a separate device called
'Sequencer' on these boards.
So, add 'regulator-always-on' which makes the num_users count to '1'
and prevents disabling the output during cleanup call of framework.
arm64: zynqmp: Add label to all GPIO lines for VCK190 SC
Add label to GPIO lines so the user-level applications can find any line
without knowing its physical path on System Controller on VCK190/VMK180.
These labels are describing EMIO gpio connection which depends on PL which
we normally don't describe but that's only way to go for now. Lately this
should be done out of this source code.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 7 Apr 2021 15:08:13 +0000 (17:08 +0200)]
arm64: zynqmp: Separate SMK-K26 from SM-K26
Starter kit has sdhci0 disabled in HW that's why create separate it from
each other. Issue is if HW disable clk for this IP but IP is enabled in DT
u-boot is trying to access that regs and fails.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Now it results in 2 slave devices with same address (0x50)
on the I2C bus, making the communication un-reliable.
When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux
channel output is disconnected, making none of the channels
available to the I2C1. So, there is no question of having the
same addressed slave (0x50) present on the bus when we are doing '2'.
Michal Simek [Tue, 6 Apr 2021 12:52:58 +0000 (14:52 +0200)]
arm64: zynqmp: Squashed revB for k26 with revA
K26 has two variants with and without EMMC. SM-K26 is board with EMMC on it
and SMK-K26 is board without EMMC. The same DT can be used for both. The
only difference is if you can access that memory or not.
Compatible string is extended to also cover SMK versions of this board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch update the spi-tx-bus-width property to 8 for OSPI flash.
SPI based Linux driver is dependent on 'spi-tx-bus-width' property
to operate in Octal SPI mode.
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Currently u-boot supports addresses upto 39-bits only. If anybody
wants to use addresses of more than 39-bits in Linux they will have
a separate memory node in DT. In such cases they will have multiple
memory nodes.
Currently u-boot selects and runs on lower memory bank region.
But bootscript is being loaded on dram bank 0, where dram bank 0 will
point to 1st memory node in DT. If first memory node is mentioned as
higher ddr(>39-bits address) then u-boot cannot load the bootscript.
So fix this issue by setting bootscript address within the lower memory
bank region.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
T Karthik Reddy [Wed, 31 Mar 2021 05:24:58 +0000 (23:24 -0600)]
xilinx: zynq: Add usb dfu/thor distro boot support
Add support for usb dfu & thor to distro boot on zynq platform.
Add 60s timeout of dfu-utils to start transaction. Remove
DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram.
Remove DFU_ALT_INFO_MMC as part of distro boot cleanup.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 31 Mar 2021 05:24:57 +0000 (23:24 -0600)]
xilinx: versal: Add usb dfu/thor distro boot support
Change "dfu_usb" to "usb_dfu" for better representation and change
required macros. Add 60s timeout of dfu-utils to start transaction.
Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM
as we use bootcmd_usb_dfu instead of dfu_ram.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 25 Mar 2021 08:55:30 +0000 (09:55 +0100)]
xilinx: zynqmp: Remove dfu_ram_info setup
The dfu ram info is wired in connection to Linux kernel and certain setup.
We should change this to be more generic as others command. That's why
using boot via script is the way to go.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Thu, 25 Mar 2021 05:37:57 +0000 (23:37 -0600)]
xilinx: zynqmp: Add usb dfu/thor distro boot support
In usb boot mode distro boot should select usb device as primary boot
device instead of usb host. So make usb dfu as primary boot device. But do
not list it in boot_targets as fallback option because it is not classic
mode for booting. Using 60s timeout by default should be enough time for
dfu-utils to start transaction. In case none needs this please change
timeout value in the command or disable CONFIG_DFU_TIMEOUT.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 31 Mar 2021 07:05:52 +0000 (09:05 +0200)]
cmd: dfu: Propagate error if dfu gadget fails
On systems without usb gadget dfu core fails which was reported by error
but command itself returns pass which breaks any usage in a script.
That's why propagate error from run_usb_dnl_gadget().
Fixes: 16297cfb2a20 ("usb: new board-specific USB init interface") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Saeed Nowshadi [Mon, 22 Mar 2021 18:58:38 +0000 (11:58 -0700)]
arm64: zynqmp: Add 'silabs,skip-recall' to DDR DIMM si570 clk node
The 'silabs,skip-recall' property prevents interruption in operation of
the clock while the driver is being probed. Without this property, the
DDR DIMM clk can cause a failure during Versal's boot.
Dylan Yip [Wed, 10 Mar 2021 09:47:41 +0000 (01:47 -0800)]
arm64: zynqmp: Update ZynqMP DP entry
As per Linux commit d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx
ZynqMP DisplayPort Subsystem"), the dt entry for ZynqMP DP is slightly
different compared to the downstream driver. This patch updates the dt
entry to the new dt bindings.
Also add xlnx-zynqmp-dpdma.h header.
Signed-off-by: Dylan Yip <dylan.yip@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dylan Yip [Wed, 10 Mar 2021 09:47:40 +0000 (01:47 -0800)]
arm64: zynqmp: Update DPDMA entry
As per Linux commit 7cbb0c63de3f ("dmaengine: xilinx: dpdma: Add the Xilinx
DisplayPort DMA engine driver"), the dt entry for the ZynqMP DPDMA has been
modified. So update the dt entry per the new dt bindings.
Signed-off-by: Dylan Yip <dylan.yip@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Brandon Maier [Wed, 20 Jan 2021 20:28:30 +0000 (14:28 -0600)]
spi: zynqmp_gqspi: fix set_speed bug on multiple runs
If zynqmp_qspi_set_speed() is called multiple times with the same speed,
then on the second call it will skip recalculating the baud_rate_val as
it assumes the speed is already configured correctly. But it will still
write the baud_rate_val to the configuration register and call
zynqmp_gqspi_set_tapdelay(). Because it skipped recalculating the
baud_rate_val, it will use the initial value of 0 . This causes the
driver to run at maximum speed which for many spi flashes is too fast and
causes data corruption.
Instead only write out a new baud_rate_val if we have calculated the
correct baud_rate_val.
This opens up another issue with the "if (speed == 0)", we don't save
off the new plat->speed_hz value when setting the baud rate on the
speed=0 path. Instead mimic what the Linux zynqmp gqspi driver does, and
have speed==0 just use the same calculation as a normal speed. That will
cause the baud_rate_val to use the slowest speed possible, which is the
safest option.
Michal Simek [Thu, 11 Mar 2021 14:33:25 +0000 (15:33 +0100)]
xilinx: Sync DTs for GTRs with Linux kernel
There are several changes which happen in mainline kernel which should get
also to U-Boot. Here is the list of patches from the kernel:
- arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
- arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
- arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
- arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
but also some other changes have been done.
- Remove USB3.0 serdes configurations
- Remove SATA serdes configuration for zc1232
- Remove comments about sgmii from a2197* boards
- Update all files with psgtr which are not upstream yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 21 Jan 2021 10:26:55 +0000 (11:26 +0100)]
arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis
Add missing xlnx,mio-bank property to sdhci nodes. Also add properties with
0 value to have it listed in case that files are copied to different
projects where default case doesn't need to be handled in the same way.
That's why explicitly list them too.
Michal Simek [Tue, 9 Mar 2021 11:43:42 +0000 (12:43 +0100)]
arm64: zynqmp: Add missing silabs,skip-recall for si570 ref clk nodes
All si570 which are used for ps reference clock generation should contain
silabls,skip-recall property not to cause break on ps clock.
On Versal boards this will cause hang on Versal cpu when it is booted at
the same time with SC.
On zcu670 this can cause PS hang that's why add it for sure.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Jul 2020 09:44:43 +0000 (11:44 +0200)]
arm64: zynqmp: Add support for K26 and KV260
Add support for K26 and KV260
The support is split to 4 files for the following reason.
-k26-revA.dts - This is base DTS file which describes only SOM with
few exceptions.
a) GPIOs
b) uart at MIO34/MIO35
c) Aliases are filled even by IPs which are not enabled to have consistent
numbering scheme
-k26-revA-u-boot.dts - DTS file which targets only U-Boot project and
which is automatically pick up by u-boot at build time. It enables SD card
which is available on CC and it disable all HS modes capabilities to make
sure that u-boot is capable to read data from SD without a need to setup
tap delays for custom CCs.
-kv260-revA.dts - it is device tree overlay automatically built as dtbo
which describes CC and all features on it.
-kv260-revA-pl.dts - ML Vision description for hardware i2c switch which is
connected to PL. As of today it is here just for reference that there is a
node which needs to be described and handled by SW.
Pincntrl description is not present but it could come in future especially
in connection to SD card connection.
There is also high chance that there is going to be a need to detect CC
from u-boot that's why u-boot DTS could also contain eeprom available at CC
for detection. It doesn't need to be there but it is good to list it not to
go around driver model in u-boot.
For checking DTBo fdtoverlay command can be used to make sure that base DT
and overlays are compatible to each other:
fdtoverlay -v -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \
arch/arm/dts/zynqmp-sk-kv260-revA.dtbo -o /tmp/1.dtb
For building u-boots dtb file just run make.
For building Linux dtb files don't include u-boot.dtsi in build
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Christian Kohn [Sat, 30 Jan 2021 02:37:25 +0000 (18:37 -0800)]
arm64: zynqmp: Add labels to DPSub vid and gfx layers
For the SOM aa2 use case where the video mixer PL IP is connected to the DP
subsystem, the video layer needs to be referenced from a dt overlay. Hence,
add labels for the video and graphics layers in the dpsub node.
Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Michal Simek [Mon, 5 Oct 2020 07:35:40 +0000 (09:35 +0200)]
arm64: zynqmp: Add support for SVD devices
SVD are using different name which can't be handled via zynqmp_devices
structure. That's why introduce zynqmp_detect_svd_name() which checks ID
code for these devices and show proper name for them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 18 Jan 2021 12:58:39 +0000 (13:58 +0100)]
arm64: zynqmp: Add support for zcu670-revA board
The board is sharing a lot of components with zcu208 but it contains
differet silicon and also several components are done differently.
The board has 4GB memory connected to PS and additional 4GB connected to
PL. Compare to zcu208 sata support has been dropped and only USB3.0 is
using GTR (lane2). Others GTRs are routed to connectors.
MIO configuration is also shared with zcu111.
The board is using si5381 chip compare to si5341 which is normally used.
And as of now there is no Linux driver for this chip. PS reference clock is
generated out of si570 chip which is also new approach compare to zcu208.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 16 Mar 2021 12:44:58 +0000 (13:44 +0100)]
arm64: versal: Define zynqmp_mmio_write() for versal
GQSPI driver is using it but this function is never called for Versal
because it is removed by linker. But function should be declared to avoid
this build warning:
drivers/spi/zynqmp_gqspi.c: In function 'zynqmp_qspi_set_tapdelay':
drivers/spi/zynqmp_gqspi.c:378:3: warning: implicit declaration of function
'zynqmp_mmio_write' [-Wimplicit-function-declaration]
378 | zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST,
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 16 Mar 2021 07:17:15 +0000 (08:17 +0100)]
arm64: versal: Rename bus busses to be align with simple-bus yaml
The same change has been done in Linux for Zynq and ZynqMP. Also add gic to
the same bus with other nodes to avoid issues reported on ZynqMP. For more
information please take a look at links below.
Michal Simek [Thu, 26 Nov 2020 13:25:01 +0000 (14:25 +0100)]
ARM: zynq: Rename bus to be align with simple-bus yaml
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."
Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml
Similar change has been done for Xilinx ZynqMP SoC.
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
Robert Hancock [Thu, 11 Mar 2021 22:55:50 +0000 (16:55 -0600)]
net: gem: Fix setting PCS auto-negotiation state
The code was trying to disable PCS auto-negotiation when a fixed-link node
is present and enable it otherwise. However, the PCS registers were being
written before the PCSSEL bit was set in the network configuration
register, and it appears that in this state, PCS register writes are
ignored. The result is that the intended change only took effect on the
second network operation that was performed, since at that time PCSSEL is
already enabled.
Fix the order of register writes so that PCS registers are only written to
after the PCS is enabled.
Fixes: 26e62cc971 ("net: gem: Disable PCS autonegotiation in case of fixed-link") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 17 Mar 2021 07:01:52 +0000 (01:01 -0600)]
microblaze: Make extended addressing support default
Axi qspi controller supports 32-bit & 24-bit addressing modes
for micron, macronix & spansion flash parts. But for winbond
flashes it only supports 24-bit addressing mode.
Enable CONFIG_SPI_FLASH_BAR to use extended addressing mode
to make 32-bit addressing mode work on all flashes.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
T Karthik Reddy [Wed, 17 Mar 2021 07:01:51 +0000 (01:01 -0600)]
spi: xilinx_spi: Add support for spi memory operations
Add support for spi memory operations for xilinx AXI qspi driver.
This provides an high-level interface to execute SPI memory
operations by the controller.
Remove existing spi transfer based implementation and use
spi memory based exec_op() implementation for qspi IO operations.
Simplified existing startup_block implementation.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
projects / thirdparty / u-boot.git / log
