Ian Lance Taylor [Fri, 17 Feb 2017 15:43:39 +0000 (15:43 +0000)]
libgo: update to final Go 1.8 release
Along with the update this fixes a problem that was always present but
only showed up with the new reflect test. When a program used a
**unsafe.Pointer and stored the value in an interface type, the
generated type descriptor pointed to the GC data for *unsafe.Pointer.
It did that by name, but we were not generating a variable with the
right name.
A cast from float to double should turn a signaling NaN into a quiet
NaN, if using -fsignaling-nans. On PowerPC single-precision floats are
stored as double precision in registers, and so, the cast normally does
nothing. This causes gcc.dg/pr59833.c to fail (it does such a cast,
and expects a quiet NaN as output).
This patch adds a new pattern, used with -fsignaling-nans in effect,
that creates an frsp instruction (or xsrsp) in this case. Since the
input already is SFmode, that instruction turns signaling NaNs into
quiet NaNs and does nothing more.
* config/rs6000/rs6000.md (extendsfdf2): Remove default arguments.
If HONOR_SNANS (SFmode) force the input to a register.
(*extendsfdf2_fpr): Add !HONOR_SNANS (SFmode) condition.
(*extendsfdf2_snan): New pattern, used when using SNaNs; it generates
an frsp or similar insn.
testsuite: pr59833.c and pr61441.c should use -fsignaling-nans
The testcases pr59833.c and pr61441.c check whether signaling NaNs as
input to some operation result in quiet NaNs. Without -fsignaling-nans
this is not guaranteed to happen. So, this patch add this option to
these testcases.
* gcc.dg/pr59833.c: Add -fsignaling-nans to options.
* gcc.dg/pr61441.c: Ditto.
Martin Liska [Fri, 17 Feb 2017 14:36:08 +0000 (15:36 +0100)]
Introduce ssa_defined_default_def_p function (PR tree-optimization/79529).
2017-02-17 Martin Liska <mliska@suse.cz>
PR tree-optimization/79529
* tree-ssa-loop-unswitch.c (is_maybe_undefined): Use
ssa_defined_default_def_p to handle cases which are implicitly
defined.
* tree-ssa.c (ssa_defined_default_def_p): New function.
(ssa_undefined_value_p): Use ssa_defined_default_def_p to handle cases
which are implicitly defined.
* tree-ssa.h (ssa_defined_default_def_p): Declare.
Alan Modra [Thu, 16 Feb 2017 22:56:51 +0000 (09:26 +1030)]
re PR rtl-optimization/79286 (ira and lra wrong code at -O2 and -Os on i686-linux)
2017-02-16 Alan Modra <amodra@gmail.com>
PR rtl-optimization/79286
* ira.c (def_dominates_uses): New function.
(update_equiv_regs): Don't create an equivalence for insns that
may trap where the register def does not dominate the use.
Jakub Jelinek [Thu, 16 Feb 2017 12:02:24 +0000 (13:02 +0100)]
re PR c++/79512 (ICE: Segfault in gimple_build_call_1, at gimple.c:218)
PR c++/79512
c/
* c-parser.c (c_parser_omp_target): For -fopenmp-simd
ignore #pragma omp target even when not followed by identifier.
cp/
* parser.c (cp_parser_omp_target): For -fopenmp-simd
ignore #pragma omp target even when not followed by identifier.
testsuite/
* c-c++-common/gomp/pr79512.c: New test.
Richard Biener [Thu, 16 Feb 2017 07:53:53 +0000 (07:53 +0000)]
graphite.h: Do not include isl/isl_val_gmp.h, instead include isl/isl_val.h.
2017-02-16 Richard Biener <rguenther@suse.de>
* graphite.h: Do not include isl/isl_val_gmp.h, instead include
isl/isl_val.h.
* graphite-isl-ast-to-gimple.c (gmp_cst_to_tree): Remove.
(gcc_expression_from_isl_expr_int): Use generic isl_val interface.
* graphite-sese-to-poly.c: Do not include isl/isl_val_gmp.h.
(isl_val_int_from_wi): New function.
(extract_affine_gmp): Rename to ...
(extract_affine_wi): ... this, take a widest_int.
(extract_affine_int): Just wrap extract_affine_wi.
(add_param_constraints): Use isl_val_int_from_wi.
(add_loop_constraints): Likewise, and extract_affine_wi.
Jason Merrill [Wed, 15 Feb 2017 20:29:08 +0000 (15:29 -0500)]
PR c++/79464 - ICE in IPA with omitted constructor parms
* class.c (build_clone): Also omit parms from TYPE_ARG_TYPES.
(adjust_clone_args): Adjust.
(add_method): Remember omitted parms.
* call.c (add_function_candidate): Likewise.
* mangle.c (write_method_parms): Likewise.
* method.c (ctor_omit_inherited_parms): Return false if there are no
parms to omit.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r245495
Jakub Jelinek [Wed, 15 Feb 2017 17:10:40 +0000 (18:10 +0100)]
re PR c++/79301 (With -Werror=pedantic outside C++17 mode, __has_cpp_attribute(fallthrough) is nonzero but [[fallthrough]] fails)
PR c++/79301
* parser.c (cp_parser_std_attribute): Don't pedwarn about
[[deprecated]] with -std=c++11 and [[fallthrough]] with
-std=c++11 and -std=c++14.
* g++.dg/cpp1y/feat-cxx11-neg.C: Remove (with pedwarn) from
[[deprecated]] comment.
* g++.dg/cpp1y/feat-cxx98-neg.C: Likewise.
* g++.dg/cpp1y/feat-cxx11.C: Likewise.
* g++.dg/cpp1y/attr-deprecated-neg.C: Don't expect warnings for
[[deprecated]] in -std=c++11.
* g++.dg/cpp0x/fallthrough2.C: Don't expect warnings for
[[fallthrough]] in -std=c++11 and -std=c++14.
Tim Shen [Wed, 15 Feb 2017 07:38:20 +0000 (07:38 +0000)]
re PR libstdc++/79513 (std::visit doesn't handle references)
PR libstdc++/79513
* include/std/variant (visit()): Forward variant types to the return
type detection code.
* testsuite/20_util/variant/compile.cc: Add test cases.
Andrew Pinski [Wed, 15 Feb 2017 00:09:28 +0000 (00:09 +0000)]
aarch64-cores.def (thunderx2t99): Move to under 'C" cores and change the partno/implementer to be correct.
2017-02-14 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def (thunderx2t99): Move to under 'C"
cores and change the partno/implementer to be correct.
(thunderx2t99p1): New core which replaces thunderx2t99 and still has
the 'B" as the implementer.
* config/aarch64/aarch64-tune.md: Regenerate.
Carl Love [Tue, 14 Feb 2017 23:11:19 +0000 (23:11 +0000)]
rs6000.c: Add case statement entry to make the xvcvuxdsp built-in argument unsigned.
gcc/ChangeLog:
2017-02-14 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000.c: Add case statement entry to make the
xvcvuxdsp built-in argument unsigned.
* config/rs6000/vsx.md: Fix the source and return operand types so they
match the instruction definitions from the ISA document. Fix typo
in the instruction generation for the (define_insn "vsx_xvcvuxdsp"
statement.
gcc/testsuite/ChangeLog:
2017-01-14 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/vsx-builtin-3.c: Add missing test case for the
xvcvsxdsp and xvcvuxdsp instructions.
Vladimir Makarov [Tue, 14 Feb 2017 22:17:19 +0000 (22:17 +0000)]
re PR target/79282 ([7 Regresion] FAIL: gcc.target/arm/neon-for-64bits-1.c scan-assembler-times vshr 0)
2017-02-14 Vladimir Makarov <vmakarov@redhat.com>
PR target/79282
* lra-int.h (struct lra_operand_data, struct lra_insn_reg): Add
member early_clobber_alts.
* lra-lives.c (reg_early_clobber_p): New.
(process_bb_lives): Use it.
* lra.c (new_insn_reg): New arg early_clobber_alts. Use it.
(debug_operand_data): Initialize early_clobber_alts.
(setup_operand_alternative): Set up early_clobber_alts.
(collect_non_operand_hard_regs): Ditto. Pass early clobber
alternatives to new_insn_reg.
(add_regs_to_insn_regno_info): Add arg early_clobber_alts. Use
it.
(lra_update_insn_regno_info): Pass the new arg.
H.J. Lu [Tue, 14 Feb 2017 16:53:22 +0000 (16:53 +0000)]
Properly store 128-bit constant in large model
When converting TI store with CONST_INT to V1TI store with CONST_VECTOR
in large model, an extra instruction may be needed to load CONST_VECTOR
into a register. Insert the extra instruction to the right place.
gcc/
PR target/79498
* config/i386/i386.c (timode_scalar_chain::convert_insn): Insert
the extra instruction to the right place to store 128-bit constant
when needed.
gcc/testsuite/
PR target/79498
* gcc.target/i386/pr79498.c: New test.
PR middle-end/79448
* gcc.dg/tree-ssa/builtin-snprintf-warn-3.c: New test.
* gcc.dg/tree-ssa/pr79448-2.c: New test.
* gcc.dg/tree-ssa/pr79448.c: New test.
gcc/ChangeLog:
PR middle-end/79448
* gimple-ssa-sprintf.c (format_directive): Avoid issuing INT_MAX
warning for strings of unknown length.
rs6000: Synchronize the --with-cpu list in config.gcc with reality
power, power2, rios, rios1, rios2, rsc, rsc2 support was removed.
rs64a never was a supported option; it's spelled rs64.
power5+ and powerpc64le are supported options but could not be set as
default.
Jeff Law [Tue, 14 Feb 2017 15:54:09 +0000 (08:54 -0700)]
re PR tree-optimization/79095 (spurious stringop-overflow warning)
PR tree-optimization/79095
* tree-vrp.c (extract_range_from_binary_expr_1): For EXACT_DIV_EXPR,
if the numerator has the range ~[0,0] make the resultant range ~[0,0].
(extract_range_from_binary_expr): For MINUS_EXPR with no derived range,
if the operands are known to be not equal, then the resulting range
is ~[0,0].
(intersect_ranges): If the new range is ~[0,0] and the old range is
wide, then prefer ~[0,0].
* tree-vrp.c (overflow_comparison_p_1): New function.
(overflow_comparison_p): New function.
* tree-vrp.c (register_edge_assert_for_2): Register additional asserts
if NAME is used in an overflow test.
(vrp_evaluate_conditional_warnv_with_ops): If the ops represent an
overflow check that can be expressed as an equality test, then adjust
ops to be that equality test.
PR tree-optimization/79095
* g++.dg/pr79095-1.C: New test
* g++.dg/pr79095-2.C: New test
* g++.dg/pr79095-3.C: New test
* g++.dg/pr79095-4.C: New test
* g++.dg/pr79095-5.C: New test
* gcc.c-torture/execute/arith-1.c: Update with more cases.
* gcc.dg/tree-ssa/pr79095-1.c: New test.
Andreas Krebbel [Tue, 14 Feb 2017 15:38:02 +0000 (15:38 +0000)]
S/390: Cleanup: Remove builtin type flags.
With the target attribute stuff the only user of the builtin types
flags value has been removed. So drop that value from the builtin
types list entirely.
gcc/ChangeLog:
2017-02-14 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Jakub Jelinek [Tue, 14 Feb 2017 08:26:26 +0000 (09:26 +0100)]
re PR tree-optimization/79408 (Missed VRP optimization of integer modulo)
PR tree-optimization/79408
* tree-vrp.c (simplify_div_or_mod_using_ranges): Handle also the
case when on TRUNC_MOD_EXPR op0 is INTEGER_CST.
(simplify_stmt_using_ranges): Call simplify_div_or_mod_using_ranges
also if rhs1 is INTEGER_CST.
Richard Biener [Tue, 14 Feb 2017 07:58:12 +0000 (07:58 +0000)]
re PR tree-optimization/79432 (ICE: verify_ssa failed)
2017-02-14 Richard Biener <rguenther@suse.de>
PR middle-end/79432
* tree-into-ssa.c (insert_phi_nodes): When the function can
have abnormal edges rewrite SSA names with broken use-def
dominance out of SSA and register them for PHI insertion.
Martin Sebor [Tue, 14 Feb 2017 04:38:54 +0000 (04:38 +0000)]
PR middle-end/79496 - call to snprintf with zero size eliminated with -Wformat-truncation=2
gcc/ChangeLog:
PR middle-end/79496
* gimple-ssa-sprintf.c (pass_sprintf_length::handle_gimple_call): Avoid
clearing info.nowrite flag when snprintf size argument is a range.
gcc/testsuite/ChangeLog:
PR middle-end/79496
* gcc.dg/tree-ssa/builtin-snprintf-2.c: New test.
Jakub Jelinek [Mon, 13 Feb 2017 19:31:14 +0000 (20:31 +0100)]
re PR c++/79232 (error: invalid rhs for gimple memory store)
PR c++/79232
* typeck.c (cp_build_modify_expr): Handle properly COMPOUND_EXPRs
on lhs that have {PRE{DEC,INC}REMENT,MODIFY,MIN,MAX,COND}_EXPR
in the rightmost operand.
* g++.dg/cpp1z/eval-order4.C: New test.
* g++.dg/other/pr79232.C: New test.
These are a runtime testcases so they should test p8vector_hw instead of
powerpc_p8vector_ok, or they will fail with an illegal instruction on
older processors.
Also they run on any PowerPC, not with just those compilers that were
configured to default to 64-bit targets.
gcc/testsuite/
* gcc.target/powerpc/vec-adde-int128.c: Use p8vector_hw instead of
powerpc_p8vector_ok.
* gcc.target/powerpc/vec-addec-int128.c: Ditto.
Jakub Jelinek [Mon, 13 Feb 2017 15:39:59 +0000 (16:39 +0100)]
re PR rtl-optimization/79388 (wrong code with -O -fno-tree-coalesce-vars)
PR rtl-optimization/79388
PR rtl-optimization/79450
* combine.c (distribute_notes): When removing TEM_INSN for which
corresponding dest has last value recorded, invalidate that last
value.
* gcc.c-torture/execute/pr79388.c: New test.
* gcc.c-torture/execute/pr79450.c: New test.
Thomas Koenig [Sun, 12 Feb 2017 16:10:22 +0000 (16:10 +0000)]
re PR fortran/65542 (SPREAD intrinsic incorrectly accepted in initialization expressions with -std=f95)
2017-02-12 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/65542
* intrinsic.c (gfc_intrinsic_func_interface): Return an error
for -std=f95 for disallowed transformational functions in
initialization expressions.
2017-02-12 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/65542
* gfortran.dg/spread_init_expr_2.f90: New test case.
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