i386: Update INCOMING_FRAME_SP_OFFSET for exception handler
Since there is an extra error code passed to the exception handler,
INCOMING_FRAME_SP_OFFSET is return address plus error code for the
exception handler. This patch updates INCOMING_FRAME_SP_OFFSET to
the correct value for the exception handler.
This patch exposed a bug in DWARF stack frame CFI generation, which
assumes that INCOMING_FRAME_SP_OFFSET is the same for all functions:
It sets and caches the incoming stack frame offset with the same
INCOMING_FRAME_SP_OFFSET for all functions. When there are both
exception handler and normal function in the same input, the wrong
incoming stack frame offset is used for exception handler or normal
function, which leads to
applied, there are no regressions on i686 and x86-64.
gcc/
PR target/79793
* config/i386/i386.c (ix86_function_arg): Update arguments for
exception handler.
(ix86_compute_frame_layout): Set the initial stack offset to
INCOMING_FRAME_SP_OFFSET. Update red-zone offset with
INCOMING_FRAME_SP_OFFSET.
(ix86_expand_epilogue): Don't pop the 'ERROR_CODE' off the
stack before exception handler returns.
* config/i386/i386.h (INCOMING_FRAME_SP_OFFSET): Add the
the 'ERROR_CODE' for exception handler.
gcc/testsuite/
PR target/79793
* gcc.dg/guality/pr68037-1.c: Update gdb breakpoints.
* gcc.target/i386/interrupt-5.c (interrupt_frame): New struct.
(foo): Check the builtin return address against the return address
in interrupt frame.
* gcc.target/i386/pr79793-1.c: New test.
* gcc.target/i386/pr79793-2.c: Likewise.
* config/i386/i386.h (ASM_PRINTF_EXTENSIONS): New macro.
(ASM_OUTPUT_REG_PUSH): Rewrite with new operand modifiers.
(ASM_OUTPUT_REG_POP): Ditto.
* config/i386/i386.c (ix86_asm_output_function_label): Use fputs
instead of asm_fprintf to output pure string.
jakub [Sat, 29 Jul 2017 07:52:16 +0000 (07:52 +0000)]
* debug.h (struct gcc_debug_hooks): Add IMPLICIT argument
to imported_module_or_decl hook.
(debug_nothing_tree_tree_tree_bool): Remove.
(debug_nothing_tree_tree_tree_bool_bool): New declaration.
* debug.c (do_nothing_debug_hooks): Use
debug_nothing_tree_tree_tree_bool_bool instead of
debug_nothing_tree_tree_tree_bool.
* vmsdbgout.c (vmsdbg_debug_hooks): Likewise.
* dbxout.c (dbx_debug_hooks, xcoff_debug_hooks): Likewise.
* sdbout.c (sdb_debug_hooks): Likewise.
* dwarf2out.c (dwarf2_lineno_debug_hooks): Likewise.
(gen_namespace_die): Add DW_AT_export_symbols attribute if
langhook wants it.
(dwarf2out_imported_module_or_decl): Add IMPLICIT argument,
if true, -gdwarf-5 and decl will have DW_AT_export_symbols
attribute, don't add anything.
cp/
* cp-objcp-common.c (cp_decl_dwarf_attribute): Handle
DW_AT_export_symbols.
* name-lookup.c (emit_debug_info_using_namespace): Add IMPLICIT
argument, pass it through to the debug hook.
(finish_namespace_using_directive): Adjust
emit_debug_info_using_namespace caller.
(push_namespace): Likewise. Call it after setting
DECL_NAMESPACE_INLINE_P.
(cp_emit_debug_info_for_using): Pass false as new argument to
the imported_module_or_decl debug hook.
fortran/
* trans-decl.c (gfc_trans_use_stmts): Pass false as new argument to
the imported_module_or_decl debug hook.
ada/
* gcc-interface/utils.c (gnat_write_global_declarations): Pass false
as new argument to the imported_module_or_decl debug hook.
testsuite/
* g++.dg/debug/dwarf2/inline-ns-1.C: New test.
* g++.dg/debug/dwarf2/inline-ns-2.C: New test.
ian [Fri, 28 Jul 2017 19:58:01 +0000 (19:58 +0000)]
compiler: add backend type conversion
Tweak Interface_field_reference_expression::do_get_backend to apply an
additional backend type conversion to the returned result. This is
needed due to the fact that the top level type of the expression is a
function descriptor, however the value being manufactured is a pointer
to <thunk-descriptor, value> struct.
ian [Fri, 28 Jul 2017 18:03:29 +0000 (18:03 +0000)]
compiler: track placeholder pointer types for conversion
We recently started walking through the hash table of pointer types to
finalize them. Unfortunately it is possible to create a new pointer
type while finalizing an existing one (test case: test/fixedbugs/issue5291)
and that breaks the iteration. So, instead, keep a list of
placeholder pointer types, and iterate through them while permitting
the list to be extended as we go.
ian [Fri, 28 Jul 2017 17:42:05 +0000 (17:42 +0000)]
compiler: use a single temporary for calls with multiple results
For calls that return multiple results we used to create a temporary
of struct type to hold the results, and also create a separate
temporary for each result. Then the call expression would copy each
result out of the struct to the temporary, and Call_result_expression
would refer to the desired temporary.
Simplify this to just use a single temporary of struct type, and
change Call_result_expression to fetch a field of the struct.
This may reduce some incorrect tree sharing in the backend code.
* tree-predcom.c: (struct chain): Handle store-store chain in which
stores for elimination only store loop invariant values.
(execute_pred_commoning_chain): Ditto.
(prepare_initializers_chain_store_elim): Ditto.
(prepare_finalizers): Ditto.
(is_inv_store_elimination_chain): New function.
(initialize_root_vars_store_elim_1): New function.
* tree-predcom.c: Revise general description of the pass.
(enum chain_type): New enum type for store elimination.
(struct chain): New field supporting store elimination.
(struct component): Ditto.
(dump_chain): Dump store-stores chain.
(release_chain): Release resources.
(split_data_refs_to_components): Compute and create component
contains only stores for elimination.
(get_chain_last_ref_at): New function.
(make_invariant_chain): Initialization.
(make_rooted_chain): Specify chain type in parameter and record it.
(add_looparound_copies): Skip for store-stores chain.
(determine_roots_comp): Compute type of chain and pass it to
make_rooted_chain.
(initialize_root_vars_store_elim_2): New function.
(finalize_eliminated_stores): New function.
(remove_stmt): Handle store for elimination.
(execute_pred_commoning_chain): Execute predictive commoning on
store-store chains.
(determine_unroll_factor): Skip unroll for store-stores chain.
(prepare_initializers_chain_store_elim): New function.
(prepare_initializers_chain): Hanlde store-store chain.
(prepare_finalizers_chain, prepare_finalizers): New function.
(tree_predictive_commoning_loop): Return integer value indicating
if loop is unrolled or lcssa form is corrupted.
(tree_predictive_commoning): Rewrite for lcssa form if necessary.
gcc/testsuite
* gcc.dg/tree-ssa/predcom-dse-1.c: New test.
* gcc.dg/tree-ssa/predcom-dse-2.c: New test.
* gcc.dg/tree-ssa/predcom-dse-3.c: New test.
* gcc.dg/tree-ssa/predcom-dse-4.c: New test.
* gcc.dg/tree-ssa/predcom-dse-5.c: New test.
* gcc.dg/tree-ssa/predcom-dse-6.c: New test.
* gcc.dg/tree-ssa/predcom-dse-7.c: New test.
* gcc.dg/tree-ssa/predcom-dse-8.c: New test.
* gcc.dg/tree-ssa/predcom-dse-9.c: New test.
* gcc.dg/tree-ssa/predcom-dse-10.c: New test.
* gcc.dg/tree-ssa/predcom-dse-11.c: New test.
* tree-predcom.c (initialize_root): Delete.
(execute_pred_commoning_chain): Initialize root vars and replace
reference of non-combined chain directly, rather than call above
function.
* tree-predcom.c (struct chain): New field init_seq.
(release_chain): Release init_seq.
(prepare_initializers_chain): Record intialization stmts in above
field.
(insert_init_seqs): New function.
(tree_predictive_commoning_loop): Call insert_init_seqs.
* match.pd: Remove superfluous :c.
* genmatch.c (simplify::id): Add member.
(lower_commutative, lower_opt_convert, lower_cond, lower_for):
Copy id.
(current_id): New global.
(dt_node::parent): Move from ...
(dt_operand::parent): ... here. Add for_id member.
(is_a_helper <dt_operand *>::test): DT_TRUE is also a dt_operand.
(decision_tree::find_node): Relax order requirement when
merging DT_TRUE nodes to ones inbetween the current simplify
and the one we try to merge with. Add diagnostic whenever
we need to enforce pattern order by not merging.
(decision_tree::insert): Set current_id.
(decision_tree::print_node): Dump parent node and for_id.
(parser::last_id): Add member.
(parser::push_simplify): Assign unique id.
(parser::parser): Initialize last_id.
Set DECL_VALUE_EXPR after a debug stmt is generated (PR sanitizer/81340).
2017-07-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81340
* sanopt.c (sanitize_rewrite_addressable_params): Set VALUE_EXPR after
gimple_build_debug_bind.
2017-07-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81340
* g++.dg/asan/pr81340.C: New test.
Do not handle VLA in sanitization (PR sanitizer/81460).
2017-07-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81460
* sanopt.c (sanitize_rewrite_addressable_params): Do not rewrite
parameters that are of a variable-length.
2017-07-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81460
* gcc.dg/asan/pr81460.c: New test.
jakub [Fri, 28 Jul 2017 07:11:51 +0000 (07:11 +0000)]
PR tree-optimization/81578
* tree-parloops.c (build_new_reduction): Bail out if
reduction_code isn't one of the standard OpenMP reductions.
Move the details printing after that decision.
jakub [Thu, 27 Jul 2017 19:13:42 +0000 (19:13 +0000)]
PR c/45784
* c-omp.c (c_finish_omp_for): If the condition is wrapped in
rhs of COMPOUND_EXPR(s), skip them and readd their lhs into
new COMPOUND_EXPRs around the rhs of the comparison.
* testsuite/libgomp.c/pr45784.c: New test.
* testsuite/libgomp.c++/pr45784.C: New test.
[PATCH][AArch64] Fix missing optimization for CMP+AND
During combine GCC tries to merge CMP (with zero) and AND into a TST. However,
in cases where an ANDS operand is not compatible, this was being missed. Adding
a define_split where this operand was moved to a register seems to help out.
Committed on behalf of Sudi Das
---
gcc/
2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64.md
(define_split for and<mode>3nr_compare): Move
non aarch64_logical_operand to a register.
(define_split for and_<SHIFT:optab><mode>3nr_compare0): Move non
register immediate operand to a register.
* config/aarch64/predicates.md (aarch64_mov_imm_operand): New.
gcc/testsuite
2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Sudakshina Das <sudi.das@arm.com>
PR tree-optimization/81502
* tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR
with incompatible but same sized type.
(execute_update_addresses_taken): Likewise.
While answering a user question on the equivalence of
-ftree-loop-vectorize + -ftree-slp-vectorize and -ftree-vectorize I
spotted one case which broke the equivalence. pass_ch::process_loop_p
was guarded on flag_tree_vectorize, meaning you would get it for
-ftree-vectorize, but not for -ftree-loop-vectorize/-ftree-slp-vectorize.
This patch fixes that, getting rid of the only use of flag_tree_vectorize
in the code base.
gcc/
* tree-ssa-loop-ch.c (pass_ch::process_loop_p): Guard on
flag_tree_loop_vectorize rather than flag_tree_vectorize.
The little-endian VSX code uses rotates to swap the two 64-bit halves of
128-bit scalar modes. This is fine for TImode and V1TImode, but it
isn't really valid to use RTL rotates on floating-point modes like
KFmode and TFmode, and doing that triggered an assert added by the
SVE series. This patch uses bit-casts to V1TImode instead.
2017-07-27 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_permute): Declare.
* config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Replace with...
(rs6000_emit_le_vsx_permute): ...this. Take the destination as input.
Emit instructions rather than returning an expression. Handle TFmode
and KFmode by casting to TImode.
(rs6000_emit_le_vsx_load): Update to use rs6000_emit_le_vsx_permute.
(rs6000_emit_le_vsx_store): Likewise.
* config/rs6000/vsx.md (VSX_TI): New iterator.
(*vsx_le_permute_<mode>): Use it instead of VSX_LE_128.
(*vsx_le_undo_permute_<mode>): Likewise.
(*vsx_le_perm_load_<mode>): Use rs6000_emit_le_vsx_permute to
emit the split sequence.
(*vsx_le_perm_store_<mode>): Likewise.
jakub [Thu, 27 Jul 2017 08:49:16 +0000 (08:49 +0000)]
PR tree-optimization/81555
PR tree-optimization/81556
* tree-ssa-reassoc.c (rewrite_expr_tree): Add NEXT_CHANGED argument,
if true, force CHANGED for the recursive invocation.
(reassociate_bb): Remember original length of ops array, pass
len != orig_len as NEXT_CHANGED in rewrite_expr_tree call.
* gcc.c-torture/execute/pr81555.c: New test.
* gcc.c-torture/execute/pr81556.c: New test.
jakub [Thu, 27 Jul 2017 07:53:33 +0000 (07:53 +0000)]
* attribs.c (decl_attributes): Imply noinline, noclone and no_icf
attributes for noipa attribute. For naked attribute use
lookup_attribute first before lookup_attribute_spec.
* final.c (rest_of_handle_final): Disable IPA RA for functions with
noipa attribute.
* ipa-visibility.c (non_local_p): Fix comment typos. Return true
for functions with noipa attribute.
(cgraph_externally_visible_p): Return true for functions with noipa
attribute.
* cgraph.c (cgraph_node::get_availability): Return AVAIL_INTERPOSABLE
for functions with noipa attribute.
* doc/extend.texi: Document noipa function attribute.
* tree-ssa-structalias.c (refered_from_nonlocal_fn): Set *nonlocal_p
also for functions with noipa attribute.
(ipa_pta_execute): Set nonlocal_p also for nodes with noipa attribute.
c-family/
* c-attribs.c (c_common_attribute_table): Add noipa attribute.
(handle_noipa_attribute): New function.
testsuite/
* gcc.dg/attr-noipa.c: New test.
* gcc.dg/ipa/ipa-pta-18.c: New test.
* gcc.dg/ipa/ipa-sra-11.c: New test.
[gcc]
2017-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
-mvsx-small-integer option.
(ISA_3_0_MASKS_IEEE): Likewise.
(OTHER_VSX_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.opt (-mvsx-small-integer): Likewise.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Simplify
code, only testing for DImode being allowed in non-VSX floating
point registers.
(rs6000_init_hard_regno_mode_ok): Change TARGET_VSX_SMALL_INTEGER
to TARGET_P8_VECTOR test. Remove redundant VSX test inside of
another VSX test.
(rs6000_option_override_internal): Delete -mvsx-small-integer.
(rs6000_expand_vector_set): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Delete TARGET_VSX_SMALL_INTEGER,
since TARGET_P9_VECTOR was already tested.
(rs6000_opt_masks): Remove -mvsx-small-integer.
* config/rs6000/vsx.md (vsx_extract_<mode>): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(vsx_extract_<mode>_p9): Delete TARGET_VSX_SMALL_INTEGER, since a
test for TARGET_VEXTRACTUB was used, and that uses
TARGET_P9_VECTOR.
(p9 extract splitter): Likewise.
(vsx_extract_<mode>_di_p9): Likewise.
(vsx_extract_<mode>_store_p9): Likewise.
(vsx_extract_si): Delete TARGET_VSX_SMALL_INTEGER, since a test
for TARGET_P9_VECTOR was used. Delete code that is now dead with
the elimination of TARGET_VSX_SMALL_INTEGER.
(vsx_extract_<mode>_p8): Likewise.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Likewise.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise.
(vsx_set_<mode>_p9): Likewise.
(vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Likewise.
(vsx_insert_extract_v4sf_p9): Likewise.
(vsx_insert_extract_v4sf_p9_2): Likewise.
* config/rs6000/rs6000.md (sign extend splitter): Change
TARGET_VSX_SMALL_INTEGER to TARGET_P8_VECTOR test.
(floatsi<mode>2_lfiwax_mem): Likewise.
(floatunssi<mode>2_lfiwzx_mem): Likewise.
(float<QHI:mode><FP_ISA3:mode>2): Delete TARGET_VSX_SMALL_INTEGER,
since a test for TARGET_P9_VECTOR was used.
(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(fix_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(fix_trunc<mode>si2_stfiwx): Likewise.
(fix_trunc<mode>si2_internal): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fixuns_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(fixuns_trunc<mode>si2_stfiwx): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fctiw<u>z_<mode>_smallint): Delete TARGET_VSX_SMALL_INTEGER,
since a test for TARGET_P9_VECTOR was used.
(splitter for loading small constants): Likewise.
[gcc/testsuite]
2017-07-25 Michael Meissner <meissner@linux.vnet.ibm.com>
ian [Wed, 26 Jul 2017 21:43:28 +0000 (21:43 +0000)]
* configure.ac: Check for XCOFF32/XCOFF64. Check for loadquery.
* filetype.awk: Separate AIX XCOFF32 and XCOFF64.
* xcoff.c: Add support for AIX XCOFF32 and XCOFF64 formats.
* configure, config.h.in: Regenerate.
X86 prologue saves register at CFA offset. Since its location on stack
is computed as CFA - its CFA_OFFSET, CFA_OFFSET points the end of the
saved register area on stack. This patch updates sp_valid_at and
fp_valid_at to properly check saved register CFA offset.
[Patch AArch64 obvious] Unify address costs to generic_addrcost_table
The special case address cost tables for Cortex-A57 and qdf24xx are no
different from the generic address cost table. We should just use the
address cost table directly. If this changes in future, a core is welcome
to add new address cost tables.
gcc/
* config/aarch64/aarch64.c (cortexa57_addrcost_table): Remove.
(qdf24xx_addrcost_table): Likewise.
(cortexa57_tunings): Update to use generic_branch_cost.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.
(qdf24xx_tunings): Likewise.
jason [Wed, 26 Jul 2017 17:39:26 +0000 (17:39 +0000)]
PR c++/67054 - Inherited ctor with non-default-constructible members
* method.c (walk_field_subobs) Consider member initializers (NSDMIs)
when deducing an inheriting constructor.
[Patch AArch64 Obvious] Unify branch costs to generic_branch_cost
All the cores in AArch64 use the pair {1, 3} for their branch costs. As
that is covered by generic_branch_cost, we can just use that directly and
save the tiny amount of redundant code. If in future any core wants to
modify this, they can always add a special-case branch-cost back.
sh [Wed, 26 Jul 2017 12:39:43 +0000 (12:39 +0000)]
[SPARC] Add -mfsmuld option
Add the -mfsmuld option to control the generation of the FsMULd
instruction. In general, this instruction is available in architecture
version V8 and V9 CPUs with FPU. Some CPUs of this category do not
support this instruction properly, e.g. AT697E, AT697F and UT699. Some
CPUs of this category do not implement it in hardware, e.g. LEON3/4 with
GRFPU-lite.
* gimple-match-head.c (do_valueize): Return OP if valueize
returns NULL_TREE.
(get_def): New helper to get at the def stmt of a SSA name
if valueize allows.
* genmatch.c (dt_node::gen_kids_1): Use get_def instead of
do_valueize to get at the def stmt.
(dt_operand::gen_gimple_expr): Simplify do_valueize calls.
* gcc/testsuite/gcc.dg/pr70920-2.c: Adjust for transform already
happening in ccp1.
* gcc/testsuite/gcc.dg/pr70920-4.c: Likewise.
Fix PR46932: Block auto increment on frame pointer
Block auto increment on frame pointer references. This is never
beneficial since the SFP expands into SP+C or FP+C during register
allocation. The generated code for the testcase is now as expected:
Move non-local goto expansion after parm_birth_insn (PR sanitize/81186).
2017-07-26 Martin Liska <mliska@suse.cz>
PR sanitize/81186
* function.c (expand_function_start): Make expansion of
nonlocal_goto_save_area after parm_birth_insn.
2017-07-26 Martin Liska <mliska@suse.cz>
PR sanitize/81186
* gcc.dg/asan/pr81186.c: New test.
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