Bin Cheng [Tue, 28 Mar 2017 15:32:29 +0000 (15:32 +0000)]
tree-vect-loop-manip.c (slpeel_add_loop_guard): New param and mark new edge's irreducible flag accordign to it.
* tree-vect-loop-manip.c (slpeel_add_loop_guard): New param and
mark new edge's irreducible flag accordign to it.
(vect_do_peeling): Check loop preheader edge's irreducible flag
and pass it to function slpeel_add_loop_guard.
gcc/testsuite
* gcc.c-torture/compile/irreducible-loop.c: New.
Andreas Schwab [Tue, 28 Mar 2017 10:29:34 +0000 (10:29 +0000)]
Support for Ada on aarch64 with -mabi=ilp32
PR ada/80117
* system-linux-aarch64-ilp32.ads: New file.
* gcc-interface/Makefile.in (LIBGNAT_TARGET_PAIRS_COMMON): Rename
from LIBGNAT_TARGET_PAIRS.
(LIBGNAT_TARGET_PAIRS_32, LIBGNAT_TARGET_PAIRS_64): Define.
(LIBGNAT_TARGET_PAIRS): Use LIBGNAT_TARGET_PAIRS_COMMON, and
LIBGNAT_TARGET_PAIRS_64 or LIBGNAT_TARGET_PAIRS_32 for -mabi=lp64
or -mabi=ilp32, resp.
Martin Liska [Tue, 28 Mar 2017 09:01:57 +0000 (11:01 +0200)]
Fix calls.c for a _complex type (PR ipa/80104).
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* cgraphunit.c (cgraph_node::expand_thunk): Mark argument of a
thunk call as DECL_GIMPLE_REG_P when vector or complex type.
2017-03-28 Martin Liska <mliska@suse.cz>
The compiler is supposed to have the builtin defined _REENTRANT defined
when -pthread is passed, which wasn't done on the ARC architecture.
When _REENTRANT is not passed, the C library will not use reentrant
functions, and the latest version of ax_pthread.m4 from the
autoconf-archive will no longer detect that thread support is
available (see https://savannah.gnu.org/patch/?8186).
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Jonathan Wakely [Tue, 28 Mar 2017 07:35:04 +0000 (08:35 +0100)]
PR libstdc++/80229 restore support for shared_ptr<function type>
PR libstdc++/80229
* include/bits/shared_ptr_base.h
(__shared_ptr::_M_enable_shared_from_this_with): Change parameters to
non-const and then use remove_cv to get unqualified type.
* testsuite/20_util/enable_shared_from_this/members/const.cc: Don't
cast away constness on object created const.
* testsuite/20_util/shared_ptr/cons/80229.cc: New test.
/home/markus/gcc/gcc/tree.c: In function ‘void inchash::add_expr(const_tree, inchash::hash&, unsigned int)’:
/home/markus/gcc/gcc/tree.c:8013:11: warning: name lookup of ‘i’ changed
for (i = TREE_OPERAND_LENGTH (t) - 1; i >= 0; --i)
^
/home/markus/gcc/gcc/tree.c:7773:7: warning: matches this ‘i’ under ISO standard rules
int i;
^
/home/markus/gcc/gcc/tree.c:7869:16: warning: matches this ‘i’ under old rules
for (int i = 0; i < TREE_VEC_LENGTH (t); ++i)
^
Jakub Jelinek [Mon, 27 Mar 2017 21:07:21 +0000 (23:07 +0200)]
re PR target/80162 (ICE on invalid code (address of register variable))
PR middle-end/80162
c-family/
* c-common.c (c_common_mark_addressable_vec): Don't set
TREE_ADDRESSABLE on DECL_HARD_REGISTER.
c/
* c-tree.h (c_mark_addressable): Add array_ref_p argument.
* c-typeck.c (c_mark_addressable): Likewise. Look through
VIEW_CONVERT_EXPR unless array_ref_p and VCE is from VECTOR_TYPE
to ARRAY_TYPE.
(build_array_ref): Pass true as array_ref_p to c_mark_addressable.
cp/
* cp-tree.h (cxx_mark_addressable): Add array_ref_p argument.
* typeck.c (cxx_mark_addressable): Likewise. Look through
VIEW_CONVERT_EXPR unless array_ref_p and VCE is from VECTOR_TYPE
to ARRAY_TYPE.
(cp_build_array_ref): Pass true as array_ref_p to cxx_mark_addressable.
testsuite/
* c-c++-common/pr80162-1.c: New test.
* c-c++-common/pr80162-2.c: New test.
* c-c++-common/pr80162-3.c: New test.
Jakub Jelinek [Mon, 27 Mar 2017 21:00:35 +0000 (23:00 +0200)]
re PR target/80102 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2330)
PR target/80102
* reg-notes.def (REG_CFA_NOTE): Define. Use it for CFA related
notes.
* cfgcleanup.c (reg_note_cfa_p): New array.
(insns_have_identical_cfa_notes): New function.
(old_insns_match_p): Don't cross-jump in between /f
and non-/f instructions. If both i1 and i2 are frame related,
verify all CFA notes, their order and content.
Michael Meissner [Mon, 27 Mar 2017 19:19:00 +0000 (19:19 +0000)]
re PR target/78543 (ICE in push_reload, at reload.c:1349 on powerpc64le-linux-gnu)
[gcc]
2017-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78543
* config/rs6000/rs6000.md (bswaphi2_extenddi): Combine bswap
HImode and SImode with zero extend to DImode to one insn.
(bswap<mode>2_extenddi): Likewise.
(bswapsi2_extenddi): Likewise.
(bswaphi2_extendsi): Likewise.
(bswaphi2): Combine bswap HImode and SImode into one insn.
Separate memory insns from swapping register.
(bswapsi2): Likewise.
(bswap<mode>2): Likewise.
(bswaphi2_internal): Delete, no longer used.
(bswapsi2_internal): Likewise.
(bswap<mode>2_load): Split bswap HImode/SImode into separate load,
store, and gpr<-gpr swap insns.
(bswap<mode>2_store): Likewise.
(bswaphi2_reg): Register only splitter, combine with the splitter.
(bswaphi2 splitter): Likewise.
(bswapsi2_reg): Likewise.
(bswapsi2 splitter): Likewise.
(bswapdi2): If we have the LDBRX and STDBRX instructions, split
the insns into load, store, and register/register insns.
(bswapdi2_ldbrx): Likewise.
(bswapdi2_load): Likewise.
(bswapdi2_store): Likewise.
(bswapdi2_reg): Likewise.
[gcc/testsuite]
2017-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78543
* gcc.target/powerpc/pr78543.c: New test.
... missed doing the same change to cplus_demangle_fill_component that
was done to d_make_comp. I.e., teach it to only validate that we're
not passing in a "right" subtree. GDB has recently (finally) learned
about rvalue references, and a change to make it use
cplus_demangle_fill_component more ran into an assertion because of
this.
(GDB is the only user of cplus_demangle_fill_component in both the gcc
and binutils-gdb trees.)
libiberty/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
Durring compilation process, (subreg (mem ...) ...) can occur. Hence,
we need to check if the address of mem is a valid one. This patch is
fixing this check by directly calling the address_operand, instead of
calling move_double_src_operand, as the latter is always checking
against the original mode, thus, returning false when the inner and
outer modes are different.
[ARC] Fix detection of long immediate for load/store operands.
ARC can use scaled offsets when loading (i.e. ld.as rA,[base,
offset]). Where base and offset can be a register or an immediate
operand. The scaling only applies on the offset part of the
instruction. The compiler can accept an address like this:
Hence, to emit this instruction we place the (const_int 60) into base
and the register into offset to take advantage of the scaled offset
facility of the load instruction. As a result the length of the load
instruction is 8 bytes. However, the long_immediate_loadstore_operand
predicate used for calculating the length attribute doesn't recognize
this address and returns a wrong decision leading to a wrong length
computation for a load instruction using the above address.
* config/arc/arc.c (arc_epilogue_uses): BLINK should be also
restored when in interrupt.
* config/arc/arc.md (simple_return): ARCv2 rtie instruction
doesn't have delay slot.
Jakub Jelinek [Mon, 27 Mar 2017 08:25:01 +0000 (10:25 +0200)]
re PR sanitizer/80168 (ICE in make_decl_rtl, at varasm.c:1311 w/ VLA and -fsanitize=address)
PR sanitizer/80168
* asan.c (instrument_derefs): Copy over last operand from
original COMPONENT_REF to the new COMPONENT_REF with
DECL_BIT_FIELD_REPRESENTATIVE.
* ubsan.c (instrument_object_size): Likewise.
Richard Biener [Mon, 27 Mar 2017 08:07:49 +0000 (08:07 +0000)]
re PR tree-optimization/80170 (SLP vectorization creates aligned access)
2017-03-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/80170
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Make
sure DR/SCEV didnt fold in constants we do not see when looking
at the reference base alignment.
Jerry DeLisle [Sat, 25 Mar 2017 18:48:01 +0000 (18:48 +0000)]
re PR fortran/78881 ([F03] reading from string with DTIO procedure does not work properly)
2017-03-25 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR libgfortran/78881
* io/io.h (st_parameter_dt): Rename unused component last_char to
child_saved_iostat. Move comment to gfc_unit.
* io/list_read.c (list_formatted_read_scalar): After call to
child READ procedure, save the returned iostat value for later
check. (finish_list_read): Only finish READ if child_saved_iostat
was OK.
* io/transfer.c (read_sf_internal): If there is a saved character
in last character, seek back one. Add a new check for EOR
condition. (read_sf): If there is a saved character
in last character, seek back one. (formatted_transfer_scalar_read):
Initialize last character before invoking child procedure.
(data_transfer_init): If child dtio, set advance
status to nonadvancing. Move update of size and check for EOR
condition to before child dtio return.
Paul Thomas [Sat, 25 Mar 2017 17:38:17 +0000 (17:38 +0000)]
re PR fortran/80156 (Generic DTIO interface reported missing if public statement preceeds the interface block)
2017-03-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/80156
PR fortran/79382
* decl.c (access_attr_decl): Remove the error for an absent
generic DTIO interface and ensure that symbol has the flavor
FL_PROCEDURE.
2017-03-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/80156
PR fortran/79382
* gfortran.dg/dtio_23.f90 : Remove the dg-error and add the
testcase for PR80156. Add a main programme that tests that
the typebound generic is accessible.
Uros Bizjak [Sat, 25 Mar 2017 16:34:09 +0000 (17:34 +0100)]
re PR target/80180 (Incorrect codegen from rdseed intrinsic use (CVE-2017-11671))
PR target/80180
* config/i386/i386.c (ix86_expand_builtin)
<IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Do not expand arg0 between
flags reg setting and flags reg using instructions.
<IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Ditto. Use non-flags reg
clobbering instructions to zero extend op2.
Bernd Schmidt [Sat, 25 Mar 2017 01:12:04 +0000 (01:12 +0000)]
re PR target/80160 (operand has impossible constraints)
PR rtl-optimization/80160
PR rtl-optimization/80159
* lra-assigns.c (must_not_spill_p): Tighten new test to also take
reg_alternate_class into account.
Andreas Krebbel [Fri, 24 Mar 2017 14:04:12 +0000 (14:04 +0000)]
S/390: arch12: New builtins.
This patch implements a set of low-level builtins for instruction
which would otherwise not be emitted by the compiler plus a set of
high-level builtins as defined by the IBM XL compiler. The high-level
builtins will be described in a future revision of the z/OS XL C/C++
Programming Guide.
I'll try to come up with a documentation appropriate for the GCC
manual as well (sometimes in the future).
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-builtins.def: Add VXE builtins. Add a flags
argument to the overloaded builtin variants. Use the new flag to
deprecate certain builtin variants.
* config/s390/s390-builtin-types.def: Add new builtin types.
* config/s390/s390-builtins.h: Support new flags field for
overloaded builtins.
* config/s390/s390-c.c (OB_DEF_VAR): New flags field.
(s390_macro_to_expand): Enable vector float data type.
(s390_cpu_cpp_builtins_internal): Indicate support of the new
builtins by incrementing the __VEC__ version number.
(s390_expand_overloaded_builtin): Support expansion of vec_xl and
vec_xst.
(s390_resolve_overloaded_builtin): Emit error messages depending
on the builtin flags.
* config/s390/s390.c (s390_expand_builtin): Support additional
flags argument. Change error message to match the messages
emitted in s390-c.c.
* config/s390/s390.md: New UNSPEC_* constants.
(op_type): Add new instruction types.
* config/s390/vecintrin.h: Add new builtins and test data class
constants.
* config/s390/vx-builtins.md (V_HW_32_64): Add V4SF.
(V_HW_4, VEC_HW, VECF_HW): New mode iterators.
(VEC_INEXACT, VEC_NOINEXACT): New constants.
("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>")
("vec_insert_and_zero<mode>", "vec_mergeh<mode>")
("vec_mergel<mode>"): V_HW -> VEC_HW.
("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding
mode constant instead of magic value.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/target-attribute/tattr-3.c: Adjust error message
and remove the high-level builtin. The error message for the
would prevent compilation from reaching the second.
* gcc.target/s390/target-attribute/tattr-4.c: Likewise.
Andreas Krebbel [Fri, 24 Mar 2017 14:03:24 +0000 (14:03 +0000)]
S/390: arch12: Support new vector floating point modes.
This patch adds support for the new floating point vector elements (SF
and TF) introduced with arch12.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Support other
vector floating point modes than just V2DF.
(s390_expand_vcond): Likewise.
(s390_hard_regno_mode_ok): Allow SFmode values in VRs.
(s390_cannot_change_mode_class): Prevent mode changes between TF
and V1TF in vector registers.
* config/s390/s390.md (DF, SF): New mode attributes.
("*cmp<mode>_ccs", "add<mode>3", "sub<mode>3", "mul<mode>3")
("fma<mode>4", "fms<mode>4", "div<mode>3", "*neg<mode>2"): Add
SFmode support for VRs.
* config/s390/vector.md (V_HW, V_HW2, VT_HW, ti*, nonvec): Add new
vector fp modes.
(VFT, VF_HW): New mode iterators.
(vw, sdx): New mode attributes.
("addv2df3", "subv2df3", "mulv2df3", "divv2df3", "sqrtv2df2")
("fmav2df4","fmsv2df4", "negv2df2", "absv2df2", "*negabsv2df2")
("smaxv2df3", "sminv2df3", "*vec_cmp<VFCMP_HW_OP:code>v2df_nocc")
("vec_cmpuneqv2df", "vec_cmpltgtv2df", "vec_orderedv2df")
("vec_unorderedv2df"): Adjust the v2df only patterns to support
also the new vector floating point modes. Renaming to ...
Andreas Krebbel [Fri, 24 Mar 2017 14:01:54 +0000 (14:01 +0000)]
S/390: arch12: Add vllezlf instruction.
This adds support for the vector load element and zero instruction and
makes sure it is used when initializing vectors with elements while
setting the rest to 0.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Use vllezl
instruction if possible.
* config/s390/vector.md (vec_halfnumelts): New mode
attribute.
("*vec_vllezlf<mode>"): New pattern.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Andreas Krebbel [Fri, 24 Mar 2017 14:01:18 +0000 (14:01 +0000)]
S/390: arch12: New vector popcount variants
arch12 provides pop count vector instructions for bigger elements than
just chars.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/popcount-1.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vector.md ("popcountv16qi2", "popcountv8hi2")
("popcountv4si2", "popcountv2di2"): Rename to ...
("popcount<mode>2", "popcountv8hi2_vx", "popcountv4si2_vx")
("popcountv2di2_vx"): ... these and add !TARGET_VXE to the
condition.
("popcount<mode>2_vxe"): New pattern.
Andreas Krebbel [Fri, 24 Mar 2017 14:00:43 +0000 (14:00 +0000)]
S/390: arch12: Add support for new vector bit
operations.
This patch adds support for the new bit operations introduced with
arch12.
The patch also renames the one complement pattern to the proper RTL
standard name.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_rtx_costs): Return low costs for the
canonical form of ~AND to make sure the new instruction will be
used.
* config/s390/vector.md ("notand<mode>3", "ior_not<mode>3")
("notxor<mode>3"): Add new pattern definitions.
("*not<mode>"): Rename to ...
("one_cmpl<mode>2"): ... this.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
This reworks the fixuns_trunc* patterns a bit which got quite confusing
after adding z13 support. Now we just have a single RTL standard name
expander definition ("fixuns_trunc<FP:mode><GPR:mode>2") which then
multiplexes to either the emulation variants *_emu or the hardware
implementations.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md
("fixuns_truncdddi2", "fixuns_trunctddi2")
("fixuns_trunc<BFP:mode><GPR:mode>2"): Merge into ...
("fixuns_trunc<FP:mode><GPR:mode>2"): New expander.
("fixuns_trunc<BFP:mode><GPR:mode>2", "fixuns_trunc<mode>si2"):
Rename expanders to ...
Andreas Krebbel [Fri, 24 Mar 2017 13:58:41 +0000 (13:58 +0000)]
S/390: Use wfc for scalar vector compares
The z13 vector support used the vector style comparison instructions
also for the scalar compares in vector registers. However, it is much
more convenient to just use the compare scalar instruction for that
purpose. The advantage is that this instruction generates a CC result
as our compares usually do. So this results in quite some code to be
removed from the backend.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/2964.md: Remove the single element vector compare
instructions which are no longer used.
* config/s390/s390.c (s390_select_ccmode): Remove handling of
vector CCmodes.
(s390_canonicalize_comparison): Remove handling of DFmode
compares.
(s390_expand_vec_compare_scalar): Remove function.
(s390_emit_compare): Don't call s390_expand_vec_compare_scalar.
* config/s390/s390.md ("*vec_cmp<insn_cmp>df_cconly"): Remove
pattern.
("*cmp<mode>_ccs"): Add wfcdb instruction.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust for the
comparison instructions used from now on.
Andreas Krebbel [Fri, 24 Mar 2017 13:57:58 +0000 (13:57 +0000)]
S/390: Move and rename vector check.
Move the target support routine for the vector facility to the common
code file. This is required to enable the generic vectorization tests
on S/390. While doing this the too generic name for the check (vector)
is changed to s390_vx. The renaming required to modify all the
testcases currently using that check.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/s390.exp (check_effective_target_vector):
Include target-supports.exp and move target_vector check routine
...
* lib/target-supports.exp (check_effective_target_s390_vx): ... to
here and rename it.
* gcc.target/s390/htm-builtins-z13-1.c: Rename effective target
check from vector to s390_vx.
* gcc.target/s390/target-attribute/tpragma-struct-vx-1.c: Likewise.
* gcc.target/s390/target-attribute/tpragma-struct-vx-2.c: Likewise.
* gcc.target/s390/vector/stpcpy-1.c: Likewise.
* gcc.target/s390/vector/vec-abi-vararg-1.c: Likewise.
* gcc.target/s390/vector/vec-clobber-1.c: Likewise.
* gcc.target/s390/vector/vec-genbytemask-1.c: Likewise.
* gcc.target/s390/vector/vec-genmask-1.c: Likewise.
* gcc.target/s390/vector/vec-nopeel-1.c: Likewise.
* gcc.target/s390/vector/vec-vrepi-1.c: Likewise.
Andreas Krebbel [Fri, 24 Mar 2017 13:57:19 +0000 (13:57 +0000)]
S/390: movdf improvements
This patch add the vector load element from immediate instruction to the
movdf/dd pattern for loading a FP zero and it removes the vector
instructions from the mov<mode>_64 pattern. These were pointless in
there because z13 support implies DFP support so these instructions will
always be matched in the mov<mode>_64dfp pattern instead.
Regression tested on s390x
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("mov<mode>_64dfp" DD_DF): Use vleig for loading a
FP zero.
("*mov<mode>_64" DD_DF): Remove the vector instructions. These
will anyway by matched by mov<mode>_64dfp.
Andreas Krebbel [Fri, 24 Mar 2017 13:54:23 +0000 (13:54 +0000)]
S/390: vec_init improvements
This enables the vec_init pattern also for V4SF, V1TI, and V1TF.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-init-2.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Enable vector load
pair for all vector types with 64 bit elements.
* config/s390/vx-builtins.md (V_HW_64): Move mode iterator to ...
* config/s390/vector.md (V_HW_64): ... here.
(V_128_NOSINGLE): New mode iterator.
("vec_init<V_HW:mode>"): Use V_128 as mode iterator.
("*vec_splat<mode>"): Use V_128_NOSINGLE mode iterator.
("*vec_tf_to_v1tf", "*vec_ti_to_v1ti"): New pattern definitions.
("*vec_load_pairv2di"): Change to ...
("*vec_load_pair<mode>"): ... this one.
Andreas Krebbel [Fri, 24 Mar 2017 13:53:43 +0000 (13:53 +0000)]
S/390: Improve support of 128 bit vectors in GPRs
This patch improves the handling of 128 bit vectors residing in GPRs
by adding more alternatives to the move pattern.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md: Add comments.
(jKK): Reject element sizes > 8 bytes.
* config/s390/s390.c (s390_split_ok_p): Enable splitting also for
s_operands.
* config/s390/s390.md: Add the s_operand checks formerly in
s390_split_ok_p to various splitters where they are still
required.
* config/s390/vector.md ("mov<mode>" V_128): Add GPR alternatives
for 128 bit vectors. Plus two splitters.
Andreas Krebbel [Fri, 24 Mar 2017 13:52:30 +0000 (13:52 +0000)]
S/390: PR79904: Disallow reg + sym_ref literal pool addresses.
We accept reg + sym_ref as valid address if sym_ref is a literal pool
reference knowing that it will be rewritten as r13 + reg + offset.
However, annotate_constant_pool_refs was never able to handle that.
With the patch only single sym_refs are accepted.
Regression tested on s390x.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
The boundary argument of the vec_load_bndry builtin needs to be
rewritten. At that point it must be constant already. The current
diagnostics in s390_expand_builtins is too late for this. The patch
adds an additional check for that builtin which will be triggered
already during preprocessing.
Regression tested on s390x.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79893
* gcc.target/s390/zvector/pr79893.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79893
* config/s390/s390-c.c (s390_adjust_builtin_arglist): Issue an
error if the boundary argument is not constant.
Bill Schmidt [Fri, 24 Mar 2017 12:34:19 +0000 (12:34 +0000)]
re PR tree-optimization/80158 (ICE in all_phi_incrs_profitable)
2017-03-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/80158
* gimple-ssa-strength-reduction.c (replace_mult_candidate): When
replacing a candidate statement, also replace it for the
candidate's alternate interpretation.
(replace_rhs_if_not_dup): Likewise.
(replace_one_candidate): Likewise.
* gfortran.fortran-torture/compile/pr80158.f: New file.
Kelvin Nilsen [Thu, 23 Mar 2017 22:12:06 +0000 (22:12 +0000)]
p9-options-1.c: New test.
gcc/testsuite/ChangeLog:
2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/p9-options-1.c: New test.
gcc/ChangeLog:
2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/rs6000.c (rs6000_option_override_internal): Change
handling of certain combinations of target options, including the
combinations -mpower8-vector vs. -mno-vsx, -mpower9-vector vs.
-mno-power8-vector, and -mpower9_dform vs. -mno-power9-vector.
Jonathan Wakely [Thu, 23 Mar 2017 19:40:41 +0000 (19:40 +0000)]
Fix Debug Mode test failures
* testsuite/23_containers/array/tuple_interface/
tuple_element_debug_neg.cc: Adjust dg-error.
* testsuite/23_containers/list/operations/78389.cc: Fix less-than to
define a valid strict weak ordering.
* testsuite/23_containers/priority_queue/67085.cc: Disable test for
Debug Mode, due to debug checks making extra copies of predicate.
* testsuite/ext/pb_ds/regression/priority_queue_binary_heap-62045.cc:
Likewise.
Daniel Kruegler [Thu, 23 Mar 2017 19:40:16 +0000 (19:40 +0000)]
Implement LWG 2686, std::hash<error_condition>, for C++17
2017-03-23 Daniel Kruegler <daniel.kruegler@gmail.com>
Implement LWG 2686, Why is std::hash specialized for error_code,
but not error_condition?
* include/std/system_error (hash<error_condition>): Define for C++17.
* testsuite/20_util/hash/operators/size_t.cc (hash<error_condition>):
Instantiate test for error_condition.
* testsuite/20_util/hash/requirements/explicit_instantiation.cc
(hash<error_condition>): Instantiate hash<error_condition>.
William Schmidt [Thu, 23 Mar 2017 13:13:44 +0000 (13:13 +0000)]
re PR tree-optimization/79908 (ICE in gimplify_expr (gimplify.c:12155) gimplification failed)
[gcc]
2017-03-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Richard Biener <rguenth@suse.com>
PR tree-optimization/79908
PR tree-optimization/80136
* tree-stdarg.c (expand_ifn_va_arg_1): For a VA_ARG whose LHS has
been cast away, gimplify_and_add suffices.
[gcc/testsuite]
2017-03-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Richard Biener <rguenther@suse.de>
PR tree-optimization/79908
PR tree-optimization/80136
* gcc.dg/torture/pr79908.c: New file.
Jakub Jelinek [Wed, 22 Mar 2017 21:52:13 +0000 (22:52 +0100)]
re PR tree-optimization/80072 (ICE in gimple_build_assign_1 with -O3 -march=broadwell/skylake-avx512)
PR tree-optimization/80072
* tree-ssa-reassoc.c (struct operand_entry): Change id field type
to unsigned int.
(next_operand_entry_id): Change type to unsigned int.
(sort_by_operand_rank): Make sure to return the right return value
even if unsigned fields are bigger than INT_MAX.
(struct oecount): Change cnt and id type to unsigned int.
(oecount_hasher::equal): Formatting fix.
(oecount_cmp): Make sure to return the right return value
even if unsigned fields are bigger than INT_MAX.
(undistribute_ops_list): Change next_oecount_id type to unsigned int.
Ian Lance Taylor [Wed, 22 Mar 2017 21:02:53 +0000 (21:02 +0000)]
compiler: initialize gogo fields
A couple of the data members in the Gogo class were not
being initialized properly. This was causing "uninitialized value"
errors during Valgrind memcheck runs. This patch insures that
all of the fields receive an initial value.
projects / thirdparty / gcc.git / log
