H.J. Lu [Sun, 13 Jul 2025 21:21:32 +0000 (05:21 +0800)]
ld: Clear map_head_is_link_order for .gnu_object_only
Clear map_head_is_link_order when generating .gnu_object_only section so
that lang_add_section can add new sections and .sframe sections will be
properly merged by _bfd_elf_merge_section_sframe.
PR ld/33146
* ldlang.c (cmdline_emit_object_only_section): Clear
map_head_is_link_order.
* testsuite/ld-plugin/lto.exp (as_gsframe): New.
(lto_link_tests): Add $as_gsframe to compile lto-4b.o and
lto-4c.o.
Alan Modra [Sun, 13 Jul 2025 23:23:07 +0000 (08:53 +0930)]
Re: gas: Move gas_sframe_check to binutils-common.exp
PR ld/33146
Correct TCL errors trying to access error output file in commit ef7a634dc01d. In fact, get rid of the output file test entirely since
gas exit status is sufficient.
Also there is no need to firstly check for ELF support.
Set check_as_sframe_result, and remove ld-lib.exp check_as_sframe.
Tom de Vries [Sun, 13 Jul 2025 05:25:43 +0000 (07:25 +0200)]
[gdb/build] Work around GCC ipa-modref bug
PR mi/32571 reports the following problem:
...
$ gdb -q -batch -ex "b bla.c:100"
<random output>
Make breakpoint pending on future shared library load? (y or [n]) \
[answered N; input not from terminal]
...
while this is expected:
...
$ gdb -q -batch -ex "b bla.c:100"
No symbol table is loaded. Use the "file" command.
Make breakpoint pending on future shared library load? (y or [n]) \
[answered N; input not from terminal]
...
A few factors in reproducing this are building gdb using gcc 14,
"-O2 -flto=auto" and --disable-nls. For more details, see the PR.
This turns out to be caused by a GCC PR [1], more specifically a problem in
ipa-modref.
Work around this by disabling ipa-modref for GCC versions 12-15 and 16.0,
assuming the GCC 16.1 release will contain a fix.
Tested on aarch64-linux and x86_64-linux.
Approved-By: Andrew Burgess <aburgess@redhat.com>
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=32571
ld/aarch64elf: add support for DT_AARCH64_MEMTAG_STACK dynamic tag
Add new command line option -z memtag-stack for aarch64 elf. This
option instructs the linker to generate the necessary dynamic tag
DT_AARCH64_MEMTAG_STACK, which the dynamic loader can then use to
protect the stack memory with PROT_MTE. Linker issues an
'unrecognized option' error when -z memtag-stack is specified for
non-aarch64 based emulations.
readelf displays the dynamic tag when present:
$ readelf -d <exectutable>
Dynamic section at offset 0xfdd8 contains XX entries:
Tag Type Name/Value
0x0000000000000001 (NEEDED) Shared library: [libc.so.6]
0x000000000000000c (INIT) 0x400520
0x000000000000000d (FINI) 0x400b64
0x0000000000000019 (INIT_ARRAY) 0x41fdc8
... ... ...
0x000000007000000c (AARCH64_MEMTAG_STACK) 0x1
... ... ...
ChangeLog:
* bfd/elfnn-aarch64.c (elfNN_aarch64_late_size_sections): Emit
DT_AARCH64_MEMTAG_STACK dynamic tag.
* bfd/elfxx-aarch64.h (struct aarch64_memtag_opts): Add new
member for tracking whether stack access uses MTE insns.
* binutils/readelf.c (get_aarch64_dynamic_type): Handle
DT_AARCH64_MEMTAG_STACK.
* ld/emultempl/aarch64elf.em: Add new command line option.
* ld/ld.texi: Add documentation for -z memtag-stack.
* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* ld/testsuite/ld-aarch64/dt-memtag-stack.d: New test.
include/ChangeLog:
* elf/aarch64.h (DT_AARCH64_MEMTAG_STACK): New definition.
ld/aarch64elf: add support for DT_AARCH64_MEMTAG_MODE dynamic tag
Add new command line option -z memtag-mode=<mode> to aarch64 elf,
where <mode> can be one of none, sync, or async. For mode of sync or
async, a DT_AARCH64_MEMTAG_MODE dynamic tag with a value of 0 or 1
respectively is emitted.
readelf displays the dynamic tag when present:
$ readelf -d <exectutable>
Dynamic section at offset 0xfdd8 contains XX entries:
Tag Type Name/Value
0x0000000000000001 (NEEDED) Shared library: [libc.so.6]
0x000000000000000c (INIT) 0x400520
0x000000000000000d (FINI) 0x400b64
0x0000000000000019 (INIT_ARRAY) 0x41fdc8
... ... ...
0x0000000070000009 (AARCH64_MEMTAG_MODE) 0x1
... ... ...
Note that this patch doesn't add support for the "asymm" MTE mode,
which is an Armv8.7 extension.
ChangeLog:
* bfd/elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Add
new member for memtag properties.
(bfd_elfNN_aarch64_set_options): New argument to pass memtag
properties.
(elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_MODE
dynamic tag.
* bfd/elfxx-aarch64.h: New definition for the various memtag
properties.
* binutils/readelf.c (get_aarch64_dynamic_type): Handle
DT_AARCH64_MEMTAG_MODE.
* ld/emultempl/aarch64elf.em: Likewise.
* ld/ld.texi: Add documentation for the new option
-z memtag-mode.
* ld/testsuite/ld-aarch64/aarch64-elf.exp: New test.
* ld/testsuite/ld-aarch64/dt-memtag.d: New test.
* ld/testsuite/ld-aarch64/dt-memtag-mode.s: New test.
include/ChangeLog:
* elf/aarch64.h (DT_AARCH64_MEMTAG_MODE): New definition.
ld: aarch64: make EH Frame parsing aware of augmentation char 'G'
As per the DWARF for the Arm 64-bit Architecture (AArch64)
specification, the augmentation char 'G' indicates that associated
frames may modify MTE tags on the stack space they use.
Add knowledge of the 'G' augmentation char to the EH Frame parsing
code.
ChangeLog:
* bfd/elf-eh-frame.c (_bfd_elf_parse_eh_frame): Accommodate
augmentation char 'G'.
* ld/testsuite/ld-aarch64/aarch64-elf.exp: New test.
* ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s: New test.
* ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s: New test.
* ld/testsuite/ld-aarch64/mte-tagged-frame.d: New test.
Process a new aarch64-specific CFI directive: .cfi_mte_tagged_frame
(LLVM uses this CFI directive already). The CFI directive, when
present for a function, indicates that the stack frame for the
function may modify the MTE tags of the stack space it uses. The
assembler emits char 'G' in the CIE augmentation string to indicate
the same.
ChangeLog:
* gas/config/tc-aarch64.c (s_aarch64_mte_tagged_frame): New
definition.
* gas/config/tc-aarch64.h (tc_fde_entry_extras): Add
memtag_frame_p.
(tc_cie_entry_extras): Likewise.
(tc_fde_entry_init_extra): Likewise.
(tc_cie_fde_equivalent_extra): Likewise.
(tc_cie_entry_init_extra): Likewise.
* gas/doc/c-aarch64.texi: Add documentation for
.cfi_mte_tagged_frame directive.
* gas/testsuite/gas/aarch64/mte_tagged_stack.d: New test.
* gas/testsuite/gas/aarch64/mte_tagged_stack.s: New test.
Jose E. Marchesi [Sat, 12 Jul 2025 08:56:45 +0000 (10:56 +0200)]
binutils: factorize handling of arch-specific DWARF augmentations
This patch factorizes the handling of architecture/machine specific
augmentation characters in CIEs.
Based on an idea proposed by Richard Earnshaw.
binutils/ChangeLog:
* dwarf.c (is_mach_augmentation_ftype): New type.
(is_mach_augmentation): New variable.
(is_nomach_augmentation): New function.
(is_aarch64_augmentation): Likewise.
(init_dwarf_by_elf_machine_code): Set is_mach_augmentation as
appropriate.
(init_dwarf_by_bfd_arch_and_mach): Likewise.
(read_cie): Handle architecture-specific augmentation characters
in a generic way.
Alice Carlotti [Wed, 9 Jul 2025 21:59:11 +0000 (22:59 +0100)]
aarch64: Disable sysreg guards by default
Add a new flag -menable-sysreg-checking to restore previous behaviour.
This existing behaviour is quite inconsistent, so the gating will
probably be updated in the future. (In particular, many system
registers are currently gated with the architecture version they were
released with instead of the lower architecture version that they
actually require).
This patch retains the +d128 requirement for msrr/mrrs.
Alice Carlotti [Sat, 12 Jul 2025 02:53:21 +0000 (03:53 +0100)]
aarch64: Add missing F_STRICT flags
By default, NIL qualifiers are treated as matching any qualifier when
checking operand constraints. For many SVE instructions, this would
allow operands with missing type suffixes to be assembled as if they had
any explicit type specified. To prevent this, the F_STRICT flag is used
to specify that NIL qualifiers should match only NIL qualifiers.
Unfortunately, several SVE instructions incorrectly omitted this
F_STRICT flag. The bug has existed in the *MATMUL_SVE* macros since
they were added in 2019. The macro LUT_SVE2_INSN was added last year,
and the other incorrect macros are new in this release.
LUTv2_SME2_INSN and LUTv2_SME2p1_INSN were not actually broken, because
we reject untyped vector lists already during parsing. However, I have
added the F_STRICT flag here anyway, since this is more consistent and
would be more robust if those operands start accepting untyped vector
lists in the future. The new luti4 tests are the only ones that were
already rejected before this change.
BFLOAT16_SVE_INSN has been unused since it was originally added, so I
just deleted the macro.
The SVE LUT instructions were using the lut instruction class, which
has special handling only for SIMD operands, and isn't recognised by
aarch64_decode_variant_using_iclass (which sets the qualifiers during
decode for most SVE instructions). To prevent these instructions
failing to disassemble, I changed their instruction class to sve_misc.
Alice Carlotti [Fri, 11 Jul 2025 12:01:52 +0000 (13:01 +0100)]
aarch64: Remove redundant feature requirements
Many instructions explicitly specified SVE/SVE2/SME/SME2 as a required
feature when it was already implied by another required feature (at
least while the SME->SVE2 implication is retained internally). These
redundant features were used to determine both the valid symbol names
for immediate operands, and the choice of error message for invalid
movprfx sequences. Those two scenarios no longer use architecture
features, so the redundant features are now truly redundant.
Alice Carlotti [Fri, 11 Jul 2025 11:41:51 +0000 (12:41 +0100)]
aarch64: Use operand class to select movprfx error
Previously the choice of error message for an invalid movprfx sequence
used the architecture requirements to determine whether an instruction
was an SVE instruction or not. This meant specifying SVE or SVE2 as an
explicit architecture requirement for all SVE instructions, even when
this was already implied by another feature. As more architecture
features are added and with the partial removal of the SME->SVE2
dependency, these extra feature requirements were getting messier and
easier to forget.
Instead, we now look at the operand types. If there is an SVE_REG,
SVE_REGLIST or PRED_REG operand, then we treat the instruction as an SVE
instruction. This does change behaviour slightly, but it only affects
the choice of error message and the new choice should be a bit more
consistent.
There is one testsuite update required, because Ezra's SVE_AES2 patch
temporarily broke classification of FEAT_SVE_AES instructions. This
patch restores the original behaviour.
Alice Carlotti [Fri, 11 Jul 2025 06:55:45 +0000 (07:55 +0100)]
aarch64: Refactor exclusion of reg names in immediates
When parsing immediate values, register names should not be
misinterpreted as symbols. However, for backwards compatibility we need
to permit some newer register names within older instructions. The
current mechanism for doing so depends on the list of explicit
architecture requirements for the instructions, which is fragile and
easy to forget, and grows increasingly messy as more architecture
features are added.
This patch add explicit flags to each opcode to indicate which set of
register names is disallowed in each instance. These flags are
mandatory for all opcodes with immediate operands, which ensures that
the choice of disallowed names will always be deliberate and explicit.
Remove LIBSFRAME_1.1, LIBSFRAME_1.0 nodes and add a new LIBSFRAME_2.0
node (non-inheritance version) to create new global versioned symbols.
Also announce libsframe.so.2 in NEWS.
New APIs:
sframe_decoder_get_flags;
sframe_decoder_get_offsetof_fde_start_addr;
sframe_encoder_get_flags;
sframe_encoder_get_offsetof_fde_start_addr;
Removed APIs: (already deprecated since X-2 release)
sframe_get_funcdesc_with_addr;
APIs with changed semantics:
sframe_decoder_get_funcdesc_v2;
sframe_encoder_add_funcdesc_v2;
sframe_encoder_write;
lisbframe/
* libsframe.ver: Define new LIBSFRAME_2.0.
* libtool-version: Bump the 'current' numeral to indicate a binary
incompatible release.
include/
* sframe-api.h (sframe_get_funcdesc_with_addr): Remove
deprecated interface.
libsframe/
* sframe.c (sframe_get_funcdesc_with_addr): Likewise.
binutils/
* NEWS: Announce new versioned release of libsframe.
libsframe/
* sframe.c (sframe_encoder_add_funcdesc): Fix function-level
comment and use ATTRIBUTE_UNUSED consistently.
(sframe_encoder_add_funcdesc_v2): Use ATTRIBUTE_UNUSED
consistently.
gas: elf: binutils: add new section type SHT_GNU_SFRAME
So far, SFrame sections were of type SHT_PROGBITS.
As per ELF specification, SHT_PROGBITS indicates that the section holds
information defined by the program, whose format and meaning are
determined solely by the program.
On the linker side, SHT_PROGBITS should be reserved for the simple "cat
contents after applying relocs" semantics.
Currently, the only way to know that a section contains SFrame stack
trace data is if consumer checks for section name. Such a check for
section name is not quite conformant to ELF principles.
Some of this was discussed here
https://sourceware.org/pipermail/binutils/2025-March/140181.html
With this change, the SFrame sections generated by gas, ld will have
section type set to SHT_GNU_SFRAME. The new section type is defined in
the SHT_LOOS/SHT_HIOS space. The SFrame parsing routine
_bfd_elf_parse_sframe () now admits sections only when the the section
type is SHT_GNU_SFRAME.
No special handling / validation is done at the moment for the case of
manual creation of SFrame sections via obj_elf_section (). Add function
level comments for now to add a note about this.
Although the default handling for (sh_type >= SHT_LOOS && sh_type <=
SHT_HIOS) is sufficient when SHT_GNU_SFRAME is in that range, it makes
sense to add it as a case of its own.
bfd/
* elf-sframe.c (_bfd_elf_parse_sframe): Check if section type is
SHT_GNU_SFRAME.
(_bfd_elf_set_section_sframe): Set SHT_GNU_SFRAME for output
SFrame section.
* elflink.c (obj_elf_section): Use section type for check
instead of section name.
* elfxx-x86.c: Set SHT_GNU_SFRAME for SFrame sections for
.plt* sections.
* elf.c (bfd_section_from_shdr): Add case for SHT_GNU_SFRAME.
binutils/
* readelf.c (get_os_specific_section_type_name): Add
SHT_GNU_SFRAME.
gas/
* NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME
set.
* config/obj-elf.c (obj_elf_attach_to_group): Add comments to
indicate no special handling for SFrame yet.
* dw2gencfi.c (cfi_finish): Set SHT_GNU_SFRAME for emitted
SFrame section.
ld/
* NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME
set.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Add new test.
* gas/cfi-sframe/cfi-sframe-common-1b.d: New test.
* gas/cfi-sframe/cfi-sframe-common-1b.s: New test.
include/
* elf/common.h (SHT_GNU_SFRAME): Add new section type for SFrame
stack trace information.
libsframe/doc/
* sframe-spec.texi: Add expected ELF section type.
SFrame is generated for ELF targets only. Guard the block with
support_sframe_p like others for consistency.
Also, in a later commit, we would like to do a:
elf_section_type (sframe_seg) = SHT_GNU_SFRAME;
This cannot be done for non-ELF targets, hence the need to guard with
some pre-processor conditional to enable it for only OBJ_ELF. Guarding
with support_sframe_p works for now, because those targets that support
SFrame define support_sframe_p:
- x86_64 and aarch64 define support_sframe_p when OBJ_ELF is defined
- s390x has no non-LEF target.
We continue to issue an error on targets where SFrame is not supported:
.sframe not supported for target
gas/
* dw2gencfi.c (cfi_finish): Guard with support_sframe_p.
(support_sframe_p): Remove stub to define to false for backends
not supporting SFrame.
WANG Xuerui [Fri, 11 Jul 2025 07:49:07 +0000 (15:49 +0800)]
LoongArch: Un-skip cross-segment alignment compensation during relax pass 2
It turned out wrong to skip compensating for segment alignment if the
current section is closed for deletion, as my recent system update with
binutils trunk revealed link failures of many high-profile packages such
as ffmpeg, numpy and wxGTK -- the dreaded "relocation truncated to fit"
errors regarding improperly produced R_LARCH_PCREL20_S2.
As it's near 2.45 branching time, revert the problematic change and
XFAIL the original test case for now.
Suggested-by: Xi Ruoyao <xry111@xry111.site> Signed-off-by: WANG Xuerui <git@xen0n.name>
Alan Modra [Sat, 12 Jul 2025 00:25:53 +0000 (01:25 +0100)]
MIPS: Fix linker for REL TLS HI16/LO16 relocs
With REL targets TLS HI16/LO16 relocations need to combine the low part
with the high part just as all the remaining HI16/LO16 relocations, so
as to determine the borrow in calculation correctly.
ld/
PR 19977
* testsuite/ld-mips-elf/pr19977.d: New test.
* testsuite/ld-mips-elf/pr19977-mips16.d: New test.
* testsuite/ld-mips-elf/pr19977-micromips.d: New test.
* testsuite/ld-mips-elf/pr19977-r.d: New test.
* testsuite/ld-mips-elf/pr19977-r-mips16.d: New test.
* testsuite/ld-mips-elf/pr19977-r-micromips.d: New test.
* testsuite/ld-mips-elf/pr19977-r.s: New test source.
* testsuite/ld-mips-elf/pr19977.ld: New test linker script.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This corrects the DTPREL_HI16/LO16 and TPREL_HI16/LO16 howtos to use
_bfd_mips_elf_{hi,lo}16_reloc special functions, in order to support
addends outside the range [0,32767] on these relocations.
R_MIPS_GOT_HI16, R_MIPS_GOT_LO16, R_MIPS_CALL_HI16 and R_MIPS_CALL_LO16
are left alone as it seems that we (quite reasonably) only support
zero addends for those relocs.
PR 19977
bfd/
* elf32-mips.c (elf_mips_howto_table_rel): Set special_function
to _bfd_mips_elf_hi16_reloc for R_MIPS_TLS_DTPREL_HI16 and
R_MIPS_TLS_TPREL_HI16. Set special_function to
_bfd_mips_elf_lo16_reloc for R_MIPS_TLS_DTPREL_LO16 and
R_MIPS_TLS_TPREL_LO16
(elf_mips16_howto_table_rel): Likewise for
R_MIPS16_TLS_DTPREL_HI16, R_MIPS16_TLS_DTPREL_LO16,
R_MIPS16_TLS_TPREL_HI16 and R_MIPS16_TLS_TPREL_LO16.
(elf_micromips_howto_table_rel): Likewise for
R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_DTPREL_LO16,
R_MICROMIPS_TLS_TPREL_HI16 and R_MICROMIPS_TLS_TPREL_LO16.
* elf64-mips.c (mips_elf64_howto_table_rel): Similarly.
(mips16_elf64_howto_table_rel): Similarly.
(micromips_elf64_howto_table_rel): Similarly.
* elfn32-mips.c: As for elf64-mips.c.
gas/
* testsuite/gas/mips/pr19977.d,
* testsuite/gas/mips/pr19977.s: New test.
* testsuite/gas/mips/mips.exp: Run it.
PR 19977: MIPS: Add missing pairing for REL PCHI/PCLO relocations
Just as with all HI/LO 16-bit partial relocations the newly-introduced
MIPSr6 PC-relative R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations require
pairing for correct borrow propagation from the low part to the high
part with REL targets, another case for PR 19977.
Unlike with absolute relocation, there is a complication here in that
both parts represent a calculation that is relative to the PC at the
individual relocation's location rather than both referring to the
location of the R_MIPS_PCHI16 relocation, normally applied to an AUIPC
instruction, the location of which is used for the run-time calculation
executed by hardware.
To take this semantics into account, the addend of the R_MIPS_PCLO16
relocation matching a given R_MIPS_PCHI16 relocation is expected to be
adjusted in the source assembly file for the distance between the two
relocations in a single pair, so that once both relocations have been
calculated by the linker, the expression calculated at run time is such
as if the combined 32-bit immediate was added at the location of the
AUIPC instruction.
So for matching R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations into pairs
GAS needs to check for the distance between the two relocations to be
equal to the difference between the addends supplied, and then the
linker has to subtract the low part of the distance between the two
relocations from the low part in calculating the high part, so as to
factor in any borrow.
A further complication is that `_bfd_mips_elf_lo16_reloc' handler is
supplied with the addend differently depending on whether it has been
called by GAS via `bfd_install_relocation', or by the generic linker via
`bfd_perform_relocation'. In the former case the addend is supplied
with the relocation itself while in the latter one it comes from the
field being relocated.
We currently ignore the addend supplied with the relocation and it works
for calculating absolute high-part relocations, because the same addend
has been previously supplied with them when `_bfd_mips_elf_hi16_reloc'
was called, however this approach does not work for the PC-relative case
because as noted above the low-part addend is different and we need to
consistently apply the distance adjustment both with GAS and LD.
Since the supplied addend and one retrieved from field being relocated
won't ever be both nonzero, just use the sum of the two values.
The low-part addend in `mips_elf_add_lo16_rel_addend' always comes from
the field being relocated, so there's no complication there, we just
need to apply the same adjustment.
New linker test cases verify that the same ultimate machine code is
produced both for ELF and S-record output formats, ensuring that the
both the MIPS/ELF linker and the generic linker behave in the correct
way, consistent with each other.
MIPS/BFD: Use helper function for LO relocation sign-extension
A calculation for LO relocations has been recently fixed with commit ce08b3bb19b3 ("MIPS/BFD: Fix RELA handling of borrow in the generic
linker"), however it was missed that for the updated arithmetic we
already have a helper function available, `_bfd_mips_elf_sign_extend'.
Replace the open-coded statement then with an equivalent call to said
function. No functional change.
MIPS/LD/testsuite: Remove duplicate HI/LO relocation test dump files
There are only nonessential differences between corresponding o32 and
n32 HI/LO relocation test dump files, so reduce the number of files by
reusing the same dump between the two ABIs. Adjust test naming, also
for the n64 ABI, for consistency with other tests.
Commit 0d4d5a2633f missed some necessary adjustments to the testcase
after rebase. SFrame FDE function start address data is now an offset
in PCREL encoding; reflect with a new flag SFRAME_F_FDE_START_ADDR_PCREL
in the header.
Adjust the newly added testcase.
PR libsframe/33140 SFrame test failures on x86-64
libsframe/testsuite/
* libsframe.find/plt-findfre-2.c: Adjust for the new FDE func
start addr encoding.
Simon Marchi [Wed, 9 Jul 2025 14:18:46 +0000 (10:18 -0400)]
gdb/solib-svr4: use program space from solib in find_debug_base_for_solib
Instead of using the current global program space, I think it makes
sense to fetch the program space from the solib. The comment for
solib::objfile indicates that it may be nullptr (which is true), but in
this case, the callers (all in
svr4_iterate_over_objfiles_in_search_order) find the solib from an
objfile, so we know that solib::objfile (the link in the opposite
direction) is set for these solibs at this point.
Change-Id: I75037d0b2c39ab1b3a3792432be134e200438efe Approved-by: Kevin Buettner <kevinb@redhat.com>
Guinevere Larsen [Fri, 13 Jun 2025 17:39:50 +0000 (14:39 -0300)]
gdb/record: add support for AVX conversion instructions.
WIP
This commit adds support for instructions to convert from one type to
another, which are in the form:
* VCVTDQ2[PS|PD]
* VCVTPS2[DQ|PD]
* VCVTPD2[PS|DQ]
* VCVTSD2[SI|SS]
* VCVTSI2[SS|SD]
* VCVTSS2[SD|SI]
* VCVTTP[S|D]2DQ
* VCVTTS[S|D]2SI
It also adds support to vpsadbw, since it was trivial and only one
instruction. Finally, I have slightly reorder the case statements to
keep them in numerical order.
Guinevere Larsen [Tue, 10 Jun 2025 14:28:25 +0000 (11:28 -0300)]
gdb/record: add support to vinsert and vextract instructions
This patch adds support for the following instructions:
* VEXTRACT[F128|I128|PS]
* VINSERT[F128|I128|PS]
* VPEXTR[B|W|D|Q]
And associated test. For some reason, it seems that the extract
instructions deal with the output register as though it was the first
source register, so they use ModRM.r/m and VEX.B, instead of the usual
ModRM.reg and VEX.R. This meant that the opcode collision with
vbroadcastsd wasn't trivial. It can be easily solved by checking the
VEX.map_select field, so soslving it was very easy.
The VPEXTR instructions had several complicated collisions, and notably,
vpextrw to a register works completely different to any other
instruction in the family, so the code is messy, but it should be
correct.
gdb/record: Add support for AVX/AVX2 shift instructions
This commit adds record-full support to the following instructions:
* VPSLL[W|D|Q|DQ]
* VPSRL[W|D|Q|DQ]
* VPSRA[W|D]
With both dynamic and constant shifts, and the associated tests.
Notably, vpsraq is not available for AVX or AVX2 instruction sets, only
AVX512. vpsradq does not seem to be available with any instruction set.
Guinevere Larsen [Wed, 26 Feb 2025 19:15:33 +0000 (16:15 -0300)]
gdb/record: support more AVX arithmetic instructions
This commit adds support to the following AVX/AVX2 instructions:
* VPADD[B|W|D|Q]
* VPMUL[LW|LD|HW|HUW|UDQ]
* VXORP[S|D]
* VPAND[|N]
This required some reworking on the loop that processes instruction
prefixes, because the opcode for VPMULLD overlapped with a valid
instruction prefix. To fix that, rather than using "goto out_prefixes",
this commit changes the infinite loop to only run while we don't find
another VEX prefix. That should be OK, as the intel manual (page 526 on
the March 2024 edition) says that the VEX prefix is always the last one.
Ezra Sitorus [Thu, 15 May 2025 11:33:39 +0000 (12:33 +0100)]
aarch64: Support for FEAT_SVE_AES2
FEAT_SVE_AES2 implements the SVE multi-vector Advanced Encryption
Standard and 128-bit destination element polynomial multiply long
instructions, when the PE is not in Streaming SVE mode.
FEAT_PCDPHINT - Producer-consumer data placement hints - is an optional
ISA extension that provides hint instructions to indicate:
- a store in the current execution thread is generating data at a specific
location, which a thread of execution on one or more other observers is
waiting on.
- the thread of execution on the current PE will read a location that may not
yet have been written with the value to be consumed.
This extension introduces:
- STSHH, a hint instruction, with operands (policies) keep and strm
- PRFM *IR*, a new prefetch memory operand.
s390: Announce s390 64-bit (s390x) SFrame V2 support in binutils
The preceding commits add s390 64-bit (s390x) support in binutils to
generate SFrame stack trace information (.sframe section) in the
assembler from CFI directives (with option --gsframe), generate .sframe
section for linker-generated .plt section in the linker, and dump SFrame
information in objdump and readelf (with option --sframe).
binutils/
* NEWS: Announce s390 64-bit (s390x) SFrame V2 support in
as, ld, objdump, and readelf.
gas/
* NEWS: Update s390 64-bit (s390x) SFrame V2 support in
assembler.
s390: sframe: Test handling of .cfi_def_cfa_register
Port x86-64 test for handling of .cfi_def_cfa_register from commit 3602da6fa285 ("gas: sframe: fix handling of .cfi_def_cfa_register")
to s390x.
gas/testsuite/
PR gas/32879
* gas/cfi-sframe/cfi-sframe.exp: Add new test for handling of
.cfi_def_cfa_register on s390x.
* gas/cfi-sframe/cfi-sframe-s390x-3.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-3.s: Likewise.
s390: Store SFrame CFA offset adjusted and scaled down
In SFrame V2 the size of the offsets following an SFrame FRE can be
either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset
determining their size:
1. CFA offset from CFA base register
2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved
3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved
The FP and RA offsets from CFA, when FP/RA saved on the stack, usually
have fixed values that fit into signed 8-bit SFrame offsets. Likewise
the DWARF register numbers on s390x of general registers (GR; 0-15) and
floating-point registers (FPR; 16-31), when FP/RA saved in registers.
With that the CFA offset from CFA base register has the greatest impact
on the signed SFrame offset size.
The s390x ELF ABI defines the stack pointer (SP) to be 8-byte aligned
[1] and the CFA as SP at call site + 160 [2]. The CFA offset from CFA
base register is therefore always a multiple of 8.
On s390x store the SFrame CFA offset from CFA base register scaled down
by the s390x-specific CFA alignment factor of 8, in addition to the
adjustment by the s390x-specific CFA adjustment of -160, to further
improve the use of signed 8-bit SFrame offsets. This is similar to the
DWARF data alignment factor getting factored out from certain offsets
stored in DWARF CFI.
In SFrame V2 the size of the offsets following an SFrame FRE can be
either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset
determining their size:
1. CFA offset from CFA base register
2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved
3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved
The FP and RA offsets from CFA, when FP/RA saved on the stack, usually
have fixed values that fit into signed 8-bit SFrame offsets. Likewise
the DWARF register numbers on s390x of general registers (GR; 0-15) and
floating-point registers (FPR; 16-31), when FP/RA saved in registers.
With that the CFA offset from CFA base register has the greatest impact
on the signed SFrame offset size.
The s390x ELF ABI [1] defines the CFA as stack pointer (SP) at call
site +160. [2] Therefore the minimum CFA offset from CFA base register
on s390x is 160. This does not fit into a signed 8-bit integer and
therefore effectively prevents any use of signed 8-bit SFrame offsets
on s390x.
For s390x store the CFA offset from CFA base register adjusted by -160
to enable the use of signed 8-bit SFrame offsets.
include/
* sframe.h (SFRAME_S390X_CFA_OFFSET_ADJUSTMENT): Define
s390x-specific CFA offset adjustment.
(SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
SFRAME_V2_S390X_CFA_OFFSET_DECODE): New s390x-specific
macros. Use SFRAME_S390X_CFA_OFFSET_ADJUSTMENT to en-/decode
CFA offset.
bfd/
* elf64-s390.c (elf_s390x_sframe_plt_fre): Use
SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it
adjusted and switch to 8-bit offsets.
gas/
* gen-sframe.c (sframe_fre_set_cfa_offset): For s390x use
SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it
adjusted.
(sframe_fre_get_cfa_offset): New helper. For s390x use
SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its
adjustment.
(sframe_xlate_do_def_cfa_register): Use new helper
sframe_fre_get_cfa_offset.
libsframe/
* sframe.c (sframe_fre_get_cfa_offset): For s390x use
SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its
adjustment.
* doc/sframe-spec.texi (s390x,
SFRAME_S390X_CFA_OFFSET_ADJUSTMENT,
SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
SFRAME_V2_S390X_CFA_OFFSET_DECODE): Document s390x-specific
adjustment of CFA offset.
libsframe/testsuite/
* libsframe.find/plt-findfre-2.c (add_plt0_fde, add_pltn_fde):
Use SFRAME_V2_S390X_CFA_OFFSET_ENCODE to enable use of 1-byte
SFrame offsets.
libsframe: Add test for PLT0 and PLTN with only one FRE each
On s390x the PLT0 and PLTN entries are described with one SFrame FRE
each. Add a test case for this particularity.
libsframe/testsuite/
* libsframe.find/find.exp (plt-findfre-2): Add new test.
* libsframe.find/plt-findfre-2.c: New test for PLT0 and PLTN
with only one FRE each.
* libsframe.find/local.mk (plt-findfre-2): Add new test.
s390: Add SFrame stack trace information for .plt section
Enable SFrame stack tracing through PLT entries. Based on x86-64.
On s390x both PLT0 and PLTn entries are 32-bytes in size. Their code
neither alters the stack pointer (SP), frame pointer (FP), nor return
address (RA) registers. Therefore the PLT0 can be represented using
a SFrame FDE of type PCINC with a single SFrame FRE and the PLTn can
be represented using a SFrame FDE of type PCMASK, with a repetition
block size of 32 (PLTn size), and a single SFrame FRE.
Note that as both the PLT0 entry and the PLTn entries have equal size
and could both be represented using the identical SFrame FRE, the whole
.plt section on s390x could be represented using a single SFrame FDE of
type PCMASK, with a repetition block size of 32 (PLT0 and PLTn size),
and a single SFrame FRE. Keep the x86-64 logic with separate SFrame
FDEs for PLT0 and PLTn, to ease potential generalization of the .sframe
for .plt generation logic among architectures.
bfd/
* elf64-s390.c: Include sframe.h and sframe-api.h.
(PLT_SFRAME_FDE_START_OFFSET, SFRAME_PLT0_MAX_NUM_FRES,
SFRAME_PLTN_MAX_NUM_FRES, elf_s390x_sframe_plt_fre,
elf_s390x_sframe_plt): New .sframe template for .plt section.
(elf_s390_link_hash_table): Add plt_cfe_ctx, plt_sframe, and
sframe_plt fields.
(_bfd_s390_elf_create_sframe_plt): New function. Fill in
.sframe section for .plt section.
(_bfd_s390_elf_write_sframe_plt): New function. Write .sframe
section.
(elf_s390_create_dynamic_sections): Create .sframe section for
.plt section.
(elf_s390_late_size_sections): Call
_bfd_s390_elf_create_sframe_plt and
_bfd_s390_elf_write_sframe_plt.
(elf_s390_finish_dynamic_sections): Write .plt section start
into .sframe FDE covering .plt section. Call
_bfd_elf_merge_section_sframe on htab->plt_sframe.
ld/
* NEWS: Add news entry.
ld/testsuite/
* ld-s390/s390.exp: Add new test.
* ld-s390/sframe-plt-1.d: New linker-generated .sframe for .plt
test.
* ld-s390/sframe-simple-1.d: Adjust expected test output due to
linker-generated .sframe for .plt.
If an architecture uses both SFrame RA and FP tracking SFrame assumes
that the RA offset is the 2nd offset and the FP offset is the 3rd offset
following a SFrame FRE. An architecture does not necessarily need to
save both on the stack (or in register) at the same time or even at all.
SFrame cannot represent FP without RA saved on stack (or in a register),
since it cannot distinguish whether the 2nd offset is the RA or FP
offset.
For s390x use an invalid SFrame RA offset from CFA value of zero as
padding to represent the FP being saved when the RA is not saved. This
aligns with the existing invalid SFrame fixed RA offset from CFA value
of zero. In a stack tracer this then also naturally falls into place,
as it can skip restoring the RA in the topmost frame, if both the fixed
RA offset (from SFrame header) and the RA offset (from FDE) are zero,
without any need to test architecture-specific flags.
include/
* sframe.h (SFRAME_FRE_RA_OFFSET_INVALID): New define. Used as
padding offset.
* sframe-api.h (sframe_fre_get_ra_offset): Add comment that for
s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates
that the RA is not saved.
gas/
* gen-sframe.c (get_fre_num_offsets): For s390x account padding
RA offset, if FP without RA saved.
(sframe_get_fre_offset_size): Likewise.
(output_sframe_row_entry): For s390x write a padding RA offset,
if FP without RA needs to be represented.
(sframe_do_fde): Enable FP without RA saved to be represented
on s390x.
libsframe/
* sframe.c (sframe_fre_get_ra_offset): Add comment that for
s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates
that the RA is not saved.
* sframe-dump.c (dump_sframe_func_with_fres): Treat invalid
RA offsets as if they were undefined. Display them as "U"
to distinguish them.
* doc/sframe-spec.texi (s390x): Document s390x-specific use of
SFRAME_FRE_RA_OFFSET_INVALID to represent FP without RA saved.
GCC on s390x, when in a leaf function, can be observed to save the
frame pointer (FP) and/or return address (RA) register in a floating-
point registers (FPR) instead of on the stack. This is declared using
the following CFI directive:
.cfi_register <fp/ra-regnum>, <fpr-regnum>
SFrame cannot represent the FP and/or RA being saved in another
register. It does only track the CFA base register (SP/FP), CFA offset
from CFA base register, and FP and RA save area offsets from CFA.
On s390x the FP and/or RA are only saved in another FPR when in a leaf
function. That is a function that does not call any other function.
Therefore it can ever only be the topmost function in a call chain.
An unwinder by default has access to all registers of the function that
is the topmost on the call stack. Therefore no further information
is required to restore FP/RA from the FPR.
Represent FP/RA saved in another register on s390x, by encoding the
DWARF register number shifted by one to the left with the least-
significant bit set in the offset as follows:
offset = (regnum << 1) | 1
The use of the least-significant bit of the offset as indication is
possible, as the stack pointer (SP), the CFA, and any register save
area slots are 8-byte aligned according to the s390x ELF ABI:
- The stack pointer (SP) "shall maintain an 8-byte alignment". [1]
- The CFA is defined as SP at call site +160. [2]
- Pointers and 8-byte integers, such as general register values, must
be 8-byte aligned. [3]
SFrame FP and RA stack offsets must therefore always be a multiple of
8 on s390x. Note that for the same reason the DWARF data alignment
factor is -8 on s390x (see DWARF2_CIE_DATA_ALIGNMENT).
Add s390x-specific SFrame (error) tests for FP/RA saved in FPRs in leaf
function.
include/
* sframe.h (SFRAME_V2_S390X_OFFSET_IS_REGNUM): New s390x-
specific macro to test whether an SFrame FP/RA offset is a DWARF
register number.
(SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM): New s390x-specific macro
to encode a DWARF register number into an SFrame FP/RA offset.
(SFRAME_V2_S390X_OFFSET_DECODE_REGNUM): New s390x-specific macro
to decode an SFrame FP/RA offset into a DWARF register number.
* sframe-api.h (sframe_fre_get_fp_offset,
sframe_fre_get_fp_offset): Add comment that for s390x the offset
may be an encoded register number.
gas/
* gen-sframe.c (s390_sframe_xlate_do_register): New S390-
specific function. Uses SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM to
represent FP/RA saved in another register on s390x.
(sframe_xlate_do_register): Invoke s390_sframe_xlate_do_register
on s390x.
libsframe/
* sframe.c (sframe_fre_get_fp_offset, sframe_fre_get_fp_offset):
Add comment that for s390x the offset may be an encoded register
number.
* sframe-dump.c (is_sframe_abi_arch_s390x): New helper to test
whether ABI/arch is s390x.
(dump_sframe_func_with_fres): Use
SFRAME_V2_S390X_OFFSET_IS_REGNUM and
SFRAME_V2_S390X_OFFSET_DECODE_REGNUM to dump FP/RA saved in
another register on s390x.
* doc/sframe-spec.texi (s390x): Document s390x-specific
representation of FP/RA saved in another register.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Update s390x-specific SFrame
(error) tests.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s: Rename
to ...
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d:
Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.s: This. Test
no longer triggers a warning, as SFrame can represent FP and RA
saved in registers.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Test
now triggers a different warning, as SFrame can represent FP and
RA saved in registers, but not FP without RA saved in register.
s390: Initial support to generate .sframe from CFI directives in assembler
This introduces initial support to generate .sframe from CFI directives
in assembler on s390 64-bit (s390x). Due to SFrame V2 format
limitations it has the following limitations, some of them getting
addressed by subsequent patches, which cause generation of SFrame FDE
to be skipped:
- SFrame FP/RA tracking only supports register contents being saved on
the stack (i.e. .cfi_offset). It does not support FP/RA register
contents being saved in other registers (i.e. .cfi_register). GCC on
s390x can be observed to save the FP/RA register contents in floating-
point registers, but only in leaf functions.
This issue is detailed further and resolved in the subsequent commit
"s390: Represent FP/RA saved in register in SFrame".
- SFrame FP/RA tracking cannot represent FP without RA saved. This is
because the format assumes SFrame FDE offset2 to be the RA offset, if
there are two offsets, and offset3 to be the FP offset, if there are
three offsets. There is no mean to distinguish whether offset2 is the
RA or FP offset, if there are only two offsets.
This issue is detailed further and resolved in the subsequent commit
"s390: Represent FP without RA saved in SFrame".
- SFrame assumes a dedicated FP register number. The s390x ELF ABI [1]
does only designate register 11 as preferred FP register number. In
general GCC and Clang on s390x use register 11 as frame pointer.
GCC on s390x can be observed to use register 14 as frame pointer in
the stack clash protector in the function prologue.
glibc on s390x contains hand-written assembler code that uses
register 12 as frame pointer.
This s390x support is largely based on the AArch64 support from commit b52c4ee46657 ("gas: generate .sframe from CFI directives").
The SFrame ABI/arch identifier SFRAME_ABI_S390X_ENDIAN_BIG is introduced
for s390x and added to the SFrame format specification.
The s390x ELF ABI [1] specifies the following C calling conventions for
s390x architecture:
- Register 15 is the stack pointer (SP).
- Register 14 contains the return address (RA) at function entry.
- There is no dedicated frame pointer register. Register 11 is the
preferred frame pointer (FP). [2] GCC and Clang in general use
register 11 as frame pointer.
- The CFA is defined as SP at call site +160. [3] The SP at call site
can therefore be derived from the CFA using a SP value offset from CFA
of -160.
The s390x ELF ABI [1] does not assign any standard save slot to each
register in the register save area of a stack frame. Neither the
return address (RA, r14) nor preferred frame pointer (FP, r11)
necessarily need to be saved. Therefore SFrame RA and FP tracking is
used.
Support for SFrame on s390 is only enabled for the 64-bit s390x ELF ABI
(z/Architecture with 64-bit addressing mode). It is disabled for the
32-bit s390 ELF ABI (ESA/390 or z/Architecture with 32-bit addressing
mode).
s390x-specific SFrame assembler and linker tests are added, including
error tests for use of a non-preferred frame pointer (FP) register and
specification of a non-default return address (RA) register.
[1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases
[2]: s390x ELF ABI, commit f00421825979 ("Add information about the frame
pointer register"),
https://github.com/IBM/s390x-abi/commit/f00421825979
[3]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
include/
* sframe.h: Add reference to s390x architecture in comments.
(SFRAME_ABI_S390X_ENDIAN_BIG): Define SFrame ABI/arch identifier
for s390x.
(SFRAME_S390X_SP_VAL_OFFSET): Define s390x-specific SP value
offset from CFA.
libsframe/
* sframe.c (need_swapping): Add SFRAME_ABI_S390X_ENDIAN_BIG.
* doc/sframe-spec.texi (SFRAME_ABI_S390X_ENDIAN_BIG, s390x,
SFRAME_S390X_SP_VAL_OFFSET): Document SFrame ABI/arch identifier
for s390x, add references to s390x architecture, and document
s390x-specifics, such as the SP value offset from CFA of -160.
gas/
* config/tc-s390.h: s390x support to generate .sframe from CFI
directives in assembler.
(support_sframe_p): Define.
(SFRAME_CFA_SP_REG, SFRAME_CFA_FP_REG, SFRAME_CFA_RA_REG):
Define.
(sframe_ra_tracking_p): Define.
(sframe_cfa_ra_offset): Define.
(sframe_get_abi_arch): Define.
* config/tc-s390.c: s390x support to generate .sframe from CFI
directives in assembler.
(s390_sframe_cfa_sp_reg, s390_sframe_cfa_fp_reg,
s390_sframe_cfa_ra_reg): New. Initialize to DWARF register
numbers of stack pointer (SP, r15), preferred frame pointer
(FP, r11), and return address (RA, r14) registers.
(s390_support_sframe_p): New function. Return true if s390x.
(s390_sframe_ra_tracking_p): New function. Return true.
(s390_sframe_cfa_ra_offset): New function. Return
SFRAME_CFA_FIXED_RA_INVALID.
(s390_sframe_get_abi_arch): New function. Return
SFRAME_ABI_S390X_ENDIAN_BIG if s390x, otherwise zero.
* gen-sframe.c: Add reference to s390x architecture in comments.
(sframe_xlate_do_val_offset): Add support for s390x-specific
SFRAME_S390X_SP_VAL_OFFSET.
* NEWS: Add news entry.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Enable common SFrame tests for
s390x. Add s390x-specific SFrame (error) tests.
* gas/cfi-sframe/cfi-sframe-s390x-1.d: New s390x-specific SFrame
test.
* gas/cfi-sframe/cfi-sframe-s390x-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-2.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-2.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-1.d: New s390x-specific
SFrame error test that uses a non-default frame-pointer register
as CFA base register.
* gas/cfi-sframe/cfi-sframe-s390x-err-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-2.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-2.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-3.d: New s390x-specific
SFrame error test that uses a non-default return address
register.
* gas/cfi-sframe/cfi-sframe-s390x-err-3.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.d: New s390x-
specific SFrame test that saves RA and FP individually on the
stack.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: New
s390x-specific SFrame error test that saves FP and RA
individually, to trigger FP without RA saved.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: New
s390x-specific SFrame error test that saves FP and RA
individually in registers.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s:
Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d: New
s390x-specific SFrame error test that saves RA and FP
individually in registers.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s:
Likewise.
Generating the linker dump test list using file globbing makes it
difficult to exclude specific tests under certain circumstances. List
them explicitly instead. This enables to add tests in the future that
can be excluded. While at it reorganize how s390 linker tests get
run for s390x.
ld/testsuite/
* ld-s390/s390.exp: Reorganize and explicitly list linker dump
tests.
sframe: Ignore section padding when converting endianness
The .sframe section may have a trailing padding due to the architecture-
specific default section alignment. Do not treat this padding as error
when converting between target and host endianness.
This can be observed when building Binutils with SFrame s390x support on
x86-64 for s390x using configure option "--target=s390x-ibm-linux-gnu"
and running the GAS test suite.
While at it reuse the determined SFrame section header size.
Alan Modra [Thu, 10 Jul 2025 21:25:43 +0000 (06:55 +0930)]
AM_PO_SUBDIRS
Swap AM_PO_SUBDIRS and ZW_GNU_GETTEXT_SISTER_DIR lines in
*/configure.ac. ZW_GNU_GETTEXT_SISTER_DIR indirectly invokes
AC_REQUIRE(AM_PO_SUBDIRS) so results in AM_PO_SUBDIRS being emitted
before ZW_GNU_GETTEXT_SISTER_DIR if it hasn't already been invoked.
Alan Modra [Thu, 10 Jul 2025 01:45:16 +0000 (11:15 +0930)]
gas v850 md_convert_frag
The v850 md_convert_frag function oddly calls subseg_change twice
(commit 1cd986c58543). Neither call is needed, because that is done
in size_seg.
Convert the fr_opcode fixup field back (to an opindex, not fx_r_type)
using a cast rather than a union, since we used casts when setting up
those values. I guess the union was added to silence compiler
warnings about wrong-size casts, but unfortunately results in the
wrong value being retrieved on big-endian hosts.
Change "buffer" to a char* as there is no need to make it an
unsigned char*, and that way requires fewer casts. Finally, fix
formatting and use uintptr_t when make the rs_machine_dependent frags.
Remove subseg_change calls from cr16, crx, mn10200, mn10300, and sh
md_convert_frag too.
Alan Modra [Wed, 9 Jul 2025 08:45:10 +0000 (18:15 +0930)]
union alpha_macro_arg
Rename the old enum alpha_macro_arg to alpha_macro_argset, and create
a union alpha_macro_arg to use in all the alpha_macro.emit functions.
This avoids intptr_t casts on retrieving index values and void* casts
on storing them in the alpha_macros array.
Nelson Chu [Wed, 9 Jul 2025 04:53:41 +0000 (12:53 +0800)]
RISC-V: Fixed wrong imply result for zce when -march=rv32id_zce
The entry of "zce imply zcf" needs check_implicit_for_zcf, so it needs to be
placed after the entries of "whatever imply f". Otherwise the implicit zcf
may be missed. Also merge the march-implu-zce* testcases into imply testcases.
Nelson Chu [Wed, 9 Jul 2025 04:53:40 +0000 (12:53 +0800)]
RISC-V: Clarify the imply rule of c
This also fix the imply result for .option rvc.
Imply zcf when c and f and rv32
Imply zcd when c and d
Imply zca when c
Changed INSN_CLASS_C to INSN_CLASS_ZCA
Changed INSN_CLASS_F_AND_C to INSN_CLASS_ZCF
Changed INSN_CLASS_D_AND_C to INSN_CLASS_ZCD
Changed INSN_CLASS_ZIHINTNTL_AND_C to INSN_CLASS_ZIHINTNTL_AND_ZCA
The intention of creating an abstraction like
SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS is to address the concern that there
should be a central place to enforce harmonious flags between GNU as and
ld. At the moment, the only flag that needs to be enforced is
SFRAME_F_FDE_FUNC_START_PCREL.
sframe.h and sframe-api.h are installed headers by libsframe for the
specification and implementation respectively. Adding a definition like
SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS does not fit in either. Create a
new internal header instead to keep the definition uncoupled from
sframe.h and sframe-api.h. Rename the previously added
SFRAME_F_LD_MUSTHAVE_FLAGS to define the new
SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS.
bfd/
* elf-sframe.c (_bfd_elf_merge_section_sframe): Use the new
internal header and SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS.
gas/
* gen-sframe.c (output_sframe_internal): Likewise.
include/
* sframe-api.h (SFRAME_F_LD_MUSTHAVE_FLAGS): Move from..
* sframe-internal.h: ..to here. New file.
Alan Modra [Tue, 8 Jul 2025 23:44:06 +0000 (09:14 +0930)]
Merge init_private_section_data with copy_private_section_data
init_private_section_data is used by the linker and is a special case
of copy_private_section_data that copies a reduced set of section data
from input to output. Merge the two functions, adding a link_info
param to copy_private_section_data and remove init_private_section_data.
Alan Modra [Tue, 8 Jul 2025 23:43:14 +0000 (09:13 +0930)]
gas standardise md_section_align
The point here is that when valueT is 64 bits and int is 32 bits,
1 << align doesn't work for shifts larger than the size of int. (Not
that anyone is likely to use such large alignments in real code.)
Alan Modra [Tue, 8 Jul 2025 23:42:20 +0000 (09:12 +0930)]
gas char/unsigned char casts
This patch removes many unneeded casts to char or unsigned char. It's
worth noting that safe-ctype.h macros ISDIGIT and the like cope with
either signed or unsigned char.
In some cases a cast to unsigned char is replaced by anding with 0xff,
which accomplishes the same thing but doesn't rely on char being eight
bits. The patch also removes pointer casts, and a few unsigned char
pointer variables.
Alan Modra [Tue, 8 Jul 2025 23:39:23 +0000 (09:09 +0930)]
gas alpha sign extension macros
Use standard sign extend and range checking using unsigned
expressions that don't rely on implementation defined right shifts or
size of short and int.
Alan Modra [Tue, 8 Jul 2025 23:35:12 +0000 (09:05 +0930)]
gas md_number_to_chars
Calls to md_number_to_chars don't need to cast their value arg (*).
Remove those casts. avr_output_property_recode made a call to
md_number_to_chars with size of 1. Simplify that. tc-bpf.c
md_convert_frag used write_insn_bytes that simply copied input to
output. Dispense with that nonsense, and similarly in a couple of
other places where md_number_to_chars was called with size 1.
*) unless the value arg is an expression that needs a cast, eg. tic54x
emit_insn where the shift left could trigger signed overflow UB
without a cast.
Alan Modra [Tue, 8 Jul 2025 23:33:45 +0000 (09:03 +0930)]
gas various other void* casts
This removes assorted unneeded casts of void* pointers, and casts when
passing args to void* parameters or storing to void* pointers. The
patch also changes obj-coff.c stack_push to take a void* parameter,
and replaces an odd memcpy in tc-metag.c find_insn_templates with a
simple assignment.
Alan Modra [Tue, 8 Jul 2025 23:33:08 +0000 (09:03 +0930)]
gas various other const pointer changes
This removes a bunch of casts involving const pointers, in some cases
by making variables const pointers so a cast is not needed. In a
couple of places the cast hid errors with "&array" written rather than
"array", see iq2000_macro_defs and s_pru_align. tc-xgate.c cmp_opcode
is changed to be the standard qsort predicate to avoid a function
cast.
Alan Modra [Tue, 8 Jul 2025 23:32:05 +0000 (09:02 +0930)]
gas bfd_put and bfd_get arg casts
bfd_{h_,}put_* and bfd_{h_,}get_* have "void *" pointer params
nowadays. We don't need casts on their pointer args. We also don't
need to cast values passed to bfd_put.
Alan Modra [Tue, 8 Jul 2025 23:29:10 +0000 (08:59 +0930)]
gas NULL casts
This removes many unnecessary NULL casts. I'm also adding a few arg
casts in concat calls, to make the code consistent. Advice from quite
a few years ago was that it's better to use the exact type for args
corresponding to function ellipses, in case NULL is defined as plain
0. (I think that happened with some early 64-bit systems. Plain NULL
ought to be OK nowadays.)
Alan Modra [Tue, 8 Jul 2025 23:28:11 +0000 (08:58 +0930)]
gas bfd_reloc_code_real_type
Enumeration constants are integer types, so there should be no need to
cast such constants to int in expressions. (Perhaps some older gccs
warned, I checked back to gcc-4.5.) Remove some of those unnecessary
casts. Also remove unnecessary casts to bfd_reloc_code_real_type.
Alan Modra [Tue, 8 Jul 2025 23:24:56 +0000 (08:54 +0930)]
gas frag_var
Many frag_var calls have unnecessary casts on arguments, no doubt from
the days when binutils was written for K&R C. (ie. functions were not
prototyped so you needed to cast anything that didn't match the
expected type after default promotions, as you still do for args
matching a function ellipsis.) Remove those casts.
Alan Modra [Tue, 8 Jul 2025 23:24:24 +0000 (08:54 +0930)]
gas pointer to int and vice versa
Use "intptr_t" or "uintptr_t" for these conversions, not "long" which
is wrong on LLP64 systems, or "size_t" which is better but still not
the correct type.
* config/tc-alpha.c (emit_ldXu, emit_ldX, emit_uldXu, emit_uldX),
(emit_stX, emit_ustX, emit_sextX): Use correct type when
converting vlgsize pointer to in. Use "int" rather than
"long" for result.
* config/tc-ia64.c (generate_unwind_image): Use intptr_t cast
when passing personality_routine to frag_var.
* config/tc-ppc.c (ppc_frob_symbol <coff>): Use uintptr_t cast
when converting symbol pointer to valueT.
* config/tc-v850.c (md_assemble): Use intptr_t cast when
loading integer opindex.
projects / thirdparty / binutils-gdb.git / log
