John Levon [Wed, 7 May 2025 15:20:10 +0000 (16:20 +0100)]
vfio: consistently handle return value for helpers
Various bits of code that call vfio device APIs should consistently use
the "return -errno" approach for passing errors back, rather than
presuming errno is (still) set correctly.
Tomita Moeko [Mon, 5 May 2025 17:03:05 +0000 (01:03 +0800)]
vfio/igd: Remove generation limitation for IGD passthrough
Starting from Intel Core Ultra Series (Meteor Lake), Data Stolen Memory
has became a part of LMEMBAR (MMIO BAR2) [1][2], meaning that BDSM and
GGC register quirks are no longer needed on these platforms.
To support Meteor/Arrow/Lunar Lake and future IGD devices, remove the
generation limitation in IGD passthrough, and apply BDSM and GGC quirks
only to known Gen6-12 devices.
Tomita Moeko [Mon, 5 May 2025 17:03:04 +0000 (01:03 +0800)]
vfio/igd: Only emulate GGC register when x-igd-gms is set
x-igd-gms is used for overriding DSM region size in GGC register in
both config space and MMIO BAR0, by default host value is used.
There is no need to emulate it in default case.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-9-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:03 +0000 (01:03 +0800)]
vfio/igd: Allow overriding GMS with 0xf0 to 0xfe on Gen9+
On Gen9 and later IGD devices, GMS 0xf0 to 0xfe represents 4MB to 60MB
pre-allocated memory size in 4MB increments. Allow users overriding
GMS with these values.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-8-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:02 +0000 (01:03 +0800)]
vfio/igd: Enable OpRegion by default
As the presence of OpRegion is used to detect IGD device now, and
guest driver usually depends on OpRegion to work. Enable OpRegion
on IGD devices by default for out-of-the-box passthrough experience
(except pre-boot display output), especially for libvirt users.
Example of IGD passthrough with libvirt:
<hostdev mode="subsystem" type="pci" managed="yes">
<source>
<address domain="0x0000" bus="0x00" slot="0x02" function="0x0"/>
</source>
<rom file="/path/to/igd/rom"/>
<address type="pci" domain="0x0000" bus="0x00" slot="0x02" function="0x0"/>
</hostdev>
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-7-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:01 +0000 (01:03 +0800)]
vfio/igd: Check OpRegion support on GVT-g mdev
The Intel GVT-g backend `kvmgt` always emulates OpRegion for vGPU,
make sure the OpRegion is present for enabling access to it
automatically later.
Also, hotplugging GVT-g vGPU is now always disallowed regardless of
OpRegion to prevent potential issues. Intel has never claimed support
for GVT-g hotplugging.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-6-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:03:00 +0000 (01:03 +0800)]
vfio/igd: Check vendor and device ID on GVT-g mdev
Check the vendor and device ID on GVT-g mdev to ensure it is a supported
device [1]. This extra check is required for automatically enabling
OpRegion access later.
Note that Cherryview and Gemini Lake are marked as supported here since
current code cannot distinguish them with other Gen8 and Gen9 devices.
Since mdev cannot be created on these devices, this has no functional
impact.
Tomita Moeko [Mon, 5 May 2025 17:02:59 +0000 (01:02 +0800)]
vfio/igd: Detect IGD device by OpRegion
There is currently no straightforward way to distinguish if a Intel
graphics device is IGD or discrete GPU. However, only IGD devices have
OpRegion. Use the presence of VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
to identify IGD devices. Still, OpRegion on hotplugged IGD device is
not supported.
Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250505170305.23622-4-tomitamoeko@gmail.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Tomita Moeko [Mon, 5 May 2025 17:02:58 +0000 (01:02 +0800)]
vfio/igd: Always emulate ASLS (OpRegion) register
ASLS register represents the base address of OpRegion, and it is
programmed with HPA. In IGD passthrough scenario, it needs to be
reprogrammed with GPA by guest firmware. To prevent guest accessing
wrong memory range, ASLS should always be emulated and cleared.
In GVT-g scenario, emulating ASLS is unnecessary as access is handled
by kvmgt backend [1].
Tomita Moeko [Mon, 5 May 2025 17:02:57 +0000 (01:02 +0800)]
vfio/igd: Restrict legacy mode to Gen6-9 devices
Intel only provides legacy VBIOS for IGD up to Gen9, and there is no
CSM support on later devices. Additionally, Seabios can only handle
32-bit BDSM register used until Gen9. Since legacy mode requires VGA
capability, restrict it to Gen6 through Gen9 devices.
Steve Sistare [Fri, 2 May 2025 14:22:38 +0000 (07:22 -0700)]
vfio/container: ram discard disable helper
Define a helper to set ram discard disable, generate error messages,
and cleanup on failure. The second vfio_ram_block_discard_disable
call site now performs VFIO_GROUP_UNSET_CONTAINER immediately on failure,
instead of relying on the close of the container fd to do so in the kernel,
but this is equivalent.
Thomas Huth [Thu, 8 May 2025 18:09:18 +0000 (20:09 +0200)]
tests/functional: Use -no-shutdown in the hppa_seabios test
qemu-system-hppa shuts down automatically when the BIOS is
unable to boot from any device. So this test currently fails
occasionally when QEMU already quit, but the test still
expected it to be around (e.g. to shut it down cleanly).
Adding a "-no-shutdown" seems to make it reliable.
While we're at it, also remove the stray "self.machine" in
there that does not have any purpose.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id: 20250508180918.228757-1-thuth@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (30 commits)
gitlab: Enable CI for wasm build
tests: Add Dockerfile containing dependencies for Emscripten build
meson: Add wasm build in build scripts
util: Add coroutine backend for emscripten
util: exclude mmap-alloc.c from compilation target on Emscripten
Disable options unsupported on Emscripten
include/qemu/osdep.h: Add Emscripten-specific OS dependencies
block: Fix type conflict of the copy_file_range stub
block: Add including of ioctl header for Emscripten build
util/cacheflush.c: Update cache flushing mechanism for Emscripten
include/glib-compat.h: Poison g_list_sort and g_slist_sort
target/s390x: Fix type conflict of GLib function pointers
target/ppc: Fix type conflict of GLib function pointers
target/i386/cpu.c: Fix type conflict of GLib function pointers
target/arm/helper.c: Fix type conflict of GLib function pointers
docs: build-system: fix typo
ci: run RISC-V cross jobs by default
rust: clippy: enable uninlined_format_args lint
target/i386/emulate: fix target_ulong format strings
docs: rust: update for newer minimum supported version
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 7 May 2025 18:28:20 +0000 (14:28 -0400)]
Merge tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
* arm/hvf: fix crashes when using gdbstub
* target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug
* hw/arm/virt: Remove deprecated old versions of 'virt' machine
* tests/functional: Add test for imx8mp-evk board with USDHC coverage
* hw/arm: Attach PSPI module to NPCM8XX SoC
* target/arm: Don't assert() for ISB/SB inside IT block
* docs: Don't define duplicate label in qemu-block-drivers.rst.inc
* target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
* hw/pci-host/designware: Fix viewport configuration
* hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
Stefan Hajnoczi [Tue, 6 May 2025 15:03:45 +0000 (11:03 -0400)]
Merge tag 'pull-loongarch-20250506' of https://github.com/bibo-mao/qemu into staging
loongarch queue
# -----BEGIN PGP SIGNATURE-----
#
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# 0cSzAPoCbqppm5lUPgFAacD4m1sUI6jLk5pJGMsQTQHkMZ34yQD7BswZhMWPL44Z
# LmrZgO7NfqAv96AF1mpRawV9ZXSOGAQ=
# =3itp
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 05 May 2025 21:18:06 EDT
# gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C
# Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1
* tag 'pull-loongarch-20250506' of https://github.com/bibo-mao/qemu:
hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID
hw/loongarch/virt: Replace RSDT with XSDT table
hw/loongarch/virt: Get physical entry address with elf file
hw/intc/loongarch_pch: Replace legacy reset callback with new api
hw/intc/loongarch_pch: Add reset support
hw/intc/loongarch_extioi: Replace legacy reset callback with new api
hw/intc/loongarch_extioi: Add reset support
hw/intc/loongarch_ipi: Add reset support
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'pull-tcg-20250501-v2' of https://gitlab.com/rth7680/qemu: (59 commits)
accel/tcg: Build user-exec.c once
accel/tcg: Avoid abi_ptr in user-exec.c
accel/tcg: Remove TARGET_PAGE_DATA_SIZE
accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
include/user: Use vaddr in guest-host.h
include/user: Convert GUEST_ADDR_MAX to a variable
accel/tcg: Build cputlb.c once
accel/tcg: Use vaddr for plugin_{load,store}_cb
accel/tcg: Use target_long_bits() in cputlb.c
accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
accel/tcg: Move user-only tlb_vaddr_to_host out of line
accel/tcg: Use vaddr in cpu_loop.h
accel/tcg: Build tcg-all.c twice
accel/tcg: Build translate-all.c twice
accel/tcg: Use target_long_bits() in translate-all.c
accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
tcg: Define INSN_START_WORDS as constant 3
qemu: Introduce target_long_bits()
qemu/target_info: Add %target_cpu_type field to TargetInfo
system/vl: Filter machine list available for a particular target binary
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Update comment about Multiprocessor Affinity Register
Support on ARMv7 has been dropped in commit 82bf7ae84ce
("target/arm: Remove KVM support for 32-bit Arm hosts").
Update the comment in virt_cpu_mp_affinity() to avoid
mentioning it.
Suggested-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250429153907.31866-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
According to the i.MX 8M Plus reference manual, a GPIO pin is
configured as an output when the corresponding bit in the GDIR
register is set. The function imx_gpio_set_int_line() is intended to
be a no-op if the pin is configured as an output, returning early in
such cases. However, it inverts the condition. Fix this by
returning early when the bit is set.
cc: qemu-stable@nongnu.org Fixes: f44272809779 ("i.MX: Add GPIO device") Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20250501183445.2389-4-shentey@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit 6970f91ac781, "hw/pci-host/designware: Use deposit/extract
API" accidentally introduced a copy-and-paste error, causing Linux
6.14 to hang when initializing the PCIe bridge on the imx8mp-evk
machine. This fix corrects the error.
Fixes: 6970f91ac781 ("hw/pci-host/designware: Use deposit/extract API") Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250501183445.2389-3-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The DEFINE_TYPES() macro doesn't need the qemu/module.h include.
Fixes: 13a07eb146c8 ("hw/pci-host/designware: Declare CPU QOM types using DEFINE_TYPES() macro") Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250501183445.2389-2-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 18 Mar 2025 11:42:22 +0000 (11:42 +0000)]
target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
Our KVM code includes backwards compatibility support for ancient
kernels which don't support the KVM_ARM_PREFERRED_TARGET ioctl. This
ioctl was introduced in kernel commit 42c4e0c77ac91 in September
2013 and is in v3.12, so it's reasonable to assume it's present.
(We already dropped support for kernels without KVM_CAP_DEVICE_CTRL,
a feature added to the kernel in April 2013, in our commit 84f298ea3e; so there are only about six months' worth of kernels,
from v3.9 to v3.11, that we don't already fail to run on and that
this commit is dropping handling for.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250318114222.1018200-1-peter.maydell@linaro.org
Peter Maydell [Thu, 1 May 2025 09:31:26 +0000 (10:31 +0100)]
docs: Don't define duplicate label in qemu-block-drivers.rst.inc
Sphinx requires that labels within documents are unique across the
whole manual. This is because the "create a hyperlink" directive
specifies only the name of the label, not a filename+label. Some
Sphinx versions will warn about duplicate labels, but even if there
is no warning there is still an ambiguity and no guarantee that the
hyperlink will be created to the right target.
For QEMU this is awkward, because we have various .rst.inc fragments
which we include into multiple .rst files. If you define a label in
the .rst.inc file then it will be a duplicate label. We have mostly
worked around this by not putting labels into those .rst.inc files,
or by adding "insert a label" functionality into the hxtool extension
(see commit 1eeb432a953b0 "doc/sphinx/hxtool.py: add optional label
argument to SRST directive").
Unfortunately in commit 7f6314427e78 ("docs/devel: add a codebase
section") we accidentally added a duplicate label, because not all
Sphinx versions warn about the mistake.
In this case the link was only from the developer docs codebase
summary, so as the simplest fix for the stable branch, we drop
the link entirely.
Cc: qemu-stable@nongnu.org Fixes: 1eeb432a953b0 "doc/sphinx/hxtool.py: add optional label argument to SRST directive" Reported-by: Dario Faggioli <dfaggioli@suse.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Eric Blake <eblake@redhat.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20250501093126.716667-1-peter.maydell@linaro.org
Both calls are in arm_tr_tb_stop(), one for the
DISAS_NEXT/DISAS_TOO_MANY handling, and one for the dc->condjump
condition-failed codepath. The DISAS_NEXT handling doesn't have this
problem because arm_post_translate_insn() does the handling of "emit
the label for the condition-failed conditional execution" and so
arm_tr_tb_stop() doesn't have dc->condjump set. But for
DISAS_TOO_MANY we don't do that.
Fix the bug by making arm_post_translate_insn() handle the
DISAS_TOO_MANY case. This only affects the SB and ISB insns when
used in Thumb mode inside an IT block: only these insns specifically
set is_jmp to TOO_MANY, and their A32 encodings are unconditional.
For the major TOO_MANY case (breaking the TB because it would cross a
page boundary) we do that check and set is_jmp to TOO_MANY only after
the call to arm_post_translate_insn(); so arm_post_translate_insn()
sees is_jmp == DISAS_NEXT, and we emit the correct code for that
situation.
With this fix we generate the somewhat more sensible set of TCG ops:
brcond_i32 ZF,$0x0,ne,$L1
set_label $L1
add_i32 pc,pc,$0x4
goto_tb $0x1
exit_tb $0x7c5434001b81
(NB: the TCG optimizer doesn't optimize out the jump-to-next, but
we can't really avoid emitting it because we don't know at the
point we're emitting the handling for the condexec check whether
this insn is going to happen to be a nop for us or not.)
Cc: qemu-stable@nongnu.org Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2942 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250501125544.727038-1-peter.maydell@linaro.org
tests: Add Dockerfile containing dependencies for Emscripten build
The added Dockerfile is based on the emsdk image, which includes the
Emscripten toolchain. It also cross-compiles the necessary dependencies
(glib, libffi, pixman, and zlib) for the Emscripten target environment.
has_int128_type is set to false on emscripten as of now to avoid errors by
libffi. Tests are disabled on emscripten because they rely on host
features that aren't supported by emscripten (e.g. fork and unix
socket).
Emscripten does not support couroutine methods currently used by QEMU but
provides a coroutine implementation called "fiber". This commit introduces a
coroutine backend using fiber. Note that fiber does not support submitting
coroutines to other threads.
util: exclude mmap-alloc.c from compilation target on Emscripten
Emscripten does not support partial unmapping of mmapped memory
regions[1]. This limitation prevents correct implementation of qemu_ram_mmap
and qemu_ram_munmap, which rely on partial unmap behavior.
As a workaround, this commit excludes mmap-alloc.c from the Emscripten
build. Instead, for Emscripten build, this modifies qemu_anon_ram_alloc to
use qemu_memalign in place of qemu_ram_mmap, and disable memory backends
that rely on mmap, such as memory-backend-file and memory-backend-shm.
include/qemu/osdep.h: Add Emscripten-specific OS dependencies
On emscripten, some implementations in os-posix.c can't be used such as
daemonizing and changing user. This commit introduces os-wasm.c and
os-wasm.h which are forked from os-posix.c and os-posix.h and patched for
targetting Emscripten.
block: Fix type conflict of the copy_file_range stub
Emscripten doesn't provide copy_file_range implementation but it declares
this function in its headers. Meson correctly detects the missing
implementation and unsets HAVE_COPY_FILE_RANGE. However, the stub defined in
file-posix.c causes a type conflict with the declaration from Emscripten
during compilation.
To fix this error, this commit updates the stub implementation in
file-posix.c to exactly match the declaration in Emscripten's headers. The
manpage also aligns with this signature.
util/cacheflush.c: Update cache flushing mechanism for Emscripten
Although __builtin___clear_cache is used to flush the instruction cache for
a specified memory region, this operation doesn't apply to wasm, as its
memory isn't executable. Moreover, Emscripten does not support this builtin
and fails to compile it with the following error.
> fatal error: error in backend: llvm.clear_cache is not supported on wasm
To resolve this, this commit removes the call to __builtin___clear_cache for
Emscripten build.
include/glib-compat.h: Poison g_list_sort and g_slist_sort
On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.
target/s390x: Fix type conflict of GLib function pointers
On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.
target/ppc: Fix type conflict of GLib function pointers
On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.
target/i386/cpu.c: Fix type conflict of GLib function pointers
On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.
target/arm/helper.c: Fix type conflict of GLib function pointers
On Emscripten, function pointer casts can result in runtime failures due to
strict function signature checks. This affects the use of g_list_sort and
g_slist_sort, which internally perform function pointer casts that are not
supported by Emscripten. To avoid these issues, g_list_sort_with_data and
g_slist_sort_with_data should be used instead, as they do not rely on
function pointer casting.
Paolo Bonzini [Fri, 2 May 2025 15:58:54 +0000 (17:58 +0200)]
rust: qom: fix TODO about zeroability of classes
The proposed suggestion is not correct. First it is not necessary for
*all* classes to be Zeroable, only for Rust-defined ones; classes
defined in C never implement ObjectImpl.
Second, the parent class field need not be Zeroable. For example,
ChardevClass's chr_write and chr_be_event fields cannot be NULL,
therefore ChardevClass cannot be Zeroable. However, char_class_init()
initializes them, therefore ChardevClass could be subclassed by Rust code.
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 2 May 2025 08:21:42 +0000 (10:21 +0200)]
lcitool: use newer Rust for Debian and Ubuntu
On Debian, the rustc-web package provides a newer Rust compiler (1.78)
for all architectures except mips64el.
On Ubuntu, Rust versions up to 1.80 (?) are available as of this writing
for both Jammy (22.04) and Noble (24.04). However, the path to rustc
and rustdoc must be provided by hand to the configure script using
either command line arguments or environment variables.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
tests/functional: Add test for imx8mp-evk board with USDHC coverage
Introduce a functional test which boots Debian 12 on the imx8mp-evk board. Since
the root filesystem resides on an SD card, the test also verifies the basic
operation of the USDHC.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20250409202630.19667-1-shentey@gmail.com
[PMM: added extra blank line as suggested by thuth;
set timeout to 240s] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam field
The VirtMachineClass::no_highmem_ecam field was only
used by virt-2.12 machine, which got removed. Remove it
and simplify virt_instance_init().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver field
The VirtMachineClass::smbios_old_sys_ver field was
only used by virt-2.11 machine, which got removed.
Remove it and simplify virt_build_smbios().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers field
The VirtMachineClass::claim_edge_triggered_timers field
was only used by virt-2.8 machine, which got removed.
Remove it and simplify fdt_add_timer_nodes() and build_gtdt().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::no_its field
The VirtMachineClass::no_its field was only used by
virt-2.7 machine, which got removed. Remove it and
simplify virt_instance_init() and virt_acpi_build().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The VirtMachineClass::disallow_affinity_adjustment
field was only used by virt-2.6 machine, which got
removed. Remove it and simplify virt_cpu_mp_affinity().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
[PMM: Remove now-unused variable] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/virt: Remove VirtMachineClass::no_pmu field
The VirtMachineClass::no_pmu field was only used by
virt-2.6 machine, which got removed. Remove it and
simplify machvirt_init().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This machine has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") it can now be removed.
Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
It was reported that QEMU monitor command gva2gpa was reporting unmapped
memory for a valid access (qemu-system-aarch64), during a copy from
kernel to user space (__arch_copy_to_user symbol in Linux) [1].
This was affecting cpu_memory_rw_debug also, which
is used in numerous places in our codebase. After investigating, the
problem was specific to arm_cpu_get_phys_page_attrs_debug.
When performing user access from a privileged space, we need to do a
second lookup for user mmu idx, following what get_a64_user_mem_index is
doing at translation time.
hv_vcpu_set_sys_reg should only be called from the owning thread of the
vCPU, so to avoid crashes, the call to hvf_update_guest_debug is
dispatched to the individual threads.
Tested-by: Daniel Gomez <da.gomez@samsung.com> Signed-off-by: Mads Ynddal <m.ynddal@samsung.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20250402135229.28143-3-mads@ynddal.dk Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tim Lee [Mon, 28 Apr 2025 02:29:34 +0000 (10:29 +0800)]
hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.
Cc: qemu-stable@nongnu.org Fixes: 7e70eb3cad7c83 ("hw/arm: Add NPCM845 Evaluation board") Signed-off-by: Tim Lee <timlee660101@gmail.com>
Message-id: 20250428022934.3081139-1-timlee660101@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Bibo Mao [Tue, 4 Mar 2025 06:59:17 +0000 (14:59 +0800)]
hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID
On LoongArch virt machine, the default OEM ID and OEM table ID is
"BOCHS " and "BXPC ". Here property x-oem-id and x-oem-table-id
is added on virt machine to set customized OEM ID and OEM table ID.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 28 Feb 2025 01:44:12 +0000 (09:44 +0800)]
hw/loongarch/virt: Replace RSDT with XSDT table
XSDT table is introduced in ACPI Specification 5.0, it supports 64-bit
address in the table. There is LoongArch system support from ACPI
Specification 6.4 and later, XSDT is supported by LoongArch system.
Here replace RSDT with XSDT table.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 25 Apr 2025 02:05:04 +0000 (10:05 +0800)]
hw/loongarch/virt: Get physical entry address with elf file
With load_elf() api, image load low address and high address is converted
to physical address if parameter translate_fn is provided. However
executing entry address is still virtual address. Here convert entry
address into physical address, since MMU is disabled when system power on,
the first PC instruction should be physical address.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 06:20:13 +0000 (14:20 +0800)]
hw/intc/loongarch_pch: Replace legacy reset callback with new api
Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object.
The internal state has been cleared in parent object
LOONGARCH_PIC_COMMON, here parent_phases.hold() is directly called.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 03:57:31 +0000 (11:57 +0800)]
hw/intc/loongarch_pch: Add reset support
Add reset support with LoongArch pci irqchip, and register reset
callback support with new API resettable_class_set_parent_phases().
Clear internal HW registers and SW state when virt machine resets.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 02:23:21 +0000 (10:23 +0800)]
hw/intc/loongarch_extioi: Replace legacy reset callback with new api
Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object and then itself.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Fri, 7 Mar 2025 02:12:09 +0000 (10:12 +0800)]
hw/intc/loongarch_extioi: Add reset support
Add reset support with extioi irqchip, and register reset callback
support with new API resettable_class_set_parent_phases(). Clear
internal HW registers and SW state when virt machine resets.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
In page_dump/dump_region, use guest_addr_max to check the
size of the guest address space and size the output
appropriately. This will change output with small values
of -R reserved_va, but shouldn't affect anything else.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
projects / thirdparty / qemu.git / log
