- Add support for the NXP i.MX91 EVK board.
- Improve EEPRON suport on i.MX8MP DHCOM board.
- Switch phycore_imx8mm to using environment text files and improve
environment handling.
Marek Vasut [Thu, 28 Nov 2024 04:11:19 +0000 (05:11 +0100)]
arm64: renesas: Disable AVB1 and AVB2 on R8A779G0 V4H White Hawk board
The U-Boot is currently not capable of handling ethernet-phy-ieee802.3-c45
PHYs correctly, and also does not handle MDIO bus wide reset-gpios property.
Until proper C45 PHY support lands in U-Boot, disable AVB1/AVB2 interfaces.
This only disables the two MACs with 88Q2110/88Q2112 100/1000BASE-T1 PHYs
on ethenet sub-board, the main board AVB0 ethernet is unaffected.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Paul Barker [Wed, 20 Nov 2024 09:48:29 +0000 (09:48 +0000)]
pinctrl: rzg2l: Support Ethernet TXC output enable
On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
signal is selectable to support an Ethernet PHY operating in either MII
or RGMII mode. By default, the signal is configured as an input and MII
mode is supported. The ETH_MODE register can be modified to configure
this signal as an output to support RGMII mode.
As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Paul Barker [Wed, 20 Nov 2024 09:48:28 +0000 (09:48 +0000)]
pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.
rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD & QSPI interfaces.
While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Paul Barker [Tue, 19 Nov 2024 19:36:26 +0000 (19:36 +0000)]
clk: rzg2l: Ignore enable for core clocks
In the RZ/G2L family, core clocks are always on and can't be disabled.
However, drivers which are shared with other SoCs may call clk_enable()
or clk_enable_bulk() for a clock referenced in the device tree which
happens to be a core clock on the RZ/G2L. To avoid the need for
conditionals in these drivers, simply ignore attempts to enable a core
clock.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
board: dhelectronics: Sync env variable dh_som_serial_number with SN
The env variable "SN" is used to store the serial number on DH electronics
SoMs. New SoMs will use the variable "dh_som_serial_number". To ensure
compatibility, these env variables are synchronized. This is achieved
using callback functions.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de>
lib: hashtable: Prevent recursive calling of callback functions
In case there are two variables which each implement env callback
that performs env_set() on the other variable, the callbacks will
call each other recursively until the stack runs out. Prevent such
a recursion from happening.
Example which triggers this behavior:
static int on_foo(...) { env_set("bar", 0); ... }
static int on_bar(...) { env_set("foo", 0); ... }
U_BOOT_ENV_CALLBACK(foo, on_foo);
U_BOOT_ENV_CALLBACK(bar, on_bar);
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Suggested-by: Marek Vasut <marex@denx.de>
arm64: imx8mp: Read values from M24C32-D write-lockable page on DHCOM i.MX8MP
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
that contains an additional write-lockable page called ID page, which
is populated with a structure containing ethernet MAC addresses, DH
item number and DH serial number.
Because the write-lockable page is not present on rev.100 i.MX8MP DHCOM
SoM, test whether EEPROM ID page exists by setting up the i2c driver.
There may be multiple EEPROMs with an ID page on this platform, always
use the first one. The evaluation of the EEPROM ID page is done in two
steps. First, the content is read and checked. This is done to cache
the content of the EEPROM ID page. Second, the content is extracted
from the EEPROM buffer by requesting it.
For the ethernet MAC address the i.MX8M Plus DHCOM currently supports
parsing address from multiple sources in the following priority order:
Add support for parsing the content of this new EEPROM ID page and place
it between 2) and 3) on the priority list. The new entry is 2.5) On-SoM
EEPROM write-lockable page.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de>
arm64: dts: imx8mp: Add aliases for the access to the EEPROM ID page node
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
that contains an additional write-lockable page called ID page. Add
aliases eeprom0wl and eeprom1wl for the access to the EEPROM ID
page node.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de>
Peng Fan [Tue, 3 Dec 2024 15:42:48 +0000 (23:42 +0800)]
imx: Add iMX91 support
iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01
It removed A55_1, M33, MIPI DSI, LVDS, etc.
i.MX9131:
- Support 2.4GT/s DDR and HWFFC at 1.2GT/s
i.MX9121:
- A55 at 800Mhz and DDR at 1600MTS, with low drive mode.
i.MX9111:
- Support 1.6GT/s DDR and HWFFC at 800MT/s
i.MX9101:
- Support 800Mhz ARM clock
- Support 1.6GT/s DDR and HWFFC at 800MT/s
- No parallel display, eQOS, flexcan
Updated Clock/Container/CPU and etc for i.MX91
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 3 Dec 2024 15:42:47 +0000 (23:42 +0800)]
imx93: Update 9x9 part fuses checking
According to iMX93 fuse burn plan, all 9x9 parts will have USB2,
ENET1 (FEC), LVDS1, CSI1 and DSI1 disabled. The codes missed ENET1
fuse when detecting 9x9. Although it still can detect 9x9 correctly,
we add the ENET1 fuse to the check to be more accurate.
Fixes: 58da865e27f ("imx9: add i.MX93 variants support") Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 3 Dec 2024 15:42:44 +0000 (23:42 +0800)]
gpio: imx_rgpio2p: Move 8ulp_data to data section
have_dual_base is set to false, so the 8ulp_data will be put in BSS
section which conflicts with the area of u-boot.dtb which padded just
after u-boot-nodtb.bin. So move 8ulp_data to data section to avoid
its content being corrupted by dtb.
Fixes: 51cfa66f2c4 ("gpio: imx_rgpio2p: support one address") Signed-off-by: Peng Fan <peng.fan@nxp.com>
When MbedTLS TLS features were added MBEDTLS_HAVE_TIME was defined as part
of enabling https:// support. However that pointed to the wrong function
which could crash if it received a NULL pointer.
Looking closer that function is not really needed, as it only seems to
increase the RNG entropy by using 4b of the current time and date.
The reason that was enabled is that lwIP was unconditionally requiring it,
although it's configurable and can be turned off.
Since lwIP doesn't use that field anywhere else, make it conditional and
disable it from our config.
Vincent Stehlé [Fri, 6 Dec 2024 07:58:53 +0000 (08:58 +0100)]
arm: qemu: fix update_info declaration
Add a missing comma in the update_info structure declaration.
This fixes the following build error when building with
EFI_RUNTIME_UPDATE_CAPSULE or EFI_CAPSULE_ON_DISK:
board/emulation/qemu-arm/qemu-arm.c:52:9: error: request for member ‘images’ in something not a structure or union
Fixes: cccea18813c4 ("efi_loader: add the number of image entries in efi_capsule_update_info") Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Masahisa Kojima <masahisa.kojima@linaro.org> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: Tom Rini <trini@konsulko.com>
Sughosh Ganu [Mon, 2 Dec 2024 07:06:24 +0000 (12:36 +0530)]
lmb: prohibit allocations above ram_top even from same bank
There are platforms which set the value of ram_top based on certain
restrictions that the platform might have in accessing memory above
ram_top, even when the memory region is in the same DRAM bank. So,
even though the LMB allocator works as expected, when trying to
allocate memory above ram_top, prohibit this by marking all memory
above ram_top as reserved, even if the said memory region is from the
same bank.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Andreas Schwab <schwab@suse.de>
Tom Rini [Fri, 6 Dec 2024 22:39:26 +0000 (16:39 -0600)]
Merge patch series "board: ti: k3-am65: covert last board to OF_UPSTREAM"
Bryan Brattlof <bb@ti.com> says:
Hello Everyone!
This small series converts TI's AM65x reference board to use
CONFIG_OF_UPSTREAM and removes the unused device tree files from
arch/arm/dts.
Because it's the last board using a AM65x without enabling OF_UPSTREAM
it allows us to also remove all the SoC FDT files as well and keep a
single version of the SoC's DT files in the dts/upstream directory going
forward.
Bryan Brattlof [Thu, 21 Nov 2024 21:17:49 +0000 (15:17 -0600)]
board: ti: am65x: migrate to OF_UPSTREAM
Rather than rely on manual updates from the arch/arm/dts directory,
enable CONFIG_OF_UPSTREAM to receive automatic device tree updates for
the am65x reference board.
Manorit Chawdhry [Thu, 21 Nov 2024 12:02:53 +0000 (17:32 +0530)]
clk: ti: clk-k3-pll: Add additional robustness steps to the PLL sequence
Based on the recommendation from HW team make modifications to
the sequence for more robustness.
- Unlock the PLL registers
- Enable external bypass
- Disable the PLL
- Program pllm and pllf
- Program Ref divider
- Enable other PLL controls like DSM_EN, DAC_EN,etc
- Enable calibration if available
- Enable PLL
- Wait for PLL lock and Calibration lock
- Remove external bypass
Re-write the full sequence from scratch as the previous sequence was way
off and keep it in a single commit for bisectability.
Manorit Chawdhry [Thu, 21 Nov 2024 12:02:51 +0000 (17:32 +0530)]
arm: dts: k3-*-r5: Remove clocks from mcu_timer0
Updated PLL driver sequencing requires us to use udelay in the PLL
driver as there is no poll bit to get the status of operations.
tick-timer(mcu_timer0/main_timer0) setting up the clocks for itself is
something that won't work as the PLL driver will be using udelay and
PLLs are configured during clock probe which would end up in a recursive
probe.
tick-timer being used by K3 devices are configured by ROM and we really
don't need to configure any of the clocks.
Remove the clock dependency from R5 stage as we don't need to setup
clocks for it.
Tom Rini [Fri, 6 Dec 2024 19:00:52 +0000 (13:00 -0600)]
Merge patch series "led: update LED boot/activity to new property implementation"
Christian Marangi <ansuelsmth@gmail.com> says:
This series is split in 2 part.
While adapting the LED boot and activity code to the new property
accepted by Rob in dt-schema repository, a big BUG was discovered.
The reason wasn't clear at start and took me some days to figure it
out.
This was triggered by adding a new phandle in the test.dts to
introduce test for the new OPs.
This single addition caused the sandbox CI test to fail in the
dm_test_ofnode_phandle_ot test.
This doesn't make sense as reverting the change made the CI test
to correctly finish. Also moving the uboot node down
after the first phandle (in test.dts the gpio one) also made
the CI test to correctly finish.
A little bit of searching and debugging made me realize the
parse phandle OPs didn't support other.dts at all and they
were still referencing phandle index from test.dts.
(more info in the related commit)
In short the test was broken all along and was working by
pure luck. The first 4 patch address and fix the problem for good.
The other 4 patch expand and address the property change for
LED boot/activity.
Posting in a single series as changes are trivial and just
to speedup review process. (and also because the second
part depends on the first)
led: update LED boot/activity to new property implementation
Update LED boot/activity to reference by phandle instead of label and
add to period property the "-ms" suffix.
This is a followup request by dt-schema maintainers that required LED
node to be referenced by a phandle to the node instead of indirectly by
the LED label and for timevalue to have a suffix.
While at it generalize the LED node label parsing since the logic is
common for generic LED bind and LED activity/boot.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
test: dm: fix broken dm_test_ofnode_phandle_ot and get_by_phandle_ot
Fix broken dm_test_ofnode_phandle_ot test. They never actually worked
and were passing test by pure luck by having the same phandle index of
test.dts that coincicentally had #gpio-cells in the same index node.
It was sufficient to add a phandle to test.dts to make the test fail.
To correctly test these feature, make use oif the new OPs oftree to
parse phandle.
For consistency with the dm_test_ofnode_phandle, rework the test and
other.dts to use the same property with the other- prefix to every
node.
Also fix dm_test_ofnode_get_by_phandle_ot by making it more robust and
renaming the phandle property to other-phandle.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
dm: core: implement oftree variant of parse_phandle OPs
Implement oftree variant of parse_phandle OPs.
There is currently a very hidden and laten BUG with parse_phandle OPs
that doesn't permit the support of multiple DTS in a system. One usage
example if sandbox with the usage of other.dts
The BUG is only present on live scenario where of_... OPs are used and
it's not present when fdt... OPs are used.
This is caused by an assumption made in __of_parse_phandle_with_args,
with the of_find_node_by_phandle call that pass the first arg as NULL.
This makes of_find_node_by_phandle use the default root node of the
system and doesn't permit the usage of alternative tree. This is correct
for normal system and also for the linux kernel where it's assumed a
single device tree.
It's problematic if other device tree needs to be used.
To fix this, introduce __of_root_parse_phandle_with_args to define a
root device tree for of_find_node_by_phandle.
Introduce all the variant OPs for this and in ofnode, the oftree OPs
following how it's done for other OPs with similar task.
For FDT scenario, ofnode_from_fdtdec_phandle_args is reworked to accept
a new variable, node and noffset_to_ofnode is used instead of
offset_to_ofnode. This is required to support multiple FDB blob to
calculate the correct of_offset of the ofnode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Two fixes for the EFI subsystem coming via the TPM tree as agreed by Heinrich
The LMB patch fixes a failure in SystemReady testing. Nothing bad happens
without the patch in the device operation, but the return values are wrong
and SCT tests fail for MemoryAllocationServicesTest category.
The second is a shielding the device against mistakes in the definition of
struct fields needed by the capsule update mechanism. Instead of crashing,
print a humna readable message of what's wrong.
lmb: Fix the allocation of overlapping memory areas with !LMB_NONE
At the moment the LMB allocator will return 'success' immediately on two
consecutive allocations if the second one is smaller and the flags match
without resizing the reserved area.
This is problematic for two reasons, first of all the new updated
allocation won't update the size and we end up holding more memory than
needed, but most importantly it breaks the EFI SCT tests since EFI
now allocates via LMB.
More specifically when EFI requests a specific address twice with the
EFI_ALLOCATE_ADDRESS flag set, the first allocation will succeed and
update the EFI memory map. Due to the LMB behavior the second allocation
will also succeed but the address ranges are already in the EFI memory
map due the first allocation. EFI will then fail to update the memory map,
returning EFI_OUT_OF_RESOURCES instead of EFI_NOT_FOUND which break EFI
conformance.
So let's remove the fast check with is problematic anyway and leave LMB
resize and calculate address properly. LMB will now
- try to resize the reservations for LMB_NONE
- return -1 if the memory is not LMB_NONE and already reserved
The LMB code needs some cleanup in that part, but since we are close to
2025.01 do the easy fix and plan to refactor it later.
Also update the dm tests with the new behavior.
Fixes: commit 22f2c9ed9f53 ("efi: memory: use the lmb API's for allocating and freeing memory") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_loader: Check for a valid fw_name before auto generating GUIDs
The gen_v5_guid() is a void and does no error checking with pointers
being available etc. Instead it expects all things to be in place to
generate GUIDs. If a board capsule definition is buggy and does not
define the firmware names when enabling capsule updates, the board will
crash trying to bring up the EFI subsystem.
Check for a valid firmware name before generating GUIDs.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Wed, 4 Dec 2024 20:30:25 +0000 (14:30 -0600)]
Merge patch series "Add OPP_LOW support for J7200"
Aniket Limaye <a-limaye@ti.com> says:
This series adds OPP_LOW spec data in k3_avs driver and enables a config
option to select the OPP_LOW performance point.
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM.
- A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW
voltage (though OPP_LOW voltage is recommended to reduce power
consumption).
The actual OPP voltage for the device is read from the efuse and
updated in k3_avs_probe().
The default j7200 devicetree and k3_avs driver set OPP_NOM spec
frequency and voltage.
In the board init file, if K3_OPP_LOW config is enabled, Check if
OPP_LOW AVS voltage read from efuse is valid and update frequency (A72
and MSMC) and voltage (VDD_CPU) as per the OPP_LOW spec.
Test logs:
https://gist.github.com/aniket-l/328ad93ed60c2419ed7be9f85e6b6075
- With series applied on master and CONFIG_K3_OPP_LOW enabled in
j7200_evm_r5_defconfig
- Logs shown with and without efuse register programmed for OPP_0
(Errors out if OPP_0 not found, programs OPP_LOW spec if found)
- Voltage update verified using 'i2c md 0x4c 0xe' in u-boot
- Frequency update verified using 'k3conf clock dump' in linux
Aniket Limaye [Tue, 19 Nov 2024 00:32:58 +0000 (06:02 +0530)]
arm: mach-k3: j721e-init.c: Add support for CONFIG_K3_OPP_LOW
The default j7200 devicetree and k3_avs driver set 2GHz/1GHz frequency
for A72/MSMC clks and the OPP_NOM voltage.
J7200 SOCs may support OPP_LOW Operating Performance Point:
1GHz/500MHz clks for A72/MSMC and OPP_LOW AVS voltage read from efuse.
Hence, add a config check in board_init_f() to select OPP_LOW specs:
- Check if OPP_LOW AVS voltage read from efuse is valid.
- Use the device IDs and clock IDs (TISCI docs [0]) to find the A72 and
MSMC clock frequencies in the devicetree.
- Fixup the clock frequencies in devicetree as per OPP_LOW spec.
k3_avs driver programs the OPP_LOW AVS voltage for VDD_CPU through
k3_avs_notify_freq() callback from clk_k3.
Reid Tonking [Tue, 19 Nov 2024 00:32:57 +0000 (06:02 +0530)]
misc: k3_avs: Check validity of efuse voltage data
k3_avs driver checks opp_ids when probing and overwrites the voltage
values in vd_data for the respective board. The new k3_avs_check_opp()
can be called from board files to check the efuse data and returns 0 if
valid.
Also add the same check in k3_avs_program_voltage() to error out if
the efuse data was not valid.
Reid Tonking [Tue, 19 Nov 2024 00:32:56 +0000 (06:02 +0530)]
misc: k3_avs: Add OPP_LOW voltage and frequency to vd_data
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM.
- A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW
voltage (though OPP_LOW voltage is recommended to reduce power
consumption).
Add OPP_LOW frequency->voltage entry to vd_data.
The actual OPP voltage for the device is read from the efuse and
updated in k3_avs_probe().
OPP_NOM corresponds to OPP_1 and OPP_LOW to OPP_0 efuse register
fields, as described in the Datasheet [0]
The register offsets and fields are described in the TRM (5.2.6.1.5
WKUP_VTM_VD_OPPVID_j Register) [1].
Reid Tonking [Tue, 19 Nov 2024 00:32:55 +0000 (06:02 +0530)]
arm: dts: k3-j7200-r5-common: Add msmc clk to a72 node
The j7200 SOC has a single DDR controller and hence no need for
configuring the MSMC interleaver. Hence we do not have an explicit node
for MSMC in j7200 DT, unlike j721s2/j784s4.
Also, MSMC clk id is described under A72SS0_CORE0 Device in TISCI
documentation [0].
Considering the above, define the MSMC clk in the a72 node.
Zixun LI [Mon, 21 Oct 2024 15:04:51 +0000 (17:04 +0200)]
dm: gpio: Return error when pull up/down is requested but set_flags ops is not implmentated
Currently in _dm_gpio_set_flags() when set_flags ops is not implemented
direction_output()/_input() is used, but pull up/down is not supported by
these ops.
Caleb Connolly [Wed, 13 Nov 2024 04:59:24 +0000 (05:59 +0100)]
button: gpio: handle broken controller
Avoid crashing U-Boot when the GPIO controller for a button is disabled
or failed to probe. We also need to check the priv data for each button
since even if a button fails to probe it will still be polled by the
core code.
Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.
Also enable the feature by default for PHYCORE_AM62X_R5.
Marek Vasut [Fri, 8 Nov 2024 18:52:26 +0000 (19:52 +0100)]
eeprom: at24: add ST M24256E Additional Write lockable page support
The ST M24256E behaves as a regular M24C256, except for the E variant
which uses up another I2C address for Additional Write lockable page.
This page is 64 Bytes long and can contain additional data. Add entry
for it, so users can describe that page in DT. Note that users still
have to describe the main M24C256 area separately as that is on separate
I2C address from this page.
Unlike M24C32-D and M24C64-D, this part is specifically ST and does not
have any comparable M24* counterparts from other vendors, hence the st,
vendor prefix. Furthermore, the part name is M24256E without C between
the 24 and 256, this is not a typo. Finally, there is M24C256-D part,
which does contain 32 Bytes long Additional Write lockable page, which
is a different part and not supported by this patch.
With this pull request support for the EFI_HTTP_PROTOCOL and
EFI_IP4_CONFIG2 protocols are added. This allows EFI applications
to load files via HTTP.
UEFI:
add efi_dp_from_ipv4 function
add efi_net_set_addr, efi_net_get_addr functions
add support for HTTP device path
set EFI bootdevice device path to HTTP when loaded from wget
add support to send http requests and parse http headers
provide EFI_IP4_CONFIG2_PROTOCOL
provide EFI_HTTP_PROTOCOL
support IPv4() in device path to text protocol
provide unit tests for the HTTP and IPv4 Config2 protocols
Network:
zero terminate string with headers in wget_fill_info()
zero terminate string with headers in wget_lwip_fill_info()
pass port and server_name via wget_ctx in lwIP network stack
let wget_with_dns work with dns disabled
Others:
Add HTTP and IPV4 Config II protocols to UUID library functions.
Adriano Cordova [Wed, 4 Dec 2024 03:05:29 +0000 (00:05 -0300)]
efi_selftest: add test for IPv4 Config2 protocol
Add a test for the EFI_IP4_CONFIG2_PROTOCOL. The test sets the ip
policy to static, adds an ip address, and then reads the current
ip address and checks for it to be the same as the one that was set.
Adriano Cordova [Wed, 4 Dec 2024 03:05:26 +0000 (00:05 -0300)]
efi_loader: efi_net: add EFI_HTTP_PROTOCOL
Add an EFI HTTP driver. This commit implements the
EFI_HTTP_PROTOCOL and the EFI_HTTP_SERVICE_BINDING_PROTOCOL.
The latter is attached to the handle of th efi network
device. This is the same handle where snp, pxe, and ipconfig
are attached to.
Adriano Cordova [Wed, 4 Dec 2024 03:05:25 +0000 (00:05 -0300)]
efi_loader: efi_net: add EFI_IP4_CONFIG2_PROTOCOL
Add an implementation of the EFI_IP4_CONFIG2_PROTOCOL. The protocol
is attached to the handle of the efi network device. This is the same
handle where snp and pxe are attached to.
Adriano Cordova [Wed, 4 Dec 2024 03:05:24 +0000 (00:05 -0300)]
efi_loader: net: add support to send http requests and parse http headers
Add network-stack agnostic way to send an http request and
parse http headers from efi drivers. This uses wget as a
backend and communicates with it via efi_wget_info.
The function efi_net_do_request allocates a buffer on behalf of an
efi application using efi_alloc and passes it to wget to receive
the data. If the method is GET and the buffer is too small, it
re-allocates the buffer based on the last received Content-Length
header and tries again. If the method is HEAD it just issues one
request. So issuing a HEAD request (to update Content-Length) and
then a GET request is preferred but not required.
The function efi_net_parse_headers parses a raw buffer containing
an http header into an array of EFI specific 'http_header' structs.
Signed-off-by: Adriano Cordova <adrianox@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adriano Cordova [Wed, 4 Dec 2024 03:05:23 +0000 (00:05 -0300)]
efi_loader: net: set EFI bootdevice device path to HTTP when loaded from wget
Set the device path of the efi boot device to an HTTP device path
(as formed by efi_dp_from_http) when the next boot stage is loaded
using wget (i.e., when wget is used with wget_info.set_bootdev=1).
When loaded from HTTP, the device path should account for it so that
the next boot stage is aware (e.g. grub only loads its http stack if
it itself was loaded from http, and it checks this from its device path).
Signed-off-by: Adriano Cordova <adrianox@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adriano Cordova [Wed, 4 Dec 2024 03:05:22 +0000 (00:05 -0300)]
efi_loader: device_path: add support for HTTP device path
Add efi_dp_from_http to form a device path from HTTP. The
device path is the concatenation of the device path returned
by efi_dp_from_ipv4 together with an URI node and an END node.
Add the functions efi_net_set_addr and efi_net_get_addr to set
and get the ip address from efi code in a network agnostic way.
This could also go in net_common, or be compiled conditionally
for each network stack.
Signed-off-by: Adriano Cordova <adrianox@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adriano Cordova [Wed, 4 Dec 2024 03:05:16 +0000 (00:05 -0300)]
net: wget: let wget_with_dns work with dns disabled
This was marked as TODO in the code:
- Enable use of wget_with_dns even if CMD_DNS is disabled if
the given uri has the ip address for the http server.
- Move the check for CMD_DNS inside wget_with_dns.
- Rename wget_with_dns to wget_do_request
Adriano Cordova [Tue, 26 Nov 2024 16:19:21 +0000 (13:19 -0300)]
net-lwip: zero terminate string with headers in wget_lwip_fill_info()
This patch comes as a companion to the same patch but for the legacy
net stack. Commit 1327c2a8d6 ("net/lwip: wget: integrate struct wget_info
into wget code") introduced function wget_fill_info() which retrieves
the headers from the HTTP server response. As we want to parse the
string in later patches we need to ensure that it is NUL terminated.
We must further check that wget_info->headers in not NULL.
Otherwise a crash occurs.
net: zero terminate string with headers in wget_fill_info()
Commit 2dd076a9c1b4 ("net: wget: integrate struct wget_info into legacy
wget code") introduced function wget_fill_info() which retrieves the
headers from the HTTP server response. As we want to parse the string in
later patches we need to ensure that it is NUL terminated.
We must further check that wget_info->headers in not NULL.
Otherwise a crash occurs.
Fixes: 2dd076a9c1b4 ("net: wget: integrate struct wget_info into legacy wget code") Signed-off-by: Adriano Cordova <adrianox@gmail.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Adriano Cordova [Tue, 3 Dec 2024 12:55:34 +0000 (09:55 -0300)]
lwip: wget: pass port and server_name via wget_ctx
Commit 5907c81 ("net: lwip: Enable https:// support for wget") was not
correctly rebased on top of the changes introduced by Commit 6cc4d04
("net/lwip: wget: put server_name and port into wget_ctx") in next.
This commit re-applies a couple of lines from 6cc4d04.
Fixes: Commit 5907c81 ("net: lwip: Enable https:// support for wget") Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Tom Rini [Mon, 2 Dec 2024 22:36:06 +0000 (16:36 -0600)]
Merge patch series "CI: Set up for an arm64 runner"
Tom Rini <trini@konsulko.com> says:
Hey all,
This is picking up Simon's v5 of the above-named series and making a few
more changes so that the follow-up series I have leads to arm64 being
supported for almost all jobs. To quote Simon's cover letter:
All gitlab runners are currently amd64 machines. This series attempts to
create a docker image which can also support arm64 so that sandbox tests
can be run on it.
The TARGET_... environment variables for grub could perhaps be adjusted,
using the new variables, but I have not done that for now.
Adding to what Simon said, we now build grub for all architectures as
the reason to install it was to be able to use the binaries in QEMU.
That won't provide us with amd64 binaries on arm64 hosts so we can't use
that shortcut anymore.
projects / thirdparty / u-boot.git / log
