As binman already creates nodes based on CONFIG_OF_LIST we don't need to
add extra nodes.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # StarFIve VisionFive 2 Reviewed-by: E Shattow <e@freeshell.de>
board: starfive: spl: strip off 'starfive/' prefix
The configuration descriptions generated by binman contain the vendor
device-tree directory. Instead of adding it to all match strings just strip
it off.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
riscv: dts: no default configuration for MULTI_DTB_FIT
JH7110 boards are currently the only use case for multi DTB FIT images
on RISC-V.
Booting JH7110 systems with a VisionFive 2 device-tree used to kind of
work without causing harm to the hardware. But there is no guarantee
that this will hold true in future. So we should not rely on it.
Before the current patch series booting failed on unsupported boards due
to the lack of a device-tree in the binman generated default configuration
when reaching main U-Boot.
By not setting a default configuration booting will now fail on
unsupported boards already in SPL. This allows SPL to
continue with the next boot source for a possible recovery.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: E Shattow <e@freeshell.de>
Binman can automatically generate device-tree and configuration entries in
the FIT image based on CONFIG_MULTI_DTB_FIT if the binman node includes the
right sub-nodes.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: E Shattow <e@freeshell.de>
Yao Zi [Fri, 7 Mar 2025 17:09:22 +0000 (17:09 +0000)]
riscv: dts: cv18xx: Drop unused dummy clocks
Introduced in commit 5a4e0625ac77 ("riscv: dts: sophgo: Add ethernet
node"), eth_{csrclk,ptpclk} were used as placeholders for ethernet
controller. As the real clock controller has been added, drop them to
clean the devicetree up.
Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The zkr ISA extension can be used to generate random numbers. Since RVA22
zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
driver detects if the extension is usable during driver binding. Let's
enable it by default on QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Junhui Liu [Sun, 23 Feb 2025 06:19:26 +0000 (14:19 +0800)]
riscv: dts: spacemit: Update UART compatible for k1
Update UART compatible in k1 dts to "intel,xscale-uart", introduced in
commit 2d84e1519c5b ("serial: ns16550: Add Intel XScale support")
recently, aligning dts with the upstream kernel.
Tested-by: Huan Zhou <me@per1cycle.org> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Yixun Lan <dlan@gentoo.org>
configs: SiFive Unmatched: add 'nvme scan' to preboot
Without 'nvme scan' the ESP on the NVMe drive is not found early.
EFI variables cannot be persisted.
Hit any key to stop autoboot: 0
Cannot persist EFI variables without system partition
** Booting bootflow '<NULL>' with efi_mgr
Loading Boot0000 'mmc 0' failed
EFI boot manager: Cannot load any image
Boot failed (err=-14)
scanning bus for devices...
** Booting bootflow 'nvme#1.blk#1.bootdev.part_1' with efi
Booting /\EFI\BOOT\BOOTRISCV64.EFI
error: no suitable video mode found.
GNU GRUB version 2.12
With 'nmve scan' booting works as expected.
Hit any key to stop autoboot: 0
** Booting bootflow '<NULL>' with efi_mgr
Loading Boot0000 'mmc 0' failed
Loading Boot0001 'nvme 0' failed
Booting: nvme 1
error: no suitable video mode found.
GNU GRUB version 2.12
Reported by Yuri Zaporozhets <yuriz@vodafonemail.de> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
* msm8916 gets proper sysreset and spin-table support
* The first new IPQ platform is added - the IPQ9574. The IPQ series are
used in routers. The flashing process is also documented
* mach-snapdragon gains the ability to boot with an internal FDT and
still parse memory from an externally provided one
* SC7280 gets a pinctrl driver and various clock driver improvements.
* Qualcom clock drivers will now actually return an error when
attempting
to enable a clock which isn't described.
* Qualcomm pinctrl drivers will now return an error when attempting to
configure an invalid function mux
- Allow the registration and enablement of the i.MX UART clocks via DM,
without the need of manually calling init_uart_clk().
- Remove duplicated 'mmc dev ${mmcdev}' commands.
- Rework some of the RAM related Kconfig symbols for phycore_imx8mp.
Tom Rini [Sat, 15 Mar 2025 01:29:16 +0000 (19:29 -0600)]
phycore_imx8mp: Rework some of the RAM related Kconfig symbols
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case we can easily fix this
by dropping the select line as the following choice statement handles
things correctly. We also drop the "default false" line as false / n is
the default.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Adam Ford [Tue, 18 Mar 2025 23:38:37 +0000 (18:38 -0500)]
configs: imx8mp_beacon: Select SPL_CLK_IMX8MP
In preparation to remove manual references for enabling some clocks,
enable SPL_CLK_IMX8MP which automatically enables SPL_CCF and
SPL_CLK_COMPOSITE_CCF which permit various drivers to activate
their respective clocks automatically.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:36 +0000 (18:38 -0500)]
clk: imx: select SPL_CLK_COMPOSITE_CCF when SPL_CLK_IMX8MP
If SPL_CLK_IMX8MP is selected alone, it causes a build error.
The clock composite is required when using the clock framework, so
select it when SPL_CLK_IMX8MP is enabled. This is already being
done outside of SPL.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:33 +0000 (18:38 -0500)]
serial: mxc: Support bulk enabling clocks
Depending on the platform, there may be multiple clock sources
required to enable a UART. Use the bulk functions to get and
enable the clocks when the UART probes. This can facilitate
the removal of functions to manually enable the clock.
This is made dependent on CLK_CCF which is used on imx6q,
imx8m[mnqp], several imxrt, imx9. If/when the UART clock
registration is done for older boards, this limitation
could be updated.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:30 +0000 (18:38 -0500)]
clk: imx6q: Register UART clocks
In order to use the driver model and clock system to enable UART
clocks from the serial driver, it's necessary to register the UART
clocks. With the helper function to check for imx6qp vs other
variants, the UART can register for both scenarios.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:29 +0000 (18:38 -0500)]
clk: imx6q: Properly handle imx6qp ECSPI clk_sels
The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Paul Barker [Fri, 28 Feb 2025 12:47:54 +0000 (12:47 +0000)]
net: phy: ksz90x1: Load skew values from device tree
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Paul Barker [Fri, 28 Feb 2025 12:47:52 +0000 (12:47 +0000)]
net: phy: Port set/clear bits from Linux
To simply porting phy drivers from Linux to U-Boot, define
phy_set_bits() and phy_clear_bits() functions with a similar API to
those used in Linux.
The U-Boot versions of these functions include the `devad` argument
which is not present in the Linux versions, to keep them aligned with
the other phy functions in U-Boot.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Paul Barker [Tue, 11 Mar 2025 20:57:45 +0000 (20:57 +0000)]
reset: rzg2l-usbphy-ctrl: Connect up vbus regulator
Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tom Rini [Tue, 18 Mar 2025 19:12:51 +0000 (13:12 -0600)]
Merge patch series "pxe: Precursor series for supporting read_all() in extlinux / PXE"
Simon Glass <sjg@chromium.org> says:
This series includes some patches related to allowing read_all() to be
used with the extlinux / PXE bootmeths.
These patches were split out from the stb4 series, since it will need to
have additional patches for LWIP, to avoid breaking PXE booting when
LWIP is used.
Simon Glass [Thu, 6 Mar 2025 00:25:23 +0000 (17:25 -0700)]
net: Provide a function to run network operations
Add a new netboot_run() function which can be used for simple network
operations, such as loading a file. Put the implementation in an
internal function, used by the existing code.
Place this function into the net/ code, so that it does not need the
command line to be available.
Document which network operations are supported, i.e. a limited subset,
for now.
For the one board which uses lwip, it is not quite clear how to avoid
using the cmdline interface. This will need some discussion.
Simon Glass [Thu, 6 Mar 2025 00:25:21 +0000 (17:25 -0700)]
net: Refactor part of netboot_common() into a function
Move the core code for starting an netboot operation into a separate
function, so that we can (with additional work) move towards calling it
from outside the file.
Simon Glass [Thu, 6 Mar 2025 00:25:20 +0000 (17:25 -0700)]
net: Return the size from parse_args()
Rather than setting global variables, return the size, if provided. For
tftput, use the addr argument to store the save address, to avoid adding
yet another parameter.
Simon Glass [Thu, 6 Mar 2025 00:25:11 +0000 (17:25 -0700)]
boot: Support compressed booti images in bootm
A compressed booti image relies on the compression-format's header at
the start to indicate which compression algorithm is used.
We don't support this elsewhere in U-Boot, so assume that a compressed
file is always a booti file. Once it is compressed, a check is made to
make sure that it actually is.
Simplify the implementation by adding a new function which returns the
booti image-type if compression is detected.
Simon Glass [Thu, 6 Mar 2025 00:25:10 +0000 (17:25 -0700)]
boot: Support booti format in bootm
At present the booti format is handled separately, in its own command.
Provide a way to boot uncompressed booti images within the bootm code,
so that eventually we can boot these images without CONFIG_CMDLINE
Update bootm_init() to attach the images for all formats which use them.
Simon Glass [Thu, 6 Mar 2025 00:25:09 +0000 (17:25 -0700)]
boot: arm: riscv: sandbox: Add a format for the booti file
Arm invented a new format for arm64 and something similar is also used
with RISC-V. Add this to the list of supported formats and provide a way
for the format to be detected on both architectures.
Update the genimg_get_format() function to support this.
Fix up switch() statements which don't currently mention this format.
Booti does not support a ramdisk, so this can be ignored.
Simon Glass [Thu, 6 Mar 2025 00:25:08 +0000 (17:25 -0700)]
boot: Convert IMAGE_FORMAT into an enum
Use an enum so it is clearer that these options are related. Update
genimg_get_format(), tidy up the function comment and move it to the
header file, since it is exported.
Simon Glass [Thu, 6 Mar 2025 00:25:06 +0000 (17:25 -0700)]
boot: Pass just the FDT argument to label_process_fdt()
Since this function only adjusts one element of the bootm command, pass
just that. This will make it easier to refactor things to remove the
bootm command.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Simon Glass [Thu, 6 Mar 2025 00:25:01 +0000 (17:25 -0700)]
bootstd: Correct display of kernel version
The address of the bzImage is not recorded in the bootflow, so we cannot
actually locate the version at present. Handle this case, to avoid
showing invalid data.
Simon Glass [Thu, 6 Mar 2025 00:25:00 +0000 (17:25 -0700)]
x86: Move the bootm state for zimage into cmd/
Rather than holding the state in the implementation code, move it to the
command code. The state is now passed to the implementation functions
and can there (with future work) be pass in from bootstd, without going
through the commands.
Simon Glass [Thu, 6 Mar 2025 00:24:58 +0000 (17:24 -0700)]
x86: Move x86 zboot state into struct bootm_info
This structure is supposed to handle any type of booting
programmatically, i.e. without needing a command to be executed. Move
the x86-specific members into it and use it instead of
struct zboot_state. Provide a macro so access is possible without adding
lots of #ifdefs to the code.
This will allow the struct to be used for all four types of booting
(bootm, bootz, booti and zboot).
Call bootm_init() to init the state, to match other boot methods.
Note that some rationalisation could be performed on this. But this
is tricky since addresses are stored as strings in several places. Also
some strings combine multiple arguments into one. So to keep this task
somewhat manageable, we content ourselves with just getting everything
into the same struct
Tom Rini [Tue, 18 Mar 2025 14:12:40 +0000 (08:12 -0600)]
Merge patch series "vepxpress64: disable CRC32 by default and add FVP with TF-A guide"
Harrison Mutai <harrison.mutai@arm.com> says:
This patch introduces two updates to the vexpress64 project:
- Disable CRC32 by default to prevent aborts in a standard FVP setup.
- Add a guide for running FVP with TF-A, providing a clear starting point for
users.
Tom Rini [Tue, 18 Mar 2025 14:14:13 +0000 (08:14 -0600)]
Merge patch series "*** Various Improvements for phyCORE-AM62/A SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:
This patch series syncs the phyCORE-AM62Ax feature-wise with our other
K3-based SoMs by adding SoM overlay handling and capsule updates. It
also introduces support for USBDFU boot and includes various minor fixes.
Evgeny Bachinin [Mon, 10 Feb 2025 17:50:16 +0000 (20:50 +0300)]
arch: arm: meson: support Amlogic chip_id v1 and v2
Patch introduces:
* chip_id API - useful for various things, but used now for
device_id (did) generation as mentioned in [1] on our private board
code. Our device_id is calculated by means of permutations of
chip_id value.
* new SoCs (a1, s4, etc) are usually coming with the support of chip_id
v2 right away, whereas secure monitors on old SoCs (like axg, g12b,
g12a, etc) may support only chip_id v1. Chip_id API handles both
cases
* meson_sm_get_serial() is described via chip_id API.
Wadim Egorov [Wed, 5 Mar 2025 04:58:31 +0000 (05:58 +0100)]
board: phytec: phycore_am62x: Use custom k3_dfu.env fragment
TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which
is incompatible with our board configuration. Replace it with a custom
variant that better aligns with our setup, ensuring correct offsets and
eliminating unnecessary entries.
Wadim Egorov [Wed, 5 Mar 2025 04:58:30 +0000 (05:58 +0100)]
configs: Add phycore_am62ax_r5_usbdfu_defconfig
This config includes the phycore_am62ax_r5_defconfig file as well as
the am62x_r5_usbdfu.config fragment. We need another defconfig
because the AM62Ax has not enough internal SRAM to support all boot
sources. The normal phycore_am62ax_r5_defconfig should allow to boot
from MMC and OSPI while this new defconfig allows to boot from USB.
Harrison Mutai [Tue, 4 Mar 2025 16:52:01 +0000 (16:52 +0000)]
vepxress64: disable CRC32 by default to prevent aborts
On fast models, the CRC32 feature is disabled by default. When enabled
in U-Boot, it leads to synchronous aborts due to unrecognized
instructions. This change ensures CRC32 is disabled by default to
maintain compatibility.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 4 Mar 2025 20:24:36 +0000 (14:24 -0600)]
serial: Add missing TPL_SYS_NS16550_SERIAL symbol
On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL
enabled, today this builds under TPL as well due to how $(XPL_) is
defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and
clarity.
projects / thirdparty / u-boot.git / log
