RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication [NFC]

RISC-V ISA implication rules become little bit complicated than before,
it may come with condition, so this commit extend the capability of
riscv_implied_info_t, also make it more...C++ize.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_implied_predicator_t): New.
(riscv_implied_info_t::riscv_implied_info_t): New.
(riscv_implied_info_t::match): New.
(riscv_implied_info): New entry for zcf.
(riscv_subset_list::handle_implied_ext): Use
riscv_implied_info_t::match.
(riscv_subset_list::check_implied_ext): Ditto.
(riscv_subset_list::handle_combine_ext): Ditto.
(riscv_subset_list::parse): Move zcf implication handling to
riscv_implied_infos.

RISC-V: Refine riscv_subset_list::parse [NFC]

Extract the logic of checking conflict extensions to a standard alone
function, prepare to add more checking logic.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc
(riscv_subset_list::check_conflict_ext): New.
(riscv_subset_list::parse): Move checking conflict ext. to
check_conflict_ext.
* config/riscv/riscv-subset.h:
Add riscv_subset_list::check_conflict_ext.

i386: Fix CPUID of USER_MSR.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h (get_available_features): Move USER_MSR
to the correct location.

gcc/testsuite/ChangeLog:

* gcc.target/i386/user_msr-1.c: Correct the MSR index for give the user
an proper example.

PR modula2/112825: modula2 builds target objects as part of all-gcc

This patch fixes the PR modula2/112825 which fails if the target
assembler is not present on the host.  This can be seen if the
build invokes make all-gcc.  m2 should not attempt to generate
target libraries when performing make all-gcc.

Prior to this patch it generated build/gcc/m2/gm2-libs/SYSTSEM.def
using the script gcc/m2/tools-src/makeSystem (and gm2 -c).
makeSystem should exec gm2 -S instead (and other flags)
to generate the list of target data types without requiring any
target tools.  The target types emitted are textually converted
into SYSTEM.def.

gcc/m2/ChangeLog:

PR modula2/112825
* tools-src/makeSystem: Change all occurrences of -c to -S.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

RISC-V: Robostify the W43, W86, W87 constraint enabled attribute

Committed as it is obvious fix.

gcc/ChangeLog:

* config/riscv/riscv.md: Rostify the constraints.

LoongArch: Add intrinsic function descriptions for LSX and LASX instructions to doc.

gcc/ChangeLog:

* doc/extend.texi: Add information about the intrinsic function of the vector
instruction.

Daily bump.

testsuite: Fix up gcc.target/aarch64/pr112406.c for modern C [PR112406]

On Fri, Nov 17, 2023 at 02:04:01PM +0100, Robin Dapp wrote:
> > Yes, your version is also OK.
>
> The attached was bootstrapped and regtested on aarch64, x86 and
> regtested on riscv.  Going to commit it later unless somebody objects.

Unfortunately the aarch64/pr112406.c was reduced too much and is rejected
since the switch to modern C patchset.

The following patch fixes that, I've verified the testcase
before/after the changes still ICEs in r14-5563 and doesn't with
r14-5564 and after the changes compiles fine with even latest trunk.
Everything admittedly with a cross-compiler, but that shouldn't change
anything.

Note, one of the modern C changes is that at least when people use
cvise/creduce/delta scripts which ensure no further errors are introduced
during the reduction then expected originally such reductions will not
appear anymore.

2023-12-03  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/112406
* gcc.target/aarch64/pr112406.c (MagickPixelPacket): Add missing
semicolon.
(GetImageChannelMoments_image): Avoid using implicit int.
(SetMagickPixelPacket): Use void return type instead of implicit int.
(GetImageChannelMoments): Likewise.  Use __builtin_atan instead of
atan.

lower-bitint: Fix up lower_addsub_overflow [PR112807]

lower_addsub_overflow uses handle_cast or handle_operand to extract current
limb from the operands.  Both of those functions heavily assume that they
return a large or huge BITINT_TYPE.  The problem in the testcase is that
this is violated.  Normally, lower_addsub_overflow isn't even called if
neither the return's type element type nor any of the operand is large/huge
BITINT_TYPE (on x86_64 129+ bits), for middle BITINT_TYPE (on x86_64 65-128
bits) some other code casts such operands to {,unsigned }__int128.
In the testcase the result is complex unsigned, so small, but one of the
arguments is _BitInt(256), so lower_addsub_overflow is called.  But
range_for_prec asks the ranger for ranges of the operands and in this
case the first argument has [0, 0xffffffff] range and second [-2, 1], so
unsigned 32-bit and signed 2-bit, and in such case the code for
handle_operand/handle_cast purposes would use the _BitInt(256) type for the
first operand (ok), but because prec3 aka maximum of result precision and
the VRP computes ranges of the arguments is 32, use cast to 32-bit
BITINT_TYPE, which is why it didn't work correctly.
The following patch ensures that in such cases we use handle_cast to the
type of the other argument.

Perhaps incrementally, we could try to optimize this in an earlier phase,
see that while the .{ADD,SUB}_OVERFLOW has large/huge _BitInt argument, as
ranger says it fits into a smaller type, add a cast of the larger argument
to the smaller precision type in which it fits.  Either in
gimple_lower_bitint, or match.pd.  An argument for the latter is that e.g.
complex unsigned .ADD_OVERFLOW (unsigned_long_long_arg, unsigned_arg)
where ranger says unsigned_long_long_arg fits into unsigned 32-bit could
be also more efficient as
.ADD_OVERFLOW ((unsigned) unsigned_long_long_arg, unsigned_arg)

2023-12-03  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/112807
* gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
When choosing type0 and type1 types, if prec3 has small/middle bitint
kind, use maximum of type0 and type1's precision instead of prec3.

* gcc.dg/bitint-46.c: New test.

testsuite: Fix up pr112337.c test

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/pr112337.c: Use int32_t instead of int.

RISC-V: Fix typo in test abi configuration

It should be -mabi=lp64d instead of -mabi=lp64, committed in as obvious.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112743-1.c: Fix typo.
* gcc.target/riscv/rvv/base/pr112743-2.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>

[committed] Fix gnu23-builtins-no-dfp

Last patch for the night.  There's still a bit of minor fallout left in GCC
(loongarch testsuite for example).  But things are looking good on the targets
I test.  The plan is to start submitting the various newlib/libgloss fixes
tomorrow.

Anyway, this test was the one I was most concerned about.  Basically we're
testing that on a !dfp target that the builtins are not available.  It expects
a warning, but gets an error by default now.  I just changed the test to use
-fpermissive, so that the test behaves as it did previously.

Pushed to the trunk.

gcc/testsuite
* gcc.dg/gnu23-builtins-no-dfp-1.c: Add -fpermissive.

[committed] Fix build of libgcc on ports using FDPIC

read_encoded_value_with_base has an ifdef'd code path conditional on __FDPIC__
which was calling _Unwind_gnu_Find_got without a prototype.  This naturally
caused various build failures.

This adds a suitable prototype.

Pushed to the trunk.

libgcc

* unwind-pe.h (_Unwind_gnu_Find_got): Add prototype.

[committed] Fix pr65369.c

There's a caller/callee type mismatch in this test that shows up on targets
where ints are something other than 32 bit types.

Based on reviewing the original bug report, the fix and the part of the test
this fixes, I'm reasonably confident this hasn't compromised the test.

gcc/testsuite
* gcc.c-torture/execute/pr65369.c: Fix type mismatch.

[committed] Fix comp-goto-1.c on 16 bit targets

I don't remember what port triggered this, but it's obviously that
comp-goto-1.c needs to be fixed.

Basically the test has two implementations.  One is just a dummy with no return
value on main() triggering the new errors.

gcc/testsuite
* gcc.c-torture/execute/comp-goto-1.c: Fix return value of main for
16 bit targets.

[committed] Fix a few arc tests

Similar to others.  Where it's easy to fix the implicit types or add prototypes
I did.  One was just ugly and I didn't want to think too hard, so I just added
-fpermissive.

Pushed to the trunk.

gcc/testsuite
* gcc.target/arc/lra-1.c: Fix missing prototypes and implicit
types in variable definitions.
* gcc.target/arc/pic-1.c: Similarly.
* gcc.target/arc/pr9001191897.c: Similarly.
* gcc.target/arc/pr9001195952.c: Add -fpermissive.

[committed] Fix nios2 tests

The nios2 port has two tests that are affected by the recent changes.  In
cdx-ldstwm-1.c it was easiest to just add -fpermissive.  for cdx-ldstwm-2.c
adding an prototype for exit and abort is all that's needed.

gcc/testsuite
* gcc.target/nios2/cdx-ldstwm-1.c: Add -fpermissive.
* gcc.target/nios2/cdx-ldstwm-2.c: Add prototypes fro abort and exit.

[committed] Fix rx build failure in libgcc

The rx port has a bunch of what I presume are ABI compatibility functions in
libgcc.  Those compatibility functions routines such as __eqdf2 from libgcc,
but without a prototype.  This patch adds the missing prototypes.

libgcc/
* config/rx/rx-abi-functions.c (__ltdf2, __gtdf2): Add prototype.
(__ledf2, __gedf2, __eqdf2, __nedf2): Likewise.
(__ltsf2, __gtsf2, __lesf2, __gesf2, __eqsf2, __nesf2): Likewise.

[committed] Fix minor testsuite problems on H8 after C99 changes

Two minor regressions on the H8 were triggered by the C99 changes.  First
pr58400.c has several functions without prototypes.  I just added -fpermissive
to that test.  Second pr17306-2.c has a single call to an unprototyped function
for which I added the prototype.

These are both H8 specific tests.

gcc/testsuite
* gcc.target/h8300/pr58400.c: Add -fpermissive.
* gcc.target/h8300/pr17306-2.c: Add missing prototype.

[committed] Fix frv build after C99 changes

Two issues prevent the frv-elf port from building after the C99 changes.  First
the trampoline code emitted into libgcc has calls to exit, but no prototype.
Adding a trivial prototype for exit() into the macro fixes that little goof.

Second, frvbegin.c has a call to atexit, so a quick prototype is added into
frvbegin.c to fix that problem.

That's enough to get the compiler building again.

gcc/
* config/frv/frv.h (TRANSFER_FROM_TRAMPOLINE): Add prototype for exit.

libgcc/
* config/frv/frvbegin.c (atexit): Add prototype.

Daily bump.

libsupc++: try cxa_thread_atexit_impl at runtime

g++.dg/tls/thread_local-order2.C fails when the toolchain is built for
a platform that lacks __cxa_thread_atexit_impl, even if the program is
built and run using that toolchain on a (later) platform that offers
__cxa_thread_atexit_impl.

This patch adds runtime testing for __cxa_thread_atexit_impl on
platforms that support weak symbols.

for  libstdc++-v3/ChangeLog

* libsupc++/atexit_thread.cc [__GXX_WEAK__]: Add dynamic
detection of __cxa_thread_atexit_impl.

Fortran: deferred-length character optional dummy arguments [PR93762,PR100651]

gcc/fortran/ChangeLog:

PR fortran/93762
PR fortran/100651
* trans-array.cc (gfc_trans_deferred_array): Add presence check
for optional deferred-length character dummy arguments.
* trans-expr.cc (gfc_conv_missing_dummy): The character length for
deferred-length dummy arguments is passed by reference, so that
its value can be returned.  Adjust handling for optional dummies.

gcc/testsuite/ChangeLog:

PR fortran/93762
PR fortran/100651
* gfortran.dg/optional_deferred_char_1.f90: New test.

attribs: Namespace-aware lookup_attribute_spec

attribute_ignored_p already used a namespace-aware query
to find the attribute_spec for an existing attribute:

      const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr));

This patch does the same for other callers in the file.

gcc/
* attribs.cc (comp_type_attributes): Pass the full TREE_PURPOSE
to lookup_attribute_spec, rather than just the name.
(remove_attributes_matching): Likewise.

attribs: Consider namespaces when comparing attributes

decl_attributes and comp_type_attributes both had code that
iterated over one list of attributes and looked for coresponding
attributes in another list.  This patch makes those lookups
namespace-aware.

gcc/
* attribs.cc (find_same_attribute): New function.
(decl_attributes, comp_type_attributes): Use it when looking
up one list's attributes in another list.

attribs: Cache the gnu namespace

Later patches add more calls to get_attribute_namespace.
For scoped attributes, this is a simple operation on tree pointers.
But for normal GNU attributes (the vast majority), it involves a
call to get_identifier ("gnu").  This patch caches the identifier
for speed.

gcc/
* Makefile.in (GTFILES): Add attribs.cc.
* attribs.cc (gnu_namespace_cache): New variable.
(get_gnu_namespace): New function.
(lookup_attribute_spec): Use it instead of get_identifier ("gnu").
(get_attribute_namespace, attribs_cc_tests): Likewise.

Tweak language choice in config-list.mk

When I tried to use config-list.mk, the build for every triple except
the build machine's failed for m2.  This is because, unlike other
languages, m2 builds target objects during all-gcc.  The build will
therefore fail unless you have access to an appropriate binutils
(or an equivalent).  That's quite a big ask for over 100 targets. :)

This patch therefore makes m2 an optional inclusion.

Doing that wasn't entirely straightforward though.  The current
configure line includes "--enable-languages=all,...", which means
that the "..." can only force languages to be added that otherwise
wouldn't have been.  (I.e. the only effect of the "..." is to
override configure autodetection.)

The choice of all,ada and:

  # Make sure you have a recent enough gcc (with ada support) in your path so
  # that --enable-werror-always will work.

make it clear that lack of GNAT should be a build failure rather than
silently ignored.  This predates the D frontend, which requires GDC
in the same way that Ada requires GNAT.  I don't know of a reason
why D should be treated differently.

The patch therefore expands the "all" into a specific list of
languages.

That in turn meant that Fortran had to be handled specially,
since bpf and mmix don't support Fortran.

Perhaps there's an argument that m2 shouldn't build target objects
during all-gcc, but (a) it works for practical usage and (b) the
patch is an easy workaround.  I'd be happy for the patch to be
reverted if the build system changes.

contrib/
* config-list.mk (OPT_IN_LANGUAGES): New variable.
($(LIST)): Replace --enable-languages=all with a specifc list.
Disable fortran on bpf and mmix.  Enable the languages in
OPT_IN_LANGUAGES.

Allow target attributes in non-gnu namespaces

Currently there are four static sources of attributes:

- LANG_HOOKS_ATTRIBUTE_TABLE
- LANG_HOOKS_COMMON_ATTRIBUTE_TABLE
- LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE
- TARGET_ATTRIBUTE_TABLE

All of the attributes in these tables go in the "gnu" namespace.
This means that they can use the traditional GNU __attribute__((...))
syntax and the standard [[gnu::...]] syntax.

Standard attributes are registered dynamically with a null namespace.
There are no supported attributes in other namespaces (clang, vendor
namespaces, etc.).

This patch tries to generalise things by making the namespace
part of the attribute specification.

It's usual for multiple attributes to be defined in the same namespace,
so rather than adding the namespace to each individual definition,
it seemed better to group attributes in the same namespace together.
This would also allow us to reuse the same table for clang attributes
that are written with the GNU syntax, or other similar situations
where the attribute can be accessed via multiple "spellings".

The patch therefore adds a scoped_attribute_specs that contains
a namespace and a list of attributes in that namespace.

It's still possible to have multiple scoped_attribute_specs
for the same namespace.  E.g. it makes sense to keep the
C++-specific, C/C++-common, and format-related attributes in
separate tables, even though they're all GNU attributes.

Current lists of attributes are terminated by a null name.
Rather than keep that for the new structure, it seemed neater
to use an array_slice.  This also makes the tables slighly more
compact.

In general, a target might want to support attributes in multiple
namespaces.  Rather than have a separate hook for each possibility
(like the three langhooks above), it seemed better to make
TARGET_ATTRIBUTE_TABLE a table of tables.  Specifically, it's
an array_slice of scoped_attribute_specs.

We can do the same thing for langhooks, which allows the three hooks
above to be merged into a single LANG_HOOKS_ATTRIBUTE_TABLE.
It also allows the standard attributes to be registered statically
and checked by the usual attribs.cc checks.

The patch adds a TARGET_GNU_ATTRIBUTES helper for the common case
in which a target wants a single table of gnu attributes.  It can
only be used if the table is free of preprocessor directives.

There are probably other things we need to do to make vendor namespaces
work smoothly.  E.g. in principle it would be good to make exclusion
sets namespace-aware.  But to some extent we have that with standard
vs. gnu attributes too.  This patch is just supposed to be a first step.

gcc/
* attribs.h (scoped_attribute_specs): New structure.
(register_scoped_attributes): Take a reference to a
scoped_attribute_specs instead of separate namespace and array
parameters.
* plugin.h (register_scoped_attributes): Likewise.
* attribs.cc (register_scoped_attributes): Likewise.
(attribute_tables): Change into an array of scoped_attribute_specs
pointers.  Reduce to 1 element for frontends and 1 element for targets.
(empty_attribute_table): Delete.
(check_attribute_tables): Update for changes to attribute_tables.
Use a hash_set to identify duplicates.
(handle_ignored_attributes_option): Update for above changes.
(init_attributes): Likewise.
(excl_pair): Delete.
(test_attribute_exclusions): Update for above changes.  Don't
enforce symmetry for standard attributes in the top-level namespace.
* langhooks-def.h (LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Likewise.
(LANG_HOOKS_INITIALIZER): Update accordingly.
(LANG_HOOKS_ATTRIBUTE_TABLE): Define to an empty constructor.
* langhooks.h (lang_hooks::common_attribute_table): Delete.
(lang_hooks::format_attribute_table): Likewise.
(lang_hooks::attribute_table): Redefine to an array of
scoped_attribute_specs pointers.
* target-def.h (TARGET_GNU_ATTRIBUTES): New macro.
* target.def (attribute_spec): Redefine to return an array of
scoped_attribute_specs pointers.
* tree-inline.cc (function_attribute_inlinable_p): Update accordingly.
* doc/tm.texi: Regenerate.
* config/aarch64/aarch64.cc (aarch64_attribute_table): Define using
TARGET_GNU_ATTRIBUTES.
* config/alpha/alpha.cc (vms_attribute_table): Likewise.
* config/avr/avr.cc (avr_attribute_table): Likewise.
* config/bfin/bfin.cc (bfin_attribute_table): Likewise.
* config/bpf/bpf.cc (bpf_attribute_table): Likewise.
* config/csky/csky.cc (csky_attribute_table): Likewise.
* config/epiphany/epiphany.cc (epiphany_attribute_table): Likewise.
* config/gcn/gcn.cc (gcn_attribute_table): Likewise.
* config/h8300/h8300.cc (h8300_attribute_table): Likewise.
* config/loongarch/loongarch.cc (loongarch_attribute_table): Likewise.
* config/m32c/m32c.cc (m32c_attribute_table): Likewise.
* config/m32r/m32r.cc (m32r_attribute_table): Likewise.
* config/m68k/m68k.cc (m68k_attribute_table): Likewise.
* config/mcore/mcore.cc (mcore_attribute_table): Likewise.
* config/microblaze/microblaze.cc (microblaze_attribute_table):
Likewise.
* config/mips/mips.cc (mips_attribute_table): Likewise.
* config/msp430/msp430.cc (msp430_attribute_table): Likewise.
* config/nds32/nds32.cc (nds32_attribute_table): Likewise.
* config/nvptx/nvptx.cc (nvptx_attribute_table): Likewise.
* config/riscv/riscv.cc (riscv_attribute_table): Likewise.
* config/rl78/rl78.cc (rl78_attribute_table): Likewise.
* config/rx/rx.cc (rx_attribute_table): Likewise.
* config/s390/s390.cc (s390_attribute_table): Likewise.
* config/sh/sh.cc (sh_attribute_table): Likewise.
* config/sparc/sparc.cc (sparc_attribute_table): Likewise.
* config/stormy16/stormy16.cc (xstormy16_attribute_table): Likewise.
* config/v850/v850.cc (v850_attribute_table): Likewise.
* config/visium/visium.cc (visium_attribute_table): Likewise.
* config/arc/arc.cc (arc_attribute_table): Likewise.  Move further
down file.
* config/arm/arm.cc (arm_attribute_table): Update for above changes,
using...
(arm_gnu_attributes, arm_gnu_attribute_table): ...these new globals.
* config/i386/i386-options.h (ix86_attribute_table): Delete.
(ix86_gnu_attribute_table): Declare.
* config/i386/i386-options.cc (ix86_attribute_table): Replace with...
(ix86_gnu_attributes, ix86_gnu_attribute_table): ...these two globals.
* config/i386/i386.cc (ix86_attribute_table): Define as an array of
scoped_attribute_specs pointers.
* config/ia64/ia64.cc (ia64_attribute_table): Update for above changes,
using...
(ia64_gnu_attributes, ia64_gnu_attribute_table): ...these new globals.
* config/rs6000/rs6000.cc (rs6000_attribute_table): Update for above
changes, using...
(rs6000_gnu_attributes, rs6000_gnu_attribute_table): ...these new
globals.

gcc/ada/
* gcc-interface/gigi.h (gnat_internal_attribute_table): Change
type to scoped_attribute_specs.
* gcc-interface/utils.cc (gnat_internal_attribute_table): Likewise,
using...
(gnat_internal_attributes): ...this as the underlying array.
* gcc-interface/misc.cc (gnat_attribute_table): New global.
(LANG_HOOKS_ATTRIBUTE_TABLE): Use it.

gcc/c-family/
* c-common.h (c_common_attribute_table): Replace with...
(c_common_gnu_attribute_table): ...this.
(c_common_format_attribute_table): Change type to
scoped_attribute_specs.
* c-attribs.cc (c_common_attribute_table): Replace with...
(c_common_gnu_attributes, c_common_gnu_attribute_table): ...these
new globals.
(c_common_format_attribute_table): Change type to
scoped_attribute_specs, using...
(c_common_format_attributes): ...this as the underlying array.

gcc/c/
* c-tree.h (std_attribute_table): Declare.
* c-decl.cc (std_attribute_table): Change type to
scoped_attribute_specs, using...
(std_attributes): ...this as the underlying array.
(c_init_decl_processing): Remove call to register_scoped_attributes.
* c-objc-common.h (c_objc_attribute_table): New global.
(LANG_HOOKS_ATTRIBUTE_TABLE): Use it.
(LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Delete.

gcc/cp/
* cp-tree.h (cxx_attribute_table): Delete.
(cxx_gnu_attribute_table, std_attribute_table): Declare.
* cp-objcp-common.h (LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Delete.
(cp_objcp_attribute_table): New table.
(LANG_HOOKS_ATTRIBUTE_TABLE): Redefine.
* tree.cc (cxx_attribute_table): Replace with...
(cxx_gnu_attributes, cxx_gnu_attribute_table): ...these globals.
(std_attribute_table): Change type to scoped_attribute_specs, using...
(std_attributes): ...this as the underlying array.
(init_tree): Remove call to register_scoped_attributes.

gcc/d/
* d-tree.h (d_langhook_attribute_table): Replace with...
(d_langhook_gnu_attribute_table): ...this.
(d_langhook_common_attribute_table): Change type to
scoped_attribute_specs.
* d-attribs.cc (d_langhook_common_attribute_table): Change type to
scoped_attribute_specs, using...
(d_langhook_common_attributes): ...this as the underlying array.
(d_langhook_attribute_table): Replace with...
(d_langhook_gnu_attributes, d_langhook_gnu_attribute_table): ...these
new globals.
(uda_attribute_p): Update accordingly, and update for new
targetm.attribute_table type.
* d-lang.cc (d_langhook_attribute_table): New global.
(LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.

gcc/fortran/
* f95-lang.cc: Include attribs.h.
(gfc_attribute_table): Change to an array of scoped_attribute_specs
pointers, using...
(gfc_gnu_attributes, gfc_gnu_attribute_table): ...these new globals.

gcc/jit/
* dummy-frontend.cc (jit_format_attribute_table): Change type to
scoped_attribute_specs, using...
(jit_format_attributes): ...this as the underlying array.
(jit_attribute_table): Change to an array of scoped_attribute_specs
pointers, using...
(jit_gnu_attributes, jit_gnu_attribute_table): ...these new globals
for the original array.  Include the format attributes.
(LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_ATTRIBUTE_TABLE): Define.

gcc/lto/
* lto-lang.cc (lto_format_attribute_table): Change type to
scoped_attribute_specs, using...
(lto_format_attributes): ...this as the underlying array.
(lto_attribute_table): Change to an array of scoped_attribute_specs
pointers, using...
(lto_gnu_attributes, lto_gnu_attribute_table): ...these new globals
for the original array.  Include the format attributes.
(LANG_HOOKS_COMMON_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_FORMAT_ATTRIBUTE_TABLE): Delete.
(LANG_HOOKS_ATTRIBUTE_TABLE): Define.

RISC-V: Improve style to work around PR 60994 in host compiler.

This simple patch allows me to build a cross-compiler to riscv using
older versions of RedHat's system compiler.  The issue is PR c++/60994
where g++ doesn't like the same name (demand_flags) to be used by both
a variable and a (enumeration) type, which is also undesirable from a
(GNU) coding style perspective.  One solution is to rename the type
to demand_flags_t, but a less invasive change is to simply use another
identifier for the problematic local variable, renaming demand_flags
to dflags.

2023-12-02  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/riscv/riscv-vsetvl.cc (csetvl_info::parse_insn): Rename
local variable from demand_flags to dflags, to avoid conflicting
with (enumeration) type of the same name.

Testsuite, Darwin: skip -mcmodel=large test

-mcmodel=large is not supported (yet) on Darwin [PR90698]

gcc/testsuite/ChangeLog:

* gcc.target/i386/libcall-1.c: Skip on darwin.

LoongArch: Optimize vector constant extract-{even/odd} permutation.

For vector constant extract-{even/odd} permutation replace the default
[x]vshuf instruction combination with [x]vilv{l/h} instruction, which
can reduce instructions and improves performance.

gcc/ChangeLog:

* config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
Supplementary function prototype.
(loongarch_is_even_extraction): Adjust.
(loongarch_try_expand_lsx_vshuf_const): Adjust.
(loongarch_is_extraction_permutation): Adjust.
(loongarch_expand_vec_perm_const_2): Adjust.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/lasx-extract-even_odd-opt.c: New test.

LoongArch: Accelerate optimization of scalar signed/unsigned popcount.

In LoongArch, the vector popcount has corresponding instructions, while
the scalar does not. Currently, the scalar popcount is calculated
through a loop, and the value of a non-power of two needs to be iterated
several times, so the vector popcount instruction is considered for
optimization.

gcc/ChangeLog:

* config/loongarch/loongarch.md (v2di): Used to simplify the
following templates.
(popcount<mode>2): New.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/popcnt.c: New test.
* gcc.target/loongarch/popcount.c: New test.

LoongArch: Added vectorized hardware inspection for testsuite.

When GCC regression tests are executed on a cpu that does not support
vectorization, the loongarch/vector directory will have some FAIL entries for
all test cases related to vectorization runs. In order to solve this kind
of problem, a vectorized hardware detection function was added to the code,
which can only be compiled but not run.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/vector/lasx/lasx-xvabsd-1.c:Remove
the default Settings to run the behavior.
* gcc.target/loongarch/vector/lasx/lasx-xvabsd-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvadd.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvadda.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwev-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvaddwod-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvand.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvandi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvandn.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvavg-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvavgr-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitclr.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitclri.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrev.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitrevi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitsel.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseli.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitset.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbitseti.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbsll_v.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvbsrl_v.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvclo.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvclz.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvdiv-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvext2xv-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvexth-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvextl-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvextl-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvextrins.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfadd_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfclass_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_caf_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_ceq_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cle_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_clt_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cne_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cor_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_cun_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_saf_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_seq_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sle_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_slt_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sne_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sor_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcmp_sun_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcvt.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfcvth.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvffint-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvffinth.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvflogb_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfmadd_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfmax_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfmaxa_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfnmadd_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfrint_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstp.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfrstpi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_d.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvfsqrt_s.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvftint-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvftintl.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvhaddw-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvhsubw-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvilvh.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvilvl.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvinsgr2vr.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvinsve0.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvld.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvldi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmadd.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwev-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaddwod-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmax-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmax-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmaxi-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmin-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmini-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmod-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmskgez.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmskltz.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmsknz.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmsub.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmuh-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmul.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwev-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvmulwod-3.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvneg.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvnor.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvnori.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvor.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvori.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvorn.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpackev.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpackod.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpcnt.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpickev.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpickod.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpickve2gr.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvprem.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvpremi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvreplgr2vr.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvreplve0.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvreplvei.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvrotr.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvrotri.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsadd-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsat-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvseq.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvseqi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf4i_b.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvshuf_b.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsigncov.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsle-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslei-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsll.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslli.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsllwil-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslt-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvslti-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsra.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrai.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsran.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrani.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrar.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrari.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarn.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrarni.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrl.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrli.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrln.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlni.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlr.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlri.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrn.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsrlrni.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssran.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrani.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarn.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrarni.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrln.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlni.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrn.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssrlrni.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssub-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvssub-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvst.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsub.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsubi.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwev-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-1.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvsubwod-2.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvxor.c:Dito.
* gcc.target/loongarch/vector/lasx/lasx-xvxori.c:Dito.
* gcc.target/loongarch/vector/loongarch-vector.exp:Added hardware
detection to set the behavior of program execution based on the
characteristics of the hardware.
* gcc.target/loongarch/vector/lsx/lsx-vabsd-1.c:Remove the default
Settings to run the behavior.
* gcc.target/loongarch/vector/lsx/lsx-vabsd-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vadd.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vadda.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddwev-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vaddwod-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vand.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vandi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vandn.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vavg-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vavg-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vavgr-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vavgr-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitclr.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitclri.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitrev.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitrevi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitsel.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitseli.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitset.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbitseti.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbsll.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vbsrl.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vclo.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vclz.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vdiv-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vdiv-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vexth-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vexth-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vextl-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vextl-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vextrins.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfadd_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfadd_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfclass_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_caf.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_ceq.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cle.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_clt.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cne.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cor.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_cun.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_saf.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_seq.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sle.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_slt.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sne.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sor.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcmp_sun.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcvt-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfcvt-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vffint-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vffint-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vffint-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vflogb_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfmadd_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfmax_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfmaxa_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfnmadd_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfrint_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfrint_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfrstp.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfrstpi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_d.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vfsqrt_s.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vftint-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vftint-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vftint-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vftint-4.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vhaddw-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vhaddw-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vhsubw-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vhsubw-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vilvh.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vilvl.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vinsgr2vr.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vld.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vldi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmadd.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwev-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaddwod-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmax-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmax-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaxi-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmaxi-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmin-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmin-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmini-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmini-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmod-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmod-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmskgez.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmskltz.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmsknz.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmsub.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmuh-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmuh-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmul.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmulwev-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vmulwod-3.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vneg.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vnor.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vnori.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vor.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vori.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vorn.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpackev.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpackod.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpcnt.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpickev.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpickod.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpickve2gr.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vpremi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vreplgr2vr.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vreplve.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vreplvei.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vrotr.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vrotri.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsadd-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsadd-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsat-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsat-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vseq.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vseqi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vshuf.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vshuf4i.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsigncov.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsle-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsle-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslei-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslei-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsll.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslli.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsllwil-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsllwil-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslt-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslt-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslti-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vslti-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsra.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrai.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsran.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrani.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrar.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrari.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrarn.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrarni.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrl.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrli.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrln.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrlni.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrlr.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrlri.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrlrn.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsrlrni.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssran.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrani.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrarn.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrarni.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrln.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrlni.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrlrn.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssrlrni.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssub-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vssub-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vst.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsub.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsubi.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsubwev-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsubwev-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsubwod-1.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vsubwod-2.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vxor.c:Dito.
* gcc.target/loongarch/vector/lsx/lsx-vxori.c:Dito.

LoongArch: Remove duplicate definition of CLZ_DEFINED_VALUE_AT_ZERO.

In the r14-5547 commit, C[LT]Z_DEFINED_VALUE_AT_ZERO were defined at
the same time, but in fact, CLZ_DEFINED_VALUE_AT_ZERO has already been
defined, so remove the duplicate definition.

gcc/ChangeLog:

* config/loongarch/loongarch.h (CTZ_DEFINED_VALUE_AT_ZERO): Add
description.
(CLZ_DEFINED_VALUE_AT_ZERO): Remove duplicate definition.

RISC-V: Fix incorrect combine of extended scalar pattern

Background:
RVV ISA vx instructions for example vadd.vx,
When EEW = 64 and RV32. We can't directly use vadd.vx.
Instead, we need to use:

sw
sw
vlse
vadd.vv

However, we have some special situation that we still can directly use
vadd.vx directly for EEW=64 && RV32.

that is, when scalar is a known CONST_INT value that doesn't overflow 32-bit value.
So, we have a dedicated pattern for such situation:

...
(sign_extend:<VEL> (match_operand:<VSUBEL> 3 "register_operand"          " r,  r,  r,  r")).
...

We first force_reg such CONST_INT (within 32bit value) into a SImode reg.
Then use such special patterns.
Those pattern with this operand match should only value on! TARGET_64BIT.

The PR112801 combine into such patterns on RV64 incorrectly (Those patterns should be only value on RV32).

This is the bug:

        andi    a2,a2,2
        vsetivli        zero,2,e64,m1,ta,ma
        sext.w  a3,a4
        vmv.v.x v1,a2
        vslide1down.vx  v1,v1,a4    -> it should be a3 instead of a4.

Such incorrect codegen is caused by
...
                (sign_extend:DI (subreg:SI (reg:DI 135 [ f.0_3 ]) 0))
            ] UNSPEC_VSLIDE1DOWN)) 16935 {*pred_slide1downv2di_extended}
...

Incorretly combine into the patterns should not be valid on RV64 system.

So add !TARGET_64BIT to all same type patterns which can fix such issue as well as robostify the vector.md.

PR target/112801

gcc/ChangeLog:

* config/riscv/vector.md: Add !TARGET_64BIT.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr112801.c: New test.

RISC-V: Bugfix for legitimize move when get vec mode in zve32f

If we want to extract 64bit value but ELEN < 64, we use RVV
vector mode with EEW = 32 to extract the highpart and lowpart.
However, this approach doesn't honor DFmode when movdf pattern
when ZVE32f and of course results in ICE when zve32f.

This patch would like to reuse the approach with some additional
handing, consider lowpart bits is meaningless for FP mode, we need
one int reg as bridge here. For example:

rtx tmp = gen_rtx_reg (DImode)
reg:DI = reg:DF (fmv.d.x) // Move DF reg to DI
...
perform the extract for high and low parts
...
reg:DF = reg:DI (fmv.x.d) // Move DI reg back to DF after all done

PR target/112743

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_legitimize_move): Take the
exist (U *mode) and handle DFmode like DImode when EEW is
32bits for ZVE32F.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112743-2.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

Daily bump.

Fortran: copy-out for possibly missing OPTIONAL CLASS arguments [PR112772]

gcc/fortran/ChangeLog:

PR fortran/112772
* trans-expr.cc (gfc_conv_class_to_class): Make copy-out conditional
on the presence of an OPTIONAL CLASS argument passed to an OPTIONAL
CLASS dummy.

gcc/testsuite/ChangeLog:

PR fortran/112772
* gfortran.dg/missing_optional_dummy_7.f90: New test.

c++: mangling for CTAD placeholder

Per https://github.com/itanium-cxx-abi/cxx-abi/issues/109 mangle a C++17
CTAD placeholder as its template.

gcc/cp/ChangeLog:

* mangle.cc (write_type): Mangle placeholder as its template.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/nontype-class4.C: Specify ABI v18.
* g++.dg/cpp2a/nontype-class4a.C: New test.

c++: mangle function template constraints

Per https://github.com/itanium-cxx-abi/cxx-abi/issues/24 and
https://github.com/itanium-cxx-abi/cxx-abi/pull/166

We need to mangle constraints to be able to distinguish between function
templates that only differ in constraints.  From the latter link, we want to
use the template parameter mangling previously specified for lambdas to also
make explicit the form of a template parameter where the argument is not a
"natural" fit for it, such as when the parameter is constrained or deduced.

I'm concerned about how the latter link changes the mangling for some C++98
and C++11 patterns, so I've limited template_parm_natural_p to avoid two
cases found by running the testsuite with -Wabi forced on:

template <class T, T V> T f() { return V; }
int main() { return f<int,42>(); }

template <int i> int max() { return i; }
template <int i, int j, int... rest> int max()
{
  int sub = max<j, rest...>();
  return i > sub ? i : sub;
}
int main() {  return max<1,2,3>(); }

A third C++11 pattern is changed by this patch:

template <template <typename...> class TT, typename... Ts> TT<Ts...> f();
template <typename> struct A { };
int main() { f<A,int>(); }

I aim to resolve these with the ABI committee before GCC 14.1.

We also need to resolve https://github.com/itanium-cxx-abi/cxx-abi/issues/38
(mangling references to dependent template-ids where the name is fully
resolved) as references to concepts in std:: will consistently run into this
area.  This is why mangle-concepts1.C only refers to concepts in the global
namespace so far.

The library changes are to avoid trying to mangle builtins, which fails.

Demangler support and test coverage is not complete yet.

gcc/cp/ChangeLog:

* cp-tree.h (TEMPLATE_ARGS_TYPE_CONSTRAINT_P): New.
(get_concept_check_template): Declare.
* constraint.cc (combine_constraint_expressions)
(finish_shorthand_constraint): Use UNKNOWN_LOCATION.
* pt.cc (convert_generic_types_to_packs): Likewise.
* mangle.cc (write_constraint_expression)
(write_tparms_constraints, write_type_constraint)
(template_parm_natural_p, write_requirement)
(write_requires_expr): New.
(write_encoding): Mangle trailing requires-clause.
(write_name): Pass parms to write_template_args.
(write_template_param_decl): Factor out from...
(write_closure_template_head): ...here.
(write_template_args): Mangle non-natural parms
and requires-clause.
(write_expression): Handle REQUIRES_EXPR.

include/ChangeLog:

* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_CONSTRAINTS.

libiberty/ChangeLog:

* cp-demangle.c (d_make_comp): Handle
DEMANGLE_COMPONENT_CONSTRAINTS.
(d_count_templates_scopes): Likewise.
(d_print_comp_inner): Likewise.
(d_maybe_constraints): New.
(d_encoding, d_template_args_1): Call it.
(d_parmlist): Handle 'Q'.
* testsuite/demangle-expected: Add some constraint tests.

libstdc++-v3/ChangeLog:

* include/std/bit: Avoid builtins in requires-clauses.
* include/std/variant: Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/abi/mangle10.C: Disable compat aliases.
* g++.dg/abi/mangle52.C: Specify ABI 18.
* g++.dg/cpp2a/class-deduction-alias3.C
* g++.dg/cpp2a/class-deduction-alias8.C:
Avoid builtins in requires-clauses.
* g++.dg/abi/mangle-concepts1.C: New test.
* g++.dg/abi/mangle-ttp1.C: New test.

Use range_compatible_p in check_operands_p.

Instead of directly checking type precision, check_operands_p should
invoke range_compatible_p to keep the range checking centralized.

* gimple-range-fold.h (range_compatible_p): Relocate.
* value-range.h (range_compatible_p): Here.
* range-op-mixed.h (operand_equal::operand_check_p): Call
range_compatible_p rather than comparing precision.
(operand_not_equal::operand_check_p): Ditto.
(operand_not_lt::operand_check_p): Ditto.
(operand_not_le::operand_check_p): Ditto.
(operand_not_gt::operand_check_p): Ditto.
(operand_not_ge::operand_check_p): Ditto.
(operand_plus::operand_check_p): Ditto.
(operand_abs::operand_check_p): Ditto.
(operand_minus::operand_check_p): Ditto.
(operand_negate::operand_check_p): Ditto.
(operand_mult::operand_check_p): Ditto.
(operand_bitwise_not::operand_check_p): Ditto.
(operand_bitwise_xor::operand_check_p): Ditto.
(operand_bitwise_and::operand_check_p): Ditto.
(operand_bitwise_or::operand_check_p): Ditto.
(operand_min::operand_check_p): Ditto.
(operand_max::operand_check_p): Ditto.
* range-op.cc (operand_lshift::operand_check_p): Ditto.
(operand_rshift::operand_check_p): Ditto.
(operand_logical_and::operand_check_p): Ditto.
(operand_logical_or::operand_check_p): Ditto.
(operand_logical_not::operand_check_p): Ditto.

hardcfr: make builtin_return tests more portable [PR112334]

Rework __builtin_return tests to explicitly call __builtin_apply and
use its return value rather than anything else.  Also require
untyped_assembly.  Avoid the noise out of exceptions escaping the
builtin-applied function, but add a test to cover their effects as
well.

for  gcc/testsuite/ChangeLog

PR target/112334
* c-c++-common/torture/harden-cfr-bret.c: Rework for stricter
untyped_return requirements.  Require untyped_assembly.
* c-c++-common/torture/harden-cfr-bret-except.c: New.
* c-c++-common/torture/harden-cfr-bret-always.c: Require
untyped_assembly.
* c-c++-common/torture/harden-cfr-bret-never.c: Likewise.
* c-c++-common/torture/harden-cfr-bret-noopt.c: Likewise.
* c-c++-common/torture/harden-cfr-bret-noret.c: Likewise.
* c-c++-common/torture/harden-cfr-bret-no-xthrow.c: Likewise.
* c-c++-common/torture/harden-cfr-bret-nothrow.c: Likewise.
* c-c++-common/torture/harden-cfr-bret-retcl.c: Likewise.

hardcfr: libgcc sym versioning

The libgcc-exported runtime component of control flow redundancy
hardening was missing symbol versioning information.  Add it.

for  libgcc/ChangeLog

* libgcc-std.ver.in (__hardcfr_check): Add to GCC_14.0.0.

[PR112445][LRA]: Fix "unable to find a register to spill" error

PR112445 is a very complicated bug occurring from interaction of
constraint subpass, inheritance, and hard reg live range splitting.
It is hard to debug this PR only from LRA standard logs.  Therefore I
added dumping all func insns at the end of complicated sub-passes
(constraint, inheritance, undoing inheritance, hard reg live range
splitting, and rematerialization).  As such output can be quite big,
it is switched only one level 7 of -fira-verbose value.  The reason
for the bug is a skip of live-range splitting of hard reg (dx) on the
1st live range splitting subpass.  Splitting is done for reload
pseudos around an original insn and its reload insns but the subpass
did not recognize such insn pattern because previous inheritance and
undoing inheritance subpasses extended a bit reload pseudo live range.
Although we undid inheritance in question, the result code was a bit
different from a code before the corresponding inheritance pass.  The
following fixes the bug by restoring exact code before the
inheritance.

gcc/ChangeLog:

PR target/112445
* lra.h (lra): Add one more arg.
* lra-int.h (lra_verbose, lra_dump_insns): New externals.
(lra_dump_insns_if_possible): Ditto.
* lra.cc (lra_dump_insns): Dump all insns.
(lra_dump_insns_if_possible):  Dump all insns for lra_verbose >= 7.
(lra_verbose): New global.
(lra): Add new arg.  Setup lra_verbose from its value.
* lra-assigns.cc (lra_split_hard_reg_for): Dump insns if rtl
was changed.
* lra-remat.cc (lra_remat): Dump insns if rtl was changed.
* lra-constraints.cc (lra_inheritance): Dump insns.
(lra_constraints, lra_undo_inheritance): Dump insns if rtl
was changed.
(remove_inheritance_pseudos): Use restore reg if it is set up.
* ira.cc: (lra): Pass internal_flag_ira_verbose.

gcc/testsuite/ChangeLog:

PR target/112445
* gcc.target/i386/pr112445.c: New test.

extend.texi: Fix up defbuiltin* with spaces in return type

In https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html#index-_005f_005fbuiltin_005fstdc_005fbit_005ffloor
I've noticed that while e.g. __builtin_stdc_bit_floor builtin is properly
rendered in bold and bigger size, for the __builtin_stdc_bit_width builtin
it is not the builtin name which is marked like that, but the keyword int
before it.  Also, seems such builtins are missing from the index.

I've read the texinfo docs and they seem to suggest in
https://www.gnu.org/software/texinfo/manual/texinfo/html_node/Line-Macros.html
that return types of functions with spaces in the return type should be
wrapped with {}s and we already use that e.g. in
@defbuiltin{{void *} __builtin_thread_pointer (void)}

The following patch adjusts builtins I found which contained one or two
spaces in the return type name (plus two spots which used 2 spaces after
single keyword return type instead of 1 which triggered my search regex as
well).

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

* doc/extend.texi (__builtin_addc, __builtin_addcl, __builtin_addcll,
__builtin_subc, __builtin_subcl, __builtin_subcll,
__builtin_stdc_bit_width, __builtin_stdc_count_ones,
__builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
__builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
__builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
__builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
__builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros,
__builtin_nvptx_brev, __builtin_nvptx_brevll, __builtin_darn,
__builtin_darn_raw, __builtin_ia32_vec_ext_v2di,
__builtin_ia32_crc32qi, __builtin_ia32_crc32hi,
__builtin_ia32_crc32si, __builtin_ia32_crc32di): Put {}s around
return type with spaces in it.
(__builtin_rx_mvfachi, __builtin_rx_mvfacmi): Remove superfluous
whitespace.

ada: Fix Ada bootstrap on macOS

The recent warning changes broke Ada bootstrap on macOS:

adaint.c: In function '__gnat_copy_attribs':
adaint.c:3336:10: error: implicit declaration of function 'utimes'; did you
mean 'utime'? [-Wimplicit-function-declaration]
 3336 |      if (utimes (to, tbuf) == -1) {
      |          ^~~~~~
      |          utime
adaint.c: In function '__gnat_kill':
adaint.c:3597:3: error: implicit declaration of function 'kill'
[-Wimplicit-function-declaration]
 3597 |   kill (pid, sig);
      |   ^~~~
terminals.c: In function 'allocate_pty_desc':
terminals.c:1196:12: error: implicit declaration of function 'openpty'; did
you mean 'openat'? [-Wimplicit-function-declaration]
 1196 |   status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
      |            ^~~~~~~
      |            openat
terminals.c: In function '__gnat_setup_winsize':
terminals.c:1392:6: error: implicit declaration of function 'kill'
[-Wimplicit-function-declaration]
 1392 |      kill (desc->child_pid, SIGWINCH);
      |      ^~~~

This patch fixes this by including the necessary headers: <sys/time.h>
for utimes, <signal.h> for kill, and <util.h> for openpty.  With those
changes, the build completed on x86_64-apple-darwin2[0-3] (make check
still running).

2023-12-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

gcc/ada:
* adaint.c [__APPLE__]: Include <signal.h>, <sys/time.h>.
* terminals.c [!_WIN32]: Include <signal.h>.
[__APPLE__]: Include <util.h>.
Fix typos.

diagnostics, analyzer: add optional per-diagnostic property bags to SARIF

I've found it useful in debugging the analyzer for the SARIF output to
contain extra analyzer-specific data in each diagnostic.

This patch:
* adds a way for a diagnostic_metadata to populate a property
bag within a SARIF "result" object based on a new vfunc
* reworks how diagnostics are emitted within the analyzer so
that a custom diagnostic_metadata subclass is used, which populates
the property bag with information from the saved_diagnostic, and with
a vfunc hook allowing for per-pending_diagnotic-subclass extra
properties.

Doing so makes it trivial to go from the SARIF output back to
pertinent parts of the analyzer's internals (e.g. the index of
the diagnostic within the ana::diagnostic_manager, the index of
the ana::exploded_node, etc).

It also replaces a lot of boilerplate in the "emit" implementations
in the various pending_diagnostics subclasses.  In particular, doing
so fixes missing CVE metadata for -Wanalyzer-fd-phase-mismatch (where
sm-fd.cc's fd_phase_mismatch::emit was failing to use its
diagnostic_metadata instance).

gcc/analyzer/ChangeLog:
* analyzer.h (class saved_diagnostic): New forward decl.
* bounds-checking.cc: Update for changes to
pending_diagnostic::emit.
* call-details.cc: Likewise.
* diagnostic-manager.cc: Include "diagnostic-format-sarif.h".
(saved_diagnostic::maybe_add_sarif_properties): New.
(class pending_diagnostic_metadata): New.
(diagnostic_manager::emit_saved_diagnostic): Create a
pending_diagnostic_metadata and a diagnostic_emission_context.
Pass the latter to the pending_diagnostic::emit vfunc.
* diagnostic-manager.h
(saved_diagnostic::maybe_add_sarif_properties): New decl.
* engine.cc: Update for changes to pending_diagnostic::emit.
* infinite-loop.cc: Likewise.
* infinite-recursion.cc: Likewise.
* kf-analyzer.cc: Likewise.
* kf.cc: Likewise.
* pending-diagnostic.cc
(diagnostic_emission_context::get_pending_diagnostic): New.
(diagnostic_emission_context::warn): New.
(diagnostic_emission_context::inform): New.
* pending-diagnostic.h (class diagnostic_emission_context): New.
(pending_diagnostic::emit): Update params.
(pending_diagnostic::maybe_add_sarif_properties): New vfunc.
* region.cc: Don't include "diagnostic-metadata.h".
* region-model.cc: Include "diagnostic-format-sarif.h".  Update
for changes to pending_diagnostic::emit.
(exposure_through_uninit_copy::maybe_add_sarif_properties): New.
* sm-fd.cc: Update for changes to pending_diagnostic::emit.
* sm-file.cc: Likewise.
* sm-malloc.cc: Likewise.
* sm-pattern-test.cc: Likewise.
* sm-sensitive.cc: Likewise.
* sm-signal.cc: Likewise.
* sm-taint.cc: Likewise.
* store.cc: Don't include "diagnostic-metadata.h".
* varargs.cc: Update for changes to pending_diagnostic::emit.

gcc/ChangeLog:
* diagnostic-core.h (emit_diagnostic_valist): New overload decl.
* diagnostic-format-sarif.cc (sarif_builder::make_result_object):
When we have metadata, call its maybe_add_sarif_properties vfunc.
* diagnostic-metadata.h (class sarif_object): Forward decl.
(diagnostic_metadata::~diagnostic_metadata): New.
(diagnostic_metadata::maybe_add_sarif_properties): New vfunc.
* diagnostic.cc (emit_diagnostic_valist): New overload.

gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/fd-accept.c: Update for fix to missing CWE
metadata for -Wanalyzer-fd-phase-mismatch.
* gcc.dg/analyzer/fd-bind.c: Likewise.
* gcc.dg/analyzer/fd-socket-misuse.c: Likewise.
* gcc.dg/plugin/analyzer_cpython_plugin.c: Update for changes to
pending_diagnostic::emit.
* gcc.dg/plugin/analyzer_gil_plugin.c: Likewise.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

docs: remove stray reference to -fanalyzer-checker=taint [PR103533]

I missed this one in r14-5464-gcfaaa8b11b8429.

gcc/ChangeLog:
PR analyzer/103533
* doc/extend.texi: Remove stray reference to
-fanalyzer-checker=taint.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

RISC-V: Support highpart register overlap for widen vx/vf instructions

This patch leverages the same approach as vwcvt.

Before this patch:

.L5:
        add     a3,s0,s1
        add     a4,s6,s1
        add     a5,s7,s1
        vsetvli zero,s0,e32,m4,ta,ma
        vle32.v v16,0(s1)
        vle32.v v12,0(a3)
        mv      s1,s2
        vle32.v v8,0(a4)
        vle32.v v4,0(a5)
        nop
        vfwadd.vf       v24,v16,fs0
        vfwadd.vf       v16,v12,fs0
        vs8r.v  v16,0(sp)                -----> spill
        vfwadd.vf       v16,v8,fs0
        vfwadd.vf       v8,v4,fs0
        nop
        vsetvli zero,zero,e64,m8,ta,ma
        vfmv.f.s        fa4,v24
        vl8re64.v       v24,0(sp)       -----> reload
        vfmv.f.s        fa5,v24
        fcvt.lu.d a0,fa4,rtz
        fcvt.lu.d a1,fa5,rtz
        vfmv.f.s        fa4,v16
        vfmv.f.s        fa5,v8
        fcvt.lu.d a2,fa4,rtz
        fcvt.lu.d a3,fa5,rtz
        add     s2,s2,s5
        call    sumation
        add     s3,s3,a0
        bgeu    s4,s2,.L5

After this patch:

.L5:
add a3,s0,s1
add a4,s6,s1
add a5,s7,s1
vsetvli zero,s0,e32,m4,ta,ma
vle32.v v4,0(s1)
vle32.v v28,0(a3)
mv s1,s2
vle32.v v20,0(a4)
vle32.v v12,0(a5)
vfwadd.vf v0,v4,fs0
vfwadd.vf v24,v28,fs0
vfwadd.vf v16,v20,fs0
vfwadd.vf v8,v12,fs0
vsetvli zero,zero,e64,m8,ta,ma
vfmv.f.s fa4,v0
vfmv.f.s fa5,v24
fcvt.lu.d a0,fa4,rtz
fcvt.lu.d a1,fa5,rtz
vfmv.f.s fa4,v16
vfmv.f.s fa5,v8
fcvt.lu.d a2,fa4,rtz
fcvt.lu.d a3,fa5,rtz
add s2,s2,s5
call sumation
add s3,s3,a0
bgeu s4,s2,.L5

PR target/112431

gcc/ChangeLog:

* config/riscv/vector.md: Support highpart overlap for vx/vf.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-22.c: New test.
* gcc.target/riscv/rvv/base/pr112431-23.c: New test.
* gcc.target/riscv/rvv/base/pr112431-24.c: New test.
* gcc.target/riscv/rvv/base/pr112431-25.c: New test.
* gcc.target/riscv/rvv/base/pr112431-26.c: New test.
* gcc.target/riscv/rvv/base/pr112431-27.c: New test.

RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW

Leverage previous approach.

Before this patch:

.L5:
        add     a3,s0,s2
        add     a4,s6,s2
        add     a5,s7,s2
        vsetvli zero,s0,e64,m8,ta,ma
        vle8.v  v4,0(s2)
        vle8.v  v3,0(a3)
        mv      s2,s1
        vle8.v  v2,0(a4)
        vle8.v  v1,0(a5)
        nop
        vluxei8.v       v8,(s1),v4
        vs8r.v  v8,0(sp)              ---> spill
        vluxei8.v       v8,(s1),v3
        vluxei8.v       v16,(s1),v2
        vluxei8.v       v24,(s1),v1
        nop
        vmv.x.s a1,v8
        vl8re64.v       v8,0(sp)     ---> reload
        vmv.x.s a3,v24
        vmv.x.s a2,v16
        vmv.x.s a0,v8
        add     s1,s1,s5
        call    sumation
        add     s3,s3,a0
        bgeu    s4,s1,.L5

After this patch:

.L5:
add a3,s0,s2
add a4,s6,s2
add a5,s7,s2
vsetvli zero,s0,e64,m8,ta,ma
vle8.v v15,0(s2)
vle8.v v23,0(a3)
mv s2,s1
vle8.v v31,0(a4)
vle8.v v7,0(a5)
vluxei8.v v8,(s1),v15
vluxei8.v v16,(s1),v23
vluxei8.v v24,(s1),v31
vluxei8.v v0,(s1),v7
vmv.x.s a3,v0
vmv.x.s a2,v24
vmv.x.s a1,v16
vmv.x.s a0,v8
add s1,s1,s5
call sumation
add s3,s3,a0
bgeu s4,s1,.L5

PR target/112431

gcc/ChangeLog:

* config/riscv/vector.md: Support highpart overlap for indexed load.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-28.c: New test.
* gcc.target/riscv/rvv/base/pr112431-29.c: New test.
* gcc.target/riscv/rvv/base/pr112431-30.c: New test.
* gcc.target/riscv/rvv/base/pr112431-31.c: New test.
* gcc.target/riscv/rvv/base/pr112431-32.c: New test.
* gcc.target/riscv/rvv/base/pr112431-33.c: New test.

Fix ambiguity between vect_get_vec_defs with/without vectype

When querying a single set of vector defs with the overloaded
vect_get_vec_defs API then when you try to use the overload with
the vector type specified the call will be ambiguous with the
variant without the vector type.  The following fixes this by
re-ordering the vector type argument to come before the output
def vector argument.

I've changed vectorizable_conversion as that triggered this
so it has coverage showing this works.  The motivation is to
reduce the number of (redundant) get_vectype_for_scalar_type
calls.

* tree-vectorizer.h (vect_get_vec_defs): Re-order arguments.
* tree-vect-stmts.cc (vect_get_vec_defs): Likewise.
(vectorizable_condition): Update caller.
(vectorizable_comparison_1): Likewise.
(vectorizable_conversion): Specify the vector type to be
used for invariant/external defs.
* tree-vect-loop.cc (vect_transform_reduction): Update caller.

testsuite: Tweak some further tests for modern C changes

On IRC Richi mentioned some FAILs in gcc.target/x86_64 and in pr83126.c.

The following patch fixes the former ones (they need recent binutils to
be enabled), for pr83126.c because I didn't have graphite configured I've
just verified that the test compiles (didn't without the patch) and that
the gimple dump is identical with one from yesterday's gcc (as it was a
tree-parloops.cc ICE, I guess identical gimple is all we care about
and no need to verify it further).

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

* gcc.target/x86_64/abi/avx512fp16/m512h/test_passing_m512.c
(fun_check_passing_m512_8_values, fun_check_passing_m512h_8_values):
Add missing void return type.
* gcc.target/x86_64/abi/avx512fp16/m256h/test_passing_m256.c
(fun_check_passing_m256_8_values, fun_check_passing_m256h_8_values):
Likewise.
* gcc.dg/graphite/pr83126.c (ew): Add missing casts to __INTPTR_TYPE__
and then to int *.

lower-bitint: Fix lowering of middle sized _BitInt operations which can throw [PR112770]

The middle kind _BitInt lowering is mostly done by casting the BITINT_TYPE
operands (if any) to a signed/unsigned integer type which has larger/equal
precision, using such integer type also for the lhs (if BITINT_TYPE) and
and adding a cast after the statement from that new lhs to the old
(BITINT_TYPE) lhs.  Note, for middle kind this isn't done for GIMPLE_CALLs.
Most of the time that works nicely, the exception as the following testcase
shows is -fnon-call-exceptions and some operations which can trap.  Because
inserting the cast to a new lhs after the statement results in a trapping
statement in the middle of a basic block.
The following patch fixes that by emitting the cast on the fallthru edge
instead.

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/112770
* gimple-lower-bitint.cc (gimple_lower_bitint): When adjusting
lhs of middle _BitInt setter which ends bb, insert cast on
the fallthru edge rather than after stmt.

* gcc.dg/bitint-45.c: New test.

lower-bitint: Fix up handle_operand_addr for 0 constants [PR112771]

handle_operand_addr for INTEGER_CSTs uses wi::min_precision (UNSIGNED
for non-negative constants, SIGNED for negative ones) and from that
computes mp as minimum number of limbs which can represent that value,
and in some cases creates a test BITINT_TYPE with that precision to
categorize it and decide based on that what types to use on the constant
emitted into memory.  For the actual precisions (what will be passed
to libgcc) it actually already uses MAX/MIN to adjust the corner cases:
          *prec = MAX (min_prec, 1);
...
          *prec = MIN ((int) -min_prec, -2);
but for integer_zerop min_prec will be 0,
mp = CEIL (min_prec, limb_prec) * limb_prec;
will be also 0 and we ICE trying to build unsigned BITINT_TYPE with
0 precision.

Fixed thusly by noting even 0 has to be encoded at least as one limb.

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/112771
* gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
Use mp = 1 if it is zero.

* gcc.dg/bitint-44.c: New test.

bpf: quote section names whenever necessary in assembly output

In BPF section names are used to encode the kind of BPF program and
other metadata, involving all sort of non alphanumeric characters.

For example:

  /* use auto-attach format for section definition. */
  SEC("uretprobe//proc/self/exe:trigger_func2")
  int handle_uretprobe_byname(struct pt_regs *ctx)
  {
   uretprobe_byname_res = 6;
   return 0;
  }

The above requires to quote the section name in the output assembly
file, since otherwise the // in the name would be interpreted by the
assembler lexer as the beginning of a line comment.

This patch makes the BPF backend to emit quoted section names in
.section directives if the name requires to be quoted.  Simple section
names whose constituent characters are in the set [0-9a-zA-Z_] are
still emitted unquoted.

Tested in target bpf-unknown-none-gcc and host x86_64-linux-gnu.

gcc/ChangeLog

* config/bpf/bpf.cc (bpf_asm_named_section): New function.
(TARGET_ASM_NAMED_SECTION): Set to bpf_asm_named_section.

gcc/testsuite/ChangeLog

* gcc.target/bpf/section-name-quoting-1.c: New test.

aarch64: modify Ampere CPU tunings on reassociation/FMA

1. Allow reassociation on FP additions.

2. Avoid generating loop-dependant FMA chains. Added a tuning
option 'AARCH64_EXTRA_TUNE_AVOID_CROSS_LOOP_FMA' for this.

gcc/ChangeLog:

* config/aarch64/aarch64-tuning-flags.def
(AARCH64_EXTRA_TUNING_OPTION): New tuning option to avoid
cross-loop FMA.
* config/aarch64/aarch64.cc
(aarch64_override_options_internal): Set
param_avoid_fma_max_bits according to tuning option.
* config/aarch64/tuning_models/ampere1.h (ampere1_tunings):
Modify tunings related with FMA.
* config/aarch64/tuning_models/ampere1a.h (ampere1a_tunings):
Likewise.
* config/aarch64/tuning_models/ampere1b.h (ampere1b_tunings):
Likewise.

libstdc++: Regenerate GCC_CHECK_ASSEMBLER_HWCAP users

This patch regenerates the remaining user of the GCC_CHECK_ASSEMBLER_HWCAP
macro.  No functional changes.

2023-11-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

libstdc++-v3:
* configure: Regenerate.

gcov: Fix use of __LIBGCC_HAVE_LIBATOMIC

libgcc/ChangeLog:

PR target/112777

* libgcov.h (GCOV_SUPPORTS_ATOMIC):  Honor that __LIBGCC_HAVE_LIBATOMIC is
always defined as either 0 or 1.

aarch64: Add a result_mode helper function

SME will add more intrinsics whose expansion code requires
the mode of the function return value.  This patch adds an
associated helper routine.

gcc/
* config/aarch64/aarch64-sve-builtins.h
(function_expander::result_mode): New member function.
* config/aarch64/aarch64-sve-builtins-base.cc
(svld234_impl::expand): Use it.
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::get_reg_target): Likewise.

lower-bitint: Fix up maximum addition/subtraction/multiplication result computations

When debugging PR112750, I've noticed some issues in the computation
of precisions and the following patch attempts to fix those.

The pass uses range_to_prec function, which possibly using ranger returns
minimum precision of some operand in the style that libgcc _BitInt
entrypoints expect, i.e. for operands with unsigned types either the
precision of that type or with help of ranger
wi::min_precision (upper_bound, UNSIGNED) (done both if the types
are really unsigned or even when lower_bound is non-negative), while
for operands with signed types either negated precision of that type or
with help of ranger negated value of maximum of SIGNED min_precisions
of lower and upper bound.
Because _BitInt in C only supports unsigned precisions >= 1 and signed
precisions >= 2, the function also ensures that 0 is never returned (returns
1 instead) and should ensure that -1 is never returned (should return -2).
That is the first bug I found though, for the ranger case it ensured that,
but if an operand would be signed 1-bit precision (that means
non-BITINT_TYPE) operand, it could return -1.

Another thing is that both lower_addsub_overflow and lower_mul_overflow
compute from the prec0 and prec1 of the operands (returned by range_to_prec
with the above value meanings) prec2, which is how many bits of the result
we actually need to compute to know the infinite precision result.
This is then used by arith_overflow function together with prec
(TYPE_PRECISION (type)), type (type of the result), prec0 and prec1 to
compute which range of bits should be tested (if any, or that there is never
an overflow) and with which kind (require those bits to be zero vs.
check if all those bits together all all zeros/ones).
The arith_overflow function has one special case, when
prec0 >= 0 && prec1 >= 0 and operation is not .SUB_OVERFLOW; in that case
we treat prec2 as minimum precision to express any infinite precision
unsigned result (the result is never negative in that case), while
in all other cases prec2 is treated as minimum precision to express
any infinite precision signed result (because the result can be also
negative).
The computations of those values were apparently incorrect for all of
.{ADD,SUB}_OVERFLOW (in that case only if one operand was signed and
the other unsigned) and for .MUL_OVERFLOW it was sometimes too large.

It took me a while to get to the right expression how to compute that,
I've started with writing into the comment the possible results for
different prec0 and prec1 values (used just 8/-8/10/-10 as placeholders
for equal or different absolute values of the 2 precisions and cases
with positive and/or negative signs) and then turned into the attached
test program that actually printed what I was writing to make sure
I didn't make mistakes in it and in the end also verified the computation,
this time for all combinations of 1..14 and -2..-14 precisions.
The UNSIGNED vs. SIGNED in the table is what arith_overflow expects
the prec2 to be (see above mentioned exception).

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

* gimple-lower-bitint.cc (range_to_prec): Don't return -1 for
signed types.
(bitint_large_huge::lower_addsub_overflow): Fix up computation of
prec2.
(bitint_large_huge::lower_mul_overflow): Likewise.

lower-bitint: Fix ICE on bitint-39.c

torture/bitint-39.c ICEs with -O1; the problem is that the
finish_arith_overflow code in one spot replaces use_stmt with an
assignment or cast, but if unlucky and m_gsi iterator is the same statement,
when the code later
      tree clobber = build_clobber (TREE_TYPE (var), CLOBBER_EOL);
      g = gimple_build_assign (var, clobber);
      gsi_insert_after (&m_gsi, g, GSI_SAME_STMT);
it will insert after iterator which contains already replaced statement and
that causes the gimple chain corruption.

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

* gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow):
When replacing use_stmt which is gsi_stmt (m_gsi), update m_gsi to
the new statement.

lower-bitint: Fix _BitInt .{ADD,SUB}_OVERFLOW lowering [PR112750]

The .{ADD,SUB}_OVERFLOW lowering is implemented by performing normal
addition/subtraction (perhaps extended to even more bits than normally by
continuing with extended values of operands after running of normal bits)
and in addition to that trying to compute if certain sets of bits are either
all zero or all sign extensions of the least significant bit.

That code is in a lot of cases guarded just by a single condition (which
can be idx > startlimb, idx >= startlimb or idx == startlimb) or by
2 conditions - if (idx >= startlimb) { if (idx == startlimb) ... else ... }
Now, if_then_if_then_else when the second argument is NULL works just as
if_then and sets m_gsi to be within the initially empty then block and that is
where we emit code for constant tidx startlimb + (cmp_code == GT_EXPR).
But in the 2 conditions case, m_gsi is set to the initially empty else
block, so using EQ_EXPR for the condition was incorrect (and strangely
nothing in the testsuite caught that), because the code for extracting the
lowest set of bits (i.e. when tidx is startlimb) is then done when idx
is not startlimb rather than when it is.
The following patch fixes that.

Note, when developing the lowering, I was using gcov to make sure all code
is covered by the testsuite with minimum exceptions, so no idea how this
slipped out.

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/112750
* gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
Use NE_EXPR rather than EQ_EXPR for g2 if !single_comparison and
adjust probabilities.

* gcc.dg/bitint-41.c: Use -std=c23 rather than -std=c2x.
* gcc.dg/torture/bitint-43.c: Likewise.
* gcc.dg/torture/bitint-44.c: Likewise.
* gcc.dg/torture/bitint-45.c: New test.

doc: Update the status of build directory not fully separated

Recently there are some people building GCC with srcdir == objdir and
the attempts just failed [1].  So stop to say "it should work".  OTOH
objdir as a subdirectory of srcdir works: we've built GCC in LFS [2]
and BLFS [3] this way for decades and this is confirmed during the
review of a previous version of this patch [4].

[1]: https://gcc.gnu.org/pipermail/gcc-help/2023-November/143068.html
[2]: https://www.linuxfromscratch.org/lfs/view/12.0/chapter08/gcc.html
[3]: https://www.linuxfromscratch.org/blfs/view/12.0/general/gcc.html
[4]: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/638760.html

gcc/ChangeLog:

* doc/install.texi: Deem srcdir == objdir broken, but objdir
as a subdirectory of srcdir fine.

s390x: Fix s390_md_asm_adjust handling of long doubles [PR112753]

Commit 466b100e5fee808d77598e0f294654deec281150 introduced a bug in
s390_md_asm_adjust if vector extensions are not available.  Fix the
control flow of this function to not adjust long double values.

gcc/ChangeLog:

PR target/112753
* config/s390/s390.cc (s390_md_asm_adjust): Return after dealing
with the outputs, if no further processing of long doubles is
required.

gcc/testsuite/ChangeLog:

* gcc.target/s390/pr112753.c: New test.

s390: Fix builtin-classify-type-1.c on s390 too [PR112725]

s390 suffers from the same issue with __builtin_classify_type vector
arguments, the target hook diagnoses those because it thinks a vector
is passed to an unprototyped function, but in this case it is a type-generic
builtin which can support vector types just fine, by folding into the
appropriate constant.

This fixes
-FAIL: c-c++-common/builtin-classify-type-1.c  -Wc++-compat  (test for excess errors)
-UNRESOLVED: c-c++-common/builtin-classify-type-1.c  -Wc++-compat  compilation failed to produce executable
on s390x-linux.

2023-12-01  Jakub Jelinek  <jakub@redhat.com>

PR target/112725
* config/s390/s390.cc (s390_invalid_arg_for_unprototyped_fn): Return
NULL for __builtin_classify_type calls with vector arguments.

c: Add new -Wdeclaration-missing-parameter-type permerror

This used to be a warning, enabled by default, without its own option.

A subsequent change could improve diagnostics and provide spelling
hints for declarations like “void function (int32t);”.

gcc/c-family/

* c.opt (Wdeclaration-missing-parameter-type): New.

gcc/c/ChangeLog:

PR other/44209
* c-decl.cc (grokparms): Issue permerror for
OPT_Wdeclaration_missing_parameter_type instead of a pedwarn.

gcc/ChangeLog:

* doc/invoke.texi (Warning Options): Document
-Wdeclaration-missing-parameter-type.

gcc/testsuite/ChangeLog:

* gcc.dg/permerror-default.c (missing_parameter_type):
Expect error.
* gcc.dg/permerror-fpermissive.c (missing_parameter_type):
Expect -Wdeclaration-missing-parameter-type warning.
* gcc.dg/permerror-gnu89-nopermissive.c (missing_parameter_type):
Expect -Wdeclaration-missing-parameter-type error.
* gcc.dg/permerror-gnu89-pedantic.c (missing_parameter_type):
Likewise.
* gcc.dg/permerror-gnu89.c (missing_parameter_type):
Expect -Wdeclaration-missing-parameter-type warning.
* gcc.dg/permerror-noerror.c: Add
-Wno-error=declaration-missing-parameter-type to build flags.
(missing_parameter_type): Expect
-Wdeclaration-missing-parameter-type warning.
* gcc.dg/permerror-nowarning.c: Build with
-Wno-declaration-missing-parameter-type.  Remove previously
expected warning.
* gcc.dg/permerror-fpermissive-nowarning.c: Likewise.
* gcc.dg/permerror-pedantic.c (missing_parameter_type):
Expect -Wdeclaration-missing-parameter-type error.
* gcc.dg/permerror-system.c (missing_parameter_type):
Likewise.

c: Turn -Wincompatible-pointer-types into a permerror

The change to build_conditional_expr drops the downgrade
from a pedwarn to warning for builtins for C99 and later
language dialects.  It remains a warning in C89 mode (not
a permerror), as the -std=gnu89 -fno-permissive test shows.

gcc/

* doc/invoke.texi (Warning Options): Document changes.

gcc/c/

PR c/96284
* c-typeck.cc (build_conditional_expr): Upgrade most pointer
type mismatches to a permerror.
(convert_for_assignment): Use permerror_opt and
permerror_init for OPT_Wincompatible_pointer_types warnings.

gcc/testsuite/

* gcc.dg/permerror-default.c (incompatible_pointer_types):
Expect new permerror.
* gcc.dg/permerror-gnu89-nopermissive.c
(incompatible_pointer_types): Likewise.
* gcc.dg/permerror-pedantic.c (incompatible_pointer_types):
Likewise.
* gcc.dg/permerror-system.c: Likewise.
* gcc.dg/Wincompatible-pointer-types-2.c: Compile with
-fpermissive due to expected errors.
* gcc.dg/Wincompatible-pointer-types-5.c: New test.  Copied
from gcc.dg/Wincompatible-pointer-types-2.c.  Expect errors.
* gcc.dg/anon-struct-11.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/anon-struct-11a.c: New test.  Copied from
gcc.dg/anon-struct-11.c.  Expect errors.
* gcc.dg/anon-struct-13.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/anon-struct-13a.c: New test.  Copied from
gcc.dg/anon-struct-13.c.  Expect errors.
* gcc.dg/builtin-arith-overflow-4.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/builtin-arith-overflow-4a.c: New test.  Copied from
gcc.dg/builtin-arith-overflow-4.c.  Expect errors.
* gcc.dg/c23-qual-4.c: Expect -Wincompatible-pointer-types errors.
* gcc.dg/dfp/composite-type.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/dfp/composite-type-2.c: New test.  Copied from
gcc.dg/dfp/composite-type.c.  Expect errors.
* gcc.dg/diag-aka-1.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/diag-aka-1a.c: New test.  Copied from
gcc.dg/diag-aka-1a.c.  Expect errors.
* gcc.dg/enum-compat-1.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/enum-compat-2.c: New test.  Copied from
gcc.dg/enum-compat-1.c.  Expect errors.
* gcc.dg/func-ptr-conv-1.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/func-ptr-conv-2.c: New test.  Copied from
gcc.dg/func-ptr-conv-1.c.  Expect errors.
* gcc.dg/init-bad-7.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/init-bad-7a.c: New test.  Copied from gcc.dg/init-bad-7.c.
Expect errors.
* gcc.dg/noncompile/incomplete-3.c (foo): Expect
-Wincompatible-pointer-types error.
* gcc.dg/param-type-mismatch-2.c (test8): Likewise.
* gcc.dg/pointer-array-atomic.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/pointer-array-atomic-2.c: New test.  Copied from
gcc.dg/pointer-array-atomic.c.  Expect errors.
* gcc.dg/pointer-array-quals-1.c (test): Expect
-Wincompatible-pointer-types errors.
* gcc.dg/transparent-union-1.c: Compile with -fpermissive
due to expected errors.
* gcc.dg/transparent-union-1a.c: New test.  Copied from
gcc.dg/transparent-union-1.c.  Expect errors.
* gcc.target/aarch64/acle/memtag_2a.c
(test_memtag_warning_return_qualifier): Expect additional
errors.
* gcc.target/aarch64/sve/acle/general-c/load_2.c (f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_2.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_3.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_4.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_5.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_2.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_3.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_4.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/sizeless-1.c (f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/sizeless-2.c (f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_1.c (f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_2.c (f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_restricted_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_2.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_restricted_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general/attributes_7.c
(f1): Likewise.
* gcc.target/i386/sse2-bfloat16-scalar-typecheck.c (footest):
Expect -Wincompatible-pointer-types errors.
* gcc.target/i386/vect-bfloat16-typecheck_1.c (footest): Likewise.
* gcc.target/i386/vect-bfloat16-typecheck_2.c (footest): Likewise.

c: Turn -Wreturn-mismatch into a permerror

gcc/

* doc/invoke.texi (Warning Options): Document that
-Wreturn-mismatch is a permerror in C99 and later.

gcc/c/

PR c/96284
* c-typeck.cc (c_finish_return): Use permerrors
for OPT_Wreturn_mismatch diagnostics.

gcc/testsuite/

* gcc.dg/permerror-default.c (return_mismatch_1)
(return_mismatch_2): Expect new permerror.
* gcc.dg/permerror-gnu89-nopermissive.c (return_mismatch_1):
Likewise.
* gcc.dg/permerror-system.c: Likewise.
* gcc.dg/20030906-1.c: Compile with -fpermissive due to
expected -Wreturn-mismatch error.
* gcc.dg/20030906-1a.c: New test.  Copied from
gcc.dg/20030906-1.c.  Expect the error.
* gcc.dg/20030906-2.c: Compile with -fpermissive due to
expected -Wreturn-mismatch error.
* gcc.dg/20030906-2a.c: New test.  Copied from
gcc.dg/20030906-2.c.  Expect the error.
* gcc.dg/Wreturn-mismatch-1.c: Compile with -fpermissive due to
expected -Wreturn-mismatch error.
* gcc.dg/Wreturn-mismatch-1a.c: New test.  Copied from
gcc.dg/Wreturn-mismatch-1.c.  Expect the error.
* gcc.dg/Wreturn-mismatch-2.c: Compile with -fpermissive due to
expected -Wreturn-mismatch error.
* gcc.dg/Wreturn-mismatch-2a.c: New test.  Copied from
gcc.dg/Wreturn-mismatch-2.c.  Expect the error.
* gcc.dg/diagnostic-range-bad-return.c: Compile with
-fpermissive due to expected -Wreturn-mismatch error.
* gcc.dg/diagnostic-range-bad-return-2.c: New test.
Copied from gcc.dg/diagnostic-range-bad-return.c.  Expect the
error.
* gcc.dg/pr105635-2.c: Expect -Wreturn-mismatch error.
* gcc.dg/pr23075.c: Build with -fpermissive due to
expected -Wreturn-mismatch error.
* gcc.dg/pr23075-2.c: New test.  Copied from gcc.dg/pr23075.c.
Expect the error.
* gcc.dg/pr29521.c: Compile with -fpermissive due to expected
-Wreturn-mismatch error.
* gcc.dg/pr29521-a.c: New test. Copied from gcc.dg/pr29521.c.
Expect error.
* gcc.dg/pr67730.c: Compile with -fpermissive due to expected
-Wreturn-mismatch error.
* gcc.dg/pr67730-a.c: New test.  Copied from
gcc.dg/pr67730-a.c.  Expect error.
* gcc.target/powerpc/conditional-return.c: Compile with
-fpermissive due to expected -Wreturn-mismatch error.

c: Do not ignore some forms of -Wimplicit-int in system headers

Most -Wimplicit-int warnings were unconditionally disabled for system
headers.  Only missing types for parameters in old-style function
definitions resulted in warnings.  This is inconsistent with the
treatment of other permerrors, which are active in system headers.

gcc/c/

* c-decl.cc (grokdeclarator): Do not skip -Wimplicit-int
warnings or errors in system headers.

gcc/testsuite/

* gcc.dg/permerror-system.c: Expect all -Wimplicit-int
permerrors.

c: Turn -Wimplicit-int into a permerror

Most of these new permerrors are currently not diagnosed in system
headers.

gcc/

PR c/91093
PR c/96284
* doc/invoke.texi (Warning Options): Document changes.

gcc/c/

* c-decl.cc (warn_defaults_to): Remove.
(grok_declarator, start_function): Call permerror_opt
instead of warn_defaults_to.
(store_parm_decls_oldstyle): Call permerror_opt for
OPT_Wimplicit_int.

gcc/testsuite/

* gcc.dg/permerror-default.c (implicit_int_1, implicit_int_2)
(implicit_int_3, implicit_int_4): Expect new permerror.
* gcc.dg/permerror-system.c: Expect a single new permerror.
* gcc.dg/Wimplicit-int-1.c: Compile with -fpermissive due to
expected warning.
* gcc.dg/Wimplicit-int-4.c: Likewise.
* gcc.dg/Wimplicit-int-1a.c: New test.  Copied from
gcc.dg/Wimplicit-int-1.c, but expect errors.
* gcc.dg/Wimplicit-int-4a.c: New test.  Copied from
gcc.dg/Wimplicit-int-4.c, but expect errors.
* gcc.dg/gnu23-attr-syntax-2.c: Compile with -fpermissive
due to expected implicit-int error.
* gcc.dg/gnu23-attr-syntax-3.c: New test.  Copied from
gcc.dg/gnu23-attr-syntax-2.c, but expect an error.
* gcc.dg/pr105635.c: Build with -fpermissive due to implicit
int.
* gcc.dg/pr105635-2.c: New test.  Copied from
gcc.dg/pr105635.c.  Expect implicit int error.
* gcc.dg/noncompile/pr79758.c: Build with -fpermissive due to
implicit int.
* gcc.dg/noncompile/pr79758-2.c: New test.  Copied from
gcc.dg/noncompile/pr79758.c.  Expect implicit int error.

c: Turn -Wimplicit-function-declaration into a permerror

In the future, it may make sense to avoid cascading errors from
the implicit declaration, especially its assumed int return type.
This change here only changes the kind of the diagnostic, not
its wording or consequences.

gcc/

* doc/invoke.texi (Warning Options): Document changes.

gcc/c/

PR c/91092
PR c/96284
* c-decl.cc (implicit_decl_permerror): Rename from
implicit_decl_warning.  Call permerror_opt instead of
pedwarn and warning_at.
(implicitly_declare): Adjust callers.

gcc/testsuite/

* gcc.dg/permerror-default.c (implicit_function_declaration):
Expect the new permerror.
* gcc.dg/permerror-system.c: Likewise.
* c-c++-common/spellcheck-reserved.c (test, test_2): Expect
error instead of warning.
(f): Expect error instead of warning.
* gcc.dg/Wimplicit-function-declaration-c99.c: Compile with
-fpermissive due to expected warning.
* gcc.dg/Wimplicit-function-declaration-c99-2.c: New test.
Copied from gcc.dg/Wimplicit-function-declaration-c99.c.
Expect error.
* gcc.dg/missing-header-fixit-1.c: Compile with -fpermissive
due to expect error.
* gcc.dg/missing-header-fixit-1a.c: New test.  Copied from
gcc.dg/missing-header-fixit-1.c, but expect error.
* gcc.dg/missing-header-fixit-2.c: Compile with -fpermissive
due to expect error.
* gcc.dg/missing-header-fixit-2a.c: New test.  Copied from
gcc.dg/missing-header-fixit-2.c, but expect error.
* gcc.dg/missing-header-fixit-4.c: Compile with -fpermissive
due to expect error.
* gcc.dg/missing-header-fixit-4a.c: New test.  Copied from
gcc.dg/missing-header-fixit-4.c, but expect error.
* gcc.dg/missing-header-fixit-5.c: Compile with -fpermissive
due to expect error.
* gcc.dg/missing-header-fixit-5a.c: New test.  Copied from
gcc.dg/missing-header-fixit-5.c, but expect error.
* gcc.dg/pr61852.c: Expect implicit-function-declaration
error instead of warning.
* gcc.dg/spellcheck-identifiers-2.c: Compile with
-fpermissive due to expected warnings.
* gcc.dg/spellcheck-identifiers-2a.c: New test.  Copied
from gcc.dg/spellcheck-identifiers-2a.c.  Expect errors.
* gcc.dg/spellcheck-identifiers-3.c: Compile with
-fpermissive due to expected warnings.
* gcc.dg/spellcheck-identifiers-3a.c: New test.  Copied
from gcc.dg/spellcheck-identifiers-2a.c.  Expect errors.
* gcc.dg/spellcheck-identifiers-4.c: Compile with
-fpermissive due to expected warnings.
* gcc.dg/spellcheck-identifiers-4a.c: New test.  Copied
from gcc.dg/spellcheck-identifiers-2a.c.  Expect error.
* gcc.dg/spellcheck-identifiers.c: Compile with
-fpermissive due to expected warnings.
* gcc.dg/spellcheck-identifiers-1a.c: New test.  Copied
from gcc.dg/spellcheck-identifiers.c.  Expect errors.
* gcc.target/aarch64/sve/acle/general-c/ld1sh_gather_1.c (f1):
Expect error.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_1.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_restricted_1.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_1.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_2.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_3.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_4.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_5.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_1.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_2.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_3.c:
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_restricted_4.c:
(f1): Likewise.

c: Turn int-conversion warnings into permerrors

gcc/

* doc/invoke.texi (Warning Options): Document changes.

gcc/c/

PR c/96284
PR c/106416
* c-typeck.cc (build_conditional_expr): Use permerror_opt for
pointer/integer type mismatches, based on -Wint-conversion.
(pedwarn_permerror_init, permerror_init): New function.
(pedwarn_init): Call pedwarn_permerror_init.
(convert_for_assignment): Use permerror_opt and
permerror_init for -Wint-conversion warnings.

gcc/testsuite/

* gcc.dg/permerror-default.c (int_conversion_1)
(int_conversion_2): Expect the new permerrors.
* gcc.dg/permerror-gnu89-nopermissive.c (int_conversion_1)
(int_conversion_2): Likewise.
* gcc.dg/permerror-system.c: Likewise.
* c-c++-common/pr77624-1.c (foo, bar): Expect
error instead of warning.
* gcc.dg/Wint-conversion-2.c: Compile with -fpermissive due
to expected int-conversion warning.
* gcc.dg/Wint-conversion-3.c: Likewise.
* gcc.dg/Wint-conversion-4.c: New test.  Based on
gcc.dg/Wint-conversion-3.c.  Expect int-conversion errors.
* gcc.dg/assign-warn-1.c: Compile with -fpermissive.
* gcc.dg/assign-warn-4.c: New file.  Extracted from
assign-warn1.c.  Expect int-conversion errors.
* gcc.dg/diagnostic-types-1.c: Compile with -fpermissive.
* gcc.dg/diagnostic-types-2.c: New file.  Extracted from
gcc.dg/diagnostic-types-1.c.  Expect some errors instead of
warnings.
* gcc.dg/gomp/pr35738.c: Compile with -fpermissive due to
expected int-conversion error.
* gcc.dg/gomp/pr35738-2.c: New test.  Based on
gcc.dg/gomp/pr35738.c.  Expect int-converison errors.
* gcc.dg/init-excess-3.c: Expect int-converison errors.
* gcc.dg/overflow-warn-1.c: Likewise.
* gcc.dg/overflow-warn-3.c: Likewise.
* gcc.dg/param-type-mismatch.c: Compile with -fpermissive.
* gcc.dg/param-type-mismatch-2.c: New test.  Copied from
gcc.dg/param-type-mismatch.c.  Expect errors.
* gcc.dg/pr61162-2.c: Compile with -fpermissive.
* gcc.dg/pr61162-3.c: New test. Extracted from
gcc.dg/pr61162-2.c.  Expect int-conversion errors.
* gcc.dg/spec-barrier-3.c: Use -fpermissive due to expected
int-conversion error.
* gcc.dg/spec-barrier-3a.c: New test.  Based on
gcc.dg/spec-barrier-3.c.  Expect int-conversion errors.
* gcc.target/aarch64/acle/memtag_2.c: Use -fpermissive due to expected
int-conversion error.
* gcc.target/aarch64/acle/memtag_2a.c: New test.  Copied from
gcc.target/aarch64/acle/memtag_2.c.  Expect error.
* gcc.target/aarch64/sve/acle/general-c/load_3.c (f1): Expect
error.
* gcc.target/aarch64/sve/acle/general-c/store_2.c (f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_restricted_1.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_2.c
(f1): Likewise.
* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_restricted_1.c
(f1): Likewise.

Add tests for validating future C permerrors

The dg-error directives for gcc.dg/permerror-system.c can be generated
using (for the most part at least):

perl -ne 'print if s,.*(/\* \{ dg-error .*) } \*/$,$1 "" { target *-*-* } $. } */,' \
  < gcc/testsuite/gcc.dg/permerror-default.c

gcc/testsuite/

* gcc.dg/permerror-default.c: New test.
* gcc.dg/permerror-fpermissive.c: Likewise.
* gcc.dg/permerror-fpermissive-nowarning.c: Likewise.
* gcc.dg/permerror-gnu89-nopermissive.c: Likewise.
No permerrors yet, so this matches gcc.dg/permerror-gnu89.c
for now.
* gcc.dg/permerror-gnu89-pedantic.c: New test.
* gcc.dg/permerror-gnu89.c: Likewise.
* gcc.dg/permerror-noerror.c: Likewise.
* gcc.dg/permerror-nowarning.c: Likewise.
* gcc.dg/permerror-pedantic.c: Likewise.
* gcc.dg/permerror-system.c: Likewise.

gm2: Add missing declaration of m2pim_M2RTS_Terminate to test

gcc/testsuite/

* gm2/link/externalscaffold/pass/scaffold.c (m2pim_M2RTS_Terminate):
Declare.

aarch64: Call named function in gcc.target/aarch64/aapcs64/ice_1.c

This test looks like it intends to pass a small struct argument
through both a non-variadic and variadic argument, but due to
the typo, it does not achieve that.

gcc/testsuite/

* gcc.target/aarch64/aapcs64/ice_1.c (foo): Call named.

aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinder

* config/aarch64/linux-unwind.h
(aarch64_fallback_frame_state): Add cast to the expected type
in sc assignment.

RISC-V: Fix VSETVL PASS regression

This patch fix 2 regression (one is bug regression, the other is performance regression).
Those 2 regressions are both we are comparing ratio for same AVL in wrong place.

1. BUG regression:
avl_single-84.c:

f0:
        li      a5,999424
        add     a1,a1,a5
        li      a4,299008
        add     a5,a0,a5
        addi    a3,a4,992
        addi    a5,a5,576
        addi    a1,a1,576
        vsetvli a4,zero,e8,m2,ta,ma
        add     a0,a0,a3
        vlm.v   v1,0(a5)
        vsm.v   v1,0(a1)
        vl1re64.v       v1,0(a0)
        beq     a2,zero,.L10
        li      a5,0
        vsetvli zero,zero,e64,m1,tu,ma   --->  This is totally incorrect since the ratio above is 4, wheras it is demanding ratio = 64 here.
.L3:
        fcvt.d.lu       fa5,a5
        addi    a5,a5,1
        fadd.d  fa5,fa5,fa0
        vfmv.s.f        v1,fa5
        bne     a5,a2,.L3
        vfmv.f.s        fa0,v1
        ret
.L10:
        vsetvli zero,zero,e64,m1,ta,ma
        vfmv.f.s        fa0,v1
        ret

2. Performance regression:

before this patch:

        vsetvli a5,a4,e8,m1,ta,ma
        vsetvli zero,a5,e32,m1,tu,ma
        vmv.s.x v2,zero
        vmv.s.x v1,zero
        vsetvli zero,a5,e32,m4,tu,ma
        vle32.v v4,0(a1)
        vfmul.vv        v4,v4,v4
        vfredosum.vs    v1,v4,v2
        vfmv.f.s        fa5,v1
        fsw     fa5,0(a0)
        sub     a4,a4,a5
        bne     a4,zero,.L2
        ret

After this patch:

vsetvli a5,a4,e32,m4,tu,ma
vle32.v v4,0(a1)
vmv.s.x v2,zero
vmv.s.x v1,zero
vfmul.vv v4,v4,v4
vfredosum.vs v1,v4,v2
vfmv.f.s fa5,v1
fsw fa5,0(a0)
sub a4,a4,a5
bne a4,zero,.L2
ret

Tested rv64gcv_zvfh_zfh passed no regression.

zvl256b/zvl512b/zvl1024b/zve64d is runing.

PR target/112776

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Fix ratio.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Adapt test.
* gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/pr112776.c: New test.

c++: lambda capture and explicit object parm

More adjustments to allow for explicit object parameters in lambdas.  This
has no practical effect until that patch goes in, but applying this
separately seems reasonable.

gcc/cp/ChangeLog:

* semantics.cc (finish_non_static_data_member)
(finish_decltype_type, capture_decltype):
Handle deduced closure parameter.

Daily bump.

c++: wrong ambiguity in accessing static field [PR112744]

Given

  struct A { constexpr static int a = 0; };
  struct B : A {};
  struct C : A {};
  struct D : B, C {};

we give the "'A' is an ambiguous base of 'D'" error for

  D{}.A::a;

which seems wrong: 'a' is a static data member so there is only one copy
so it can be unambiguously referred to even if there are multiple A
objects.  clang++/MSVC/icx agree.

This patch uses ba_any: [class.access.base] requires conversion to a unique
base subobject for non-static data members, but it does not require that the
base be unique or accessible for static data members.

PR c++/112744

gcc/cp/ChangeLog:

* typeck.cc (finish_class_member_access_expr): When accessing
a static data member, use ba_any for lookup_base.

gcc/testsuite/ChangeLog:

* g++.dg/lookup/scoped11.C: New test.
* g++.dg/lookup/scoped12.C: New test.
* g++.dg/lookup/scoped13.C: New test.
* g++.dg/lookup/scoped14.C: New test.
* g++.dg/lookup/scoped15.C: New test.

libgo: update configure.ac to upstream GCC

The libgo/configure.ac file in upstream GCC was changed in

https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=6a6d3817afa02bbcd2388c8e005da6faf88932f1

This adds an automake conditional that is not used, but will be used
in the future when and if libgo is ported to Darwin.

This CL makes the corresponding change in this repo.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/546435

libbacktrace: support ASLR on Windows

Patch from Björn Schäpers.

* pecoff.c: Include <windows.h> if available.
(coff_add): On Windows call GetModuleHandle to get base address.

AArch64: Fix __sync_val_compare_and_swap [PR111404]

__sync_val_compare_and_swap may be used on 128-bit types and either calls the
outline atomic code or uses an inline loop.  On AArch64 LDXP is only atomic if
the value is stored successfully using STXP, but the current implementations
do not perform the store if the comparison fails.  In this case the value
returned is not read atomically.

gcc/ChangeLog:
PR target/111404
* config/aarch64/aarch64.cc (aarch64_split_compare_and_swap):
For 128-bit store the loaded value and loop if needed.

libgcc/ChangeLog:
PR target/111404
* config/aarch64/lse.S (__aarch64_cas16_acq_rel): Execute STLXP using
either new value or loaded value.

libstdc++: Fix std::ranges::to errors

Fix some errors that Patrick noticed, and remove a #if 0 group that I
didn't mean to leave in the file.

libstdc++-v3/ChangeLog:

* include/std/ranges (__detail::__toable): Fix incorrect use of
_Range instead of _Cont.
(__detail::_ToClosure, __detail::_ToClosure2): Add missing
constexpr specifier on constructors.
* testsuite/std/ranges/conv/1.cc (_Cont, _Cont2, _Cont3): Remove
unnecessary begin() and end() members.
(test_constexpr): New function to check range adaptors are
usable in constant expressions.

modula2: libgm2 bump version to 19:0.0

This patch bumps the libgm2 version to 19.0.0 reflecting
time related fixes, changes to builtins.def and the
commencement of gcc stage3.

libgm2/ChangeLog:

* configure: Regenerate.
* configure.ac:(libtool_VERSION): Bump to 19:0:0.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

testsuite/arm: Fix bfloat16_vector_typecheck_[12].c tests [PR 112698]

After commit r14-5617-gb8592186611, int32x[24]_t types now use
elements of 'long int' type instead of 'int' on arm-eabi (it's still
'int' on arm-linux-gnueabihf).  Both are 32-bit types anyway.

This patch adjust the two tests so that they optionnally accept 'long '
before 'int' in the expected error message.

2023-11-30  Christophe Lyon  <christophe.lyon@linaro.org>

PR target/112698
gcc/testsuite/
* gcc.target/arm/bfloat16_vector_typecheck_1.c: Update expected
error message.
* gcc.target/arm/bfloat16_vector_typecheck_2.c: Likewise.

Fix 'libgomp.c/declare-variant-4-*.c', add 'libgomp.c/declare-variant-4.c'

These test cases being 'dg-skip-if [...] { ! amdgcn-*-* }' meant they were
only ever considered for 'amdgcn-*-*' target -- that is, GCN *target*, not
GCN *offload target*, what is intended to be tested here, but for which they
thus always were UNSUPPORTED.  Use the same style of 'dg-[...]' directives
as for the nvptx offloading test cases, 'libgomp.c/declare-variant-3*.c'.

Fix-up for commit 1fd508744eccda9ad9c6d6fcce5b2ea9c568818d
"amdgcn: Support AMD-specific 'isa' traits in OpenMP context selectors".

libgomp/
* testsuite/libgomp.c/declare-variant-4-fiji.c: Adjust.
* testsuite/libgomp.c/declare-variant-4-gfx803.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx900.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx906.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx908.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx90a.c: Likewise.
* testsuite/libgomp.c/declare-variant-4.h: Likewise.
* testsuite/libgomp.c/declare-variant-4.c: New.

Spin 'dg-do run' part of 'libgomp.c/declare-variant-3-sm30.c' off into new 'libgomp.c/declare-variant-3.c'

Having nvptx offloading configured doesn't imply being able to run nvptx
offloading test cases on the test host.

Also, make 'libgomp.c/declare-variant-3.c' work for all non-offloading and
offloading cases.

Fix-up for commit 59b8ade88774b4dcf1691a8f650cdbb86cc30862
"[libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c".

libgomp/
* testsuite/libgomp.c/declare-variant-3-sm30.c: Turn 'dg-do run'
into 'dg-do link'.
* testsuite/libgomp.c/declare-variant-3.c: New.
* testsuite/libgomp.c/declare-variant-3.h: Extend.

In 'libgomp.c/declare-variant-{3,4}-*.c', restrict 'scan-offload-tree-dump's to 'only_for_offload_target [...]'

... to care for the case where not just one but both of GCN and nvptx
offloading are enabled.  In that case, we currently get:

    UNRESOLVED: libgomp.c/declare-variant-3-sm30.c scan-amdgcn-amdhsa-offload-tree-dump optimized "= f30 \\(\\);"

... in addition to:

    PASS: libgomp.c/declare-variant-3-sm30.c scan-nvptx-none-offload-tree-dump optimized "= f30 \\(\\);"

Etc.

Fix-up for commit 59b8ade88774b4dcf1691a8f650cdbb86cc30862
"[libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c",
and commit 1fd508744eccda9ad9c6d6fcce5b2ea9c568818d
"amdgcn: Support AMD-specific 'isa' traits in OpenMP context selectors".

libgomp/
* testsuite/libgomp.c/declare-variant-3-sm30.c: Restrict
'scan-offload-tree-dump' to 'only_for_offload_target nvptx-none'.
* testsuite/libgomp.c/declare-variant-3-sm35.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm53.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm70.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm75.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm80.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-fiji.c: Restrict
'scan-offload-tree-dump' to
'only_for_offload_target amdgcn-amdhsa'.
* testsuite/libgomp.c/declare-variant-4-gfx803.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx900.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx906.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx908.c: Likewise.
* testsuite/libgomp.c/declare-variant-4-gfx90a.c: Likewise.

Fix 'libgomp.c/declare-variant-3-*.c' compilation for configurations where GCN offloading is enabled in addition to nvptx

The GCN offloading compiler doesn't like '-misa=sm_30' etc.; restrict to
'-foffload=nvptx-none' compilation only.

Fix-up for commit 59b8ade88774b4dcf1691a8f650cdbb86cc30862
"[libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c".

libgomp/
* testsuite/libgomp.c/declare-variant-3-sm30.c:
'dg-additional-options -foffload=nvptx-none'.
* testsuite/libgomp.c/declare-variant-3-sm35.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm53.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm70.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm75.c: Likewise.
* testsuite/libgomp.c/declare-variant-3-sm80.c: Likewise.

GCN: Generally enable the 'gcc.target/gcn/avgpr-[...]' test cases

... added in commit ae0d2c240213c5a7f6959c032bfc9f0703cab787
"amdgcn: Add Accelerator VGPR registers".  This way, they're correctly tested
no matter what '-march=[...]' is used with 'make check'.

gcc/testsuite/
* gcc.target/gcn/avgpr-mem-double.c: Remove
'dg-skip-if "incompatible ISA" [...]'.
* gcc.target/gcn/avgpr-mem-int.c: Likewise.
* gcc.target/gcn/avgpr-mem-long.c: Likewise.
* gcc.target/gcn/avgpr-mem-short.c: Likewise.
* gcc.target/gcn/avgpr-spill-double.c: Likewise.
* gcc.target/gcn/avgpr-spill-int.c: Likewise.
* gcc.target/gcn/avgpr-spill-long.c: Likewise.
* gcc.target/gcn/avgpr-spill-short.c: Likewise.

AArch64: Fix strict-align cpymem/setmem [PR103100]

The cpymemdi/setmemdi implementation doesn't fully support strict alignment.
Block the expansion if the alignment is less than 16 with STRICT_ALIGNMENT.
Clean up the condition when to use MOPS.

gcc/ChangeLog/
PR target/103100
* config/aarch64/aarch64.md (cpymemdi): Remove pattern condition.
(setmemdi): Likewise.
* config/aarch64/aarch64.cc (aarch64_expand_cpymem): Support
strict-align.  Cleanup condition for using MOPS.
(aarch64_expand_setmem): Likewise.

Fortran: fix TARGET attribute of associating entity in ASSOCIATE [PR112764]

The associating entity in an ASSOCIATE construct has the TARGET attribute
if and only if the selector is a variable and has either the TARGET or
POINTER attribute (e.g. F2018:11.1.3.3).

gcc/fortran/ChangeLog:

PR fortran/112764
* primary.cc (gfc_variable_attr): Set TARGET attribute of associating
entity dependent on TARGET or POINTER attribute of selector.

gcc/testsuite/ChangeLog:

PR fortran/112764
* gfortran.dg/associate_62.f90: New test.

tree-optimization/112767 - spurious diagnostic after sccp/loop-split swap

We are diagnosing an unreachable loop which we only manage to elide
after the copyprop pass after sccp which leaves the code open for
diagnosing by the intermittent ivcanon pass.  The following makes sure
to clean things up a bit earlier, propagating constant final values
to uses immediately.

PR tree-optimization/112767
* tree-scalar-evolution.cc (final_value_replacement_loop):
Propagate constants to immediate uses immediately.

* gcc.dg/tree-ssa/pr112767.c: New testcase.
* gcc.dg/graphite/pr83255.c: Disable SCCP.

tree-optimization/112766 - improve pruning of uninit diagnostics

Uninit diagnostics has code to prune based on incoming PHI args
that prove the uninit code is never executed.  But that only
looks at the first found flag candidate while in the PRs case
only the second candidate would be the one to prune on.  The
following patch makes us consider all of the flag candidates
which is cycles well spent IMHO.

PR tree-optimization/112766
* gimple-predicate-analysis.cc (find_var_cmp_const):
Support continuing the iteration and report every candidate.
(uninit_analysis::overlap): Iterate over all flag var
candidates.

* g++.dg/torture/uninit-pr112766.C: New testcase.

RISC-V: Support widening register overlap for vf4/vf8

size_t
foo (char const *buf, size_t len)
{
  size_t sum = 0;
  size_t vl = __riscv_vsetvlmax_e8m8 ();
  size_t step = vl * 4;
  const char *it = buf, *end = buf + len;
  for (; it + step <= end;)
    {
      vint8m1_t v0 = __riscv_vle8_v_i8m1 ((void *) it, vl);
      it += vl;
      vint8m1_t v1 = __riscv_vle8_v_i8m1 ((void *) it, vl);
      it += vl;
      vint8m1_t v2 = __riscv_vle8_v_i8m1 ((void *) it, vl);
      it += vl;
      vint8m1_t v3 = __riscv_vle8_v_i8m1 ((void *) it, vl);
      it += vl;

      asm volatile("nop" ::: "memory");
      vint64m8_t vw0 = __riscv_vsext_vf8_i64m8 (v0, vl);
      vint64m8_t vw1 = __riscv_vsext_vf8_i64m8 (v1, vl);
      vint64m8_t vw2 = __riscv_vsext_vf8_i64m8 (v2, vl);
      vint64m8_t vw3 = __riscv_vsext_vf8_i64m8 (v3, vl);

      asm volatile("nop" ::: "memory");
      size_t sum0 = __riscv_vmv_x_s_i64m8_i64 (vw0);
      size_t sum1 = __riscv_vmv_x_s_i64m8_i64 (vw1);
      size_t sum2 = __riscv_vmv_x_s_i64m8_i64 (vw2);
      size_t sum3 = __riscv_vmv_x_s_i64m8_i64 (vw3);

      sum += sumation (sum0, sum1, sum2, sum3);
    }
  return sum;
}

Before this patch:

        add     a3,s0,s1
        add     a4,s6,s1
        add     a5,s7,s1
        vsetvli zero,s0,e64,m8,ta,ma
        vle8.v  v4,0(s1)
        vle8.v  v3,0(a3)
        mv      s1,s2
        vle8.v  v2,0(a4)
        vle8.v  v1,0(a5)
        nop
        vsext.vf8       v8,v4
        vsext.vf8       v16,v2
        vs8r.v  v8,0(sp)
        vsext.vf8       v24,v1
        vsext.vf8       v8,v3
        nop
        vmv.x.s a1,v8
        vl8re64.v       v8,0(sp)
        vmv.x.s a3,v24
        vmv.x.s a2,v16
        vmv.x.s a0,v8
        add     s2,s2,s5
        call    sumation
        add     s3,s3,a0
        bgeu    s4,s2,.L5

After this patch:

add a3,s0,s1
add a4,s6,s1
add a5,s7,s1
vsetvli zero,s0,e64,m8,ta,ma
vle8.v v15,0(s1)
vle8.v v23,0(a3)
mv s1,s2
vle8.v v31,0(a4)
vle8.v v7,0(a5)
vsext.vf8 v8,v15
vsext.vf8 v16,v23
vsext.vf8 v24,v31
vsext.vf8 v0,v7
vmv.x.s a3,v0
vmv.x.s a2,v24
vmv.x.s a1,v16
vmv.x.s a0,v8
add s2,s2,s5
call sumation
add s3,s3,a0
bgeu s4,s2,.L5

PR target/112431

gcc/ChangeLog:

* config/riscv/vector.md: Add widening overlap of vf2/vf4.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-16.c: New test.
* gcc.target/riscv/rvv/base/pr112431-17.c: New test.
* gcc.target/riscv/rvv/base/pr112431-18.c: New test.

RISC-V: Remove earlyclobber for wx/wf instructions.

While working on overlap for widening instructions, I realize that we set
vwadd.wx/vfwadd.wf as earlyclobber which is incorrect.

Since according to RVV ISA:
"The destination EEW equals the source EEW."

vwadd.vx widens the first source operand (i.e. 2 * source EEW = dest EEW) while
vwadd.wx only widens the second/scalar source operand.

Therefore overlap is legal for wx but not for vx.

Before this patch (heave spillings):

        csrr    a5,vlenb
        slli    a5,a5,1
        addi    a5,a5,64
        vfwadd.wf       v2,v14,fs0
        add     a5,a5,sp
        vs2r.v  v2,0(a5)
        vl2re32.v       v2,0(a1)
        vfwadd.wf       v14,v12,fs0
        vfwadd.wf       v12,v10,fs0
        vfwadd.wf       v10,v8,fs0
        vfwadd.wf       v8,v6,fs0
        vfwadd.wf       v6,v4,fs0
        vfwadd.wf       v4,v2,fs0
        vfwadd.wf       v2,v16,fs0
        vfwadd.wf       v16,v18,fs0
        vfwadd.wf       v18,v20,fs0
        vfwadd.wf       v20,v22,fs0
        vfwadd.wf       v22,v24,fs0
        vfwadd.wf       v24,v26,fs0
        vfwadd.wf       v26,v28,fs0
        vfwadd.wf       v28,v30,fs0
        vfwadd.wf       v30,v0,fs0
        nop
        vsetvli zero,zero,e32,m2,ta,ma
        csrr    a5,vlenb

After this patch (no spillings):

        vfwadd.wf v16,v16,fs0
vfwadd.wf v14,v14,fs0
vfwadd.wf v12,v12,fs0
vfwadd.wf v10,v10,fs0
vfwadd.wf v8,v8,fs0
vfwadd.wf v6,v6,fs0
vfwadd.wf v4,v4,fs0
vfwadd.wf v2,v2,fs0
vfwadd.wf v18,v18,fs0
vfwadd.wf v20,v20,fs0
vfwadd.wf v22,v22,fs0
vfwadd.wf v24,v24,fs0
vfwadd.wf v26,v26,fs0
vfwadd.wf v28,v28,fs0
vfwadd.wf v30,v30,fs0
vfwadd.wf v0,v0,fs0

Confirm the codegen above run successfully on both SPIKE/QEMU.

PR target/112431

gcc/ChangeLog:

* config/riscv/vector.md: Remove earlyclobber for wx/wf instructions.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-19.c: New test.
* gcc.target/riscv/rvv/base/pr112431-20.c: New test.
* gcc.target/riscv/rvv/base/pr112431-21.c: New test.

ada: Rework fix for wrong finalization of qualified aggregate in allocator

The problem is that there is no easy method to insert an action after an
arbitrary node in the tree, so the original fix does not correctly work
when the allocator is nested in another expression.

Therefore this moves the burden of the insertion from Apply_Predicate_Check
to Expand_Allocator_Expression and restricts the new processing to the case
where it is really required.

gcc/ada/

* checks.ads (Apply_Predicate_Check): Add Deref boolean parameter.
* checks.adb (Apply_Predicate_Check): Revert latest change. Use
Loc local variable to hold the source location. Use a common code
path for the generic processing and make a dereference if Deref is
True.
* exp_ch4.adb (Expand_Allocator_Expression): Compute Aggr_In_Place
earlier. If it is true, do not call Apply_Predicate_Check on the
expression on entry but on the temporary on exit with a
dereference.
* sem_res.adb (Resolve_Actuals): Add explicit parameter
association in call to Apply_Predicate_Check.

ada: Support Put_Image for types in user-defined instances of predefined generics.

Predefined units do not generally support the Put_Image attribute.
There are good reasons for this in most cases. But if a user-defined
instantiation of a predefined generic occurs in Ada 2022 code, then
Put_Image can be supported for types declared therein. Add this support.

gcc/ada/

* exp_put_image.adb (Put_Image_Enabled): Return True in more
cases. In particular, when testing to see if a type occurs in a
predefined unit, test the type's code unit
(obtained by calling Get_Code_Unit). In the case of type within a
user-defined instance of a predefined generic, Is_Predefined_Unit
will return True for the type and False for the type's code unit.

ada: Remove SPARK legality checks

SPARK legality checks apply only to code with SPARK_Mode On, and are
performed again in GNATprove for detecting SPARK-compatible declarations
in code with SPARK_Mode Auto. Remove this duplication, to only perform
SPARK legality checking in GNATprove. After this patch, only a few
special SPARK legality checks are performed in the frontend, which could
be moved to GNATprove later.

gcc/ada/

* contracts.adb (Analyze_Entry_Or_Subprogram_Body_Contract):
Remove checking on volatility. Remove handling of SPARK_Mode, not
needed anymore.
(Analyze_Entry_Or_Subprogram_Contract): Remove checking on
volatility.
(Check_Type_Or_Object_External_Properties): Same.
(Analyze_Object_Contract): Same.
* freeze.adb (Freeze_Record_Type): Same. Also remove checking on
synchronized types and ghost types.
* sem_ch12.adb (Instantiate_Object): Remove checking on
volatility.
(Instantiate_Type): Same.
* sem_ch3.adb (Access_Type_Declaration): Same.
(Derived_Type_Declaration): Remove checking related to untagged
partial view.
(Process_Discriminants): Remove checking on volatility.
* sem_ch5.adb (Analyze_Loop_Parameter_Specification): Same.
* sem_ch6.adb (Analyze_Procedure_Call): Fix use of SPARK_Mode
where GNATprove_Mode was intended.
* sem_disp.adb (Inherited_Subprograms): Protect against Empty
node.
* sem_prag.adb (Analyze_Global_In_Decl_Part): Remove checking on
volatility.
(Analyze_Pragma): Same.
* sem_res.adb (Flag_Effectively_Volatile_Objects): Remove.
(Resolve_Actuals): Remove checking on volatility.
(Resolve_Entity_Name): Same.
* sem_util.adb (Check_Nonvolatile_Function_Profile): Remove.
(Check_Volatility_Compatibility): Remove.
* sem_util.ads: Same.