PR lto/94249
* plugin-api.h: Add more robust endianess detection.
binutils-gdb/bfd/elf.c: In function ‘setup_group’:
binutils-gdb/bfd/elf.c:740:35: error: overflow in conversion from ‘unsigned int’ to ‘int’ changes value from ‘num_group = 4294967295’ to ‘-1’ [-Werror=overflow]
740 | elf_tdata (abfd)->num_group = num_group = -1;
| ^~~~~~~~~
cc1: all warnings being treated as errors
make[2]: *** [Makefile:1608: elf.lo] Error 1
Change num_group in elf_obj_tdata to unsigned int to compile with GCC 10.
PR binutils/25717
* elf-bfd.h (elf_obj_tdata): Change num_group to unsigned int.
Andre Vieira [Fri, 13 Mar 2020 13:31:56 +0000 (13:31 +0000)]
gas, arm: PR25660L Fix vadd/vsub with lt and le condition codes for MVE
As explained in the PR, the addition of MVE makes the parser strip 't' and 'e'
as suffixes when MVE is enabled. This leads to vadd and vsub in it blocks with
lt and le conditions to be initially parsed as vaddl and vsubl. This means the
operand parsing for these must allow for the same operands as the scalar vadd
and vsub. I had forgotten to do this and this patch remedies that oversight.
gas/ChangeLog:
2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
Backport from mainline.
2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25660
* config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
(parse_operands): Handle new operand codes.
(do_neon_dyadic_long): Make shape check accept the scalar variants.
(asm_opcode_insns): Fix operand codes for vaddl and vsubl.
* testsuite/gas/arm/mve-vaddsub-it.s: New test.
* testsuite/gas/arm/mve-vaddsub-it.d: New test.
* testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
* testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
* testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
* testsuite/gas/arm/nomve-vaddsub-it.d: New test.
Alan Modra [Wed, 11 Mar 2020 04:13:16 +0000 (14:43 +1030)]
powerpc64-ld infinite loop
If this code dealing with possible conversion of inline plt sequences
is ever executed, ld will hang. A binary with such sequences and of
code size larger than approximately 90% the reach of an unconditional
branch is the trigger. Oops.
* elf64-ppc.c (ppc64_elf_inline_plt): Do increment rel in for loop.
H.J. Lu [Tue, 25 Feb 2020 11:30:33 +0000 (03:30 -0800)]
Don't call lto-wrapper for ar and ranlib
Since ar and ranlib don't need to know symbol types to work properly,
we should avoid calling lto-wrapper for them to speed them up.
bfd/
PR binutils/25584
* plugin.c (need_lto_wrapper_p): New.
(bfd_plugin_set_program_name): Add an int argument to set
need_lto_wrapper_p.
(get_lto_wrapper): Return FALSE if need_lto_wrapper_p isn't
set.
* plugin.h (bfd_plugin_set_program_name): Add an int argument.
binutils/
PR binutils/25584
* ar.c (main): Pass 0 to bfd_plugin_set_program_name.
* nm.c (main): Pass 1 to bfd_plugin_set_program_name.
Alan Modra [Sat, 22 Feb 2020 02:16:33 +0000 (12:46 +1030)]
PR25585, PHDR segment not covered by LOAD segment
I closed this bug as invalid, but I think it is worth mentioning in NEWS
that older linkers didn't check PT_PHDR very well. The patch also allows
people to force an output file with --noinhibit-exec after the error.
bfd/
PR 25585
* elf.c (assign_file_positions_for_load_sections): Continue linking
on "PHDR segment not covered by LOAD segment" errors.
ld/
PR 25585
* NEWS: Mention better "PHDR segment not covered by LOAD segment"
checking.
Nick Clifton [Sun, 16 Feb 2020 11:33:15 +0000 (11:33 +0000)]
Import fixes for using the LTO plugin with nm.
PR 25355
bfd:
2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
* plugin.c (try_load_plugin): Make plugin_list_iter an argument
and use it if it isn't NULL. Remove has_plugin_p argument. Add
a build_list_p argument. Don't search plugin_list. Short circuit
when building the plugin list.
(has_plugin): Renamed to has_plugin_list.
(bfd_plugin_set_plugin): Don't set has_plugin.
(bfd_plugin_specified_p): Check plugin_list instead.
(build_plugin_list): New function.
(load_plugin): Call build_plugin_list and use plugin_list.
2020-02-11 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/25355
* plugin.c (try_claim): Always clean up for LTO wrapper.
(try_load_plugin): Treat each object as independent. Create a
copy for plugin name.
Nick Clifton [Tue, 11 Feb 2020 15:55:25 +0000 (15:55 +0000)]
Import a fix from the mainline sources that prevents a potential illegal memory access when parsing PE binaries.
PR 25447
* coffgen.c (_bfd_coff_close_and_cleanup): Do not clear the keep
syms and keep strings flags as these may have been set in order to
prevent a bogus call to free.
MSP430: Enable relaxation of jump instructions to hard-coded pcrel offsets
This patch fixes execution failures which occur when the BR in a
sequence such as:
J<cond> 1f
BR
1:
is relaxed to a JMP, and the pc-relative offset for the destination of
the J<cond> instruction is hard-coded to be 2 words ahead of the
instruction.
The hard-coded offset will cause execution to jump 1 word ahead of where
it should actually go.
Instead we now detect the hard-coded offset is one we inserted earlier,
and invert the condition, allowing us to remove the BR entirely.
bfd/ChangeLog:
2020-02-10 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* elf32-msp430.c (msp430_elf_relax_section): Before relaxing a branch,
check if previous instruction matches a conditional jump inserted
earlier. Invert conditional jump and delete branch in this case.
MSP430: Enable relaxation of relocs in JMP instructions
This patch fixes relocation overflows caused by an inability to relax
unconditional JMP instructions to BR instructions.
bfd/ChangeLog:
2020-02-10 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* elf32-msp430.c (msp430_elf_relax_add_two_words): Rename to
msp430_elf_relax_add_words. Support insertion of either one or two
words.
(msp430_elf_relax_section): Catch opcode of 0x3c00 when relocation
needs to be grown. Handle insertion of branch instruction to replace
jump.
H.J. Lu [Mon, 10 Feb 2020 16:37:22 +0000 (08:37 -0800)]
x86: Accept Intel64 only instruction by default
Commit d835a58baae720 disabled sysenter/sysenter in 64-bit mode by
default. By default, assembler should accept common, Intel64 only
and AMD64 ISAs since there are no conflicts.
gas/
PR gas/25516
* config/tc-i386.c (intel64): Renamed to ...
(isa64): This.
(match_template): Accept Intel64 only instruction by default.
(i386_displacement): Updated.
(md_parse_option): Updated.
* c-i386.texi: Update -mamd64/-mintel64 documentation.
* testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
-mamd64 to x86-64-sysenter-amd.
* testsuite/gas/i386/x86-64-sysenter.d: New file.
opcodes/
PR gas/25516
* i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
with ISA64.
* i386-opc.h (AMD64): Removed.
(Intel64): Likewose.
(AMD64): New.
(INTEL64): Likewise.
(INTEL64ONLY): Likewise.
(i386_opcode_modifier): Replace amd64 and intel64 with isa64.
* i386-opc.tbl (Amd64): New.
(Intel64): Likewise.
(Intel64Only): Likewise.
Replace AMD64 with Amd64. Update sysenter/sysenter with
Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
* i386-tbl.h: Regenerated.
bfcvt converts a .S input to a .H output, so any predicated movprfx
needs to operate on .S rather than .H. In common with SVE2 narrowing
top operations, bfcvtnt doesn't accept movprfx.
2020-02-10 Richard Sandiford <richard.sandiford@arm.com>
opcodes/
* aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
gas/
* testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
.s for the movprfx.
* testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
* testsuite/gas/aarch64/sve-movprfx_28.d,
* testsuite/gas/aarch64/sve-movprfx_28.l,
* testsuite/gas/aarch64/sve-movprfx_28.s: New test.
Andre Vieira [Fri, 31 Jan 2020 17:09:27 +0000 (17:09 +0000)]
arm: PR gas/25472 Enable DSP instructions with +mve
We noticed +mve was not enabling DSP instructions as it should, reported in PR
25472.
The MVE architecture extension for Armv8.1-M Mainline implies DSP extensions.
This patch reflects that in the '+mve' command line option.
gas/ChangeLog:
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
Backport from mainline.
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR gas/25472
* config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
(armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
+mve.
* testsuite/gas/arm/mve_dsp.d: New test.
[ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructions in MVE.
This patch adds support for assembly instructions vldmia, vldmdb, vstmia
and vstmdb in MVE. This instructions are already supported for Armv8-M
Floating-point Extension.
* config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
to support VLDMIA instruction for MVE.
(fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
instruction for MVE.
(fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
instruction for MVE.
(fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
instruction for MVE.
* testsuite/gas/arm/mve-ldst.d: New test.
* testsuite/gas/arm/mve-ldst.s: Likewise.
Tamar Christina [Mon, 27 Jan 2020 10:40:02 +0000 (10:40 +0000)]
AArch64: Fix cfinv disassembly issues
This fixes the preferred disassembly for cfinv. The Armv8.4-a instruction
overlaps with the possible encoding space for msr. This because msr allows you
to use unallocated encoding space using the general sA_B_cC_cD_E form.
However when an encoding does become allocated then we need to ensure that it's
used as the preferred disassembly. The problem with cfinv is that its mask has
all bits sets because it has no arguments.
This causes issues for the Alias resolver in gas as it uses the mask to build
alias graph. In this case it can't do it since it thinks almost everything
would alias with cfinv. So instead we can only fix this by moving cfinv before
msr.
Jan Beulich [Tue, 21 Jan 2020 07:25:31 +0000 (08:25 +0100)]
x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
Just like other VCVT*{X,Y} templates do, and to allow the programmer
flexibility (might be relevant in particular when heavily macro-izing
code), the two templates should also have Broadcast set, just like their
X/Y-suffix-less counterparts. This in turn requires them to also have
* Dword set on their memory operands, to cover the logic added to
i386gen by 4a1b91eabbe7 ("x86: Expand Broadcast to 3 bits"),
* RegXMM/RegYMM set on their source operands, to satisfy broadcast
sizing logic in gas itself.
Otherwise ATTSyntax templates wouldn't need such operand size attributes.
While extending the test cases, also add Intel syntax broadcast forms
without explicit size specifiers.
Roland McGrath [Sat, 18 Jan 2020 22:42:24 +0000 (14:42 -0800)]
Fix ld-x86-64/align-branch-1 test failure on --target=x86_64-elf
ld/ChangeLog
* testsuite/ld-x86-64/align-branch-1.d: Loosen instruction regexps
to admit whatever absolute address. The label-relative address is
what the test needs to verify.
Nick Clifton [Sat, 18 Jan 2020 13:43:19 +0000 (13:43 +0000)]
Update top level config files with copies from the official repository.
2020-01-01 Ben Elliston <bje@gnu.org>
* config.guess: Update copyright years.
* config.sub: Likewise.
2019-12-21 Ben Elliston <bje@gnu.org>
* config.guess (set_cc_for_build): Prevent multiple calls by
checking if $tmp is already set. We can't check CC_FOR_BUILD as
the user may set it externally. Thanks to Torbj?rn Granlund for
the bug report.
2019-12-21 Torbj?rn Granlund <tg@gmplib.org>
* config.guess (alpha:Linux:*:*): Guard against missing
/proc/cpuinfo by redirecting standard error to /dev/null.
2019-09-12 Daniel Bittman <danielbittman1@gmail.com>
* config.sub (case $os): Match nsk* and powerunix. Don't later
match nsk* and set os=nsk which removes the OS version number.
2019-06-30 Ben Elliston <bje@gnu.org>
* config.sub: Recognise os108*.
2019-06-26 Ben Elliston <bje@gnu.org>
* config.sub (hp300): Set $os to hpux.
2019-06-26 Ben Elliston <bje@gnu.org>
* config.sub (vsta): Move into alphabetical order.
2019-06-10 Ben Elliston <bje@gnu.org>
* config.guess (*:OS108:*:*): Recognise new OS.
2019-05-28 Ben Elliston <bje@gnu.org>
* config.guess (*:Darwin:*:*): Run xcode-select to determine if a
system compiler is installed. If not, do not run set_cc_for_build,
as the default cc will open a dialog box asking to install
Xcode. If no C compiler is available, guess based on uname -p and
uname -m.
Simon Marchi [Fri, 17 Jan 2020 18:40:10 +0000 (13:40 -0500)]
Make all-gdbsupport depend on all-bfd
Trying to run "make all-gdbsupport" at the top-level in a build from scratch
results in:
make[2]: Entering directory '/home/smarchi/build/binutils-gdb/gdbsupport'
CC agent.o
In file included from /home/smarchi/src/binutils-gdb/gdbsupport/common-defs.h:133,
from /home/smarchi/src/binutils-gdb/gdbsupport/agent.c:20:
/home/smarchi/src/binutils-gdb/gdbsupport/common-types.h:35:10: fatal error: bfd.h: No such file or directory
35 | #include "bfd.h"
| ^~~~~~~
Before building all-gdbsupport, we need all-bfd to run, so that bfd.h is
generated.
(Once this patch is merged in the binutils-gdb repo, I'll send it to gcc
to keep the files in sync.)
ChangeLog:
* Makefile.def: Add dependencies of all-gdbsupport on all-bfd.
* Makefile.in: Re-generate.
projects / thirdparty / binutils-gdb.git / log
