Gary Dismukes [Sat, 2 Dec 2023 00:11:31 +0000 (00:11 +0000)]
ada: Missing error on positional container aggregates for types with Add_Named
The compiler fails to reject a container aggregate written using positional
notation when the container type specifies an Add_Named operation in its
Aggregate aspect. Container aggregates for such types must be written using
named associations. The compiler ignores the positional associations and
produces an empty aggregate object. An error check is added to catch such
illegal container aggregates.
gcc/ada/
* sem_aggr.adb (Resolve_Container_Aggregate): In the Add_Named
case, issue an error if the container aggregate is written as a
positional aggregate, since such an aggregate must have named
associations.
Sheri Bernstein [Fri, 1 Dec 2023 01:14:22 +0000 (01:14 +0000)]
ada: Remove GNATcheck violations
Remove GNATcheck violations by refactoring code and also using
pragma Annotate to exempt them.
gcc/ada/
* libgnat/a-comlin.adb (Argument_Count): Rewrite code so there is
only one return, to remove Improper_Returns violation.
(Command_Name): Add pragma to exempt Improper_Returns violation.
Gary Dismukes [Thu, 30 Nov 2023 19:28:42 +0000 (19:28 +0000)]
ada: Compiler hangs on container aggregate with function call as key expression
The compiler hangs (or may crash, if assertions are enabled) when compiling
an iterated association of a container aggregate that has a key expression
given by a function call. The resolution of the call leads to a blowup in
Build_Call_Marker, because the temporary copy of the expression that's
analyzed has an Empty parent, causing insertion of the call marker to fail.
The fix for this is to preanalyze, rather than analyze, the copy of the key
expression (Build_Call_Marker will return without creating a call marker in
the case of preanalysis).
gcc/ada/
* sem_aggr.adb (Resolve_Iterated_Association): Call
Preanalyze_And_Resolve instead of Analyze_And_Resolve on a key
expression of an iterated association.
Routine Get_Logical_Line_Number_Img was introduced for splitting of
Pre/Post contracts, but subsequent patch for that feature removed its
only use. It was then used by GNATprove, but that use is now removed
as well.
Patrick Bernardi [Wed, 29 Nov 2023 12:14:03 +0000 (07:14 -0500)]
ada: gnatbind: Do not generate Ada.Command_Line references when not used
It was previously assumed that configurable runtimes could not return exit
statuses, however this assumption no longer holds. Instead, only import
the required symbols from Ada.Command_Line's support packages if
Ada.Command_Line is in the closure of the partition when a configurable
runtime is used.
gcc/ada/
* bindgen.adb (Command_Line_Used): New object.
(Gen_Main): Only generate references to symbols used by
Ada.Command_Line if the package is used by the partition.
(Gen_Output_File_Ada): Ditto.
(Resolve_Binder_Options): Check if Ada.Command_Line is in the
closure of the partition.
Piotr Trojanek [Tue, 28 Nov 2023 22:01:31 +0000 (23:01 +0100)]
ada: Ignore unconstrained components as inputs for Depends
The current wording of SPARK RM 6.1.5(5) about the inputs for the
Depends contract doesn't mention "a record with at least one
unconstrained component".
gcc/ada/
* sem_prag.adb (Is_Unconstrained_Or_Tagged_Item): Update comment
and body.
Eric Botcazou [Tue, 28 Nov 2023 19:46:00 +0000 (20:46 +0100)]
ada: Rename Is_Constr_Subt_For_UN_Aliased flag
The flag is set on the constructed subtype of an object with unconstrained
nominal subtype that is aliased and is used by the code generator to adjust
the layout of the object.
But it is actually only used for array subtypes, where it determines whether
the object is allocated with its bounds, and this usage could be extended to
other cases than the original case.
gcc/ada/
* einfo.ads (Is_Constr_Subt_For_UN_Aliased): Rename into...
(Is_Constr_Array_Subt_With_Bounds): ...this.
* exp_ch3.adb (Expand_N_Object_Declaration): Adjust to above
renaming and remove now redundant test.
* sem_ch3.adb (Analyze_Object_Declaration): Likewise, but set
Is_Constr_Array_Subt_With_Bounds only on arrays.
* gen_il-fields.ads (Opt_Field_Enum): Apply same renaming.
* gen_il-gen-gen_entities.adb (Entity_Kind): Likewise.
* gen_il-internals.adb (Image): Remove specific processing for
Is_Constr_Subt_For_UN_Aliased.
* treepr.adb (Image): Likewise.
* gcc-interface/decl.cc (gnat_to_gnu_entity): Adjust to renaming
and remove now redundant tests.
* gcc-interface/trans.cc (Identifier_to_gnu): Likewise.
(Call_to_gnu): Likewise.
ada: Remove No_Dynamic_Priorities from Restricted_Tasking
Some of our restricted runtimes support dynamic priorities. The binder
needs to generate code for a restricted runtime even if the restriction
No_Dynamic_Priorities is not in place.
gcc/ada/
* libgnat/s-rident.ads: Remove No_Dynamic_Priorities from
Restricted_Tasking.
Patrick Bernardi [Sat, 18 Nov 2023 00:39:47 +0000 (19:39 -0500)]
ada: Adapt Ada.Command_Line to work on configurable runtimes
The behaviour of the binder when handling command line arguments and exit
codes is simplified so that references to the corresponding runtime symbols
are always generated when the runtime is configured with command line
argument and exit code support. This allows Ada.Command_Line to work with
all runtimes, which was not the case previously.
As a result of this change, configurable runtimes that do not include
Ada.Command_Line and it support files, but are configured with
Command_Line_Args and/or Exit_Status_Supported set to True will need to
provide the symbols required by the binder, as these symbols will no longer
be defined in the binder generated file.
argv.c includes a small change to exclude adaint.h when compiling for a
light runtime, since this header is not required.
gcc/ada/
* argv.c: Do not include adaint.h if LIGHT_RUNTIME is defined.
* bindgen.adb (Gen_Main): Simplify command line argument and exit
handling by requiring the runtime to always provide the required
symbols if command line argument and exit code is enabled.
* targparm.ads: Update comments to reflect changes to gnatbind.
Before this patch, the compiler would fail to examine the corresponding
record types of concurrent types when building aggregate components.
This patch fixes this, and adds a precondition and additional documentation
on the subprogram that triggered the crash, as it never makes sense
to call it with a concurrent type.
gcc/ada/
* exp_aggr.adb (Initialize_Component): Use corresponding record
types of concurrent types.
* exp_util.ads (Make_Tag_Assignment_From_Type): Add precondition
and extend documentation.
Co-authored-by: Javier Miranda <miranda@adacore.com>
Eric Botcazou [Fri, 24 Nov 2023 15:26:00 +0000 (16:26 +0100)]
ada: Further cleanup in finalization machinery
This removes the setting of the Is_Ignored_Transient flag on the temporaries
needing finalization created by Expand_Ctrl_Function_Call when invoked from
within the dependent expressions of conditional expressions.
This flag tells the general finalization machinery to disregard the object.
But temporaries needing finalization present in action lists of dependent
expressions are picked up by Process_Transients_In_Expression, which deals
with their finalization and sets the Is_Finalized_Transient flag on them.
Now this latter flag has exactly the same effect as Is_Ignored_Transient
as far as the general finalization machinery is concerned, so setting the
flag is unnecessary. In the end, the flag can be decoupled entirely from
transient objects and renamed into Is_Ignored_For_Finalization.
This also moves around the declaration of a local variable and turns a
library-level procedure into a nested procedure.
gcc/ada/
* einfo.ads (Is_Ignored_Transient): Rename into...
(Is_Ignored_For_Finalization): ...this.
* gen_il-fields.ads (Opt_Field_Enum): Adjust to above renaming.
* gen_il-gen-gen_entities.adb (Object_Kind): Likewise.
* exp_aggr.adb (Expand_Array_Aggregate): Likewise.
* exp_ch7.adb (Build_Finalizer.Process_Declarations): Likewise.
* exp_util.adb (Requires_Cleanup_Actions): Likewise.
* exp_ch4.adb (Expand_N_If_Expression): Move down declaration of
variable Optimize_Return_Stmt.
(Process_Transient_In_Expression): Turn procedure into a child of...
(Process_Transients_In_Expression): ...this procedure.
* exp_ch6.adb (Expand_Ctrl_Function_Call): Remove obsolete setting
of Is_Ignored_Transient flag on the temporary if within a dependent
expression of a conditional expression.
Yannick Moy [Wed, 22 Nov 2023 15:43:08 +0000 (16:43 +0100)]
ada: Fix SPARK expansion of container aggregates
GNATprove supports container aggregates, except for indexed aggregates.
It needs all expressions to have suitable target types and Do_Range_Check
flags, which are added by the special expansion for GNATprove.
There is no impact on code generation.
gcc/ada/
* exp_spark.adb (Expand_SPARK_N_Aggregate): New procedure for the
special expansion.
(Expand_SPARK): Call the new expansion procedure.
* sem_util.adb (Is_Container_Aggregate): Implement missing test.
Eric Botcazou [Wed, 22 Nov 2023 15:29:01 +0000 (16:29 +0100)]
ada: Fix spurious visibility error on parent's component in instance
This occurs for an aggregate of a derived tagged type in the body of the
instance, because the full view of the parent type, which was visible in
the generic construct (otherwise the aggregate would have been illegal),
is not restored in the body of the instance.
Copy_Generic_Node already contains code to restore the full view in this
case, but it works only if the derived tagged type is itself global to
the generic construct, and not if the derived tagged type is local but
the parent type global, as is the case here.
gcc/ada/
* gen_il-fields.ads (Aggregate_Bounds): Rename to
Aggregate_Bounds_Or_Ancestor_Type.
* gen_il-gen-gen_nodes.adb (Aggregate_Bounds): Likewise.
* sem_aggr.adb (Resolve_Record_Aggregate): Remove obsolete bypass.
* sem_ch12.adb (Check_Generic_Actuals): Add decoration.
(Copy_Generic_Node): For an extension aggregate, restore only the
full view, if any. For a full aggregate, restore the full view as
well as that of its Ancestor_Type, if any, and up to the root type.
(Save_References_In_Aggregate): For a full aggregate of a local
derived tagged type with a global ancestor, set Ancestor_Type to
this ancestor. For a full aggregate of a global derived tagged
type, set Ancestor_Type to the parent type.
* sinfo-utils.ads (Aggregate_Bounds): New function renaming.
(Ancestor_Type): Likewise.
(Set_Aggregate_Bounds): New procedure renaming.
(Set_Ancestor_Type): Likewise.
* sinfo.ads (Ancestor_Type): Document new field.
Eric Botcazou [Wed, 22 Nov 2023 22:04:33 +0000 (23:04 +0100)]
ada: Plug small loophole in finalization machinery
The path in Expand_N_If_Expression implementing the special optimization for
an unidimensional array type and dependent expressions with static bounds
fails to call Process_Transients_In_Expression on their list of actions.
gcc/ada/
* exp_ch4.adb (Expand_N_If_Expression): Also add missing calls to
Process_Transients_In_Expression on the code path implementing the
special optimization for an unidimensional array type and
dependent expressions with static bounds.
Steve Baird [Tue, 21 Nov 2023 19:00:37 +0000 (11:00 -0800)]
ada: Cope with Sem_Util.Enclosing_Declaration oddness.
Sem_Util.Enclosing_Declaration can return a non-empty result which is not
a declaration; clients may need to compensate for the case where an
N_Subprogram_Specification node is returned. One such client is the function
Is_Actual_Subp_Of_Inst.
gcc/ada/
* sem_ch8.adb (Is_Actual_Subp_Of_Inst): After calling
Enclosing_Declaration, add a check for the case where one more
Parent call is needed to get the enclosing declaration.
This patch relaxes the requirement that discriminants values should be
known at compile time for a particular optimization to be applied. That
optimization is the one that treats an unconstrained object as constrained
when the object is of a limited type, in order to reduce the size of the
object.
What makes it possible to relax this requirement is that the set of
cases where the optimization is applied was narrowed in a previous
patch.
Yannick Moy [Tue, 21 Nov 2023 11:06:52 +0000 (12:06 +0100)]
ada: Do not issue SPARK legality error if SPARK_Mode ignored
When pragma Ignore_Pragma(SPARK_Mode) is used, do not issue error
messages related to SPARK legality checking. This facilitates the
instrumentation of code by GNATcoverage.
gcc/ada/
* doc/gnat_rm/implementation_defined_pragmas.rst: Fix doc for
pragma Ignore_Pragma, in the case where it follows another
configuration pragma that it names, which causes the preceding
pragma to be ignored after parsing.
* errout.adb (Should_Ignore_Pragma_SPARK_Mode): New query.
(SPARK_Msg_N): Do nothing if SPARK_Mode is ignored.
(SPARK_Msg_NE): Same.
* gnat-style.texi: Regenerate.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
Yannick Moy [Tue, 21 Nov 2023 15:48:20 +0000 (16:48 +0100)]
ada: Cleanup SPARK legality checking
Move one SPARK legality check from GNAT to GNATprove, and cleanup
other uses of SPARK_Mode for legality checking.
gcc/ada/
* sem_ch4.adb (Analyze_Selected_Component): Check correct mode
variable for GNATprove.
* sem_prag.adb (Refined_State): Call SPARK_Msg_NE which checks
value of SPARK_Mode before issuing a message.
* sem_res.adb (Resolve_Entity_Name): Remove legality check for
SPARK RM 6.1.9(1), moved to GNATprove.
Steve Baird [Thu, 8 Jun 2023 21:44:52 +0000 (14:44 -0700)]
ada: Illegal instance of Generic_1.Generic_2 incorrectly accepted
If G1 is a generic package and G1.G2 is a child unit (also a generic package)
then it would be illegal if some third generic unit (declared outside of G1)
takes a formal instance of G1.G2, as in "with package I2 is new G1.G2;".
This construct was incorrectly accepted in some cases.
gcc/ada/
* sem_ch12.adb (Check_Generic_Child_Unit): Introduce a new nested
function Adjusted_Inst_Par_Ekind to cope with cases where either
a- the visibility of a compiler-generated renaming is incorrect;
or b- we are inside of a generic parent unit G1 that has a child
unit G1.G2, so instantiation of G1.G2 is permitted.
Eric Botcazou [Mon, 20 Nov 2023 16:44:56 +0000 (17:44 +0100)]
ada: Further cleanup in finalization machinery
This streamlines the submachinery that makes it so that the finalization of
temporaries created for EWAs and conditional expressions is deferred to the
enclosing context.
The original implementation was using a deep tree traversal for EWAs, which
was later restricted to immediate subexpressions; this further flattens it
to the traversal of the immediate list of actions of the EWA in keeping with
the implementation for conditional expressions.
This should not change anything because the enclosing context found by the
machinery is the same, whatever the starting position in a nest of EWAs or
conditional expressions.
gcc/ada/
* exp_ch4.adb (Process_If_Case_Statements): Rename into...
(Process_Transients_In_Expression): ...this and beef up comment.
(Expand_N_Case_Expression): Call Process_Transients_In_Expression
unconditionally on the list of actions of each alternative.
(Expand_N_Expression_With_Actions): Do not deal with actions in
nested subexpressions, but call Process_Transients_In_Expression
on the list of actions only.
(Expand_N_If_Expression): Adjust to above renaming. Add missing
calls to Process_Transients_In_Expression in the case when an EWA
is not used because of Minimize_Expression_With_Actions.
Richard Biener [Tue, 19 Dec 2023 09:51:06 +0000 (10:51 +0100)]
tree-optimization/113080 - missing final value replacement
When performing final value replacement we guard against exponential
(temporary) code growth due to unsharing of trees (SCEV heavily
relies on tree sharing). The following relaxes this a tiny bit
to cover some more optimizations and puts in comments as to what
the real fix would be.
PR tree-optimization/113080
* tree-scalar-evolution.cc (expression_expensive_p): Allow
a tiny bit of growth due to expansion of shared trees.
(final_value_replacement_loop): Add comment.
Richard Biener [Tue, 19 Dec 2023 08:58:03 +0000 (09:58 +0100)]
tree-optimization/113073 - amend PR112736 fix
The PR112736 testcase fails on RISC-V because the aligned exception
uses the wrong check. The alignment support scheme can be
dr_aligned even when the access isn't aligned to the vector size
but some targets are happy with element alignment. The following
fixes that.
PR tree-optimization/113073
* tree-vect-stmts.cc (vectorizable_load): Properly ensure
to exempt only vector-size aligned overreads.
Roger Sayle [Tue, 19 Dec 2023 11:24:36 +0000 (11:24 +0000)]
i386: Improved TImode (128-bit) integer constants on x86_64.
This patch fixes two issues with the handling of 128-bit TImode integer
constants in the x86_64 backend. The main issue is that GCC always
tries to load 128-bit integer constants via broadcasts to vector SSE
registers, even if the result is required in general registers. This
is seen in the two closely related functions below:
__int128 m;
void foo() { m &= CONST; }
void bar() { m = CONST; }
When compiled with -O2 -mavx, we currently generate:
With this patch we defer the decision to use vector broadcast for
TImode until we know that we actually want a SSE register result,
by moving the call to ix86_convert_const_wide_int_to_broadcast from
the RTL expansion pass, to the scalar-to-vector (STV) pass. With
this change (and a minor tweak described below) we now generate:
bar: movabsq $81985529216486895, %rax
vmovq %rax, %xmm0
vpunpcklqdq %xmm0, %xmm0, %xmm0
vmovdqa %xmm0, m(%rip)
ret
showing that we now correctly use vector mode broadcasts (only)
where appropriate.
The one minor tweak mentioned above is to enable the un-cprop hi/lo
optimization, that I originally contributed back in September 2004
https://gcc.gnu.org/pipermail/gcc-patches/2004-September/148756.html
even when not optimizing for size. Without this (and currently with
just -O2) the function foo above generates:
I'm not sure why (back in 2004) I thought that avoiding the implicit
"movq %rax, %rdx" instead of a second load was faster, perhaps avoiding
a dependency to allow better scheduling, but nowadays "movq %rax, %rdx"
is either eliminated by GCC's hardreg cprop pass, or special cased by
modern hardware, making the first foo preferrable, not only shorter but
also faster.
2023-12-19 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc
(ix86_convert_const_wide_int_to_broadcast): Remove static.
(ix86_expand_move): Don't attempt to convert wide constants
to SSE using ix86_convert_const_wide_int_to_broadcast here.
(ix86_split_long_move): Always un-cprop multi-word constants.
* config/i386/i386-expand.h
(ix86_convert_const_wide_int_to_broadcast): Prototype here.
* config/i386/i386-features.cc: Include i386-expand.h.
(timode_scalar_chain::convert_insn): When converting TImode to
V1TImode, try ix86_convert_const_wide_int_to_broadcast.
gcc/testsuite/ChangeLog
* gcc.target/i386/movti-2.c: New test case.
* gcc.target/i386/movti-3.c: Likewise.
Thomas Schwinge [Mon, 18 Dec 2023 16:25:17 +0000 (17:25 +0100)]
Unify OpenACC/C and C++ behavior re duplicate OpenACC 'declare' directives for 'extern' variables [PR90868]
This likely still isn't what OpenACC actually intends (addressing that is for
another day), but at least we now misbehave consistently for C and C++.
PR c++/90868
gcc/cp/
* parser.cc (cp_parser_oacc_declare): For "more than once", check
the DECL that we're actually setting the attribute on.
gcc/testsuite/
* c-c++-common/goacc/declare-1.c: Adjust.
* c-c++-common/goacc/declare-2.c: Likewise.
Jakub Jelinek [Tue, 19 Dec 2023 09:24:33 +0000 (10:24 +0100)]
i386: Fix mmx.md signbit expanders [PR112816]
Apparently when looking for "signbit<mode>2" vector expanders, I've only
looked at sse.md and forgot mmx.md, which has two further ones and the
following patch still ICEd.
2023-12-19 Jakub Jelinek <jakub@redhat.com>
PR target/112816
* config/i386/mmx.md (signbitv2sf2, signbit<mode>2): Force operands[1]
into a REG.
Juzhe-Zhong [Tue, 19 Dec 2023 08:42:30 +0000 (16:42 +0800)]
RISC-V: Force scalable vector on all vsetvl tests
Since when VLEN = 128bits and FIXED-VLMAX, vsetvli a5,zero will be optimized
into vsetivli zero, 16 for SEW = 16.
Such situation will cause many bogus FAILs in FIXED-VLMAX of full coverage
testing.
Force them all scalable vectors to supress those bogus FAILs.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-100.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-101.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-102.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-103.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-104.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-105.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-106.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-107.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-108.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-109.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-29.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-31.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-32.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-33.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-34.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-35.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-36.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-38.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-40.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-42.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-43.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-44.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-45.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-46.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-49.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-52.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-53.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-54.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-55.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-56.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-57.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-58.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-59.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-60.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-61.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-62.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-63.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-64.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-65.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-69.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-72.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-73.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-74.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-75.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-76.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-77.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-78.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-79.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-80.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-81.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-82.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-83.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-85.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-86.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-87.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-88.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-89.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-90.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-91.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-92.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-93.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-94.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-95.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-96.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-97.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-98.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/avl_single-99.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/dump-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/ffload-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/imm_switch-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr108270.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109399.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109547.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109615.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109743-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109748.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109773-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109773-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr109974.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111037-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111234.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111255.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111927.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr111947.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112092-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112092-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112713-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112713-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112776.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112813-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112929-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/pr112988-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-21.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-22.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-24.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvl_int.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c: Force scalable vector.
* gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Force scalable vector.
Jiufu Guo [Tue, 19 Dec 2023 05:03:06 +0000 (13:03 +0800)]
treat argp-based mem as frame related in dse
The issue mentioned in PR112525 would be able to be handled by
updating dse.cc to treat arg_pointer_rtx similarly with frame_pointer_rtx.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=30271#c10 also mentioned
this idea.
And arpg area may be used to pass argument to callee. So, it would
be needed to check if call insns are using that mem.
PR rtl-optimization/112525
PR target/30271
gcc/ChangeLog:
* dse.cc (get_group_info): Add arg_pointer_rtx as frame_related.
(check_mem_read_rtx): Add parameter to indicate if it is checking mem
for call insn.
(scan_insn): Add mem checking on call usage.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr112525.c: New test.
* gcc.target/powerpc/pr30271.c: New test.
Juzhe-Zhong [Tue, 19 Dec 2023 04:16:33 +0000 (12:16 +0800)]
RISC-V: Remove 256/512/1024 VLS vectors
Since https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=2e7abd09621a4401d44f4513adf126bce4b4828b
we only allow VLSmodes with size <= TARGET_MIN_VLEN * TARGET_MAX_LMUL.
So when -march=rv64gcv default LMUL = 1, we don't have VLS modes of 256/512/1024 vectors.
Disable them in vect test which fixes the following FAILs in the regression:
Ian Lance Taylor [Fri, 20 Oct 2023 02:34:31 +0000 (19:34 -0700)]
compiler: move lowering pass after check types pass
This change moves the lowering pass after the type determination and
the type checking passes. This lets us simplify some of the code that
determines the type of an expression, which previously had to work
correctly both before and after type determination.
I'm doing this to help with future generic support. For example, with
generics, we can see code like
func ident[T any](v T) T { return v }
func F() int32 {
s := int32(1)
return ident(s)
}
Before this change, we would type check return statements in the
lowering pass (see Return_statement::do_lower). With a generic
example like the above, that means we have to determine the type of s,
and use that to infer the type arguments passed to ident, and use that
to determine the result type of ident. That is too much to do at
lowering time. Of course we can change the way that return statements
work, but similar issues arise with index expressions, the types of
closures for function literals, and probably other cases as well.
Rather than try to deal with all those cases, we move the lowering
pass after type checking. This requires a bunch of changes, notably
for determining constant types. We have to add type checking for
various constructs that formerly disappeared in the lowering pass.
So it's a lot of shuffling. Sorry for the size of the patch.
Feng Wang [Mon, 18 Dec 2023 03:28:00 +0000 (03:28 +0000)]
RISC-V: Add required_extensions in function_group
In order to add other vector related extensions in the future, this
patch add one more parameter in the function_group_info, it will be
used to determine whether intrinsic registration processing is required.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
Add new macro for match function.
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
Add one more parameter for macro expanding.
(handle_pragma_vector): Add match function calls.
* config/riscv/riscv-vector-builtins.h (enum required_ext):
Add enum defination for required extension.
(struct function_group_info): Add one more parameter for checking required-ext.
Some GCC tests on m68K port of LRA is failed on `maximum number of
generated reload insns per insn achieved`. The problem is in that for
subreg reload LRA can not narrow reg class more from ALL_REGS to
GENERAL_REGS and then to data regs or address regs. The patch permits
narowing reg class from reload insns if this results in succesful
matching of reg operand.
gcc/ChangeLog:
PR rtl-optimization/112918
* lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
(in_class_p): Restrict condition for narrowing class in case of
allow_all_reload_class_changes_p.
(process_alt_operands): Pass true for
allow_all_reload_class_changes_p in calls of in_class_p.
(curr_insn_transform): Ditto for reg operand win.
Harald Anlauf [Mon, 18 Dec 2023 17:59:02 +0000 (18:59 +0100)]
Fortran: update DATE_AND_TIME intrinsic for Fortran 2018 [PR96580]
Fortran 2018 allows a non-default integer kind for its VALUES argument if
it has a decimal exponent range of at least four. Update checks, library
implementation and documentation.
gcc/fortran/ChangeLog:
PR fortran/96580
* check.cc (array_size_check): New helper function.
(gfc_check_date_and_time): Use it for checking minimum size of
VALUES argument. Update kind check to Fortran 2018.
* intrinsic.texi: Fix documentation of DATE_AND_TIME.
libgfortran/ChangeLog:
PR fortran/96580
* intrinsics/date_and_time.c (date_and_time): Handle VALUES argument
for kind=2 and kind=16 (if available).
gcc/testsuite/ChangeLog:
PR fortran/96580
* gfortran.dg/date_and_time_2.f90: New test.
* gfortran.dg/date_and_time_3.f90: New test.
* gfortran.dg/date_and_time_4.f90: New test.
Andreas Krebbel [Mon, 18 Dec 2023 16:54:42 +0000 (17:54 +0100)]
IBM Z: Cover weak symbols with -munaligned-symbols
With the recently introduced -munaligned-symbols option byte-sized
variables which are resolved externally are considered to be
potentially misaligned.
However, this should rather also be applied to symbols which resolve
locally if they are weak. Done with this patch.
gcc/ChangeLog:
* config/s390/s390.cc (s390_encode_section_info): Replace
SYMBOL_REF_LOCAL_P with decl_binds_to_current_def_p.
Andrew Pinski [Mon, 18 Dec 2023 16:18:13 +0000 (08:18 -0800)]
SCCP: Fix ODR issues when compiling with LTO [PR 113054}
The problem here is that in C++ structs and classes have a
linkage too so the type vertex is not considered local to
the TU but will conflict with the globally defined one
in graphds.h. The simple way to fix this is to wrap the ones
defined locally in gimple-ssa-sccopy.cc inside an anonymous namespace
and they are now considered locally to that TU.
Committed as obvious after a bootstrap/test on x86_64.
gcc/ChangeLog:
PR tree-optimization/113054
* gimple-ssa-sccopy.cc: Wrap the local types
with an anonymous namespace.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Richard Biener [Mon, 18 Dec 2023 12:40:46 +0000 (13:40 +0100)]
middle-end/111975 - dump -> GIMPLE FE roundtrip improvements
The following improves the manual work needed to make a -gimple dump
valid input to the GIMPLE FE. First of all it recognizes the 'sizetype'
tree and dumps it as __SIZETYPE__, then it changes dumping vector types
without name from 'vector(n) T' to 'T [[gnu::vector_size(n')]]' which
we can parse in most relevant contexts (and that's shorter than
using __attribute__). Third it avoids a NULL_TREE TMR_STEP when
it would be one, an optimization that's re-done when generating RTL.
PR middle-end/111975
* tree-pretty-print.cc (dump_generic_node): Dump
sizetype as __SIZETYPE__ with TDF_GIMPLE.
Dump unnamed vector types as T [[gnu::vector_size(n)]] with
TDF_GIMPLE.
* tree-ssa-address.cc (create_mem_ref_raw): Never generate
a NULL STEP when INDEX is specified.
Gerald Pfeifer [Mon, 18 Dec 2023 13:39:22 +0000 (21:39 +0800)]
install: Drop hppa*-hp-hpux10, remove old notes on hppa*-hp-hpux11
gcc:
PR target/69374
* doc/install.texi (Specific) <hppa*-hp-hpux10>: Remove section.
(Specific) <hppa*-hp-hpux11>: Remove references to GCC 2.95 and
3.0. Also libffi has been ported now.
Juzhe-Zhong [Mon, 18 Dec 2023 11:35:21 +0000 (19:35 +0800)]
RISC-V: Support one more overlap for wv instructions
For 'wv' instructions, e.g. vwadd.wv vd,vs2,vs1.
vs2 has same EEW as vd.
vs1 has smaller than vd.
So, vs2 can overlap with vd, but vs1 can only overlap highest-number of vd
when LMUL of vs1 is greater than 1.
We already have supported overlap for vs1 LMUL >= 1.
But I forget vs1 LMUL < 1, vs2 can overlap vd even though vs1 totally can not overlap vd.
Consider the reduction auto-vectorization:
int64_t
reduc_plus_int (int *__restrict a, int n)
{
int64_t r = 0;
for (int i = 0; i < n; ++i)
r += a[i];
return r;
}
When we use --param=riscv-autovec-lmul=m2, the codegen is good to us because we already supported
overlap for source EEW32 LMUL1 -> dest EEW64 LMUL2.
--param=riscv-autovec-lmul=m2:
reduc_plus_int:
ble a1,zero,.L4
vsetvli a5,zero,e64,m2,ta,ma
vmv.v.i v2,0
.L3:
vsetvli a5,a1,e32,m1,tu,ma
slli a4,a5,2
sub a1,a1,a5
vle32.v v1,0(a0)
add a0,a0,a4
vwadd.wv v2,v2,v1
bne a1,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v1,a5
vsetvli a5,zero,e64,m2,ta,ma
vredsum.vs v2,v2,v1
vmv.x.s a0,v2
ret
.L4:
li a0,0
ret
However, default LMUL (--param=riscv-autovec-lmul=m1) generates redundant vmv1r since
it is EEW32 LMUL=MF2 -> EEW64 LMUL = 1
Before this patch:
reduc_plus_int:
ble a1,zero,.L4
vsetvli a5,zero,e64,m1,ta,ma
vmv.v.i v1,0
.L3:
vsetvli a5,a1,e32,mf2,tu,ma
slli a4,a5,2
sub a1,a1,a5
vle32.v v2,0(a0)
vmv1r.v v3,v1 ----> This should be removed.
add a0,a0,a4
vwadd.wv v1,v3,v2 ----> vs2 should be v1
bne a1,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v2,a5
vsetvli a5,zero,e64,m1,ta,ma
vredsum.vs v1,v1,v2
vmv.x.s a0,v1
ret
.L4:
li a0,0
ret
After this patch:
reduc_plus_int:
ble a1,zero,.L4
vsetvli a5,zero,e64,m1,ta,ma
vmv.v.i v1,0
.L3:
vsetvli a5,a1,e32,mf2,tu,ma
slli a4,a5,2
sub a1,a1,a5
vle32.v v2,0(a0)
add a0,a0,a4
vwadd.wv v1,v1,v2
bne a1,zero,.L3
li a5,0
vsetivli zero,1,e64,m1,ta,ma
vmv.s.x v2,a5
vsetvli a5,zero,e64,m1,ta,ma
vredsum.vs v1,v1,v2
vmv.x.s a0,v1
ret
.L4:
li a0,0
ret
Jakub Jelinek [Mon, 18 Dec 2023 10:42:20 +0000 (11:42 +0100)]
libgomp: Make libgomp.c/declare-variant-1.c test x86 specific
As written earlier, this test was written with the x86 specifics in mind
and adding dg-final directives for it for other arches makes it unreadable.
If a declare variant call can be resolved in gimple already as in the
aarch64 or gcn cases, it can be done in gcc.dg/gomp/ and I believe we have
tests like that already, the point of the test is that it is not known
during gimplification time which exact call should be chosen as it depends
on which declare simd clone it will be in.
2023-12-18 Jakub Jelinek <jakub@redhat.com>
* testsuite/libgomp.c/declare-variant-1.c: Restrict the test to x86,
drop because of that unneeded target selector from other directives
and remove the aarch64 specific ones.
The root cause of those ICEs is vector register size = 32bits, wheras scalar register size = 64bit.
That is, vector regsize < scalar regsize on -march=rv64gc_zve32f FIXED-VLMAX.
So the original natural regsize using scalar register size is incorrect. Instead, we should return minimum regsize between vector regsize and scalar regsize.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_regmode_natural_size): Fix ICE for
FIXED-VLMAX of -march=rv32gc_zve32f.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/bug-4.c: New test.
* gcc.target/riscv/rvv/autovec/bug-5.c: New test.
* gcc.target/riscv/rvv/autovec/bug-6.c: New test.
The following testcase ICEs because we aren't careful enough with
alloc_size attribute. We do check that such an argument exists
(although wouldn't handle correctly functions with more than INT_MAX
arguments), but didn't check that it is scalar integer, the ICE is
trying to fold_convert a structure to sizetype.
Given that the attribute can also appear on non-prototyped functions
where the arguments aren't known, I don't see how the FE could diagnose
that and because we already handle the case where argument doesn't exist,
I think we should also verify the argument is scalar integer convertible
to sizetype. Furthermore, given this is not just in diagnostics but
used for code generation, I think it is better to punt on arguments with
larger precision then sizetype, the upper bits are then truncated.
The patch also fixes some formatting issues and avoids duplication of the
fold_convert, plus removes unnecessary check for if (arg1 >= 0), that is
always the case after if (arg1 < 0) return ...;
2023-12-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/113013
* tree-object-size.cc (alloc_object_size): Return size_unknown if
corresponding argument(s) don't have integral type or have integral
type with higher precision than sizetype. Don't check arg1 >= 0
uselessly. Compare argument indexes against gimple_call_num_args
in unsigned type rather than int. Formatting fixes.
Jakub Jelinek [Mon, 18 Dec 2023 08:49:11 +0000 (09:49 +0100)]
testsuite: Fix up abi-tag25a.C test for C++11
Line 11 of abi-tag25.C is wrapped in #if __cpp_variable_templates
which isn't defined for -std=c++11, so we can't expect a warning
in that case either.
2023-12-18 Jakub Jelinek <jakub@redhat.com>
* g++.dg/abi/abi-tag25a.C: Expect second dg-warning only for c++14
and later.
It is not easy to add asm check stable enough for this case, as we need
to check the vadd -4 target comes from the vid output, which crosses 4
instructions up to point. Thus there is no test here and will be covered
by gcc.dg/vect/pr92420.c in the underlying patches.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vector): Take step2
instead of step1 for second series.
liushuyu [Mon, 18 Dec 2023 01:52:07 +0000 (09:52 +0800)]
LoongArch: Add support for D frontend.
gcc/ChangeLog:
* config.gcc: Add loongarch-d.o to d_target_objs for LoongArch
architecture.
* config/loongarch/t-loongarch: Add object target for loongarch-d.cc.
* config/loongarch/loongarch-d.cc
(loongarch_d_target_versions): add interface function to define builtin
D versions for LoongArch architecture.
(loongarch_d_handle_target_float_abi): add interface function to define
builtin D traits for LoongArch architecture.
(loongarch_d_register_target_info): add interface function to register
loongarch_d_handle_target_float_abi function.
* config/loongarch/loongarch-d.h
(loongarch_d_target_versions): add function prototype.
(loongarch_d_register_target_info): Likewise.
libphobos/ChangeLog:
* configure.tgt: Enable libphobos for LoongArch architecture.
* libdruntime/gcc/sections/elf.d: Add TLS_DTV_OFFSET constant for
LoongArch64.
* libdruntime/gcc/unwind/generic.d: Add __aligned__ constant for
LoongArch64.
xuli [Sat, 16 Dec 2023 00:57:44 +0000 (08:57 +0800)]
RISC-V: Add viota missed avl_type attribute
This patch fixes the following FAIL when LMUL = 8:
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medany/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=scalable
FAIL: gcc.dg/vect/slp-multitypes-2.c execution test
The rootcause is we missed viota avl_type, so we end up with incorrect vsetvl configuration:
Pan Li [Mon, 18 Dec 2023 00:18:30 +0000 (08:18 +0800)]
RISC-V: Fix POLY INT handle bug
This patch fixes the following FAIL:
Running target
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
FAIL: gcc.dg/vect/fast-math-vect-complex-3.c execution test
The root cause is we generate incorrect codegen for (const_poly_int:DI
[549755813888, 549755813888])
Before this patch:
li a7,0
vmv.v.x v0,a7
After this patch:
csrr a2,vlenb
slli a2,a2,33
vmv.v.x v0,a2
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_expand_mult_with_const_int):
Change int into HOST_WIDE_INT.
(riscv_legitimize_poly_move): Ditto.
Harald Anlauf [Sat, 16 Dec 2023 18:14:55 +0000 (19:14 +0100)]
Fortran: fix argument passing to CONTIGUOUS,TARGET dummy [PR97592]
gcc/fortran/ChangeLog:
PR fortran/97592
* trans-expr.cc (gfc_conv_procedure_call): For a contiguous dummy
with the TARGET attribute, the effective argument may still be
contiguous even if the actual argument is not simply-contiguous.
Allow packing to be decided at runtime by _gfortran_internal_pack.
gcc/testsuite/ChangeLog:
PR fortran/97592
* gfortran.dg/contiguous_15.f90: New test.
Xi Ruoyao [Sat, 9 Dec 2023 10:02:35 +0000 (18:02 +0800)]
LoongArch: Add alslsi3_extend
Following the instruction cost fix, we are generating
alsl.w $a0, $a0, $a0, 4
instead of
li.w $t0, 17
mul.w $a0, $t0
for "x * 4", because alsl.w is 4 times faster than mul.w. But we didn't
have a sign-extending pattern for alsl.w, causing an extra slli.w
instruction generated to sign-extend $a0. Add the pattern to remove the
redundant extension.
gcc/ChangeLog:
* config/loongarch/loongarch.md (alslsi3_extend): New
define_insn.
Xi Ruoyao [Sat, 9 Dec 2023 09:41:32 +0000 (17:41 +0800)]
LoongArch: Fix instruction costs [PR112936]
Replace the instruction costs in loongarch_rtx_cost_data constructor
based on micro-benchmark results on LA464 and LA664.
This allows optimizations like "x * 17" to alsl, and "x * 68" to alsl
and slli.
gcc/ChangeLog:
PR target/112936
* config/loongarch/loongarch-def.cc
(loongarch_rtx_cost_data::loongarch_rtx_cost_data): Update
instruction costs per micro-benchmark results.
(loongarch_rtx_cost_optimize_size): Set all instruction costs
to (COSTS_N_INSNS (1) + 1).
* config/loongarch/loongarch.cc (loongarch_rtx_costs): Remove
special case for multiplication when optimizing for size.
Adjust division cost when TARGET_64BIT && !TARGET_DIV32.
Account the extra cost when TARGET_CHECK_ZERO_DIV and
optimizing for speed.
gcc/testsuite/ChangeLog
PR target/112936
* gcc.target/loongarch/mul-const-reduction.c: New test.
Gerald Pfeifer [Sun, 17 Dec 2023 07:13:39 +0000 (15:13 +0800)]
install: Streamline the hppa*-hp-hpux* section
gcc:
PR target/69374
* doc/install.texi (Specific) <hppa*-hp-hpux*>: Remove a note on
GCC 4.3.
Remove details on how the HP assembler, which we document as not
working, breaks.
<hppa*-hp-hpux11>: Note that only the HP linker is supported.
Gerald Pfeifer [Sun, 17 Dec 2023 01:18:28 +0000 (09:18 +0800)]
doc: Remove references to buildstat.html
gcc:
PR other/69374
* doc/install.texi (Installing GCC): Remove reference to
buildstat.html.
(Testing): Ditto.
(Final install): Remove section on submitting information for
buildstat.html. Adjust the request for feedback.
Nathaniel Shead [Sun, 12 Nov 2023 00:54:43 +0000 (11:54 +1100)]
c++: Seed namespaces for bindings [PR106363]
Currently the first depset for an EK_BINDING is not seeded. This breaks
the attached testcase as then the namespace is not considered referenced
yet during streaming, but we've already finished importing.
There doesn't seem to be any particular reason I could find for skipping
the first depset for bindings, and removing the condition doesn't appear
to cause any test failures, so this patch removes that check.
PR c++/106363
gcc/cp/ChangeLog:
* module.cc (module_state::write_cluster): Don't skip first
depset for bindings.
gcc/testsuite/ChangeLog:
* g++.dg/modules/pr106363_a.C: New test.
* g++.dg/modules/pr106363_b.C: New test.
David Malcolm [Sat, 16 Dec 2023 21:19:36 +0000 (16:19 -0500)]
analyzer: add sarif properties for bounds checking diagnostics
As a followup to r14-6057-g12b67d1e13b3cf, add SARIF property bags
for -Wanalyzer-out-of-bounds, to help with debugging these warnings.
This was very helpful with PR analyzer/112792.
gcc/analyzer/ChangeLog:
* analyzer.cc: Include "tree-pretty-print.h" and
"diagnostic-event-id.h".
(tree_to_json): New.
(diagnostic_event_id_to_json): New.
(bit_offset_to_json): New.
(byte_offset_to_json): New.
* analyzer.h (tree_to_json): New decl.
(diagnostic_event_id_to_json): New decl.
(bit_offset_to_json): New decl.
(byte_offset_to_json): New decl.
* bounds-checking.cc: Include "diagnostic-format-sarif.h".
(out_of_bounds::maybe_add_sarif_properties): New.
(concrete_out_of_bounds::maybe_add_sarif_properties): New.
(concrete_past_the_end::maybe_add_sarif_properties): New.
(symbolic_past_the_end::maybe_add_sarif_properties): New.
* region-model.cc (region_to_value_map::to_json): New.
(region_model::to_json): New.
* region-model.h (region_to_value_map::to_json): New decl.
(region_model::to_json): New decl.
* store.cc (bit_range::to_json): New.
(byte_range::to_json): New.
* store.h (bit_range::to_json): New decl.
(byte_range::to_json): New decl.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Sat, 16 Dec 2023 21:16:33 +0000 (16:16 -0500)]
json: fix escaping of object keys
gcc/ChangeLog:
* json.cc (print_escaped_json_string): New, taken from
string::print.
(object::print): Use it for printing keys.
(string::print): Move implementation to
print_escaped_json_string.
(selftest::test_writing_objects): Add a key containing
quote, backslash, and control characters.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
This patch optimizes the compilation performance of std::is_function
by dispatching to the new __is_function built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_function): Use __is_function
built-in trait.
(is_function_v): Likewise. Optimize its implementation. Move
this under is_const_v as this depends on is_const_v.
Signed-off-by: Ken Matsui <kmatsui@gcc.gnu.org> Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
This patch optimizes the compilation performance of
std::is_member_function_pointer by dispatching to the new
__is_member_function_pointer built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_member_function_pointer): Use
__is_member_function_pointer built-in trait.
(is_member_function_pointer_v): Likewise.
Signed-off-by: Ken Matsui <kmatsui@gcc.gnu.org> Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
David Malcolm [Sat, 16 Dec 2023 14:03:16 +0000 (09:03 -0500)]
analyzer: use bit-level granularity for concrete bounds-checking [PR112792]
PR analyzer/112792 reports false positives from -fanalyzer's
bounds-checking on certain packed structs containing bitfields e.g.
in the Linux kernel's drivers/dma/idxd/device.c:
The root cause is that the bounds-checking is done using byte offsets
and ranges; in the above, an access of "pasid" is treated as a 32-bit
access starting one byte inside the union, thus accessing byte offsets
1-4 when only offsets 0-3 are valid.
This patch updates the bounds-checking to use bit offsets and ranges
wherever possible - for concrete offsets and capacities. In the above
accessing "pasid" is treated as bits 8-27 of a 32-bit region, fixing the
false positive.
Symbolic offsets and ranges are still handled at byte granularity.
gcc/analyzer/ChangeLog:
PR analyzer/112792
* bounds-checking.cc
(out_of_bounds::oob_region_creation_event_capacity): Rename
"capacity" to "byte_capacity". Layout fix.
(out_of_bounds::::add_region_creation_events): Rename
"capacity" to "byte_capacity".
(class concrete_out_of_bounds): Rename m_out_of_bounds_range to
m_out_of_bounds_bits and convert from a byte_range to a bit_range.
(concrete_out_of_bounds::get_out_of_bounds_bytes): New.
(concrete_past_the_end::concrete_past_the_end): Rename param
"byte_bound" to "bit_bound". Initialize m_byte_bound.
(concrete_past_the_end::subclass_equal_p): Update for renaming
of m_byte_bound to m_bit_bound.
(concrete_past_the_end::m_bit_bound): New field.
(concrete_buffer_overflow::concrete_buffer_overflow): Convert
param "range" from byte_range to bit_range. Rename param
"byte_bound" to "bit_bound".
(concrete_buffer_overflow::emit): Update for bits vs bytes.
(concrete_buffer_overflow::describe_final_event): Split
into...
(concrete_buffer_overflow::describe_final_event_as_bytes): ...this
(concrete_buffer_overflow::describe_final_event_as_bits): ...and
this.
(concrete_buffer_over_read::concrete_buffer_over_read): Convert
param "range" from byte_range to bit_range. Rename param
"byte_bound" to "bit_bound".
(concrete_buffer_over_read::emit): Update for bits vs bytes.
(concrete_buffer_over_read::describe_final_event): Split into...
(concrete_buffer_over_read::describe_final_event_as_bytes):
...this
(concrete_buffer_over_read::describe_final_event_as_bits): ...and
this.
(concrete_buffer_underwrite::concrete_buffer_underwrite): Convert
param "range" from byte_range to bit_range.
(concrete_buffer_underwrite::describe_final_event): Split into...
(concrete_buffer_underwrite::describe_final_event_as_bytes):
...this
(concrete_buffer_underwrite::describe_final_event_as_bits): ...and
this.
(concrete_buffer_under_read::concrete_buffer_under_read): Convert
param "range" from byte_range to bit_range.
(concrete_buffer_under_read::describe_final_event): Split into...
(concrete_buffer_under_read::describe_final_event_as_bytes):
...this
(concrete_buffer_under_read::describe_final_event_as_bits): ...and
this.
(region_model::check_region_bounds): Use bits for concrete values,
and rename locals to indicate whether we're dealing with bits or
bytes. Specifically, replace "num_bytes_sval" with
"num_bits_sval", and get it from reg's "get_bit_size_sval".
Replace "num_bytes_tree" with "num_bits_tree". Rename "capacity"
to "byte_capacity". Rename "cst_capacity_tree" to
"cst_byte_capacity_tree". Replace "offset" and
"num_bytes_unsigned" with "bit_offset" and "num_bits_unsigned"
respectively, converting from byte_offset_t to bit_offset_t.
Replace "out" and "read_bytes" with "bits_outside" and "read_bits"
respectively, converting from byte_range to bit_range. Convert
"buffer" from byte_range to bit_range. Replace "byte_bound" with
"bit_bound".
* region.cc (region::get_bit_size_sval): New.
(offset_region::get_bit_offset): New.
(offset_region::get_bit_size_sval): New.
(sized_region::get_bit_size_sval): New.
(bit_range_region::get_bit_size_sval): New.
* region.h (region::get_bit_size_sval): New vfunc.
(offset_region::get_bit_offset): New decl.
(offset_region::get_bit_size_sval): New decl.
(sized_region::get_bit_size_sval): New decl.
(bit_range_region::get_bit_size_sval): New decl.
* store.cc (bit_range::intersects_p): New, based on
byte_range::intersects_p.
(bit_range::exceeds_p): New, based on byte_range::exceeds_p.
(bit_range::falls_short_of_p): New, based on
byte_range::falls_short_of_p.
(byte_range::intersects_p): Delete.
(byte_range::exceeds_p): Delete.
(byte_range::falls_short_of_p): Delete.
* store.h (bit_range::intersects_p): New overload.
(bit_range::exceeds_p): New.
(bit_range::falls_short_of_p): New.
(byte_range::intersects_p): Delete.
(byte_range::exceeds_p): Delete.
(byte_range::falls_short_of_p): Delete.
gcc/testsuite/ChangeLog:
PR analyzer/112792
* c-c++-common/analyzer/out-of-bounds-pr112792.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Paul Thomas [Sat, 16 Dec 2023 13:26:47 +0000 (13:26 +0000)]
Fortran: Fix problems with class array function selectors [PR112834]
2023-12-16 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/112834
* match.cc (build_associate_name): Fix whitespace issues.
(select_type_set_tmp): If the selector is of unknown type, go
the SELECT TYPE selector to see if this is a function and, if
the result is available, use its typespec.
* parse.cc (parse_associate): Again, use the function result if
the type of the selector result is unknown.
* trans-stmt.cc (trans_associate_var): The expression has to be
of type class, for class_target to be true. Convert and fix
class functions. Pass the fixed expression.
Nathaniel Shead [Fri, 15 Dec 2023 23:59:03 +0000 (10:59 +1100)]
c++: Fix unchecked use of CLASSTYPE_AS_BASE [PR113031]
My previous commit (naively) assumed that a TREE_CODE of RECORD_TYPE or
UNION_TYPE was sufficient for optype to be considered a "class type".
However, this does not account for e.g. template type parameters of
record or union type. This patch corrects to check for CLASS_TYPE_P
before checking for as-base conversion.
PR c++/113031
gcc/cp/ChangeLog:
* constexpr.cc (cxx_fold_indirect_ref_1): Check for CLASS_TYPE
before using CLASSTYPE_AS_BASE.
Andrew Carlotti [Wed, 20 Sep 2023 11:24:31 +0000 (12:24 +0100)]
[aarch64] Add function multiversioning support
This adds initial support for function multiversioning on aarch64 using
the target_version and target_clones attributes. This loosely follows
the Beta specification in the ACLE [1], although with some differences
that still need to be resolved (possibly as follow-up patches).
Existing function multiversioning implementations are broken in various
ways when used across translation units. This includes placing
resolvers in the wrong translation units, and using symbol mangling that
callers to unintentionally bypass the resolver in some circumstances.
Fixing these issues for aarch64 will require modifications to our ACLE
specification. It will also require further adjustments to existing
middle end code, to facilitate different mangling and resolver
placement while preserving existing target behaviours.
The list of function multiversioning features specified in the ACLE is
also inconsistent with the list of features supported in target option
extensions. I intend to resolve some or all of these inconsistencies at
a later stage.
The target_version attribute is currently only supported in C++, since
this is the only frontend with existing support for multiversioning
using the target attribute. On the other hand, this patch happens to
enable multiversioning with the target_clones attribute in Ada and D, as
well as the entire C family, using their existing frontend support.
This patch also does not support the following aspects of the Beta
specification:
- The target_clones attribute should allow an implicit unlisted
"default" version.
- There should be an option to disable function multiversioning at
compile time.
- Unrecognised target names in a target_clones attribute should be
ignored (with an optional warning). This current patch raises an
error instead.
Andrew Carlotti [Tue, 19 Sep 2023 18:13:22 +0000 (19:13 +0100)]
Add support for target_version attribute
This patch adds support for the "target_version" attribute to the middle
end and the C++ frontend, which will be used to implement function
multiversioning in the aarch64 backend.
On targets that don't use the "target" attribute for multiversioning,
there is no conflict between the "target" and "target_clones"
attributes. This patch therefore makes the mutual exclusion in
C-family, D and Ada conditonal upon the value of the
expanded_clones_attribute target hook.
The "target_version" attribute is only added to C++ in this patch,
because this is currently the only frontend which supports
multiversioning using the "target" attribute. Support for the
"target_version" attribute will be extended to C at a later date.
Targets that currently use the "target" attribute for function
multiversioning (i.e. i386 and rs6000) are not affected by this patch.
gcc/ChangeLog:
* attribs.cc (decl_attributes): Pass attribute name to target.
(is_function_default_version): Update comment to specify
incompatibility with target_version attributes.
* cgraphclones.cc (cgraph_node::create_version_clone_with_body):
Call valid_version_attribute_p for target_version attributes.
* defaults.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): New macro.
* target.def (valid_version_attribute_p): New hook.
* doc/tm.texi.in: Add new hook.
* doc/tm.texi: Regenerate.
* multiple_target.cc (create_dispatcher_calls): Remove redundant
is_function_default_version check.
(expand_target_clones): Use target macro to pick attribute name.
* targhooks.cc (default_target_option_valid_version_attribute_p):
New.
* targhooks.h (default_target_option_valid_version_attribute_p):
New.
* tree.h (DECL_FUNCTION_VERSIONED): Update comment to include
target_version attributes.
Andrew Carlotti [Mon, 6 Nov 2023 16:20:47 +0000 (16:20 +0000)]
ada: Improve attribute exclusion handling
Change the handling of some attribute mutual exclusions to use the
generic attribute exclusion lists, and fix some asymmetric exclusions by
adding the exclusions for always_inline after noinline or target_clones.
Aside from the new always_inline exclusions, the only change is
functionality is the choice of warning message displayed. All warnings
about attribute mutual exclusions now use the same message.
Andrew Carlotti [Mon, 6 Nov 2023 16:10:55 +0000 (16:10 +0000)]
c-family: Simplify attribute exclusion handling
This patch changes the handling of mutual exclusions involving the
target and target_clones attributes to use the generic attribute
exclusion lists. Additionally, the duplicate handling for the
always_inline and noinline attribute exclusion is removed.
The only change in functionality is the choice of warning message
displayed - due to either a change in the wording for mutual exclusion
warnings, or a change in the order in which different checks occur.
Andrew Carlotti [Wed, 20 Sep 2023 11:22:09 +0000 (12:22 +0100)]
aarch64: Add cpu feature detection to libgcc
This is added to enable function multiversioning, but can also be used
directly. The interface is chosen to match that used in LLVM's
compiler-rt, to facilitate cross-compiler compatibility.
The content of the patch is derived almost entirely from Pavel's prior
contributions to compiler-rt/lib/builtins/cpu_model.c. I have made minor
changes to align more closely with GCC coding style, and to exclude any code
from other LLVM contributors, and am adding this to GCC with Pavel's approval.
libgcc/ChangeLog:
* config/aarch64/t-aarch64: Include cpuinfo.c
* config/aarch64/cpuinfo.c: New file
(__init_cpu_features_constructor) New.
(__init_cpu_features_resolver) New.
(__init_cpu_features) New.
Andrew Carlotti [Fri, 24 Nov 2023 17:31:51 +0000 (17:31 +0000)]
aarch64: Fix +nopredres, +nols64 and +nomops
For native cpu feature detection, certain features have no entry in
/proc/cpuinfo, so have to be assumed to be present whenever the detected
cpu is supposed to support that feature.
However, the logic for this was mistakenly implemented by excluding
these features from part of aarch64_get_extension_string_for_isa_flags.
This function is also used elsewhere when canonicalising explicit
feature sets, which may require removing features that are normally
implied by the specified architecture version.
This change reenables generation of +nopredres, +nols64 and +nomops
during canonicalisation, by relocating the misplaced native cpu
detection logic.
gcc/ChangeLog:
* common/config/aarch64/aarch64-common.cc
(struct aarch64_option_extension): Remove unused field.
(all_extensions): Ditto.
(aarch64_get_extension_string_for_isa_flags): Remove filtering
of features without native detection.
* config/aarch64/driver-aarch64.cc (host_detect_local_cpu):
Explicitly add expected features that lack cpuinfo detection.
Andrew Carlotti [Fri, 24 Nov 2023 17:06:07 +0000 (17:06 +0000)]
aarch64: Fix +nocrypto handling
Additionally, replace all checks for the AARCH64_FL_CRYPTO bit with
checks for (AARCH64_FL_AES | AARCH64_FL_SHA2) instead. The value of the
AARCH64_FL_CRYPTO bit within isa_flags is now ignored, but it is
retained because removing it would make processing the data in
option-extensions.def significantly more complex.
This bug should have been picked up by an existing test, but a missing
newline meant that the pattern incorrectly allowed "+crypto+nocrypto".
gcc/ChangeLog:
* common/config/aarch64/aarch64-common.cc
(aarch64_get_extension_string_for_isa_flags): Fix generation of
the "+nocrypto" extension.
* config/aarch64/aarch64.h (AARCH64_ISA_CRYPTO): Remove.
(TARGET_CRYPTO): Remove.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
Don't use TARGET_CRYPTO.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/options_set_4.c: Add terminating newline.
* gcc.target/aarch64/options_set_27.c: New test.
projects / thirdparty / gcc.git / log
