Arnd Bergmann [Fri, 14 Mar 2025 17:42:34 +0000 (18:42 +0100)]
Merge tag 'tegra-for-6.15-arm64-dt-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.15-rc1
This contains a patch to remove an unusable key that was erroneously
exposed as well as a fix to support GPUs with a large amount of video
memory on IGX Orin.
Finally, some additional devices, such as a temperature sensor, are
enabled on Jetson TX1, the output voltage of some pins is adjusted and
the VDD_LCD_1V8_DIS power supply now uses the correct enable GPIO.
* tag 'tegra-for-6.15-arm64-dt-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: p2180: Add TMP451 temperature sensor node
arm64: tegra: p2597: Enable TCA9539 as IRQ controllers
arm64: tegra: Define pinmuxing for gpio pads on Tegra210
arm64: tegra: p2597: Fix gpio for vdd-1v8-dis regulator
arm64: tegra: Resize aperture for the IGX PCIe C5 slot
arm64: tegra: Remove the Orin NX/Nano suspend key
arm64: dts: amd/seattle: Move and simplify fixed clocks
The fixed clocks are not part of "simple-bus", so move them out of the
bus to the top-level. In the process, use the preferred node names of
"clock-<freq>". There's also little reason to have multiple fixed
clocks at the same frequencies, so remove them keeping the labels
to minimize the change.
Diogo Ivo [Mon, 24 Feb 2025 12:17:37 +0000 (12:17 +0000)]
arm64: tegra: Define pinmuxing for gpio pads on Tegra210
As the gpio pads are capable of operating at either 1.8V or 3.3V add
both options to the pinmuxing so that the appropriate level can be set
depending on the voltage of the regulator driving the pads.
Diogo Ivo [Mon, 24 Feb 2025 12:17:36 +0000 (12:17 +0000)]
arm64: tegra: p2597: Fix gpio for vdd-1v8-dis regulator
According to the board schematics the enable pin of this regulator is
connected to gpio line #9 of the first instance of the TCA9539
GPIO expander, so adjust it.
Jon Hunter [Thu, 16 Jan 2025 15:19:03 +0000 (15:19 +0000)]
arm64: tegra: Resize aperture for the IGX PCIe C5 slot
Some discrete graphics cards such as the NVIDIA RTX A6000 support
resizable BARs. When connecting an A6000 card to the NVIDIA IGX Orin
platform, resizing the BAR1 aperture to 8GB fails because the current
device-tree configuration for the PCIe C5 slot cannot support this.
Fix this by updating the device-tree 'reg' and 'ranges' properties for
the PCIe C5 slot to support this.
Ninad Malwade [Thu, 6 Feb 2025 22:40:34 +0000 (22:40 +0000)]
arm64: tegra: Remove the Orin NX/Nano suspend key
As per the Orin Nano Dev Kit schematic, GPIO_G.02 is not available
on this device family. It should not be used at all on Orin NX/Nano.
Having this unused pin mapped as the suspend key can lead to
unpredictable behavior for low power modes.
Orin NX/Nano uses GPIO_EE.04 as both a "power" button and a "suspend"
button. However, we cannot have two gpio-keys mapped to the same
GPIO. Therefore remove the "suspend" key.
Thierry Reding [Thu, 6 Mar 2025 17:50:35 +0000 (18:50 +0100)]
dt-bindings: Document Tegra114 HDA support
The HDA hardware on Tegra114 is almost identical to the one found on
Tegra30 or Tegra124. Add a compatible string to allow matching in case
it's ever needed. Typically the match on Tegra30 should be sufficient.
Arnd Bergmann [Thu, 6 Mar 2025 15:48:53 +0000 (16:48 +0100)]
Merge tag 'mtk-dts64-for-v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DTS updates for v6.15
This adds new SoCs and new machines, other than improving support for
currently supported ones.
In particular, for SoCs:
- Airoha EN7581 gets support for its SCU clock controller, SPI NAND,
hardware RNG, pinctrl, and i2c controllers;
- MediaTek MT8365 SoC gets support for all of its Display Controller
components;
- MediaTek Genio 510 MT8370 - a lower binned variant of Genio 700
MT8390 (which, in turn, is the same as MT8188) - is introduced;
- MT8188 gets support for more Display Controller components (DSC
and MERGE), for the tertiary MSDC (eMMC/SD/SDIO) controller, and
for the MTU3 USB DRD controllers;
- MT8195 and MT8188 both get migrated to the new OF Graph used for
defining a pipeline for the Display Controller components (as
this was previously hardcoded per-board in the drm driver, ugh!);
..and for boards:
- Google Kukui (MT8183) is switched to Elan touchscreen driver
instead of hid-over-i2c to fix probe failures in some cases;
- Google Cherry (MT8195) and Geralt (MT8188) Chromebooks get
migrated to using OF Graph for defining their board specific
part of the display pipeline;
- MediaTek Genio 350 (mt8365) EVK board adds support for HDMI output
through the iTE IT66121 chip, and for DSI output to the Startek
KD070FHFID015 display;
- MediaTek Genio 510 EVK board is introduced with a common devicetree
between mt8390 and mt8370 (Genio 700 and Genio 510) EVKs;
- MediaTek Genio 700 (and 510) EVKs get support for their integrated
dual Digital Microphones, for their RichTek RT1715 USB Type-C
Controller with USB-PD capability, the iTE IT5205 Alternate Mode
Passive MUX (USB3.1/DP1.4), and for USB Gadget/Host switching
through the MTU3 DRD Controller, other than for USB in general;
- MediaTek Genio 1200 EVK gets support for its MediaTek MT6360 PMIC
integrated Type-C Controller, and the IT5205 MUX;
- Radxa NIO-12L gets its DSI display pipeline preconfigured and also
the introduction of a devicetree overlay for the official Radxa
8HD DSI panel, enabling display output over DSI.
And fixes/cleanups:
- MT8173 gets fixes for bindings validation: PMIC node drops the
unnecessary address/size cells, disp-pwm gets its compatibles
list fixed (as mt6595 was not expected there), and some nodes
got the right name (clock controllers were disguides as power
controllers, and intpol was changed to interrupt-controller);
- MT8188-based (MT8390) Genio boards get a fix for duplicated
regulator name;
- MT6359 PMIC gets fixes for audio-codec node validation.
* tag 'mtk-dts64-for-v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (35 commits)
arm64: dts: mediatek: mt8395-radxa-nio-12l: Add Radxa 8 HD panel
arm64: dts: mediatek: mt8395-nio-12l: Prepare MIPI DSI port
arm64: dts: mediatek: mt8390-genio-common: Add delay codec for DMIC
arm64: dts: mediatek: mt8390-genio-common: Add routes for DMIC
arm64: dts: mediatek: mt8395-nio-12l: Preconfigure DSI0 pipeline
arm64: mediatek: mt8195-cherry: Add graph for eDP and DP displays
arm64: dts: mediatek: mt8195: Add base display controller graph
arm64: dts: airoha: en7581: Fix clock-controller address
arm64: dts: airoha: en7581: Add more nodes to EN7581 SoC evaluation board
arm64: dts: mediatek: mt8390-genio-common: Configure touch vreg pins
arm64: dts: mediatek: mt8188-geralt: Add graph for DSI and DP displays
arm64: dts: mediatek: mt8188: Add base display controller graph
arm64: dts: mediatek: mt8390-genio-700: Add USB, TypeC Controller, MUX
arm64: dts: mediatek: mt8188: Add MTU3 nodes and correctly describe USB
dt-bindings: usb: mediatek,mtk-xhci: Add port for SuperSpeed EP
arm64: dts: mediatek: mt8395-genio-1200-evk: add support for TCPC port
dt-bindings: usb: mtu3: Add ports property
arm64: dts: mediatek: mt8390-genio-common: Fix duplicated regulator name
arm64: dts: mediatek: mt8183: Switch to Elan touchscreen driver
arm64: dts: mediatek: mt6359: fix dtbs_check error for audio-codec
...
Arnd Bergmann [Thu, 6 Mar 2025 15:45:49 +0000 (16:45 +0100)]
Merge tag 'juno-updates-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 FVP/Vexpress/Juno updates for v6.15
The main and bulk of the addition this time is the support for the Arm
reference Morello System Development Platform (SDP).
The Morello architecture is an experimental extension to Armv8.2-A,
enhancing the AArch64 execution state with capabilities for fine-grained
memory protection and scalable software compartmentalization. However
these changes doesn't add any of the support for security enhancements.
This is mainly adding device tree support for Morello SDP.
The platform iteslf is shipped with ACPI firmware. However, since the
ACPI bindings for GPU, DPU, I2C, I2S,..etc are not well defined or not
provided in the shipped ACPI firmware, there is a need for the device
tree as alternative for the developers focusing on those features.
The CPU is called rainier, the architecture is Morello and the platform
is Morello SDP board. There is FVP equivalent of the same though they
are not completely in feature parity with the real hardware.
These changes provide the initial support for Morello SDP and FVP
platforms.
Apart from this, we have an update to add support for secondary cores
on Corstone1000 FVP platform.
* tag 'juno-updates-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: corstone1000: Add definitions for secondary CPU cores
MAINTAINERS: Add Vincenzo Frascino as Arm Morello Maintainer
arm64: dts: morello: Add support for fvp dts
arm64: dts: morello: Add support for soc dts
arm64: dts: morello: Add support for common functionalities
dt-bindings: arm-pmu: Add support for ARM Rainier PMU
dt-bindings: arm: Add Rainier compatibility
dt-bindings: arm: Add Morello fvp compatibility
dt-bindings: arm: Add Morello compatibility
arm64: Kconfig: Update description for CONFIG_ARCH_VEXPRESS
Arnd Bergmann [Thu, 6 Mar 2025 15:44:10 +0000 (16:44 +0100)]
Merge tag 'asahi-soc-dt-6.15-v2' of https://github.com/AsahiLinux/linux into soc/dt
Apple SoC DT updates for 6.15, second batch:
- Added a missing p-state for iPad mini 4
- Added SPI controller nodes for M1 and M2 devices
- Added SPI NOR flash nodes and NVRAM partitions
- Added touchbar digitizer nodes for M1 and M2 devices
* tag 'asahi-soc-dt-6.15-v2' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: Add touchbar digitizer nodes
arm64: dts: apple: Add SPI NOR nvram partition to all devices
arm64: dts: apple: t600x: Add spi controller nodes
arm64: dts: apple: t8112: Add spi controller nodes
arm64: dts: apple: t8103: Add spi controller nodes
arm64: dts: apple: t8103: Fix spi4 power domain sort order
arm64: dts: apple: t7000: Add missing CPU p-state 7 for J96 and J97
Arnd Bergmann [Thu, 6 Mar 2025 15:41:42 +0000 (16:41 +0100)]
Merge tag 'renesas-dts-for-v6.15-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.15
- Add support for the second and third Ethernet interfaces on the Gray
Hawk Single development board,
- Add Image Signal Processor helper block (FCPVX and VSPX) support for
the R-Car V3U and V4M SoCs,
- Add Watchdog and System Controller support for the RZ/G3E SoC and
the RZ/G3E SMARC Carrier-II EVK development board,
- Add initial support for the Yuridenki-Shokai Kakip and MYIR Remi Pi
boards,
- Add support for the spare UART and PMOD serial ports on the RZ/G3S
SMARC Carrier II board,
- Add a CPU Operating Performance Points table for the RZ/G3S SoC,
- Add boot phase tags on R-Car Gen2/3/4 and RZ/G2 boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.15-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: renesas: r9a06g032: Fix UART dma channel order
arm64: dts: renesas: rzg2: Add boot phase tags
arm64: dts: renesas: rcar: Add boot phase tags
ARM: dts: renesas: rcar-gen2: Add boot phase tags
arm64: dts: renesas: white-hawk-csi-dsi: Use names for CSI-2 data line orders
arm64: dts: renesas: ulcb/kf: Use TDM Split Mode for capture
arm64: dts: renesas: Add initial support for MYIR Remi Pi
arm64: dts: renesas: r9a08g045: Add OPP table
arm64: dts: renesas: r9a09g057: Enable SYS node
arm64: dts: renesas: r9a09g047: Add SYS node
arm64: dts: renesas: r9a08g045: Enable SYS node
arm64: dts: renesas: r8a779f0: Disable rswitch ports by default
arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1
arm64: dts: renesas: rzg3s-smarc: Enable SCIF3
arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches
arm64: dts: renesas: r8a779g0: Restore sort order
arm64: dts: renesas: s4sk: Fix ethernet0 alias for rswitch
arm64: dts: renesas: spider-ethernet: Add ethernetN aliases for rswitch
arm64: dts: renesas: s4sk: Access rswitch ports via phandles
arm64: dts: renesas: spider-ethernet: Access rswitch ports via phandles
...
Arnd Bergmann [Thu, 6 Mar 2025 15:40:30 +0000 (16:40 +0100)]
Merge tag 'renesas-dt-bindings-for-v6.15-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.15
- Document support for the Yuridenki-Shokai Kakip (based on RZ/V2H)
and MYIR Remi Pi (based on RZ/G2L) boards,
- Document support for the RZ/G3E System Controller.
Julien Massot [Tue, 4 Mar 2025 14:01:55 +0000 (15:01 +0100)]
arm64: dts: mediatek: mt8395-nio-12l: Prepare MIPI DSI port
This board can use a MIPI-DSI panel on the DSI0 connector: in
preparation for adding an overlay for the Radxa Display 8HD,
add the backlight, and some definitions for pins available
through the DSI0 port.
arm64: dts: mediatek: mt8390-genio-common: Add delay codec for DMIC
The signal from the dual digital microphones connected to the DMIC_BE
takes 30ms to settle after being enabled. Add a dmic-codec with
corresponding wakeup-delay-ms to prevent an initial "pop" sound when
recording with the microphones.
Co-developed-by: Zoran Zhan <zoran.zhan@mediatek.com> Signed-off-by: Zoran Zhan <zoran.zhan@mediatek.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250225-genio700-dmic-v2-8-3076f5b50ef7@collabora.com
[Angelo: Resolved merge conflicts] Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arm64: dts: mediatek: mt8390-genio-common: Add routes for DMIC
Add necessary routes for the onboard dual DMIC present on the Genio
700/510 EVK. The dmic is supplied by micbias0 and micbias2, and inputs
into the MT8188 DMIC DAI.
Co-developed-by: parkeryang <Parker.Yang@mediatek.com> Signed-off-by: parkeryang <Parker.Yang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20250225-genio700-dmic-v2-6-3076f5b50ef7@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This board can use a MIPI-DSI panel on the DSI0 connector: in
preparation for adding an overlay for the Radxa Display 8HD,
add a pipeline connecting VDOSYS0 components to DSI0.
This pipeline remains disabled by default, as it is expected
to be enabled only by a devicetree overlay that declares the
actual DSI panel node, completing the graph.
arm64: mediatek: mt8195-cherry: Add graph for eDP and DP displays
The base SoC devicetree now defines a display controller graph:
connect the board specific outputs (eDP internal display, DP
external display) to fully migrate Cherry and make it finally
possible to make Chromebooks and other board types to coexist
without per-board driver modifications.
arm64: dts: mediatek: mt8195: Add base display controller graph
The display related IPs in MT8195 are flexible and support being
interconnected with different instances of DDP IPs and/or with
different DDP IPs, forming a full Display Data Path that ends
with an actual display output, which is board specific.
Add a common graph in the main mt8195.dtsi devicetree, which is
shared between all of the currently supported boards.
All boards featuring any display functionality will extend this
common graph to hook the display controller of the SoC to their
specific output port(s).
Add a pinctrl configuration for the Touchscreen IC's power line
to make sure that the pin is configured as GPIO and to stop
relying on correct pin configuration from bootloader.
arm64: dts: mediatek: mt8188-geralt: Add graph for DSI and DP displays
The base SoC devicetree now defines a display controller graph:
connect the board specific outputs (eDP internal display, DP
external display) to fully migrate Cherry and make it finally
possible to make Chromebooks and other board types to coexist
without per-board driver modifications.
arm64: dts: corstone1000: Add definitions for secondary CPU cores
Add cpu{1-3} device nodes to the corstone1000 device tree to enable the
support for secondary CPU cores.
This update facilitates symmetric multiprocessing (SMP) support on the
corstone1000 Fixed Virtual Platform (FVP), allowing the secondary cores
to be properly initialised and utilised.
Only FVP platform will have SMP support and hence the secondary cpu
definitions are not added to corstone1000.dtsi.
The Morello architecture is an experimental extension to Armv8.2-A,
which extends the AArch64 state with the principles proposed in
version 7 of the Capability Hardware Enhanced RISC Instructions
(CHERI) ISA.
The Morello architecture is an experimental extension to Armv8.2-A,
which extends the AArch64 state with the principles proposed in
version 7 of the Capability Hardware Enhanced RISC Instructions
(CHERI) ISA.
arm64: dts: morello: Add support for common functionalities
The Morello architecture is an experimental extension to Armv8.2-A,
which extends the AArch64 state with the principles proposed in
version 7 of the Capability Hardware Enhanced RISC Instructions
(CHERI) ISA.
The Morello Platform (soc) and the Fixed Virtual Platfom (fvp) share
some functionalities that have conveniently been included in
morello.dtsi to avoid duplication.
Introduce morello.dtsi.
Note: Morello fvp will be introduced with a future patch series.
Add compatibility to Arm Morello System Development Platform.
Note: Morello is at the same time the name of an Architecture [1], an SoC
[2] and a Board [2].
To distinguish in between Architecture/SoC and Board we refer to the first
as arm,morello and to the second as arm,morello-sdp.
Adds device tree entries for the touchbar digitizer
Co-developed-by: Janne Grunau <j@jannau.net> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Neal Gompa <neal@gompa.dev> Acked-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com> Link: https://lore.kernel.org/r/20250225-z2-dts-v1-1-df101a7c17c8@gmail.com Signed-off-by: Sven Peter <sven@svenpeter.dev>
arm64: dts: mediatek: mt8188: Add base display controller graph
The display related IPs in MT8188 are flexible and support being
interconnected with different instances of DDP IPs and/or with
different DDP IPs, forming a full Display Data Path that ends
with an actual display output, which is board specific.
Add a common graph in the main mt8188.dtsi devicetree, which is
shared between all of the currently supported boards.
All boards featuring any display functionality will extend this
common graph to hook the display controller of the SoC to their
specific output port(s).
This board features multiple USB connectors:
* One Type-C connector with Power Delivery and Alt. Modes;
* One MicroUSB connector, also used for bootloader SW download;
* One USB through the RaspberryPi-compatible pins header.
Add configuration for the MTU3 controllers providing OTG support
with role switching both on the MicroUSB port, RPi pins header,
and the Type-C port found on this board.
Moreover, add the Richtek RT1715 Type-C Power Delivery Controller
which manages current source/sink, linked to the iTE IT5205 Type-C
Alternate Mode Passive Mux, handling both mode switching between
USB (up to 3.1 Gen2 10Gbps) and DisplayPort (four lanes, DP1.4,
op to 8.1Gbps) and plug orientation switching.
All USB ports reside on different controller instances, and all of
them support host or gadget and can be configured as desired at
runtime.
arm64: dts: mediatek: mt8188: Add MTU3 nodes and correctly describe USB
The MT8188 SoC has three USB controllers, and all of them are behind
the MTU3 DRD controller.
Add the missing MTU3 nodes, default disabled, for all USB controllers
and move the related XHCI nodes to be children of their MTU3 DRD to
correctly describe the SoC.
In order to retain USB functionality on all of the MT8188 and MT8390
boards, also move the vusb33 supply and enable the relevant MTU3 nodes
with special attention to the MT8188 Geralt Chromebooks, where it was
necessary to set the dr_mode of all MTU3 controllers to host to avoid
interfering with the EC performing DRD on its own.
dt-bindings: usb: mediatek,mtk-xhci: Add port for SuperSpeed EP
Add a port used to connect the SuperSpeed output endpoint to a
Type-C connector.
Note that the MediaTek XHCI controllers are always in front of a
different controller handling the USB HS (usually, MTU3), so the
only port that this controller provides is SuperSpeed, while the
HighSpeed one comes from elsewhere.
Fabien Parent [Mon, 24 Feb 2025 11:49:34 +0000 (19:49 +0800)]
arm64: dts: mediatek: mt8395-genio-1200-evk: add support for TCPC port
Enable USB Type-C support on MediaTek MT8395 Genio 1200 EVK by adding
configuration for TCPC Port, USB-C connector, MUX IT5205 and related
settings.
Configure dual role switch capability, set up PD (Power Delivery) profiles,
and establish endpoints for SS (SuperSpeed) and HS (HighSpeed) USB.
Update pinctrl configurations for U3 P0 VBus default pins and set dr_mode
to "otg" for OTG (On-The-Go) mode operation.
Add ITE IT5205 (TYPEC MUX) under I2C2 bus and configure its properties;
also add references and configurations to 'typec-mux' node.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Yow-Shin Liou <yow-shin.liou@mediatek.com> Signed-off-by: Simon Sun <simon.sun@yunjingtech.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20250224114934.3583191-1-macpaul.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Macpaul Lin [Thu, 20 Feb 2025 14:22:30 +0000 (22:22 +0800)]
dt-bindings: usb: mtu3: Add ports property
Define the ports property in the mediatek,mtu3 device tree binding schema.
Include definitions for port@0 and port@1, specifying their roles as
High Speed (HS) and Super Speed (SS) data buses, respectively.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20250220142230.2530583-1-macpaul.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Hsin-Te Yuan [Mon, 20 Jan 2025 03:35:29 +0000 (03:35 +0000)]
arm64: dts: mediatek: mt8183: Switch to Elan touchscreen driver
After commit 2be404486c05 ("HID: i2c-hid-of: Add reset GPIO support to
i2c-hid-of"), the i2c-hid-of driver used by some mt8183 devices resets
the touchscreen without having enough post-reset delay. This makes those
touchscreen fail to get probed.
Switch to Elan touchscreen driver, which has enough post-reset delay.
Fixes: 2be404486c05 ("HID: i2c-hid-of: Add reset GPIO support to i2c-hid-of") Signed-off-by: Hsin-Te Yuan <yuanhsinte@chromium.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
ARM: dts: renesas: r9a06g032: Fix UART dma channel order
make dtbs_check:
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:0: 'tx' was expected
from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:1: 'rx' was expected
from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
...
The DT bindings specify a fixed order of the channels in the dmas and
dma-names properties, while the Linux driver does not care.
Get rid of the warnings by changing the order in the DTS to match the
bindings.
Marek Vasut [Sun, 9 Feb 2025 18:05:06 +0000 (19:05 +0100)]
arm64: dts: renesas: rzg2: Add boot phase tags
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas RZ/G2 SoCs.
All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
Marek Vasut [Sun, 9 Feb 2025 18:05:05 +0000 (19:05 +0100)]
arm64: dts: renesas: rcar: Add boot phase tags
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car SoCs.
All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
Marek Vasut [Sun, 9 Feb 2025 18:05:04 +0000 (19:05 +0100)]
ARM: dts: renesas: rcar-gen2: Add boot phase tags
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car Gen2 SoCs.
All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
arm64: dts: renesas: white-hawk-csi-dsi: Use names for CSI-2 data line orders
The symbolic names for the line-orders are now available in
<dt-bindings/media/video-interfaces.h>. Switch to them instead of using
their numerical values.
arm64: dts: renesas: r8a779f0: Disable rswitch ports by default
The Renesas Ethernet Switch has three independent ports. Each port can
act as a separate interface, and can be enabled or disabled
independently. Currently all ports are enabled by default, hence board
DTS files that enable the switch must disable all unused ports
explicitly.
Disable all ports by default, and explicitly enable ports that are used,
next to their configuration.
Claudiu Beznea [Mon, 20 Jan 2025 13:09:34 +0000 (15:09 +0200)]
arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches
There are different switches available on both the RZ/G3S SMARC Module and
RZ SMARC Carrier II boards. These switches are used to route different SoC
signals to different parts available on board.
These switches are described in device trees through macros. These macros
are set accordingly such that the resulted compiled dtb to describe the
on-board switches states.
The SCIF1 depends on the state of the SW_CONFIG3 and SW_OPT_MUX4 switches.
SCIF1 can be enabled through a device tree overlay. To manage all switches
in a unified state and allow users to configure the output device tree, add
a file that contains all switch definitions and states.
Commit prepares the code to enable SCIF1 on the RZ/G3S overlay.
Marek Vasut [Sat, 18 Jan 2025 11:13:12 +0000 (12:13 +0100)]
arm64: dts: renesas: s4sk: Fix ethernet0 alias for rswitch
Each rswitch port TSNn has a dedicated MAC address assigned to it, so
does AVB MAC. The MAC addresses for each rswitch port and AVB, four in
total, are stored in the FPGA populated on the board and can be read out
via I2C from bus i2c@e66e0000 address 0x70 offsets 0x58 for AVB and
0x60, 0x68, 0x70 for TSNn.
There is no single MAC address assigned to the rswitch itself, there are
three of them, one for each rswitch port. Instead of ethernet0 alias
for rswitch itself, describe aliases ethernet0, ethernet1 for each
enabled rswitch port. This allows U-Boot to insert MAC addresses from
its environment variables ethaddr/eth1addr/eth2addr into each rswitch
port nodes, so Linux can read and use one unique MAC address for each
rswitch port.
Note that it is unlikely this would break existing rswitch driver
operation in the Linux kernel, because as of right now, the rswitch
driver already calls of_get_ethdev_address() for each port to read
out the MAC address of each rswitch port DT node. If that is missing,
it falls back to MAC address settings read from the hardware itself.
If that also fails, it uses a random MAC address.
Marek Vasut [Sat, 18 Jan 2025 11:13:11 +0000 (12:13 +0100)]
arm64: dts: renesas: spider-ethernet: Add ethernetN aliases for rswitch
The rswitch has three independent ports which each can act as a separate
interface with its own MAC address. Describe DT aliases ethernet0,
ethernet1, ethernet2 for each rswitch port in DT. This allows U-Boot to
insert MAC addresses from its environment variables
ethaddr/eth1addr/eth2addr into each rswitch port nodes, so Linux can
read and use one unique MAC address for each rswitch port.
Note that it is unlikely this would break existing rswitch driver
operation in the Linux kernel, because as of right now, the rswitch
driver already calls of_get_ethdev_address() for each port to read
out the MAC address of each rswitch port DT node. If that is missing,
it falls back to MAC address settings read from the hardware itself.
If that also fails, it uses a random MAC address.
Marek Vasut [Sat, 18 Jan 2025 11:13:10 +0000 (12:13 +0100)]
arm64: dts: renesas: s4sk: Access rswitch ports via phandles
The r8a779f0.dtsi now contains labels for each rswitch port in the form
'rswitch_portN'. Use those to access rswitch ports and slightly reduce
the depth of this board DT. No functional change.
Marek Vasut [Sat, 18 Jan 2025 11:13:09 +0000 (12:13 +0100)]
arm64: dts: renesas: spider-ethernet: Access rswitch ports via phandles
The r8a779f0.dtsi now contains labels for each rswitch port in the form
'rswitch_portN'. Use those to access rswitch ports and slightly reduce
the depth of this board DT. No functional change.
Marek Vasut [Sat, 18 Jan 2025 11:13:08 +0000 (12:13 +0100)]
arm64: dts: renesas: r8a779f0: Add labels for rswitch ports
Introduce labels for each rswitch port in the form 'rswitch_portN'.
Those can be used to access rswitch port nodes directly, which is going
to be useful in reducing DT indentation slightly as well as in the DT
/aliases node to reference the rswitch ports as ethernetN interfaces.
No functional change.
arm64: dts: renesas: Add initial device tree for Yuridenki-Shokai Kakip board
Add basic support for the Yuridenki-Shokai Kakip board based on
R9A09G057H48, including:
- Memory
- OSTM0 - OSTM7
- Pin Control
- Input clocks
- SCIF
- SDHI0
arm64: dts: renesas: eagle-function-expansion: Align GPIO hog name with bindings
Bindings expect GPIO hog names to end with 'hog' suffix, so correct it
to fix dtbs_check warning:
r8a77970-eagle-function-expansion.dtb: gpio@27: 'vin0_adv7612_en' does not match any of the regexes: '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$', 'pinctrl-[0-9]+'
arm64: dts: renesas: r8a779h0: Remove #address- and #size-cells from AVB[0-2]
When describing the PHYs connected to AVB1 and AVB2, mdio nodes will be
needed to describe the connections, and each mdio node will need to
contain these two properties instead. This will make the #address-cells
and #size-cells described in the base SoC include file redundant and
they will produce warnings, remove them.
In an effort to keep all three AVB nodes style consistent add an mdio
node to AVB0 already described and rename the phy node to better
describe the PHY that is connected to AVB0 before adding more PHYs.
arm64: dts: renesas: r8a77990: Re-add voltages to OPP table
When CONFIG_ENERGY_MODEL=y:
cpu cpu0: EM: invalid perf. state: -22
When removing the (incorrect) voltages from the Operating Points
Parameters tables, it was assumed they were optional, and unused, when
none of the CPU nodes is tied to a regulator using the "cpu-supply"
property. This assumption turned out to be incorrect, causing the
reported error message.
Fix this by re-adding the (correct) voltages. Note that because all
voltages are identical, all operating points are considered to have the
same efficiency, and the energy model always picks the one with the
highest clock rate.
arm64: dts: renesas: r8a774c0: Re-add voltages to OPP table
When CONFIG_ENERGY_MODEL=y:
cpu cpu0: EM: invalid perf. state: -22
When removing the (incorrect) voltages from the Operating Points
Parameters tables, it was assumed they were optional, and unused, when
none of the CPU nodes is tied to a regulator using the "cpu-supply"
property. This assumption turned out to be incorrect, causing the
reported error message.
Fix this by re-adding the (correct) voltages. Note that because all
voltages are identical, all operating points are considered to have the
same efficiency, and the energy model always picks the one with the
highest clock rate.
Janne Grunau [Tue, 3 Dec 2024 07:58:01 +0000 (08:58 +0100)]
arm64: dts: apple: Add SPI NOR nvram partition to all devices
All known M1* and M2* devices use an identical SPI NOR flash
configuration with a partition containing a non-volatile key:value
storage. Use a .dtsi and include it for every device.
The nvram partition parameters itself depend on the version of the
installed Apple iboot boot loader. m1n1 will fill in the current values
provided by Apple's iboot.
Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Macpaul Lin [Mon, 17 Feb 2025 11:37:36 +0000 (19:37 +0800)]
arm64: dts: mediatek: mt6359: fix dtbs_check error for audio-codec
This change fixes these dtbs_check errors for audio-codec:
1. pmic: 'mt6359codec' does not match any of the regexes: 'pinctrl-[0-9]+'
- Replace device node name to generic 'audio-codec'
2. pmic: regulators: 'compatible' is a required property
- Add 'mediatek,mt6359-codec' to compatible.
Fixes: 3b7d143be4b7 ("arm64: dts: mt6359: add PMIC MT6359 related nodes") Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250217113736.1867808-1-macpaul.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Linus Torvalds [Sun, 16 Feb 2025 20:58:51 +0000 (12:58 -0800)]
Merge tag 'kbuild-fixes-v6.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:
- Fix annoying logs when building tools in parallel
- Fix the Debian linux-headers package build again
- Fix the target triple detection for userspace programs on Clang
* tag 'kbuild-fixes-v6.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
modpost: Fix a few typos in a comment
kbuild: userprogs: fix bitsize and target detection on clang
kbuild: fix linux-headers package build when $(CC) cannot link userspace
tools: fix annoying "mkdir -p ..." logs when building tools in parallel
Linus Torvalds [Sun, 16 Feb 2025 20:54:42 +0000 (12:54 -0800)]
Merge tag 'driver-core-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core api addition from Greg KH:
"Here is a driver core new api for 6.14-rc3 that is being added to
allow platform devices from stop being abused.
It adds a new 'faux_device' structure and bus and api to allow almost
a straight or simpler conversion from platform devices that were not
really a platform device. It also comes with a binding for rust, with
an example driver in rust showing how it's used.
I'm adding this now so that the patches that convert the different
drivers and subsystems can all start flowing into linux-next now
through their different development trees, in time for 6.15-rc1.
We have a number that are already reviewed and tested, but adding
those conversions now doesn't seem right. For now, no one is using
this, and it passes all build tests from 0-day and linux-next, so all
should be good"
* tag 'driver-core-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
rust/kernel: Add faux device bindings
driver core: add a faux bus for use when a simple device/bus is needed
projects / thirdparty / kernel / linux.git / log
