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5 weeks agoMerge patch series "lmb: use a single API for all allocations"
Tom Rini [Wed, 25 Jun 2025 15:57:01 +0000 (09:57 -0600)] 
Merge patch series "lmb: use a single API for all allocations"

Sughosh Ganu <sughosh.ganu@linaro.org> says:

The LMB module has a bunch for API's which are used for allocating
memory. There are a couple of API's for requesting memory, and two
more for reserving regions of memory. Replace these different API's
with a single one, lmb_alloc_mem(). The type of allocation to be made
is specified through one of the parameters to the function.

Additionally, the two API's for reserving regions of memory,
lmb_reserve() and lmb_alloc_addr() are the same with one
difference. One can reserve any memory region with lmb_reserve(),
while lmb_alloc_addr() actually checks that the memory region being
requested is part of the LMB memory map. Reserving memory that is not
part of the LMB memory map is pretty futile -- the allocation
functions do not allocate memory which has not been added to the LMB
memory map.

This series also removes the functionality allowing for reserving
memory regions outside the LMB memory map. Any request for reserving a
region of memory outside the LMB memory map now returns an -EINVAL
error.

Certain places in the common code using the LMB API's were not
checking the return value of the functions. Checks have been added for
them. There are some calls being made from the architecture/platform
specific code which too do not check the return value. Those have been
kept the same, as I do not have the platform with me to check if it
causes any issues on those platforms.

In addition, there is a patch which refactors code in
lmb_overlaps_region() and lmb_can_reserve_region() so that both
functionalities can be put in a single function, lmb_overlap_checks().

Finally, a new patch has been added which checks the return value of
the lmb allocation function before copying the device-tree to the
allocated address.

Link: https://lore.kernel.org/r/20250617104346.1379981-1-sughosh.ganu@linaro.org
[trini: Rework arch/arm/mach-snapdragon/board.c merge]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 weeks agodoc: add lmb documentation
Sughosh Ganu [Tue, 17 Jun 2025 10:43:46 +0000 (16:13 +0530)] 
doc: add lmb documentation

The LMB module has undergone significant changes in the recent
past. Add a document which briefly describes what the LMB module does,
and the changes that have been made to it's design since the 2025.01
release.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agomach-snapdragon: add a check before copying FDT to fdt_addr_r
Sughosh Ganu [Tue, 17 Jun 2025 10:43:45 +0000 (16:13 +0530)] 
mach-snapdragon: add a check before copying FDT to fdt_addr_r

The board_late_init() function allocates memory for a bunch of
environment variables, including fdt_addr_r. The device-tree then gets
copied to the memory pointed to by fdt_addr_r. However, the memory
allocation request can fail, in which case the address that is being
written to would not be allocated. Add a check that the memory
allocation has succeeded before copying the device-tree.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
5 weeks agolmb: use a single function to check for allocation and reservation requests
Sughosh Ganu [Tue, 17 Jun 2025 10:43:44 +0000 (16:13 +0530)] 
lmb: use a single function to check for allocation and reservation requests

The functions that handle allocation requests check if a region of
memory overlaps with a used region. This is done through
lmb_overlaps_region(). Similar checks are done for reservation
requests made to the LMB module, where the caller asks specifically
for a particular region of memory. These checks are being done through
lmb_can_reserve_region().

There are subtle differences in the checking needed for allocation
requests, as against reservation requests. In the former, it is only
needed to be checked if a region is overlapping with an existing
used region, and return as soon as an overlap is found. For
reservation request checks, because U-Boot allows for re-use of in-use
regions with a particular memory attribute, this check has to iterate
through all the regions that might overlap with the requested region,
and then check that the necessary conditions are met to allow for the
overlap.

Combine these two checks in a single function, lmb_overlap_checks() as
both lmb_overlaps_region() and lmb_can_reserve_region() are pretty
similar otherwise.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agolmb: use a single function to free up memory
Sughosh Ganu [Tue, 17 Jun 2025 10:43:43 +0000 (16:13 +0530)] 
lmb: use a single function to free up memory

There is no need to have two separate API's for freeing up memory. Use
a single API lmb_free() to achieve this.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agolmb: staticise lmb_add_memory()
Sughosh Ganu [Tue, 17 Jun 2025 10:43:42 +0000 (16:13 +0530)] 
lmb: staticise lmb_add_memory()

lmb_add_memory() is only called from the lmb module. Mark the function
as static.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agolmb: replace the lmb_alloc() and lmb_alloc_base() API's
Sughosh Ganu [Tue, 17 Jun 2025 10:43:41 +0000 (16:13 +0530)] 
lmb: replace the lmb_alloc() and lmb_alloc_base() API's

There currently are two API's for requesting memory from the LMB
module, lmb_alloc() and lmb_alloc_base(). The function which does the
actual allocation is the same. Use the earlier introduced API
lmb_alloc_mem() for both types of allocation requests.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agolmb: replace lmb_reserve() and lmb_alloc_addr() API's
Sughosh Ganu [Tue, 17 Jun 2025 10:43:40 +0000 (16:13 +0530)] 
lmb: replace lmb_reserve() and lmb_alloc_addr() API's

There currently are multiple allocation API's in the LMB module. There
are a couple of API's for allocating memory(lmb_alloc() and
lmb_alloc_base()), and then there are two for requesting a reservation
for a particular memory region (lmb_reserve() and
lmb_alloc_addr()). Introduce a single API lmb_alloc_mem() which will
cater to all types of allocation requests and replace lmb_reserve()
and lmb_alloc_addr() with the new API.

Moreover, the lmb_reserve() API is pretty similar to the
lmb_alloc_addr() API, with the one difference being that the
lmb_reserve() API allows for reserving any address passed to it --
the address need not be part of the LMB memory map. The
lmb_alloc_addr() does check that the address being requested is
actually part of the LMB memory map.

There is no need to support reserving memory regions which are outside
the LMB memory map. Remove the lmb_reserve() API functionality and use
the functionality provided by lmb_alloc_addr() instead. The
lmb_alloc_addr() will check if the requested address is part of the
LMB memory map and return an error if not.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
6 weeks agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sunxi into...
Tom Rini [Wed, 25 Jun 2025 14:07:16 +0000 (08:07 -0600)] 
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sunxi into next

This concludes support for the Allwinner A133 SoC, the biggest chunk of
which is the DRAM init code. Also includes support for a devboard using
this SoC, the DT of which  got added to the kernel only recently. The
same is true for another H618 devboard, so add the respective devconfig
as well.

Gitlab CI passed, and I booted that briefly on those two boards.

6 weeks agoMerge tag 'qcom-next-23Jun-1' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Tue, 24 Jun 2025 01:51:27 +0000 (19:51 -0600)] 
Merge tag 'qcom-next-23Jun-1' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next

This PR introduces 3 new platforms, two from the new Dragonwing IQx
series (QCS615 and QCS8300) as well as the IPQ5424.

Additionally:

* Support for booting downstream Android boot images on some phones is
  added
* Capsule update support is expanded to be more generic, determining
  which partition U-Boot was flashed to automatically and supporting
  many more boards.
* Minor capsule update bugs are fixed
* A watchdog driver is added and gets timeout support
* Autoboot now requires pressing "space" specifically to stop booting as
  a workaround for some boards getting rogue key presses which would
  cause autoboot to fail
* Documentation is added for the Dragonwing boards
* The RB1/2 now use USB gadget mode rather than host
* A bug is fixed where GPIO reads could return incorrect values

6 weeks agodoc: board/qualcomm: remove signing references from dragonwing.rst
Casey Connolly [Mon, 16 Jun 2025 16:25:31 +0000 (18:25 +0200)] 
doc: board/qualcomm: remove signing references from dragonwing.rst

The mkmbn tool isn't available yet, so it's still necessary to use
qtestsign for signing.

Update the docs to describe it, this can be reverted once mkmbn and the
associated tooling is merged.

Link: https://lore.kernel.org/u-boot/20250616162626.247802-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoclk/qcom: sm8250: Fix variable name of msm_clk_data
Luca Weiss [Wed, 11 Jun 2025 12:08:45 +0000 (14:08 +0200)] 
clk/qcom: sm8250: Fix variable name of msm_clk_data

Update the variable name to sm8250_gcc_data as it's in the sm8250
driver.

Fixes: dcd688229cb ("clk/qcom: add driver for sm8250 GCC")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250611-qcom-clk-variable-names-v1-2-37615b74daad@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoclk/qcom: sc7280: Fix variable name of msm_clk_data
Luca Weiss [Wed, 11 Jun 2025 12:08:44 +0000 (14:08 +0200)] 
clk/qcom: sc7280: Fix variable name of msm_clk_data

Update the variable name to sc7280_gcc_data as it's in the sc7280
driver.

Fixes: f50e7be6bb1 ("clk/qcom: add initial clock driver for sc7280")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250611-qcom-clk-variable-names-v1-1-37615b74daad@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodoc: board/qualcomm: Add example for boot image version 2
Luca Weiss [Wed, 11 Jun 2025 11:51:25 +0000 (13:51 +0200)] 
doc: board/qualcomm: Add example for boot image version 2

As required e.g. on Fairphone 5, add an example how to use boot image
with header version 2.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250611-qualcomm-doc-update-v1-3-5cf8cd94974d@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodoc: board/qualcomm: Replace buildman build instructions
Luca Weiss [Wed, 11 Jun 2025 11:51:24 +0000 (13:51 +0200)] 
doc: board/qualcomm: Replace buildman build instructions

This command does not work as described in this doc, so replace it with
a regular make with qcom_defconfig, as already used for other
defconfigs.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250611-qualcomm-doc-update-v1-2-5cf8cd94974d@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodoc: board/qualcomm: Fix commands for compilation missing CROSS_COMPILE
Luca Weiss [Wed, 11 Jun 2025 11:51:23 +0000 (13:51 +0200)] 
doc: board/qualcomm: Fix commands for compilation missing CROSS_COMPILE

One needs to set CROSS_COMPILE also for the actual compilation, not just
for the kconfig step, otherwise the host arch compiler would be used.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250611-qualcomm-doc-update-v1-1-5cf8cd94974d@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoqcom_defconfig: enable capsule update support
Caleb Connolly [Fri, 11 Apr 2025 15:03:37 +0000 (17:03 +0200)] 
qcom_defconfig: enable capsule update support

We can now correctly identify which partition U-Boot is flashed to
between uefi, xbl, and boot (including A/B support) so enable capsule
update support for all boards.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-4-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodfu: scsi: don't call scsi_scan()
Caleb Connolly [Fri, 11 Apr 2025 15:03:36 +0000 (17:03 +0200)] 
dfu: scsi: don't call scsi_scan()

Calling scsi_scan() results in all the block devices (and EFI block
devices) being destroyed and re-created. This breaks the EFI filesystem
drivers during capsule update.

Remove the call, since boards really should be calling scsi_scan()
themselves during board_init().

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-3-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agomach-snapdragon: CapsuleUpdate: support all boot methods
Caleb Connolly [Fri, 11 Apr 2025 15:03:35 +0000 (17:03 +0200)] 
mach-snapdragon: CapsuleUpdate: support all boot methods

Expand capsule update support to correctly identify which partition
U-Boot is flashed to (between xbl, uefi, and boot including A/B
variants).

Use qcom_boot_source to determine if we were chainloaded from ABL,
meaning U-Boot is on the boot partition, otherwise we assume uefi if
it's available, finally leaving the xbl partition.

Set a different fw_name based on the target partition to prevent GUID
collisions, since a board may support U-Boot flashed to boot or XBL we
need to differentiate them since the U-Boot binary must be built
differently.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-2-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agomach-snapdragon: track boot source
Caleb Connolly [Fri, 11 Apr 2025 15:03:34 +0000 (17:03 +0200)] 
mach-snapdragon: track boot source

Keep track of whether we were loaded via ABL or if U-Boot is running as
a first-stage bootloader.

For now we set this based on if we have a valid external FDT or not,
since it isn't possible to chainload U-Boot from ABL without there being
an external FDT.

This will be used to inform the capsule update logic which partition
U-Boot is flashed to.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-1-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoboard: qualcomm: Add MAINTAINERS entries for Dragonwing platforms
Aswin Murugan [Tue, 10 Jun 2025 09:37:32 +0000 (15:07 +0530)] 
board: qualcomm: Add MAINTAINERS entries for Dragonwing platforms

Added MAINTAINERS entries for the Qualcomm Dragonwing platforms, following
the discussion in the referenced thread.
https://lore.kernel.org/u-boot/20250603192206.GK1382132@bill-the-cat/

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Acked-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Acked-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250610093732.2060702-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agomach-snapdragon: Enhance android image handling memory footprint
George Chan [Sun, 18 May 2025 11:16:20 +0000 (19:16 +0800)] 
mach-snapdragon: Enhance android image handling memory footprint

In order to unzipped kernel from androidboot img, extra memory for
loadaddr is needed. So once fastboot is enabled fastboot memory also
share with loadaddr.

That can balance with memory constrain soc and android usecase.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-3-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agomach-snapdragon: Enable workaround of ignoring androidboot addr
George Chan [Sun, 18 May 2025 11:16:19 +0000 (19:16 +0800)] 
mach-snapdragon: Enable workaround of ignoring androidboot addr

Enable the workaround for whole snapdragon family.

Suggested-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-2-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoboot/image-android: Workaround kernel/ramdisk invalid addr
George Chan [Sun, 18 May 2025 11:16:18 +0000 (19:16 +0800)] 
boot/image-android: Workaround kernel/ramdisk invalid addr

Some androidboot image have invalid kernel/ramdisk load addr,
force to ignore those value and use loadaddr instead.

There is a concern on exposing the whole memory to image loading is
dangerous. Also, since it's not always possible to change the load
addr by repacking the boot.img (mainly due to AVB signature mismatch),
we need a way to use kernel_addr_r and ramdisk_addr_r.

Suggested-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-1-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoboard: qualcomm: add a MAINTAINERS file
Casey Connolly [Wed, 4 Jun 2025 11:34:45 +0000 (13:34 +0200)] 
board: qualcomm: add a MAINTAINERS file

Add a MAINTAINERS file for assigning maintainership of a particular
Qualcomm platform or board (if board specific files exist). It is
intended to supplement the treewide ARM SNAPDRAGON maintainers with
folks who have a more specific interest.

Add an initial entry for the QCS6490 platform which powers the RB3 Gen 2 board.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250604113452.1075503-2-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoconfigs: add qcom_qcs615_defconfig
Aswin Murugan [Wed, 21 May 2025 03:53:24 +0000 (09:23 +0530)] 
configs: add qcom_qcs615_defconfig

Introduce a defconfig for QCS615 based boards.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-6-aswin.murugan@oss.qualcomm.com
[casey: fix subject msg]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoqcom_defconfig: Enable QCS615 clock driver
Aswin Murugan [Wed, 21 May 2025 03:53:23 +0000 (09:23 +0530)] 
qcom_defconfig: Enable QCS615 clock driver

Enable the QCS615 clock driver in Qualcomm defconfig.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-5-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoclk/qcom: qcs615: Add GCC clock driver for QCS615
Aswin Murugan [Wed, 21 May 2025 03:53:22 +0000 (09:23 +0530)] 
clk/qcom: qcs615: Add GCC clock driver for QCS615

Port Linux's gcc-qcs615.c driver to U-Boot for basic bring-up.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-4-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agophy: qcom: Enable QMP UFS PHY driver for QCS615
Aswin Murugan [Wed, 21 May 2025 03:53:21 +0000 (09:23 +0530)] 
phy: qcom: Enable QMP UFS PHY driver for QCS615

Enable QMP phy for QCS615, referenced from Linux.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-3-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodts: qcs615-ride-u-boot.dtsi: Add memory entry to bootup
Aswin Murugan [Wed, 21 May 2025 03:53:20 +0000 (09:23 +0530)] 
dts: qcs615-ride-u-boot.dtsi: Add memory entry to bootup

Added the memory entry to bootup.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoconfigs: add qcom_qcs8300_defconfig
Balaji Selvanathan [Thu, 29 May 2025 15:49:31 +0000 (21:19 +0530)] 
configs: add qcom_qcs8300_defconfig

Introduce a defconfig for QCS8300 based boards.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-7-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoqcom_defconfig: Enable QCS8300 clock driver
Balaji Selvanathan [Thu, 29 May 2025 15:49:30 +0000 (21:19 +0530)] 
qcom_defconfig: Enable QCS8300 clock driver

Enable the QCS8300 clock driver in Qualcomm defconfig.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-6-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agophy: qcom: Enable QMP UFS PHY driver for QCS8300
Balaji Selvanathan [Thu, 29 May 2025 15:49:29 +0000 (21:19 +0530)] 
phy: qcom: Enable QMP UFS PHY driver for QCS8300

Enable QMP phy for QCS8300, referenced from Linux.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-5-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoclk/qcom: qcs8300: Add GCC clock driver for QCS8300
Balaji Selvanathan [Thu, 29 May 2025 15:49:28 +0000 (21:19 +0530)] 
clk/qcom: qcs8300: Add GCC clock driver for QCS8300

* Port Linux's gcc-qcs8300.c driver to U-Boot for basic bring-up.

* Enable QCS8300 clocks in qcom_defconfig.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-4-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodts: qcs8300-ride-u-boot.dtsi: Add memory entry to bootup
Balaji Selvanathan [Thu, 29 May 2025 15:49:27 +0000 (21:19 +0530)] 
dts: qcs8300-ride-u-boot.dtsi: Add memory entry to bootup

Added the memory entry to bootup.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-3-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodoc: board: qualcomm: document Dragonwing board building/flashing
Balaji Selvanathan [Thu, 29 May 2025 15:49:26 +0000 (21:19 +0530)] 
doc: board: qualcomm: document Dragonwing board building/flashing

Introducing documentation support for Qualcomm Dragonwing series
boards. Documents the build and flashing steps.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-2-quic_bselvana@quicinc.com
[Casey: add dragonwing to board/qualcomm/index.rst]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agomach-snapdragon: of_fixup: Drop USB dr_mode override for RB1/2
Sumit Garg [Fri, 16 May 2025 13:08:54 +0000 (18:38 +0530)] 
mach-snapdragon: of_fixup: Drop USB dr_mode override for RB1/2

The default DIP switch configuration on RB1/2 is to enable flashing
support via USB type-c port either using QDL or fastboot. It's just
cumbersome to get the host mode working in U-Boot via DIP switch toggle
when you need the flashing capability using the type-c port.

So instead lets enable fastboot in U-Boot for RB1/2 boards which is
more useful in the default board DIP switch configuration. This let's
us to drop dr_mode DT fixup.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250516130854.606067-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agogpio: msm_gpio: return correct value for gpio read
Aswin Murugan [Thu, 8 May 2025 11:36:46 +0000 (17:06 +0530)] 
gpio: msm_gpio: return correct value for gpio read

In the current implementation, the GPIO read operation considers
both the input and outbut bits (bits 0 and 1). It should only consider
the state of input bit, i.e bit 0. To address this, mask input bit
alone and read it.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250508113646.1462518-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agosunxi: H616: add support for YuzukiHD Chameleon board
Andre Przywara [Sun, 25 Aug 2024 23:31:42 +0000 (00:31 +0100)] 
sunxi: H616: add support for YuzukiHD Chameleon board

The Chameleon board is an OpenHardware devboard made by YuzukiTsuru,
featuring an Allwinner H616 SoC. The form factor resembles the Raspberry
Pi Model A boards, though it differs significantly in its features.
Apart from the usual peripherals of those kind of boards (SD card, eMMC,
WiFi, HDMI), it features four USB-C 2.0 ports.

Add a defconfig for the board, the DRAM parameters have been extracted
from the firmware shipped with the board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 weeks agoarm64: dts: allwinner: h616: add YuzukiHD Chameleon support
Andre Przywara [Fri, 7 Mar 2025 00:57:12 +0000 (00:57 +0000)] 
arm64: dts: allwinner: h616: add YuzukiHD Chameleon support

The Chameleon board is an OpenHardware devboard made by YuzukiTsuru.
The form factor resembles the Raspberry Pi Model A boards, though it
differs significantly in its features:

  - Allwinner H618 SoC (4 * Arm Cortex-A53 cores, 1MB L2 cache, 1.4 GHz)
  - between 512MiB and 2GiB DDR3 DRAM
  - up to 128 GiB eMMC flash
  - AXP313a PMIC
  - 100 Mbit/s Ethernet pins on a header
  - XR829 WIFI+Bluetooth chip
  - 4 * USB 2.0 USB-C ports
  - microSD card slot
  - 3.5mm A/V port

Add the devicetree describing the board's peripherals and their
connections.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307005712.16828-16-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: f4a6b0f7200f8629f4138f1094ce654ab75df41e ]

(cherry picked from commit 3a879d878553d57057ce0a7096bfbf1eb077f6dc)

6 weeks agosunxi: add support for Liontron H-A133L board
Andre Przywara [Sat, 10 May 2025 23:33:02 +0000 (00:33 +0100)] 
sunxi: add support for Liontron H-A133L board

The Liontron H-A133L is an industrial development board based on the
Allwinner A133 SoC. It uses LPDDR4 DRAM, eMMC, and an AXP707 PMIC.

Add a defconfig with the required DRAM settings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 weeks agoarm64: dts: allwinner: a100: add Liontron H-A133L board support
Andre Przywara [Mon, 5 May 2025 16:47:29 +0000 (17:47 +0100)] 
arm64: dts: allwinner: a100: add Liontron H-A133L board support

The H-A133L board is an industrial development board made by Liontron.
It contains a number of dedicated JST connectors, to connect external
peripherals. It features:

- Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz)
- 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM
- between 16 and 128 GiB eMMC flash
- AXP707 PMIC (compatible to AXP803)
- 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY
- XR829 WIFI+Bluetooth chip
- 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors
  (connected via a USB hub connected to USB1 on the SoC)
- microSD card slot
- 3.5mm A/V port
- 12V power supply
- connectors for an LVDS or MIPI-DSI panel

Add the devicetree describing the board's peripherals and their
connections.

Despite being a devboard, the manufacturer does not publish a schematic
(I asked), so the PMIC rail assignments were bases on BSP dumps,
educated guesses and some experimentation. Dropping the always-on
property from any of the rails carrying it will make the board hang as
soon as the kernel turns off unused regulators.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com
[wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: a3cd12acb7b74d9b243cd893209972fc657d0bd3 ]

(cherry picked from commit 4062957c0797752dcf8b71f99c7aa47301c70aac)

6 weeks agoarm64: dts: allwinner: a100: set maximum MMC frequency
Andre Przywara [Mon, 5 May 2025 20:24:16 +0000 (21:24 +0100)] 
arm64: dts: allwinner: a100: set maximum MMC frequency

The manual for the Allwinner A133 SoC mentions that the maximum
supported MMC frequency is 150 MHz, for all of the MMC devices.

Describe that in the DT entry, to help drivers setting the right
interface frequency.

Fixes: fcfbb8d9ec58 ("arm64: allwinner: a100: Add MMC related nodes")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505202416.23753-1-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: d8f10550448b03d3c5c6d9392119205c65ebfc89 ]

(cherry picked from commit 85e37e6a8a002eb231df8209478d7ff2b134a451)

6 weeks agosunxi: add support for the Allwinner A100/A133 SoC
Andre Przywara [Wed, 25 Oct 2023 23:37:25 +0000 (00:37 +0100)] 
sunxi: add support for the Allwinner A100/A133 SoC

The Allwinner A100 SoC has been around for a while, mostly on cheap
tablets, but didn't generate much interest in the community so far.
There were some efforts by two Allwinner employees in 2020, which led
to basic upstream Linux support for that SoC, although this momentum
dried up pretty quickly, leaving a lot of peripherals unsupported.

The A100 was silently replaced with the seemingly identical Allwinner
A133, which is reportedly a better bin of the A100. So far we assume
that both are compatible from a software perspective. There are some
more devices with the A133 out there now, so people are working on
filling the gaps, and adding U-Boot (and TF-A) support.

Based on the just added pinctrl, clock and DRAM support, this adds the
missing bits, mostly addresses and values for the SPL.

The A133 seems to be an predecessor to the H6, so we can share a lot of
code with that (and the H616 code), and just need to adjust some details.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 weeks agosunxi: A133: add DRAM init code
Cody Eksal [Sat, 12 Oct 2024 06:36:57 +0000 (03:36 -0300)] 
sunxi: A133: add DRAM init code

This adds preliminary support for the DRAM controller in the Allwinner
A100/A133 SoCs.
This is work in progress, and has rough edges, but works on at least
three different boards. It contains support for DDR4 and LPDDR4.

Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
[Andre: formatting fixes, adapt to mainline, drop unused parameters,
remove struct struct sunxi_mctl_com_reg, hardcode MR registers,
switch to mctl_check_pattern(), remove simple DRAM check]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 weeks agoMerge tag 'v2025.07-rc5' into next
Tom Rini [Mon, 23 Jun 2025 20:49:16 +0000 (14:49 -0600)] 
Merge tag 'v2025.07-rc5' into next

Prepare v2025.07-rc5

With this merge, tighten up the LTO_FLAGS removal we added to not
trigger on ARMv7 (which is Thumb-2 and should be fine).

6 weeks agoPrepare v2025.07-rc5 v2025.07-rc5
Tom Rini [Mon, 23 Jun 2025 20:10:06 +0000 (14:10 -0600)] 
Prepare v2025.07-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
6 weeks agoarm: kirkwood: fix freeze on boot
Jerome Forissier [Mon, 23 Jun 2025 19:10:11 +0000 (13:10 -0600)] 
arm: kirkwood: fix freeze on boot

Commit 6fe50e395080 ("arm: asm/system.h: mrc and mcr need .arm if
__thumb2__ is not set") is not a proper fix for the LTO link error
mentioned in its description. It causes 32-bit arm instructions to be
mixed with thumb instructions, which the Kirkwood SoCs do not support.
For example, board_init_r() is mostly generated in Thumb-1 mode as
expected since the build flags contain -mthumb -mthumb-interwork. The
MCR instruction corresponding to writefr_extra_feature_reg() is also
correcly emitted as a 32-bit ARM instruction (it cannot be encoded in
Thumb-1 anyways). The problem is, the compiler inlines the MCR without
generating the BX or BLX instruction which are needed to transition
between the ARM and the Thumb-1 states. From the objdump output:

006186a0 <board_init_r>:
board_init_r():
/home/jerome/work/u-boot/common/board_r.c:799
  6186a0:       b5f0            push    {r4, r5, r6, r7, lr}
  6186a2:       b0ab            sub     sp, #172        @ 0xac
get_gd():
/home/jerome/work/u-boot/./arch/arm/include/asm/global_data.h:127
  6186a4:       464a            mov     r2, r9
...
/home/jerome/work/u-boot/arch/arm/mach-kirkwood/cpu.c:242
  619aae:       9b15            ldr     r3, [sp, #84]   @ 0x54
writefr_extra_feature_reg():
/home/jerome/work/u-boot/./arch/arm/include/asm/arch/cpu.h:100
  619ab0:       ee2f3f11        mcr     15, 1, r3, cr15, cr1, {0}
                ^^^^^^^^
                32-bit ARM instruction

Further investigation is needed to understand how to fix the issue so
that the code size is minimal for all boards. In the mean time, this
fix disables LTO for the two problematic files (common/board_f.c and
common/board_r.c). This makes the Kirkwood-based boards bootable again.
The binary size is increased by 1048 bytes which is perfectly
acceptable.

Fixes: 6fe50e395080 ("arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set")
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 weeks agodrivers: watchdog: qcom: Add timeout configuration support in watchdog
Balaji Selvanathan [Tue, 27 May 2025 12:49:26 +0000 (18:19 +0530)] 
drivers: watchdog: qcom: Add timeout configuration support in watchdog

This patch enhances the Qualcomm watchdog driver by introducing
support for dynamic timeout configuration. Specifically:

- Calculates and sets the bark and bite timeout values based on
  the clock rate and the requested timeout in milliseconds.
- Adds retrieval of the watchdog clock rate during probe using
  the common clock framework.
- Adds a default timeout value for ARCH_SNAPDRAGON
  in WATCHDOG_TIMEOUT_MSECS.

These changes improve the configurability and accuracy of the
watchdog timer on Qualcomm platforms.

This work builds upon the previous submission:
https://lore.kernel.org/all/20250422-b4-qcom-wdt-v3-1-730d4d5a858d@paulsajna.com/

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527124926.128413-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agowatchdog: qcom: introduce qcom-wdt driver
Casey Connolly [Wed, 23 Apr 2025 02:19:39 +0000 (02:19 +0000)] 
watchdog: qcom: introduce qcom-wdt driver

Some Qualcomm device vendors decide to turn the watchdog on in the
bootloader, resulting in the device being reset if it isn't petted every
~30 seconds. Introduce a driver to keep the watchdog happy and prevent this
annoying behaviour.

Signed-off-by: Paul Sajna <hello@paulsajna.com>
Co-authored-by: Paul Sajna <hello@paulsajna.com>
Tested-by: Paul Sajna <hello@paulsajna.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250422-b4-qcom-wdt-v3-1-730d4d5a858d@paulsajna.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoconfigs: add qcom_ipq5424_mmc_defconfig
Varadarajan Narayanan [Tue, 4 Mar 2025 11:01:05 +0000 (16:31 +0530)] 
configs: add qcom_ipq5424_mmc_defconfig

Introduce a defconfig for the Qualcomm IPQ5424 SoC based RDPs.
Presently supports eMMC.

Per the flash memory layout, U-Boot size cannot exceed 756KB. With this
defconfig, u-boot.mbn size is ~480KB.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-7-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agopinctrl: qcom: Add ipq5424 pinctrl driver
Varadarajan Narayanan [Tue, 4 Mar 2025 11:01:04 +0000 (16:31 +0530)] 
pinctrl: qcom: Add ipq5424 pinctrl driver

Add pinctrl driver for the TLMM block found in the ipq5424 SoC.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoclk/qcom: add initial clock driver for ipq5424
Varadarajan Narayanan [Tue, 4 Mar 2025 11:01:03 +0000 (16:31 +0530)] 
clk/qcom: add initial clock driver for ipq5424

Add initial set of clocks and resets for enabling U-Boot on ipq5424
based RDP platforms.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-5-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodoc: board/qualcomm: Update RDP signing instructions
Varadarajan Narayanan [Tue, 4 Mar 2025 11:01:02 +0000 (16:31 +0530)] 
doc: board/qualcomm: Update RDP signing instructions

IPQ5424 expects U-Boot to have MBN version 7 header. The qtestsign tool
presently documented doesn't support v7. Hence update the instructions
to use a different tool that can support both v6 and v7.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-4-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agodts: ipq5424-rdp466-u-boot: add override dtsi
Varadarajan Narayanan [Tue, 4 Mar 2025 11:01:01 +0000 (16:31 +0530)] 
dts: ipq5424-rdp466-u-boot: add override dtsi

Add initial support for the IPQ5424 MMC based RDP platforms.
Define memory layout statically.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-3-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
6 weeks agoMerge patch series "rsa and fit_check_sign build fix for v2025.07-rc"
Tom Rini [Sun, 22 Jun 2025 16:16:43 +0000 (10:16 -0600)] 
Merge patch series "rsa and fit_check_sign build fix for v2025.07-rc"

Shiji Yang <yangshiji66@outlook.com> says:

This patchset fixes some compilation errors that I caught in version
v2025.07-rc4 and branch next. If they are acceptable, please apply
them to the master branch. If anyone has a better way to fix these
issues, it's fine to ignore this patchset.

Link: https://lore.kernel.org/r/OSBPR01MB16702ED24460D23A7ED63440BC7DA@OSBPR01MB1670.jpnprd01.prod.outlook.com
6 weeks agotools/fit_check_sign: make the module dependent on CONFIG_FIT_SIGNATURE
Shiji Yang [Thu, 19 Jun 2025 16:38:18 +0000 (00:38 +0800)] 
tools/fit_check_sign: make the module dependent on CONFIG_FIT_SIGNATURE

The function definition of fit_check_sign() is guarded by
"#ifdef CONFIG_FIT_SIGNATURE" in "tools/image-host.c". If we try
to build it without CONFIG_FIT_SIGNATURE, we will get an error:

/usr/bin/ld: tools/fit_check_sign.o: in function `main':
fit_check_sign.c:(.text.startup+0x165): undefined reference to `fit_check_sign'
collect2: error: ld returned 1 exit status

Fixes: 9c79c8fe70da ("tools/fit_check_sign: make key optional")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
6 weeks agolib: rsa: fix compilation error without openssl
Shiji Yang [Thu, 19 Jun 2025 16:38:17 +0000 (00:38 +0800)] 
lib: rsa: fix compilation error without openssl

The symbol TOOLS_IMAGE_PRE_LOAD doesn't depend on TOOLS_LIBCRYPTO.
If we choose to build tools without openssl, rsa_verify_openssl()
will attempt to call the unavailable openssl library functions.

Fixes: 942c8c8e6697 ("rsa: Add rsa_verify_openssl() to use openssl for host builds")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
6 weeks agonet: designware: fix bus address dereference
Baruch Siach [Wed, 18 Jun 2025 16:04:35 +0000 (19:04 +0300)] 
net: designware: fix bus address dereference

Device bus address might not be valid for direct access when the bus
address and CPU address are not the same. Use dev_bus_to_phys() to
translate bus address back to CPU address.

Fixes: 3d98b8c504e15 ("net: designware: Invalidate RX buffer cache before freeing the DMA descriptor")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
6 weeks agoboard: samsung: e850-96: Load LDFW in board_late_init()
Sam Protsenko [Fri, 20 Jun 2025 18:50:10 +0000 (13:50 -0500)] 
board: samsung: e850-96: Load LDFW in board_late_init()

As stated in 5e847f7729b3 ("efi_loader: call efi_init_early() earlier"):

    efi_init_early() creates an event hook for block device probing.
    It has to be called before any block device is probed.

Indeed, efi_bl_init() registers EVT_DM_POST_PROBE event, which calls
efi_disk_probe() whenever any block device is probed. And to make that
hook work, the initialization of all block devices was put after
efi_init_early() in initcall_run_r():

    INITCALL(efi_init_early);
    INITCALL(initr_nand);
    INITCALL(initr_onenand);
    INITCALL(initr_mmc);

Because LDFW firmware is being read from MMC, attempt to load LDFW in
board_init() causes MMC driver to be probed. And because board_init() is
executed before efi_init_early(), the hook mentioned above won't work
for MMC devices anymore. So EFI disk objects won't be created, which in
turn makes the EFI subsystem non-functional, showing next symptoms:
  - 'efidebug dh' output is empty
  - attempt to add boot devices in 'eficonfig' shows this message:
    "No block device found!"
  - 'bootefi selftest $fdtcontroladdr' shows this warning:
    "Cannot persist EFI variables without system partition"
  - booting GRUB with 'bootefi' runs minimal GRUB shell which doesn't
    see any block devices as well, probably because EFI vars weren't
    passed

Load LDFW in board_late_init() instead, as it's called after
efi_init_early(). This fixes the described problem and makes it possible
to run EFI apps like GRUB correctly, add entries in 'eficonfig', and
makes 'efivar --list' command in Linux rootfs actually show EFI
variables.

The only user of LDFW at the moment is the TRNG driver, and it's probed
later, only when it's going to be used (e.g. on "rng" command). So it's
fine to load LDFW in board_late_init(). Now the corresponding call order
will look like this:

    efi_init_early()
    initr_mmc()
      mmc_probe()
        EVT_DM_POST_PROBE -> efi_disk_probe()
    board_late_init()
      load_ldfw() -> fs_read(), blk_dread()
    exynos_trng_probe()

Fixes: ccfd8de541a8 ("board: samsung: e850-96: Report LDFW loading failures")
Fixes: f04e58cc9788 ("board: samsung: e850-96: Load LDFW firmware on board init")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 weeks agoMerge tag 'doc-2025-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 21 Jun 2025 18:09:40 +0000 (12:09 -0600)] 
Merge tag 'doc-2025-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request doc-2025-07-rc5

* in wget documentation remove erroneous note about CAs

6 weeks agodoc: cmd: wget: remove erroneous note
Jerome Forissier [Tue, 17 Jun 2025 12:10:58 +0000 (14:10 +0200)] 
doc: cmd: wget: remove erroneous note

The note about U-Boot not being able to verify server certificates is
false now that WGET_CACERT and WGET_BUILTIN_CACERT have been added.
Remove it.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 weeks agoarm: kirkwood: Maintainer for RaidSonic ICY BOX ib62x0 board
Tony Dinh [Sat, 21 Jun 2025 03:22:04 +0000 (20:22 -0700)] 
arm: kirkwood: Maintainer for RaidSonic ICY BOX ib62x0 board

Add me as  maintainer for the RaidSonic ICY BOX ib62x0.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
6 weeks agoMerge patch series "Consistent Kconfig environment options CONFIG_ENV_ prefix"
Tom Rini [Fri, 20 Jun 2025 18:54:41 +0000 (12:54 -0600)] 
Merge patch series "Consistent Kconfig environment options CONFIG_ENV_ prefix"

Marek Vasut <marek.vasut+renesas@mailbox.org> says:

Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.

Link: https://lore.kernel.org/r/20250609192701.20260-1-marek.vasut+renesas@mailbox.org
6 weeks agoenv: Drop DELAY_ENVIRONMENT
Marek Vasut [Mon, 9 Jun 2025 19:26:43 +0000 (21:26 +0200)] 
env: Drop DELAY_ENVIRONMENT

There are no users of DELAY_ENVIRONMENT and the same effect can
be achieved either using DT /config/load-environment property,
or by using ENV_IS_NOWHERE . Remove this configuration option
and matching functionality.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename DEFAULT_ENV_FILE to ENV_DEFAULT_ENV_TEXT_FILE
Marek Vasut [Mon, 9 Jun 2025 19:26:42 +0000 (21:26 +0200)] 
env: Rename DEFAULT_ENV_FILE to ENV_DEFAULT_ENV_TEXT_FILE

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Also rename USE_DEFAULT_ENV_FILE to USE_ENV_DEFAULT_ENV_TEXT_FILE .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename ENV_MMC_PARTITION to ENV_MMC_SW_PARTITION
Marek Vasut [Mon, 9 Jun 2025 19:26:41 +0000 (21:26 +0200)] 
env: Rename ENV_MMC_PARTITION to ENV_MMC_SW_PARTITION

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_SW_PARTITION to clarify this is the SD/MMC software
partition table entry selector. Update the help text accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename SYS_MMC_ENV_PART to ENV_MMC_EMMC_HW_PARTITION
Marek Vasut [Mon, 9 Jun 2025 19:26:40 +0000 (21:26 +0200)] 
env: Rename SYS_MMC_ENV_PART to ENV_MMC_EMMC_HW_PARTITION

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_EMMC_HW_PARTITION to clarify this is the eMMC hardware
partition selector, not a software partition table entry selector.
Retain the ENV_MMC_ prefix to make it easier to search for all the
SD/MMC related ENV options. Update the help text accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename SYS_MMC_ENV_DEV to ENV_MMC_DEVICE_INDEX
Marek Vasut [Mon, 9 Jun 2025 19:26:39 +0000 (21:26 +0200)] 
env: Rename SYS_MMC_ENV_DEV to ENV_MMC_DEVICE_INDEX

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_DEVICE_INDEX to clarify this is the SD/MMC device
index, a number, as enumerated by U-Boot. Update the help text
accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename SYS_RELOC_GD_ENV_ADDR to ENV_RELOC_GD_ENV_ADDR
Marek Vasut [Mon, 9 Jun 2025 19:26:38 +0000 (21:26 +0200)] 
env: Rename SYS_RELOC_GD_ENV_ADDR to ENV_RELOC_GD_ENV_ADDR

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename SYS_REDUNDAND_ENVIRONMENT to ENV_REDUNDANT
Marek Vasut [Mon, 9 Jun 2025 19:26:37 +0000 (21:26 +0200)] 
env: Rename SYS_REDUNDAND_ENVIRONMENT to ENV_REDUNDANT

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoenv: Rename OVERWRITE_ETHADDR_ONCE to ENV_OVERWRITE_ETHADDR_ONCE
Marek Vasut [Mon, 9 Jun 2025 19:26:36 +0000 (21:26 +0200)] 
env: Rename OVERWRITE_ETHADDR_ONCE to ENV_OVERWRITE_ETHADDR_ONCE

Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
6 weeks agoMerge patch series "bootstd: Fix efi_mgr usage in bootmeths env var"
Tom Rini [Fri, 20 Jun 2025 14:01:16 +0000 (08:01 -0600)] 
Merge patch series "bootstd: Fix efi_mgr usage in bootmeths env var"

Sam Protsenko <semen.protsenko@linaro.org> says:

Defining the 'bootmeths' environment variable with efi_mgr causes NULL
pointer dereference when running 'bootflow scan' on the E850-96 board.
This patch series fixes that, and cleans up the surrounding code a
little while at it.

Link: https://lore.kernel.org/r/20250112034213.13153-1-semen.protsenko@linaro.org
6 weeks agobootstd: Fix incorrect struct name in bootmeth_setup_iter_order()
Sam Protsenko [Sun, 12 Jan 2025 03:42:13 +0000 (21:42 -0600)] 
bootstd: Fix incorrect struct name in bootmeth_setup_iter_order()

There is no such thing as struct bootmeth, it's probably a typo. This
issue doesn't affect the execution as it's a pointer, and pointer sizes
are the same for all data types. But it can be confusing, so make it
struct udevice, as it should be.

Fixes: a950d31abe98 ("bootstd: Add the bootmeth uclass and helpers")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 weeks agobootstd: Probe bootmeth devices for bootmeths env var
Sam Protsenko [Sun, 12 Jan 2025 03:42:12 +0000 (21:42 -0600)] 
bootstd: Probe bootmeth devices for bootmeths env var

Specifying efi_mgr in 'bootmeths' environment variable leads to NULL
pointer dereference when 'bootflow scan' is executed, with call trace
like this:

    priv->fake_dev // NULL pointer dereference
    .read_bootflow = efi_mgr_read_bootflow()
    bootmeth_get_bootflow()
    bootflow_check()
    bootflow_scan_first()
    do_bootflow_scan()
    'bootflow scan -l'

That happens because in case when 'bootmeths' env var is defined the
bootmeth_efi_mgr driver is not probed, and the memory for its private
data isn't allocated by .priv_auto. In case when 'bootmeths' env var is
not defined, the std->bootmeth_count is 0, and the execution flow in
bootmeth_setup_iter_order() takes "no ordering" path, which in turn runs
uclass_get_device_by_seq() -> ... -> device_probe(), so issue isn't
present there. But when 'bootmeths' is defined and contains efi_mgr, the
std->bootmeth_count > 0, so bootmeth_setup_iter_order() follows the "we
have an ordering" path, where devices are not probed. In other words:

    'bootmeths' defined           'bootmeths' not defined
    --------------------------------------------------------
    priv == NULL                    priv != NULL
         ^                                ^
         |                        device_alloc_priv()
     no probe                     device_of_to_plat()
         ^                        device_probe()
         |                        uclass_get_device_tail()
    dev = order[i]                uclass_get_device_by_seq()
         ^                                ^
         | have an ordering               | no ordering
         +----------------+---------------+
                          |
             bootmeth_setup_iter_order()
             bootflow_scan_first()
             do_bootflow_scan()

Add an explicit device_probe() call in "we have an ordering" case to fix
the issue.

Fixes: c627cfc14c08 ("bootstd: Allow scanning for global bootmeths separately")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 weeks agobootstd: Fix memleak on errors in bootmeth_setup_iter_order()
Sam Protsenko [Sun, 12 Jan 2025 03:42:11 +0000 (21:42 -0600)] 
bootstd: Fix memleak on errors in bootmeth_setup_iter_order()

Free memory allocated for 'order' (array of bootmeths) on error paths in
bootmeth_setup_iter_order() function.

Fixes: c627cfc14c08 ("bootstd: Allow scanning for global bootmeths separately")
Fixes: 10d16faa436c ("bootstd: Detect empty bootmeth")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 weeks agoMerge tag 'u-boot-at91-2025.10-a' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Fri, 20 Jun 2025 13:59:34 +0000 (07:59 -0600)] 
Merge tag 'u-boot-at91-2025.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2025.10 cycle:

This feature set includes the addition of new sam9x7 SoC and a new board
named sam9x7-curiosity. There is also new support for sam9x60 compatible
at91 watchdog.

6 weeks agodtc: Add Kconfig option to pad device tree blob
Eric Schikschneit [Tue, 3 Jun 2025 17:06:24 +0000 (12:06 -0500)] 
dtc: Add Kconfig option to pad device tree blob

This will allow arch(s) that use device tree blobs to pad the end of the
device tree so they can be modified by board files at run time. This will
help prevent errors such as FDT_ERR_NOSPACE from occurring.

Signed-off-by: Eric Schikschneit <eric.schikschneit@novatechautomation.com>
[trini: Change default order so that X86 && EFI_APP works correctly]

6 weeks agoMerge patch series "common/spl fixes"
Tom Rini [Thu, 19 Jun 2025 17:00:00 +0000 (11:00 -0600)] 
Merge patch series "common/spl fixes"

This series from Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
fixes some regressions related to handling of FIT images with broken
contents that was introduced in this merge window.

Link: https://lore.kernel.org/r/20250610095632.1085431-1-mikhail.kshevetskiy@iopsys.eu
6 weeks agocommon/spl: improve error handling in spl_fit
Mikhail Kshevetskiy [Tue, 10 Jun 2025 09:56:32 +0000 (12:56 +0300)] 
common/spl: improve error handling in spl_fit

This fix a possible NULL pointer dereference.

There is also a risk of memory leaking within the same portion of code.
The leak will happen if loaded image is bad or damaged. In this case
u-boot-spl will try booting from the other available media. Unfortunately
resources allocated for previous boot media will NOT be freed.

We can't fix that issue as the memory allocation mechanism used here
is unknown. It can be different kinds of malloc() or something else.

To somewhat reduce memory consumption, one can try to reuse previously
allocated memory as it's done in board_spl_fit_buffer_addr() from
test/image/spl_load.c.

The corresponding comment was put to the code as well.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
6 weeks agocommon/spl: handle properly images with bad checksum
Mikhail Kshevetskiy [Tue, 10 Jun 2025 09:56:31 +0000 (12:56 +0300)] 
common/spl: handle properly images with bad checksum

load_simple_fit() returns -EPERM for the images with broken signatures.
Unfortunately this may conflict with image loaging selection on the base
of boot phase. See commit 873112db9ce68c38984ff25808dde726f8dd5573
("spl: Support selecting images based on phase in simple FIT").

Thus loading of

configurations {
uboot {
description = "u-boot";
firmware = "atf";
loadables = "atf", "tee", "uboot";
};
};

with damaged "tee" image may finish without errors. This may results in
board bricking.

This patch fixes commit 873112db9ce68c38984ff25808dde726f8dd5573
("spl: Support selecting images based on phase in simple FIT")
by replacing EPERM with EBADSLT places where it should be done.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
6 weeks agocommon/spl: fix potential out of buffer access in spl_fit_get_image_name function
Mikhail Kshevetskiy [Tue, 10 Jun 2025 09:56:30 +0000 (12:56 +0300)] 
common/spl: fix potential out of buffer access in spl_fit_get_image_name function

The current code have two issues:
1) ineffective NULL pointer check

str = strchr(str, '\0') + 1
if (!str || ...

   The str here will never be NULL (because we add 1 to result of strchr())

2) strchr() may go out of the buffer for the special forms of name variable.
   It's better use memchr() function here.

   According to the code the property is a sequence of C-string like
   shown below:

     'h', 'e', 'l', 'l', 'o', '\0', 'w', 'o', 'r', 'l', 'd', '\0', '!', '\0'

   index is the string number we are interested, so

     index = 0   =>  "hello",
     index = 1   =>  "world",
     index = 2   =>  "!"

   The issue will arrise if last string for some reason have no terminating
   '\0' character. This can happen for damaged or specially crafted dtb.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 weeks agoarm/airoha: reset_cpu() does not take any params
Mikhail Kshevetskiy [Fri, 6 Jun 2025 22:39:23 +0000 (01:39 +0300)] 
arm/airoha: reset_cpu() does not take any params

According to include/sysreset.h the reset_cpu() function does not take any args

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 weeks agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Thu, 19 Jun 2025 14:12:20 +0000 (08:12 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

- Move early SPL stack on R-Car V4H boards

6 weeks agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
Tom Rini [Thu, 19 Jun 2025 14:11:25 +0000 (08:11 -0600)] 
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next

- Assorted cleanups and R-Car Gen4 watchdog driver

6 weeks agoconfigs: sam9x75_curiosity: Add initial mmc default config
Manikandan Muralidharan [Tue, 3 Jun 2025 05:05:56 +0000 (10:35 +0530)] 
configs: sam9x75_curiosity: Add initial mmc default config

Add default configuration for sd-card to boot the linux kernel.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
6 weeks agoboard: sam9x75_curiosity: Add support for sam9x75 curiosity
Manikandan Muralidharan [Tue, 3 Jun 2025 05:05:55 +0000 (10:35 +0530)] 
board: sam9x75_curiosity: Add support for sam9x75 curiosity

Add board specific functions for sam9x75 curiosity

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
6 weeks agoARM: dts: at91: sam9x75_curiosity: add tweaks for sam9x75 curiosity board
Manikandan Muralidharan [Tue, 3 Jun 2025 05:05:54 +0000 (10:35 +0530)] 
ARM: dts: at91: sam9x75_curiosity: add tweaks for sam9x75 curiosity board

Since the SoC and board DT are already available in dts/upstream,
add the difference from upstream DTS to at91-sam9x75_curiosity-u-boot.dtsi

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
6 weeks agoARM: at91: Add sam9x7 soc
Varshini Rajendran [Tue, 3 Jun 2025 05:05:53 +0000 (10:35 +0530)] 
ARM: at91: Add sam9x7 soc

Add new Microchip sam9x7 SoC based on an ARM926.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
6 weeks agoclk: at91: sam9x7: add pmc driver for sam9x7 SoC family
Varshini Rajendran [Tue, 3 Jun 2025 05:05:52 +0000 (10:35 +0530)] 
clk: at91: sam9x7: add pmc driver for sam9x7 SoC family

Add PMC driver support for sam9x7 SoC family

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
[balamanikandan.gunasundar@microchip.com: Add peripheral clock id for pmecc]
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
6 weeks agoclk: at91: clk-main: drop parent_name check when registering main_rc oscillator
Manikandan Muralidharan [Tue, 3 Jun 2025 05:05:51 +0000 (10:35 +0530)] 
clk: at91: clk-main: drop parent_name check when registering main_rc oscillator

The clk_register function logs an error if parent_name is missing from the
Device Tree.On the SAM9X7, the main_rc node is omitted to stay aligned with
the Linux Device Tree.Remove the parent_name check in at91_clk_main_rc()
to allow it to pass NULL when the parent is not specified.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
6 weeks agoclk: at91: sam9x60-pll: add support for HW PLL freq dividers
Varshini Rajendran [Tue, 3 Jun 2025 05:05:50 +0000 (10:35 +0530)] 
clk: at91: sam9x60-pll: add support for HW PLL freq dividers

Add support for hardware dividers for PLL IDs.In sam9x7 SoC,
PLL_ID_PLLA and PLL_ID_PLLA_DIV2 has /2 hardware dividers
each.

fcorepllack -----> HW Div = 2 -+--> fpllack
                               |
                               +--> HW Div = 2 ---> fplladiv2ck

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
6 weeks agoclk: at91: sam9x60-pll: add support for core clock frequency inputs
Varshini Rajendran [Tue, 3 Jun 2025 05:05:49 +0000 (10:35 +0530)] 
clk: at91: sam9x60-pll: add support for core clock frequency inputs

Add support for different core clock frequency input ranges
for different PLL IDs in the PLL driver and align sam9x60, sama7g5 SOC
platforms.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
6 weeks agodt-bindings: drop at91.h from clock includes
Manikandan Muralidharan [Tue, 3 Jun 2025 05:05:48 +0000 (10:35 +0530)] 
dt-bindings: drop at91.h from clock includes

Remove clock/at91.h file as it is subset of
dts/upstream/include/dt-bindings/clock/at91.h.
The constants defined in this header are being used only in dts

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
6 weeks agoboard: sama5d27_wlsom1_ek: Get RAM size and base from devicetree
Fabio Estevam [Thu, 8 May 2025 00:07:10 +0000 (21:07 -0300)] 
board: sama5d27_wlsom1_ek: Get RAM size and base from devicetree

Instead of using defines for the RAM size and base address, retrieve these
information from the devicetree.

This aligns with the sama5d27_som1_ek board in commit 73c1589f025d9
("board: sama5d27_som1_ek: Get dram size and base from device tree").

While at it, remove a spurious '/* SPL */' comment.

Signed-off-by: Fabio Estevam <festevam@denx.de>
6 weeks agoARM: dts: at91: sam9x60-curiosity: Enable watchdog node
Zixun LI [Mon, 28 Apr 2025 09:16:28 +0000 (11:16 +0200)] 
ARM: dts: at91: sam9x60-curiosity: Enable watchdog node

Enable watchdog node on SAM9X60-Curiosity board.

A default timeout of 16s is added which is the maximum supported value,
also matching Linux driver's behavior.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
6 weeks agoARM: dts: sam9x60: Add watchdog DT node
Zixun LI [Mon, 28 Apr 2025 09:16:27 +0000 (11:16 +0200)] 
ARM: dts: sam9x60: Add watchdog DT node

Add the watchdog timer node for the sam9x60 SoC's.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
6 weeks agowatchdog: at91sam9_wdt: Add SAM9X60 support
Zixun LI [Mon, 28 Apr 2025 09:16:26 +0000 (11:16 +0200)] 
watchdog: at91sam9_wdt: Add SAM9X60 support

SAM9X60 has a slightly different watchdog implementation:
- Timer value moved into a new register WLR
- Some MR register fields have their position changed

This patch add SAM9X60 support, also adds a compatible
for SAMA5D4 which is the same as existing SAM9260.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
6 weeks agowatchdog: at91sam9_wdt: Rename priv to wdt
Zixun LI [Mon, 28 Apr 2025 09:16:25 +0000 (11:16 +0200)] 
watchdog: at91sam9_wdt: Rename priv to wdt

"wdt" is a better name for watchdog rather than generic "priv".

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
6 weeks agoarm: at91: wdt: Rename regval in priv data to mr
Zixun LI [Mon, 28 Apr 2025 09:16:24 +0000 (11:16 +0200)] 
arm: at91: wdt: Rename regval in priv data to mr

Use the name "mr" since we are referring to timer mode register.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>