* config/aarch64/aarch64.c (aarch_macro_fusion_pair_p): Push the
check for CC usage into AARCH64_FUSE_CMP_BRANCH.
* config/i386/i386.c (ix86_macro_fusion_pair_p): Push the check for
CC usage from generic code to here.
* sched-deps.c (sched_macro_fuse_insns): Move the condition for
CC usage into the target macros.
* config/rs6000/rs6000.c (toc_relative_expr_p): Make tocrel_base
and tocrel_offset be pointer args rather than implicitly using
static versions.
(legitimate_constant_pool_address_p, rs6000_emit_move,
const_load_sequence_p, adjust_vperm): Add local tocrel_base and
tocrel_offset and use in toc_relative_expr_p call.
(print_operand, print_operand_address): Use static tocrel_base_oac
and tocrel_offset_oac.
(rs6000_output_addr_const_extra): Use static tocrel_base_oac and
tocrel_offset_oac.
ebotcazou [Thu, 29 Jun 2017 19:21:25 +0000 (19:21 +0000)]
* expr.c (expand_expr) <normal_inner_ref>: When testing for unaligned
objects, take into account only the alignment of 'op0' and 'mode1' if
'op0' is a MEM.
sje [Thu, 29 Jun 2017 18:20:14 +0000 (18:20 +0000)]
2017-06-29 Steve Ellcey <sellcey@cavium.com>
* ccmp.c (ccmp_tree_comparison_p): New function.
(ccmp_candidate_p): Update to use above function.
(get_compare_parts): New function.
(expand_ccmp_next): Update to use new functions.
(expand_ccmp_expr_1): Take tree arg instead of gimple, update to use
new functions.
(expand_ccmp_expr): Pass tree instead of gimple to expand_ccmp_expr_1,
take mode as argument.
* ccmp.h (expand_ccmp_expr): Add mode as argument.
* expr.c (expand_expr_real_1): Pass mode as argument.
nathan [Thu, 29 Jun 2017 18:20:13 +0000 (18:20 +0000)]
PR c++/81247
* parser.c (cp_parser_namespace_definition): Immediately close the
namespace if there's no open-brace.
* name-lookup.c (do_pushdecl): Reset OLD when pushing into new
namespace.
segher [Thu, 29 Jun 2017 17:28:47 +0000 (17:28 +0000)]
combine: Print insns with the cost dump
In the combine dump file, at the start there is a list of the RTL cost
of every insn. The only thing listed about the insns is the UID though.
To make it more useful, this patch prints the insn itself as well (in
slim format).
* combine.c (combine_instructions): Print insns to dump_file, together
with their costs.
nathan [Thu, 29 Jun 2017 14:49:46 +0000 (14:49 +0000)]
* cp-tree.h (THIS_NAME, IN_CHARGE_NAME, VTBL_PTR_TYPE,
VTABLE_DELTA_NAME, VTABLE_PFN_NAME): Delete.
* decl.c (initialize_predefined_identifiers): Name cdtor special
names consistently. Use literals for above deleted defines.
(cxx_init_decl_processing): Use literal for vtbl_ptr_type name,
nathan [Thu, 29 Jun 2017 14:38:09 +0000 (14:38 +0000)]
* call.c (check_dtor_name): Use constructor_name for enums too.
(build_new_method_call_1): Use constructor_name for cdtors and
show ~ for dtor.
* class.c (build_self_reference): Use TYPE_NAME to get name of
self reference.
* name-lookup (constructor_name): Use DECL_NAME directly.
(constructor_name_p): Reimplement.
(push_class_level_binding_1): Use TYPE_NAME directly.
rguenth [Thu, 29 Jun 2017 14:04:02 +0000 (14:04 +0000)]
2017-06-29 Richard Biener <rguenther@suse.de>
* tree-vect-loop.c (vect_analyze_scalar_cycles_1): Do not add
reduction chains to LOOP_VINFO_REDUCTIONS.
* tree-vect-slp.c (vect_analyze_slp): Continue looking for
SLP reductions after processing reduction chains.
bergner [Thu, 29 Jun 2017 12:58:32 +0000 (12:58 +0000)]
gcc/
PR middle-end/81194
* cfgexpand.c (expand_gimple_stmt_1): Handle switch statements
with only one label.
* stmt.c (expand_case): Assert NCASES is greater than one.
gcc/testsuite/
PR middle-end/81194
* g++.dg/pr81194.C: New test.
rguenth [Thu, 29 Jun 2017 11:25:29 +0000 (11:25 +0000)]
2017-06-29 Richard Biener <rguenther@suse.de>
* tree-cfg.c (group_case_labels_stmt): Return whether we changed
anything.
(group_case_labels): Likewise.
(find_taken_edge): Push sanity checking on val to workers...
(find_taken_edge_cond_expr): ... here
(find_taken_edge_switch_expr): ... and here, handle cases
with just a default label.
* tree-cfg.h (group_case_labels_stmt): Adjust prototype.
(group_case_labels): Likewise.
* tree-cfgcleanup.c (execute_cleanup_cfg_post_optimizing): When
group_case_labels does anything cleanup the CFG again.
rearnsha [Thu, 29 Jun 2017 10:24:04 +0000 (10:24 +0000)]
[arm] Fix bootstrap - missing initializer in tail entry of autogenerated code
My patch yesterday accidentally missed a hunk that added the
update to the tail entry of the autogenerated data structure
produced by parsecpu.awk. This causes native bootstraps to
fail.
This patch adds back the missing hunk.
2017-06-29 Richard Earnshaw <rearnsha@arm.com>
* config/arm/parsecpu.awk (gen_comm_data): Add initializer for
profile to the dummy entry at the end of the list of architectures.
* config/arm/arm-cpu-cdata.h: Regenerated.
collison [Thu, 29 Jun 2017 09:21:57 +0000 (09:21 +0000)]
2017-06-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Michael Collison <michael.collison@arm.com>
PR target/70119
* config/aarch64/aarch64.md (*aarch64_<optab>_reg_<mode>3_mask1):
New pattern.
(*aarch64_reg_<mode>3_neg_mask2): New pattern.
(*aarch64_reg_<mode>3_minus_mask): New pattern.
(*aarch64_<optab>_reg_di3_mask2): New pattern.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Account for cost
of shift when the shift amount is masked with constant equal to
the size of the mode.
* config/aarch64/predicates.md (subreg_lowpart_operator): New
predicate.
2017-06-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Michael Collison <michael.collison@arm.com>
PR target/70119
* gcc.target/aarch64/var_shift_mask_1.c: New test.
ramana [Wed, 28 Jun 2017 22:09:50 +0000 (22:09 +0000)]
[AArch64] Do not increase data alignment at -Os and with -fconserve-stack.
We unnecessarily align data to 8 byte alignments even when -Os is
specified. This brings the logic in the AArch64 backend more in line
with the ARM backend and helps gain some image size in a few
places. Caught by an internal report on the size of rodata sections
being high with aarch64 gcc.
* config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): New.
(DATA_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
(LOCAL_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
Bootstrapped and regression tested on aarch64-none-linux-gnu with no
regressions.
thopre01 [Wed, 28 Jun 2017 15:09:08 +0000 (15:09 +0000)]
[ARM] Consistently check for neon in vect effective targets
Conditions checked for ARM targets in vector-related effective targets
are inconsistent:
* sometimes arm*-*-* is checked
* sometimes Neon is checked
* sometimes arm_neon_ok and sometimes arm_neon is used for neon check
* sometimes check_effective_target_* is used, sometimes
* is-effective-target
This patch consolidate all of these check into using is-effective-target
arm_neon and when little endian was checked, the check is kept.
2017-06-28 Thomas Preud'homme <thomas.preudhomme@arm.com>
rearnsha [Wed, 28 Jun 2017 15:02:38 +0000 (15:02 +0000)]
[arm] Fix incorrect __ARM_ARCH_PROFILE for -march=armv7
ACLE explicitly states that when targetting the common subset of
ARMv7-A, ARMv7-R and ARMv7-M, the __ARM_ARCH_PROFILE macro should not
be set. We currently set it to 'M' which is clearly erroneous.
The logic for creating this is very convoluted and also somewhat
fragile, so I've taken the opportunity to use the new CPU and
architecture definition infrastructure to record the profile for each
architecture explicitly rather than try to reconstruct it from other
data. I think this results in a much more robust solution.
2017-06-28 Richard Earnshaw <rearnsha@arm.com>
* config/arm/parsecpu.awk (profile): Parse new keyword in an arch
context.
(gen_comm_data): Emit architectural setting of arch_prof.
* config/arm/arm-cpus.in (armv6-m, armv6s-m, armv7-a, armv7ve): Set the
profile.
(armv7-r, armv7-m, armv7e-m, armv8-a, armv8.1-a, armv8.2-a): Likewise.
(armv8-m.base, armv8-m.main): Likewise.
* arm-protos.h (arm_build_target): Add profile field.
(arch_option): Likewise.
* config/arm/arm.c (arm_configure_build_target): Copy the profile to
the active target.
* config/arm/arm.h (TARGET_ARM_ARCH_PROFILE): Use
arm_active_target.profile.
rguenth [Wed, 28 Jun 2017 14:24:00 +0000 (14:24 +0000)]
2017-06-28 Richard Biener <rguenther@suse.de>
PR middle-end/81227
* fold-const.c (negate_expr_p): Use TYPE_UNSIGNED, not
TYPE_OVERFLOW_WRAPS.
* match.pd (negate_expr_p): Likewise.
* tree-ssa-reassoc.c (optimize_range_tests_diff): Use
fold_build2, not fold_binary.
wilco [Wed, 28 Jun 2017 14:21:04 +0000 (14:21 +0000)]
This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c
triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html.
In ILP32 all memory accesses must have Pmode as the base address, but
aarch64_expand_mov_immediate wasn't emitting a conversion in one case.
Besides fixing this add an assert that flags any MEM operands that are
not Pmode.
gcc/
* config/aarch64/aarch64 (aarch64_expand_mov_immediate):
Convert memory address to Pmode.
(aarch64_print_operand): Assert MEM operands are always Pmode.
wilco [Wed, 28 Jun 2017 14:13:02 +0000 (14:13 +0000)]
Improve Cortex-A53 shift bypass
The aarch_forward_to_shift_is_not_shifted_reg bypass always returns true
on AArch64 shifted instructions. This causes the bypass to activate in
too many cases, resulting in slower execution on Cortex-A53 like reported
in PR79665.
This patch uses the arm_no_early_alu_shift_dep condition instead which
improves the example in PR79665 by ~7%. Given it is no longer used,
remove aarch_forward_to_shift_is_not_shifted_reg. Also remove an
unnecessary REG_P check.
meissner [Wed, 28 Jun 2017 13:07:12 +0000 (13:07 +0000)]
[gcc]
2017-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>
PR ipa/81238
* multiple_target.c (create_dispatcher_calls): Set the default
clone to be static, not public.
[gcc/testsuite]
2017-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* lib/target-supports.exp
(check_ppc_cpu_supports_hw_available): New test to make sure
__builtin_cpu_supports works on power7 and newer.
jsm28 [Wed, 28 Jun 2017 09:21:16 +0000 (09:21 +0000)]
Use ucontext_t not struct ucontext in linux-unwind.h files.
Current glibc no longer gives the ucontext_t type the tag struct
ucontext, to conform with POSIX namespace rules. This requires
various linux-unwind.h files in libgcc, that were previously using
struct ucontext, to be fixed to use ucontext_t instead. This is
similar to the removal of the struct siginfo tag from siginfo_t some
years ago.
This patch changes those files to use ucontext_t instead. As the
standard name that should be unconditionally safe, so this is not
restricted to architectures supported by glibc, or conditioned on the
glibc version.
Tested compilation together with current glibc with glibc's
build-many-glibcs.py.
jakub [Wed, 28 Jun 2017 08:05:20 +0000 (08:05 +0000)]
* gcc.target/i386/cmov7.c (sgn): Renamed to ...
(foo): ... this. Change constants such that it isn't matched
as __builtin_copysign, yet tests the combiner the same.
collison [Wed, 28 Jun 2017 07:07:49 +0000 (07:07 +0000)]
2017-06-28 Michael Collison <michael.collison@arm.com>
PR target/68535
* config/arm/arm.c (gen_ldm_seq): Remove last unnecessary
set of base_reg
(arm_gen_movmemqi): Removed unused variable 'i'.
Convert 'for' loop into 'while' loop.
(arm_expand_prologue): Remove last unnecessary set of insn.
(thumb_pop): Remove unused variable 'pushed_words'.
(thumb_exit): Remove last unnecessary set of regs_to_pop.
krebbel [Wed, 28 Jun 2017 07:03:35 +0000 (07:03 +0000)]
S/390: New option -mpic-data-is-text-relative
For hotpatching it might be required to introduce new .text parts
while keep using the existing .data/.bss sections. To make this work
the backend needs to be prevented from using relative addressing
between code and data.
This only works when already building PIC
since the addressing will then be handling via GOT.
gcc/testsuite/ChangeLog:
2017-06-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/nodatarel-1.c: New test.
gcc/ChangeLog:
2017-06-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/predicates.md: Use s390_rel_address_ok_p.
* config/s390/s390-protos.h: Add prototype of
s390_rel_address_ok_p.
* config/s390/s390.c (s390_got_symbol): New function.
(s390_rel_address_ok_p): New function.
(legitimize_pic_address): Use s390_rel_address_ok_p.
(s390_load_got): Use s390_got_symbol.
(s390_option_override): Issue error if
-mno-pic-data-is-text-relative is used without -fpic/-fPIC.
* config/s390/s390.h (TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE):
New macro.
* config/s390/s390.opt: New option mpic-data-is-text-relative.
ian [Tue, 27 Jun 2017 22:36:48 +0000 (22:36 +0000)]
runtime: adapt memory management to AIX mmap
On AIX:
* mmap does not allow to map an already mapped range,
* mmap range start at 0x30000000 for 32 bits processes,
* mmap range start at 0x70000000_00000000 for 64 bits processes
timshen [Tue, 27 Jun 2017 18:19:03 +0000 (18:19 +0000)]
PR libstdc++/80187
* include/std/variant (variant::variant, variant::~variant,
variant::operator=): Implement triviality forwarding for four
special member functions.
* testsuite/20_util/variant/compile.cc: Tests.
jsm28 [Tue, 27 Jun 2017 17:33:28 +0000 (17:33 +0000)]
Fix genmultilib reuse rule checks for large sets of option combinations.
genmultilib computes combination_space, a list of all combinations of
options in MULTILIB_OPTIONS that might have multilibs built for them
(some of which may end up not having multilibs built for them, and
some of those may end up being mapped to other multilibs with
MULTILIB_REUSE). It is then used to validate the right hand part of
MULTILIB_REUSE rules, checking with expr that combination_space
matches a basic regular expression derived from that right hand part.
There are two problems with this approach to validation:
* It requires that right hand part to have options in the same order
as in MULTILIB_OPTIONS, in contradiction to the documentation of
MULTILIB_REUSE saying that order does not matter there.
* combination_space can be so large that the expr call fails with an
E2BIG error. I have a local ARM configuration with 40 multilibs but
3840 combinations of options from MULTILIB_OPTIONS (so 3839 listed
in combination_space, since it doesn't list the default multilib)
and 996 MULTILIB_REUSE rules. This generates a combination_space
string longer than the Linux kernel's MAX_ARG_STRLEN (PAGE_SIZE *
32, the limit on the length of a single argv string), so that expr
cannot be run.
This patch changes the validation approach to generate a much shorter
extended regular expression for any sequence of multilib options in
any order, and uses that for the validation instead.
Tested with a build for arm-none-eabi --with-multilib-list=aprofile
(as a configuration that uses MULTILIB_REUSE).
* genmultilib (combination_space): Remove variable.
Validate reuse rules against regular expression for any sequence
of multilib options in any order.
vries [Tue, 27 Jun 2017 15:51:37 +0000 (15:51 +0000)]
Use secure_getenv for GOMP_DEBUG
2017-06-27 Tom de Vries <tom@codesourcery.com>
* env.c (parse_unsigned_long_1): Factor out of ...
(parse_unsigned_long): ... here.
(parse_int_1): Factor out of ...
(parse_int): ... here.
(parse_int_secure): New function.
(initialize_env): Use parse_int_secure for GOMP_DEBUG.
* secure_getenv.h: Factor out of ...
* plugin/plugin-hsa.c: ... here.
* testsuite/libgomp.oacc-c-c++-common/gomp-debug-env.c: New test.
hainque [Tue, 27 Jun 2017 13:55:42 +0000 (13:55 +0000)]
2017-06-27 Jerome Lambourg <lambourg@adacore.com>
* config/i386/vxworks.h (ASM_SPEC): Remove definition. No target
specific need, just fallback on defaults.
(ASM_OUTPUT_ALIGNED_BSS): Add #undef before #define.
* config/i386/vxworks.h (DBX_REGISTER_NUMBER): Pick distinct
map for 64bits.
(TARGET_OS_CPP_BUILTINS): builtin_define CPU to X86_64 for 64bit
targets. Pick a default if no particular attempt applied.
(STACK_CHECK_PROTECT): Double for 64bit targets, which have
larger contexts.
* config/vxworks.h (VXWORKS_LIB_SPEC): Incorporate ...
(TLS_SYM): New local macro, forcing reference to __tls__ on
link command lines for VxWorks 7 RTPs, triggering initialization
of tlsLib.
(VXWORKS_HAVE_TLS): New macro. State whether the target VxWorks
OS features TLS support, true for RTPs on VxWorks 7.
* config/vxworks.c (vxworks_override_options): Setup emutls
accordingly.
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