There have been a few changes since the patch ("arm64: dts: qcom: Add
LTE SKUs for sc7280-villager family")
* New firmware reports LTE boards as "SKU 512" now. Old firmware will
still report "SKU 0", but that's all pre-production and everyone
will update.
* It's been relaized that no "-rev0" boards were ever built that were
WiFi-only. Thus we don't two entries for -rev0.
Douglas Anderson [Mon, 29 Aug 2022 15:48:23 +0000 (08:48 -0700)]
dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
There have been a few changes since the patch ("dt-bindings: arm:
qcom: document sc7280 and villager board").
* New firmware reports LTE boards as "SKU 512" now. Old firmware will
still report "SKU 0", but that's all pre-production and everyone
will update.
* It's been relaized that no "-rev0" boards were ever built that were
WiFi-only. Thus we don't two entries for -rev0.
arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
Add nodes for the onboard USB hub on herobrine devices. Remove the
'always-on' property from the hub regulator, since the regulator
is now managed by the onboard_usb_hub driver.
arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
Add nodes for the onboard USB hub on trogdor devices. Remove the
'always-on' property from the hub regulator, since the regulator
is now managed by the onboard_usb_hub driver.
For anyone using trogdor-based devices on Linux, it should be
noted that this requires "CONFIG_USB_ONBOARD_HUB=y".
arm64: dts: qcom: align SDHCI reg-names with DT schema
DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
just like TXT bindings were expecting before the conversion.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220712144245.17417-4-krzysztof.kozlowski@linaro.org
arm64: dts: qcom: sm8250: provide additional MSI interrupts
On SM8250 each group of MSI interrupts is mapped to the separate host
interrupt. Describe each of interrupts in the device tree for PCIe0
host.
Tested on Qualcomm RB5 platform with first group of MSI interrupts being
used by the PME and attached ath11k WiFi chip using second group of MSI
interrupts.
arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
Add #clock-cells property to the HDMI PHY device node to let other nodes
resolve the hdmipll clock. While we are at it, also add the XO clock to
the device node.
arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'reg' is a required property
qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property
qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Judy Hsiao [Fri, 26 Aug 2022 06:56:21 +0000 (06:56 +0000)]
arm64: dts: qcom: sc7280: Fix Dmic no sound on villager-r1
Fix the DMIC no sound issue of villager-r1 by using "PP1800_L2C" as the
DMIC power source to match the hardware schematic.
This patch:
1. set vdd-micb-supply to PP1800_L2C as the MIC Bias voltage regulator.
2. In audio-routing, set VA DMIC01~VA DMIC03 to use the vdd-micb-supply
setting.
Co-developed-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220826065621.2255795-1-judyhsiao@chromium.org
arm64: dts: qcom: sc7280: Add sound node for CRD 3.0/3.1
Add dt nodes for sound card support on rev5+ (aka CRD 3.0/3.1) boards,
which is using WCD9385 headset playback, capture, I2S speaker playback
and DMICs via VA macro.
arm64: dts: qcom: sc7280: Add sound node for CRD 1.0/2.0 and IDP boards
Add dt nodes for sound card support on revision 3, 4
(aka CRD 1.0 and 2.0) and IDP boards, which is using WCD9385 headset
playback, capture, I2S speaker playback and DMICs via VA macro.
arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards
Add wcd9385 codec node for audio use case on sc7280 based platforms
of revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards.
Add tlmm gpio property for switching CTIA/OMTP Headset.
arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs
SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
external codecs using soundwire masters. Add these nodes for sc7280 based
platforms audio use case.
When this property is set, the remoteproc is used to boot the
LPASS and therefore lpass_q6ss_ahbm_clk and lpass_q6ss_ahbs_clk
clocks would be used to bring LPASS out of reset and the rest of
the lpass clocks would be controlled directly by the remoteproc.
This is a cleanup done to handle overlap of regmap of
lpasscc and lpass_aon blocks.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1662005846-4838-2-git-send-email-quic_c_skakit@quicinc.com
This adds sc7280-herobrine-villager-r1.dts for villager device tree files.
Herobrine-r1 is exactly the same as -r0 except that it uses a
different audio solution (it uses the same one as the CRD).
arm64: dts: qcom: sa8155p-adp: Remove unused properties from eth node
The 'snps,ptp-ref-clk-rate' and 'snps,ptp-req-clk-rate' properties
are not supported by the stmmac driver currently, so remove
them from the sa8155p-adp ethernet node as well.
Cc: Bjorn Andersson <andersson@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: David Miller <davem@davemloft.net> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220907204153.2039776-1-bhupesh.sharma@linaro.org
Add magnetometer Yamaha YAS537 to the DeviceTree of samsung-serranove.
The YAS537 variant was recently added to the Yamaha YAS magnetometers
driver [1].
In the DeviceTree of samsung-serranove for the Android kernel, there is
unfortunately no information on interrupts or pinctrl [2].
In the Android kernel driver for magnetometer Yamaha YAS537, there is a
device-specific matrix to correct an ellipsoid shape of the measure values
into a sphere shape [3]. This could be converted and applied to a mount-matrix.
However, the current state of the mainline Yamaha YAS537 driver needs
post-process calibration in userspace anyway, as it lacks a formula to center
the measure values around zero. The correction of the ellipsoid into a sphere
can be done in the post-process calibration as well.
A mount-matrix is needed nonetheless. When putting samsung-serranove flat on
a table in portrait orientation heading north, the Yamaha YAS537 magnetometer
axes natively point X+ to north, Y+ to east and Z+ into the ground, which
corresponds to a common way to define the Earth's magnetic field coordinate
system [4]. According to the IIO definition, it should be Y+ to north, X+ to
east and Z+ upwards [5], which corresponds to a common device coordinate system
and eases sensor fusing.
arm64: dts: qcom: sc8280xp-pmics: Remove reg entry & use correct node name for pmc8280c_lpg node
Commit eeca7d46217c ("arm64: dts: qcom: pm8350c: Drop PWM reg declaration")
dropped PWM reg declaration for pm8350c pwm(s), but there is a leftover
'reg' entry inside the lpg/pwm node in sc8280xp dts file. Remove the same.
While at it, also remove the unused unit address in the node
label.
Also, since dt-bindings expect LPG/PWM node name to be "pwm",
use correct node name as well, to fix the following
error reported by 'make dtbs_check':
Johan Hovold [Mon, 5 Sep 2022 09:16:02 +0000 (11:16 +0200)]
arm64: dts: qcom: fix syscon node names
Some recent changes that added new syscon nodes used misspelled node names.
Fixes: 86d7c9460e2c arm64: dts: qcom: sm8150: split TCSR halt regs out of mutex Fixes: 0da603387225 arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex Fixes: 8a8531e69b2d arm64: dts: qcom: sdm845: split TCSR halt regs out of mutex Fixes: d9a2214d6ba5 arm64: dts: qcom: sc7280: split TCSR halt regs out of mutex Fixes: ce1ac53c7faa arm64: dts: qcom: sc7180: split TCSR halt regs out of mutex Fixes: fc10cfa38580 arm64: dts: qcom: msm8998: split TCSR halt regs out of mutex Fixes: 100ce2205924 arm64: dts: qcom: msm8996: split TCSR halt regs out of mutex Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220905091602.20364-1-johan+linaro@kernel.org
arm64: dts: qcom: pmk8350: drop interrupt-names from ADC
The SPMI PMIC VADC and Thermal Monitoring ADC have only one interrupt
line and their bindings do not allow interrupt-names. None of other
variants use them, so drop it from DTSI.
arm64: dts: qcom: pmk8350: drop incorrect io-channel-ranges
Since commit 044b32fa5229 ("dt-bindings:iio:qcom-spmi-vadc drop
incorrect io-channel-ranges from example") the io-channel-ranges are not
allowed in the Qualcomm SPMI PMIC ADC and anyway they are not correct
for IIO provider.
Akhil P Oommen [Sun, 28 Aug 2022 19:40:55 +0000 (01:10 +0530)]
arm64: dts: qcom: sc7280: Update gpu opp table
On the lite sku where GPU Fmax is 550Mhz, voting for a slightly higher
bandwidth at the highest gpu opp helps to improve "Manhattan offscreen"
score by 10%. Update the gpu opp table such that this is applicable only
on SKUs which has 550Mhz as GPU Fmax.
Add the alias 'wifi0' for the WiFi interface on the Qcard. The alias
is needed by the BIOS which patches the WiFi MAC address read from
the VPD (Vital Product Data) into the device tree.
Add the registers and clock for the Inline Crypto Engine (ICE) to the
device tree node for the UFS host controller on sm8450. This makes
ufs_qcom support inline encryption when CONFIG_SCSI_UFS_CRYPTO=y.
The address and size of the register range, and the minimum and maximum
frequency of the ICE core clock, all match the values used downstream.
I've validated this on an SM8450 HDK using the 'encrypt' group of
xfstests on ext4 with MOUNT_OPTIONS="-o inlinecrypt".
Stephen Boyd [Sat, 27 Aug 2022 00:49:00 +0000 (17:49 -0700)]
arm64: dts: qcom: sc7180-trogdor: Keep pm6150_adc enabled for TZ
There's still a thermal zone using pm6150_adc in the pm6150.dtsi file,
pm6150_thermal. It's not super obvious because it indirectly uses the
adc through an iio channel in pm6150_temp. Let's keep this enabled on
lazor and coachz so that reading the temperature of the pm6150_thermal
zone continues to work. Otherwise we get -EINVAL when reading the zone,
and I suspect the PMIC temperature trip doesn't work properly so we
don't shutdown when the PMIC overheats.
Bryan O'Donoghue [Sun, 28 Aug 2022 13:26:48 +0000 (14:26 +0100)]
arm64: dts: qcom: pm8350c: Drop PWM reg declaration
The PWM is a part of the SPMI PMIC block and maps several different
addresses within the SPMI block. It is not accurate to describe as pwm@reg
as a result.
Bob Moragues [Thu, 28 Jul 2022 21:33:21 +0000 (14:33 -0700)]
arm64: dts: qcom: sc7280: Add support for zoglin
Zoglin is a Hoglin Chromebook with SPI Flash reduced from 64MB to 8MB.
Zoglin is identical to Hoglin except for the SPI Flash.
The actual SPI Flash is dynamically probed at and not specified in DTS.
Bob Moragues [Thu, 28 Jul 2022 21:33:20 +0000 (14:33 -0700)]
dt-bindings: arm: qcom: document zoglin board
Zoglin is a Hoglin Chromebook with SPI Flash reduced from 64MB to 8MB.
Zoglin is identical to Hoglin except for the SPI Flash.
The actual SPI Flash is dynamically probed at and not specified in DTS.
Add LEDs found on the Xiaomi MSM8996 devices. The devices share
a status RGB LED mounted on the front, as well as a PWM-driven
IR LED for remote control (sometimes known as an IR blaster).
The Mi Note 2 has an additional pair of white LEDs used as backlights
for the touchkeys driven by the PM8994 LPG block.
arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensors
The Camera Control Interface I2C controller device node belongs to
TITAN_TOP_GDSC power domain, so its children do not need to specify it
again. The OV7251 and OV8856 camera sensor bindings do not allow
power-domains.
Do not allow the RPMh regulators to switch to low-power mode with an
exception for the UFS regulators (l3c, l6c, l10c and l17c) as UFS
supports an idle mode.
This specifically avoids having regulators be but in low-power mode when
only some consumers specify loads while the actual total load really
warrants high-power mode.
Do not allow the RPMh regulators to switch to low-power mode.
This specifically avoids having regulators be but in low-power mode when
only some consumers specify loads while the actual total load really
warrants high-power mode.
Do not allow the RPMh regulators to switch to low-power mode with an
exception for the UFS regulators (l7c and l3d) as UFS supports an idle
mode.
This specifically avoids having regulators be but in low-power mode when
only some consumers specify loads while the actual total load really
warrants high-power mode.
Abel Vesa [Fri, 12 Aug 2022 10:12:39 +0000 (13:12 +0300)]
arm64: dts: qcom: sdm845: Add the RPMh stats node
SDM845 is a special case compared to the other platforms that use RPMh
stats, since it only has 2 stats (aosd and cxsd), while the others have
a 3rd one (ddr).
So lets add the node but with a SDM845 dedicated compatible to make
the driver aware of the different stats config.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220812101240.1869605-3-abel.vesa@linaro.org
Abel Vesa [Fri, 12 Aug 2022 10:12:37 +0000 (13:12 +0300)]
arm64: dts: qcom: sdm845: Reduce reg size for aoss_qmp
Like on the other platforms that provide RPMh stats, on SDM845, the
aoss_qmp reg size needs to be reduced to its actual size of 0x400,
otherwise it will overlap with the RPMh stats reg base, node that will
be added later on.
arm64: dts: qcom: sm8150: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sm8150-mtp.dtb: hwlock: 'reg' is a required property
qcom/sm8150-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
arm64: dts: qcom: sm8150: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
arm64: dts: qcom: sdm630: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'reg' is a required property
qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
arm64: dts: qcom: sdm630: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
arm64: dts: qcom: qcs404: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property
qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
arm64: dts: qcom: sdm845: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sdm845-shift-axolotl.dtb: hwlock: 'reg' is a required property
qcom/sdm845-shift-axolotl.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
arm64: dts: qcom: sdm845: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
arm64: dts: qcom: sc7280: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
This also describes more accurately the devices and their IO address
space, and allows to remove incorrect syscon compatible from TCSR mutex:
qcom/sc7280-herobrine-crd.dtb: hwlock@1f40000: compatible: ['qcom,tcsr-mutex', 'syscon'] is too long
arm64: dts: qcom: sc7180: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'reg' is a required property
qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
arm64: dts: qcom: sc7180: split TCSR halt regs out of mutex
The TCSR halt regs are next to TCSR mutex (in one address block called
TCSR_MUTEX), so before converting the TCSR mutex into device with
address space, we need to split the halt regs to its own syscon device.
arm64: dts: qcom: msm8998: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/msm8998-asus-novago-tp370ql.dtb: hwlock: 'reg' is a required property
qcom/msm8998-asus-novago-tp370ql.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
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