- Fix the i.MX8M Nano GPU path.
- Enable RNG support for KASLR on Toradex i.MX8 boards.
- Enable watchdog and clock driver for imx6ulz_smm_m2b.
- Tighten dependencies on CMD_BLOB.
- Remove the rest of i.MX31 support.
Magnus Damm [Wed, 2 Jul 2025 17:13:46 +0000 (19:13 +0200)]
ARM: renesas: Put common r7s72100 code in board/renesas/common
Break out SoC specific code from the GR-Peach board and put it into the
board/renesas/common directory so it can be easily shared between the
GR-Peach and Genmai boards.
Marek Vasut [Mon, 7 Jul 2025 08:39:31 +0000 (10:39 +0200)]
ARM: renesas: Split common RZ/A1 and GR-PEACH defconfigs
Split the RZ/A1 GR-PEACH defconfig into board-specific defconfig
and common RZ/A1 SoC defconfig. This is a preparatory patch for
new RZ/A1 boards, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 16 Jun 2025 22:45:03 +0000 (00:45 +0200)]
arm64: renesas: Switch R-Car V4H to renesas_rcar4_sa0 binman etype
Replace current ad-hoc generation of SA0 header with renesas_rcar4_sa0 binman
etype on Renesas R-Car V4H. The new binman etype generates header which is
almost identical to the current ad-hoc SA0 header, with one difference, the
load length matches the actual payload size, which slightly improves boot time.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 16 Jun 2025 22:45:02 +0000 (00:45 +0200)]
binman: Add renesas_rcar4_sa0 etype
Add new etype which generates the Renesas R-Car Gen4 SA0 header.
This header is placed at the beginning of SPI NOR and describes
where should data from SPI NOR offset 0x40000 be loaded to, and
how much data should be loaded there. In case of U-Boot, this is
used to load SPL and possibly other payload(s) into RT-VRAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 8 Jun 2025 21:01:04 +0000 (23:01 +0200)]
arm64: dts: renesas: Clean up sysinfo EEPROM DT description on R-Car Gen3
Most of the sysinfo EEPROM node eeprom@50 is now part of the core DTs,
remove duplicate DT properties from *-u-boot.dtsi . Adjust the phandle
reference to i2c-eeprom in sysinfo node using <&{i2c_*/eeprom@50}> to
avoid need for DT label. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 30 Jun 2025 18:51:15 +0000 (20:51 +0200)]
net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_PHY_ADDR
Drop CFG_SH_ETHER_PHY_ADDR from README and configuration files, this
value is never used, PHY address is extracted from control DT instead.
No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 30 Jun 2025 18:51:13 +0000 (20:51 +0200)]
net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_CACHE_*
Drop CFG_SH_ETHER_CACHE_WRITEBACK and CFG_SH_ETHER_CACHE_INVALIDATE,
which are now always enabled in the sh_eth driver, because those cache
operations are always available. On architectures which do not implement
cache operations yet, cache operations have to be implemented first.
CFG_SH_ETHER_ALIGNE_SIZE now set as SH_ETHER_ALIGN_SIZE in sh_eth.h
based on architecture and no longer configured on board level.
Remove CFG_SH_ETHER_CACHE_WRITEBACK configuration option from README.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 30 Jun 2025 18:51:12 +0000 (20:51 +0200)]
net: sh_eth: Convert cache operations to static functions
Turn the current cache operation macros into static functions to improve
compiler coverage checking. This does change the driver behavior slightly,
the driver now expects those cache operation functions to be available on
all architectures on which it is used. This should pose no problem, as the
driver is only used on 32bit and 64bit ARM, which both have those operations.
The CFG_SH_ETHER_ALIGNE_SIZE is converted to SH_ETHER_ALIGN_SIZE and defined
as either 64 on ARM or 16 on SH.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 30 Jun 2025 18:51:11 +0000 (20:51 +0200)]
net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_USE_PORT
The CFG_SH_ETHER_USE_PORT configuration option is a remnant from
before U-Boot DM existed and SH Ethernet made full use of it, and
is no longer used, remove it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Mon, 30 Jun 2025 18:51:10 +0000 (20:51 +0200)]
net: sh_eth: Pass struct port_info around
The struct sh_eth_dev .port member is always set to 0, therefore only
single-ported SH Ethernet is ever used. Support for multiple SH Ethernet
ports implemented on driver level is a remnant from before U-Boot DM
existed.
Pass struct sh_eth_info port_info around directly and remove the
struct sh_eth_dev entirely. Handling of multiple ports should be done
by U-Boot DM and multiple per-driver-instance private data.
No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add Renesas R-Car Gen4 SCIF/HSCIF loader compatible SREC generation.
This is a regular U-Boot SPL SREC augmented with a short header which
describes where to store the received data and how much data to store.
This header is interpreted by the R-Car Gen4 BootROM SCIF/HSCIF loader.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 15 Jun 2025 10:51:07 +0000 (12:51 +0200)]
arm64: renesas: Convert SCIF SREC from u-boot-spl.bin
Convert u-boot-spl.bin instead of u-boot-spl ELF into SCIF loader
compatible SREC. The u-boot-spl.bin includes SPL DT, while the ELF
does not, which leads to failure to start SPL via SCIF loader due
to missing SPL DT. Fix this by using u-boot-spl.bin which includes
the DT.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Andrew Goodbody [Wed, 2 Jul 2025 16:02:10 +0000 (17:02 +0100)]
nvme: Fix memory leak on error path of nvme_init
The use of log_msg_ret to log a message and return an error meant that
memory allocated earlier in the function was not freed on this error
path. Instead log the message in the same way that log_msg_ret would do
and then goto the cleanup code to free the memory.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
net: ti: icssg: Read firmware name from device-tree
Update the ICSSG PRU Ethernet driver to read PRU/RTU/TXPRU firmware names
from the Device Tree using the "firmware-name" property, instead of relying
on the hard-coded firmware names. The firmware names are parsed during
prueth_probe() and stored in the prueth->firmwares for each slice. The
driver now uses these dynamically loaded names when starting the PRU cores.
This change improves flexibility and allows firmware selection to be
controlled via the device tree, making the driver more adaptable to
different platforms and firmware configurations.
Tom Rini [Wed, 2 Jul 2025 01:05:57 +0000 (19:05 -0600)]
disk/part_dos.c: Make use of LBAF for printing lbaint_t
When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.
Tom Rini [Wed, 2 Jul 2025 01:05:54 +0000 (19:05 -0600)]
common/log_syslog.c: Add missing include of <env.h>
This file was making environment calls without including <env.h> and so
relying on an indirect inclusion from elsewhere. Add the missing include
directly.
Tom Rini [Wed, 2 Jul 2025 01:05:14 +0000 (19:05 -0600)]
post: Add dependency on ARM || PPC
The post framework requires architecture specific implementation
details. At the moment this is only done for ARM and PowerPC so express
that requirement in Kconfig as well.
Tom Rini [Wed, 2 Jul 2025 01:04:29 +0000 (19:04 -0600)]
ata: Correct two dependency issues
First, the SATA_MV driver can only build on kirkwood or mvebu platforms
due to header requirements, so add that as a dependency here. Second,
SYS_SATA_MAX_DEVICE is also used by the API code so allow it to be
configured in that case.
Reviewed-by: Tony Dinh <mibodhi@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 2 Jul 2025 01:04:19 +0000 (19:04 -0600)]
crypto: fsl: Only allow these to be chosen on ARM/PowerPC
These drivers require various headers which only exist on the ARM /
PowerPC platforms which implement the hardware. Express that requirement
in Kconfig as well.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
drivers: net: phy: micrel: Try to get phy node from phy-handle
If phy node isn't found in ethernet-phy subnode, try to get it from
phy-handle. And when this fails, only then use Ethernet node. This
fix results in getting correct phy handle properties for the
phy node if defined.
Tom Rini [Wed, 2 Jul 2025 01:05:11 +0000 (19:05 -0600)]
cmd/Kconfig: Tighten dependencies on CMD_BLOB
In order for this command to build we need to compile
drivers/crypto/fsl/fsl_blob.c and this in turn includes
drivers/crypto/fsl/jr.h which references "ccsr_sec_t" which is only a
defined type for SYS_FSL_SEC_COMPAT >= 4. Express that requirement in
Kconfig as well.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
configs: colibri-imx8x: enable RNG support for KASLR
Enable DM_RNG in U-Boot to automatically populate /chosen/kaslr-seed
and enable CAAM to provide entropy.
Enable ARCH_MISC_INIT to initialize the CAAM job ring.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
configs: apalis-imx8: enable RNG support for KASLR
Enable DM_RNG in U-Boot to automatically populate /chosen/kaslr-seed
and enable CAAM to provide entropy.
Enable ARCH_MISC_INIT to initialize the CAAM job ring.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
pkg_resources is deprecated, use migration guide in [1] to migrate to
importlib.resources.
Keep the Python 3.6 backwards compatibility.
This also fixes the binman version test which failed for setuptools
versions that print the deprecation warning.
Change from __name__ to __package__ as with the transition from
pkg_resources to importlib_resources using __name__ results in
TypeErrors [2].
Romain Gantois [Thu, 26 Jun 2025 16:20:25 +0000 (18:20 +0200)]
board: ti: am33xx: Add Ethernet support for Beaglebone Green Eco
Currently, the Ethernet interface of the BBGE board isn't properly
supported.
To support this interface, describe the MAC<->PHY RGMII link and the
DP83867 PHY in the BBGE device tree. Enable the DP83867 PHY driver in
U-Boot Proper and mux the relevant RGMII lines.
Tom Rini [Wed, 9 Jul 2025 14:40:36 +0000 (08:40 -0600)]
Merge patch series "Improve Verdin AM62P thermal setup by generalizing ft_board_setup_ex()"
João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com> says:
In some use cases, board-specific device tree changes must not be overwritten
by system fixups. Although U-Boot provides ft_board_setup_ex() for this
purpose, it is currently only used on TI Keystone. This series makes
ft_board_setup_ex() a generic option, allowing its use by other architectures
and boards.
Additionally, considering that Toradex Verdin-AM62P hardware lifetime
guarantees are based on a 105°C junction temperature (while TI AM62Px supports
up to 125°C), this series implements necessary changes within TI K3 AM62P and
Toradex board code. These changes include exporting common fixup device Tree
functions used in TI K3 for board-code access and also fixup for AM62P thermal
zones to correctly reflect the number of CPU nodes according to the SoC part
number.
board: toradex: verdin-am62p: Add fixup for critical trip points
While TI AM62P supports up to 125°C junction temperature, Tj, for
industrial and automotive parts, Toradex Verdin-AM62P hardware lifetime
guarantees consider a 105°C Tj. Fixup the device tree temperature
critical trip points to match the hardware specifications. The
implementation ensures the architecture code will not overwrite the
board specific changes by enabling CONFIG_OF_BOARD_SETUP_EXTENDED for
the Verdin-AM62P.
Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
arm: mach-k3: am62p: fixup thermal cooling device by cpu number
TI AM62Px devices support CPU throttling based on thermal alerts.
However, the device tree assumes a 4-core configuration. Since the AM62P
also supports 2-core configurations, add a fixup to dynamically adjust
the cooling-device nodes within thermal zones based on the actual number
of CPU cores available.
Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
In some use cases, board-specific device tree changes must not be
overwritten by system fixups. Although U-Boot provides
ft_board_setup_ex() for this purpose, it is currently only used on TI
Keystone. Make ft_board_setup_ex() to be a generic option, allowing its
use by other architectures/boards. To maintain backward compatibility,
enable it by default on TI Keystone.
Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
Andrew Goodbody [Mon, 30 Jun 2025 11:57:10 +0000 (12:57 +0100)]
boot: pxe: Prevent evaluation of uninitialised variable
In the case where parse_sliteral returns an error then label_name
will not have been assigned to. In order to prevent evaluating
label_name in this case add a check for the return value of parse_sliteral.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
env: Fix possible out-of-bound access in env_do_env_set
It was discovered that env_do_env_set() currently suffer from a long
time of a possible out-of-bound access for the argv array handling.
The BUG is present in the function env_do_env_set() line:
name = argv[1];
where the function at this point assume the argv at index 1 is always
present and can't be NULL. Aside from the fact that it's always
better to validate argv entry with the argc variable, situation where
the argv[1] is NULL is actually possible and not an error condition.
A example of where an out-of-bound access is triggered is with the
command "askenv - Press ENTER to ...".
This is a common pattern for bootmenu entry to ask the user input after
a bootmenu command succeeded.
In the context of such command, the while loop before "name = argv[1];"
parse the "-" char as an option arg and increment the argv pointer by
one (to make the rest of the logic code ignore the option argv) and
decrement argc value.
The while loop logic is correct but at the "name = argv[1];" line, the
argv have only one element left (the "-" char) and accessing argv[1]
(aka the secong element from argv pointer) cause an out-of-bound access
(making the bootloader eventually crash with strchr searching in invalid
data)
To better handle this and prevent the out-of-bound access, actually
check the argv entry left (with the use of the argc variable) and exit
early before doing any kind of array access.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Commit 93b55636b09f ("tools: kwboot: Allow any baudrate on Linux") added a
tcgetattr() function to be used, instead of the libc's termios functions.
This was done to allow using the raw TCGETS2/TCSETS2 ioctls that allow to
support arbitrary baud rates.
This breaks the build for PowerPC, because that architecture does not have
a struct termios2 defined because the termios and ktermios are the same.
On PowerPC, the termios ioctl() emulates the TCGETS2/TCSETS*2 ioctls with
tcgetattr/tcsetattr using just the struct termios (that's as mentioned the
same than what is defined as struct termios2 in other architectures).
So there is no need to use the TCGETS2/TCSETS2 ioctls on that architecture
and just TCGETS/TCSETS ioctls with termios as defined by PowerPC is enough.
Fixes: 93b55636b09f ("tools: kwboot: Allow any baudrate on Linux") Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com>
pci_endpoint: pci_cdns_ti_ep: Fix the include path for header file
The commit under fixes tag includes "pcie-cadence.h" using angle
brackets. Since the header file is not in standard include path change
it to double quotes to ensure proper inclusion and avoid build issues,
especially on older compilers.
Manorit Chawdhry [Thu, 26 Jun 2025 10:43:32 +0000 (16:13 +0530)]
Makefile: Fix of_list_dirs with EXT_DTB
EXT_DTB overrides the of_list_dirs that is passed to binman during
builds. This causes binman to not find the normal DTB paths and instead
it just is able to use the path for EXT_DTB only.
Add the default of_list_dirs that is used for normal binman builds to
EXT_DTB usecase as well.
Tobias Olausson [Thu, 26 Jun 2025 06:54:20 +0000 (08:54 +0200)]
lib/rsa: allow matching pkcs11 path by object id
The object= part matches against the label that the pkcs11 token uses
for that object, but in some cases, specifically with a Yubikey using
ykcs11, where the keys have been imported, the labels differ between the
private and public keys [1], making the object= matching useless. These
keys will have the same id however, so matching against that works for
both the private and public part.
Andrew Goodbody [Wed, 25 Jun 2025 09:50:30 +0000 (10:50 +0100)]
common: readline: Fix always true test
The variable base is unsigned so >= 0 is always true. Fix this test
so that it is actually useful. The fix prevents the code from causing
a segfault in the case where Ctrl-w is pressed on a line consisting
only of spaces.
Fixes: dcc18ce0dbaf ("cli: Implement delete-word in cread_line()") Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Tom Rini [Sat, 28 Jun 2025 22:43:51 +0000 (16:43 -0600)]
include/spl_gpio.h: Audit include list
This file does not need <asm/gpio.h> so remove it. This file does
however need <linux/types.h> so add that in. This also shows that
arch/arm/mach-rockchip/rk3399/rk3399.c and board/lg/star/star.c were
indirectly getting <asm/gpio.h> from here, so add <asm/gpio.h> to them.
Ilias Apalodimas [Fri, 27 Jun 2025 18:57:16 +0000 (21:57 +0300)]
kbuild: Bump the build system to 5.1
Our last sync with the kernel was 5.1. Even that was a partial one
as some patches from 4.x kernels were already missing making the
transition to a modern kbuild infeasible.
We are so out of sync now, that tracking the patches and backporting
them one by one makes little sense and it's going to take ages.
This is an attempt to sync up Makefile[.lib/.kbuild].
Unfortunately due to sheer amount of patches this is not easy to review,
but that's what we decided during a community call.
One of the biggest changes is get rid of partial linking entirely and
build .a archives isntead of .o.
We diaviate from the kernel on that. Instead of calling a custom script
to create the archive symbol table, we call ar with rcTP (isntead of
rcSTP) since we want a resulting archive that's sauble with the linker.
The only affected platforms are PPC ones. Unfortunately I don't have any
of them around to test, but the objdump of the resulting files --
arch/powerpc/lib/built-in.[oa] looks identical.
lwip:
- Call sys_check_timeouts() and schedule() on RX to fix an issue on
boards with a watchdog and simplify the code
- Enable IP_FRAG and IP_REASSEMBLY
- Add support for setting the TFTP blocksize at runtime
- Fix DNS initialization in wget
- Add the sntp command
- Move code from net/lwip/${cmd}.c to cmd/lwip/${cmd}.c
cadence_qspi: fix odd byte read issue in STIG mode
In DDR mode, even bytes are read using DMA, while the remaining odd
bytes are read using STIG mode. However, the data is not correctly
transferred into the flash read data lower register because the
supplementary byte of the STIG opcode is not being written to the
opcode extension register, resulting in incorrect data being read.
To resolve this issue, when using STIG transactions, the corresponding
supplementary byte of any STIG opcode must be defined in the Opcode
Extension Register (Lower). Issue has been observed on the Macronix
MX66UM2G45G flashes.
spi: cadence_qspi: Set tshsl_ns to at least one sclk_ns
tshsl_ns is the clock delay for chip select deassert. This is the delay in
master reference clocks for the length that the master mode chip select
outputs are de-asserted between transactions.
The minimum delay is always SCLK period to ensure the chip select is never
re-asserted within one SCLK period.
That is why tshsl_ns delay should be at least one sclk_ns value. If it is
less than sclk_ns, set it equal to sclk_ns.
Michal Simek [Mon, 30 Jun 2025 12:21:07 +0000 (14:21 +0200)]
cmd: Introduce CMD_HELP
Add option to disable help command in size constrained systems to save some
space. There is also no need to have ifdefs around CMDLINE because all
commands depends on it.
And also mark cmd_help dependency in test_help.py.
spi: cadence_qspi: Fix odd byte write issue in STIG mode
Starting from 'commit <8077d296adff> ("spi: cadence-quadspi: Use STIG
mode for all ops with small payload") the utilization of STIG mode
has been implemented for read and write operations involving less
than 8 bytes of data.
However, following this commit, encountering timeout issues occurs when
writing odd bytes of data in DDR mode, as indicated below:
"jedec_spi_nor flash@0: flash operation timed out
SF: 3 bytes @ 0x0 Written: ERROR -110"
To resolve this issue, the number of bytes to write has been updated
specifically for DDR mode.
arm64: versal2: Enable reset and poweroff via sysreset framework
reset and poweroff are called via hooks in psci driver which is going
around sysreset framework that's why enable sysreset drivers and do
reset and poweroff via this framework.
Legacy SPI flash devices used a 24-bit (3-byte) addressing scheme,
limiting the addressable memory to 16 MB. To support larger densities
(256 Mbit and higher), extended addressing schemes, such as 32-bit
(4-byte) addressing, were introduced. If the flash density exceeds
16 MB and CONFIG_SPI_FLASH_BAR is disabled, the device will use a
4-byte addressing mode.
drivers: fpga: intel_sdm_mb: Check SIP SMC status in send_bitstream()
While sending bitstream via SIP SMC, busy status received does not
correspond to error, instead it means transfer is accepted but SDM
doesn't have any more free buffer space. Hence, data transmission
is continued when busy status is received.
Padmarao Begari [Wed, 18 Jun 2025 09:43:29 +0000 (15:13 +0530)]
clk: zynqmp: Add support for dpll clock source
The clock driver fails to correctly calculate the PLL clock
rate for peripherals when using the DPLL as the clock source.
The DPLL operates within the full power domain, while peripheral
clocks reside in the low power domain. To ensure accurate PLL
clock rate computation when the peripheral clock source is set
to DPLL, the DPLL-to-LPD cross divisor is used.
projects / thirdparty / u-boot.git / log
